Commit 9d7ef1b7 authored by Florian Fainelli's avatar Florian Fainelli

ARM: dts: BCM63xx: re-parent NAND controller node

The NAND controller is a child node of the UBUS (legacy) bus, not the
AXI (new) bus, re-parent the NAND controller node accordingly. This was
a mistake introduced by a failed merge of this NAND node with other
changes (PMB).

Fixes: b5762cac ("ARM: bcm63138: add NAND DT support")
Reported-by: default avatarBrian Norris <computersforpeace@gmail.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 16dc3bac
......@@ -120,17 +120,6 @@ pmb1: reset-controller@4800e0 {
reg = <0x4800e0 0x10>;
#reset-cells = <2>;
};
nand: nand@2000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
reg = <0x2000 0x600>, <0xf0 0x10>;
reg-names = "nand", "nand-int-base";
status = "disabled";
interrupts = <GIC_SPI 38 0>;
interrupt-names = "nand";
};
};
/* Legacy UBUS base */
......@@ -163,6 +152,17 @@ serial1: serial@620 {
status = "disabled";
};
nand: nand@2000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
reg = <0x2000 0x600>, <0xf0 0x10>;
reg-names = "nand", "nand-int-base";
status = "disabled";
interrupts = <GIC_SPI 38 0>;
interrupt-names = "nand";
};
bootlut: bootlut@8000 {
compatible = "brcm,bcm63138-bootlut";
reg = <0x8000 0x50>;
......
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