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Commit a0491fc4 authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by David Woodhouse
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mtd: cleanup nand.h 

- *var instead of * var
- proper multiline comment
- func(args) instead of func (args)
- 80 lines

So from
|total: 2 errors, 37 warnings, 654 lines checked
we got to one warning.
Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent 766f271a
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Showing with 99 additions and 56 deletions
include/linux/mtd/nand.h
View file @ a0491fc4
...@@ -27,15 +27,17 @@ ...@@ -27,15 +27,17 @@
struct mtd_info; struct mtd_info;
struct nand_flash_dev; struct nand_flash_dev;
/* Scan and identify a NAND device */ /* Scan and identify a NAND device */
extern int nand_scan (struct mtd_info *mtd, int max_chips); extern int nand_scan(struct mtd_info *mtd, int max_chips);
/* Separate phases of nand_scan(), allowing board driver to intervene /*
* and override command or ECC setup according to flash type */ * Separate phases of nand_scan(), allowing board driver to intervene
* and override command or ECC setup according to flash type.
*/
extern int nand_scan_ident(struct mtd_info *mtd, int max_chips, extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
struct nand_flash_dev *table); struct nand_flash_dev *table);
extern int nand_scan_tail(struct mtd_info *mtd); extern int nand_scan_tail(struct mtd_info *mtd);
/* Free resources held by the NAND device */ /* Free resources held by the NAND device */
extern void nand_release (struct mtd_info *mtd); extern void nand_release(struct mtd_info *mtd);
/* Internal helper for board drivers which need to override command function */ /* Internal helper for board drivers which need to override command function */
extern void nand_wait_ready(struct mtd_info *mtd); extern void nand_wait_ready(struct mtd_info *mtd);
...@@ -49,7 +51,8 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); ...@@ -49,7 +51,8 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
/* The maximum number of NAND chips in an array */ /* The maximum number of NAND chips in an array */
#define NAND_MAX_CHIPS 8 #define NAND_MAX_CHIPS 8
/* This constant declares the max. oobsize / page, which /*
* This constant declares the max. oobsize / page, which
* is supported now. If you add a chip with bigger oobsize/page * is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly. * adjust this accordingly.
*/ */
...@@ -153,9 +156,10 @@ typedef enum { ...@@ -153,9 +156,10 @@ typedef enum {
#define NAND_GET_DEVICE 0x80 #define NAND_GET_DEVICE 0x80
/* Option constants for bizarre disfunctionality and real /*
* features * Option constants for bizarre disfunctionality and real
*/ * features.
*/
/* Chip can not auto increment pages */ /* Chip can not auto increment pages */
#define NAND_NO_AUTOINCR 0x00000001 #define NAND_NO_AUTOINCR 0x00000001
/* Buswitdh is 16 bit */ /* Buswitdh is 16 bit */
...@@ -166,19 +170,27 @@ typedef enum { ...@@ -166,19 +170,27 @@ typedef enum {
#define NAND_CACHEPRG 0x00000008 #define NAND_CACHEPRG 0x00000008
/* Chip has copy back function */ /* Chip has copy back function */
#define NAND_COPYBACK 0x00000010 #define NAND_COPYBACK 0x00000010
/* AND Chip which has 4 banks and a confusing page / block /*
* assignment. See Renesas datasheet for further information */ * AND Chip which has 4 banks and a confusing page / block
* assignment. See Renesas datasheet for further information.
*/
#define NAND_IS_AND 0x00000020 #define NAND_IS_AND 0x00000020
/* Chip has a array of 4 pages which can be read without /*
* additional ready /busy waits */ * Chip has a array of 4 pages which can be read without
* additional ready /busy waits.
*/
#define NAND_4PAGE_ARRAY 0x00000040 #define NAND_4PAGE_ARRAY 0x00000040
/* Chip requires that BBT is periodically rewritten to prevent /*
* Chip requires that BBT is periodically rewritten to prevent
* bits from adjacent blocks from 'leaking' in altering data. * bits from adjacent blocks from 'leaking' in altering data.
* This happens with the Renesas AG-AND chips, possibly others. */ * This happens with the Renesas AG-AND chips, possibly others.
*/
#define BBT_AUTO_REFRESH 0x00000080 #define BBT_AUTO_REFRESH 0x00000080
/* Chip does not require ready check on read. True /*
* Chip does not require ready check on read. True
* for all large page devices, as they do not support * for all large page devices, as they do not support
* autoincrement.*/ * autoincrement.
*/
#define NAND_NO_READRDY 0x00000100 #define NAND_NO_READRDY 0x00000100
/* Chip does not allow subpage writes */ /* Chip does not allow subpage writes */
#define NAND_NO_SUBPAGE_WRITE 0x00000200 #define NAND_NO_SUBPAGE_WRITE 0x00000200
...@@ -213,8 +225,10 @@ typedef enum { ...@@ -213,8 +225,10 @@ typedef enum {
#define NAND_USE_FLASH_BBT 0x00010000 #define NAND_USE_FLASH_BBT 0x00010000
/* This option skips the bbt scan during initialization. */ /* This option skips the bbt scan during initialization. */
#define NAND_SKIP_BBTSCAN 0x00020000 #define NAND_SKIP_BBTSCAN 0x00020000
/* This option is defined if the board driver allocates its own buffers /*
(e.g. because it needs them DMA-coherent */ * This option is defined if the board driver allocates its own buffers
* (e.g. because it needs them DMA-coherent).
*/
#define NAND_OWN_BUFFERS 0x00040000 #define NAND_OWN_BUFFERS 0x00040000
/* Chip may not exist, so silence any errors in scan */ /* Chip may not exist, so silence any errors in scan */
#define NAND_SCAN_SILENT_NODEV 0x00080000 #define NAND_SCAN_SILENT_NODEV 0x00080000
...@@ -304,8 +318,9 @@ struct nand_onfi_params { ...@@ -304,8 +318,9 @@ struct nand_onfi_params {
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
* @lock: protection lock * @lock: protection lock
* @active: the mtd device which holds the controller currently * @active: the mtd device which holds the controller currently
* @wq: wait queue to sleep on if a NAND operation is in progress * @wq: wait queue to sleep on if a NAND operation is in
* used instead of the per chip wait queue when a hw controller is available * progress used instead of the per chip wait queue
* when a hw controller is available.
*/ */
struct nand_hw_control { struct nand_hw_control {
spinlock_t lock; spinlock_t lock;
...@@ -329,9 +344,11 @@ struct nand_hw_control { ...@@ -329,9 +344,11 @@ struct nand_hw_control {
* @correct: function for ecc correction, matching to ecc generator (sw/hw) * @correct: function for ecc correction, matching to ecc generator (sw/hw)
* @read_page_raw: function to read a raw page without ECC * @read_page_raw: function to read a raw page without ECC
* @write_page_raw: function to write a raw page without ECC * @write_page_raw: function to write a raw page without ECC
* @read_page: function to read a page according to the ecc generator requirements * @read_page: function to read a page according to the ecc generator
* requirements.
* @read_subpage: function to read parts of the page covered by ECC. * @read_subpage: function to read parts of the page covered by ECC.
* @write_page: function to write a page according to the ecc generator requirements * @write_page: function to write a page according to the ecc generator
* requirements.
* @read_oob: function to read chip OOB data * @read_oob: function to read chip OOB data
* @write_oob: function to write chip OOB data * @write_oob: function to write chip OOB data
*/ */
...@@ -393,13 +410,16 @@ struct nand_buffers { ...@@ -393,13 +410,16 @@ struct nand_buffers {
/** /**
* struct nand_chip - NAND Private Flash Chip Data * struct nand_chip - NAND Private Flash Chip Data
* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device * flash device
* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
* flash device.
* @read_byte: [REPLACEABLE] read one byte from the chip * @read_byte: [REPLACEABLE] read one byte from the chip
* @read_word: [REPLACEABLE] read one word from the chip * @read_word: [REPLACEABLE] read one word from the chip
* @write_buf: [REPLACEABLE] write data from the buffer to the chip * @write_buf: [REPLACEABLE] write data from the buffer to the chip
* @read_buf: [REPLACEABLE] read data from the chip into the buffer * @read_buf: [REPLACEABLE] read data from the chip into the buffer
* @verify_buf: [REPLACEABLE] verify buffer contents against the chip data * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
* data.
* @select_chip: [REPLACEABLE] select chip nr * @select_chip: [REPLACEABLE] select chip nr
* @block_bad: [REPLACEABLE] check, if the block is bad * @block_bad: [REPLACEABLE] check, if the block is bad
* @block_markbad: [REPLACEABLE] mark the block bad * @block_markbad: [REPLACEABLE] mark the block bad
...@@ -409,45 +429,60 @@ struct nand_buffers { ...@@ -409,45 +429,60 @@ struct nand_buffers {
* mtd->oobsize, mtd->writesize and so on. * mtd->oobsize, mtd->writesize and so on.
* @id_data contains the 8 bytes values of NAND_CMD_READID. * @id_data contains the 8 bytes values of NAND_CMD_READID.
* Return with the bus width. * Return with the bus width.
* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
* If set to NULL no access to ready/busy is available and the ready/busy information * device ready/busy line. If set to NULL no access to
* is read from the chip status register * ready/busy is available and the ready/busy information
* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip * is read from the chip status register.
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
* commands to the chip.
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
* ready.
* @ecc: [BOARDSPECIFIC] ecc control ctructure * @ecc: [BOARDSPECIFIC] ecc control ctructure
* @buffers: buffer structure for read/write * @buffers: buffer structure for read/write
* @hwcontrol: platform-specific hardware control structure * @hwcontrol: platform-specific hardware control structure
* @ops: oob operation operands * @ops: oob operation operands
* @erase_cmd: [INTERN] erase command write function, selectable due to AND support * @erase_cmd: [INTERN] erase command write function, selectable due
* to AND support.
* @scan_bbt: [REPLACEABLE] function to scan bad block table * @scan_bbt: [REPLACEABLE] function to scan bad block table
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering
* data from array to read regs (tR).
* @state: [INTERN] the current state of the NAND device * @state: [INTERN] the current state of the NAND device
* @oob_poi: poison value buffer * @oob_poi: poison value buffer
* @page_shift: [INTERN] number of address bits in a page (column address bits) * @page_shift: [INTERN] number of address bits in a page (column
* address bits).
* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
* @chip_shift: [INTERN] number of address bits in one chip * @chip_shift: [INTERN] number of address bits in one chip
* @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about * @options: [BOARDSPECIFIC] various chip options. They can partly
* special functionality. See the defines for further explanation * be set to inform nand_scan about special functionality.
* @badblockpos: [INTERN] position of the bad block marker in the oob area * See the defines for further explanation.
* @badblockpos: [INTERN] position of the bad block marker in the oob
* area.
* @cellinfo: [INTERN] MLC/multichip data from chip ident * @cellinfo: [INTERN] MLC/multichip data from chip ident
* @numchips: [INTERN] number of physical chips * @numchips: [INTERN] number of physical chips
* @chipsize: [INTERN] the size of one chip for multichip arrays * @chipsize: [INTERN] the size of one chip for multichip arrays
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf * @pagebuf: [INTERN] holds the pagenumber which is currently in
* data_buf.
* @subpagesize: [INTERN] holds the subpagesize * @subpagesize: [INTERN] holds the subpagesize
* @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded), non 0 if ONFI supported * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is supported, 0 otherwise * non 0 if ONFI supported.
* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
* supported, 0 otherwise.
* @ecclayout: [REPLACEABLE] the default ecc placement scheme * @ecclayout: [REPLACEABLE] the default ecc placement scheme
* @bbt: [INTERN] bad block table pointer * @bbt: [INTERN] bad block table pointer
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
* lookup.
* @bbt_md: [REPLACEABLE] bad block table mirror descriptor * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
* @controller: [REPLACEABLE] a pointer to a hardware controller structure * bad block scan.
* which is shared among multiple independend devices * @controller: [REPLACEABLE] a pointer to a hardware controller
* structure which is shared among multiple independend
* devices.
* @priv: [OPTIONAL] pointer to private chip date * @priv: [OPTIONAL] pointer to private chip date
* @errstat: [OPTIONAL] hardware specific function to perform additional error status checks * @errstat: [OPTIONAL] hardware specific function to perform
* (determine if errors are correctable) * additional error status checks (determine if errors are
* correctable).
* @write_page: [REPLACEABLE] High-level page write function * @write_page: [REPLACEABLE] High-level page write function
*/ */
...@@ -457,24 +492,32 @@ struct nand_chip { ...@@ -457,24 +492,32 @@ struct nand_chip {
uint8_t (*read_byte)(struct mtd_info *mtd); uint8_t (*read_byte)(struct mtd_info *mtd);
u16 (*read_word)(struct mtd_info *mtd); u16 (*read_word)(struct mtd_info *mtd);
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf,
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); int len);
int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); void (*read_buf)(struct mtd_info *mtd, uint8_t *buf,
int len);
int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf,
int len);
void (*select_chip)(struct mtd_info *mtd, int chip); void (*select_chip)(struct mtd_info *mtd, int chip);
int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); int (*block_bad)(struct mtd_info *mtd, loff_t ofs,
int getchip);
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
void (*cmd_ctrl)(struct mtd_info *mtd, int dat, void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
unsigned int ctrl); unsigned int ctrl);
int (*init_size)(struct mtd_info *mtd, int (*init_size)(struct mtd_info *mtd,
struct nand_chip *this, u8 *id_data); struct nand_chip *this, u8 *id_data);
int (*dev_ready)(struct mtd_info *mtd); int (*dev_ready)(struct mtd_info *mtd);
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); void (*cmdfunc)(struct mtd_info *mtd, unsigned command,
int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); int column, int page_addr);
int (*waitfunc)(struct mtd_info *mtd,
struct nand_chip *this);
void (*erase_cmd)(struct mtd_info *mtd, int page); void (*erase_cmd)(struct mtd_info *mtd, int page);
int (*scan_bbt)(struct mtd_info *mtd); int (*scan_bbt)(struct mtd_info *mtd);
int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); int (*errstat)(struct mtd_info *mtd, struct nand_chip *this,
int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, int state, int status, int page);
const uint8_t *buf, int page, int cached, int raw); int (*write_page)(struct mtd_info *mtd,
struct nand_chip *chip, const uint8_t *buf, int page,
int cached, int raw);
int chip_delay; int chip_delay;
unsigned int options; unsigned int options;
...@@ -557,7 +600,7 @@ struct nand_flash_dev { ...@@ -557,7 +600,7 @@ struct nand_flash_dev {
*/ */
struct nand_manufacturers { struct nand_manufacturers {
int id; int id;
char * name; char *name;
}; };
extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_flash_dev nand_flash_ids[];
...@@ -570,7 +613,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt); ...@@ -570,7 +613,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
int allowbbt); int allowbbt);
extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t * retlen, uint8_t * buf); size_t *retlen, uint8_t *buf);
/** /**
* struct platform_nand_chip - chip level device structure * struct platform_nand_chip - chip level device structure
......
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