Commit a126de75 authored by Chris Packham's avatar Chris Packham Committed by Gregory CLEMENT

ARM: dts: armada-38x add node labels

As was done with Armada XP, add node labels to Armada 38x common and SoC
specific nodes to make them easier to reference in board device trees.
Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent c1ae3cfa
...@@ -70,13 +70,7 @@ cpu@1 { ...@@ -70,13 +70,7 @@ cpu@1 {
}; };
soc { soc {
internal-regs { pciec: pcie-controller {
pinctrl@18000 {
compatible = "marvell,mv88f6820-pinctrl";
};
};
pcie-controller {
compatible = "marvell,armada-370-pcie"; compatible = "marvell,armada-370-pcie";
status = "disabled"; status = "disabled";
device_type = "pci"; device_type = "pci";
...@@ -106,7 +100,7 @@ pcie-controller { ...@@ -106,7 +100,7 @@ pcie-controller {
* configured in x4 by the bootloader, then * configured in x4 by the bootloader, then
* pcie@4,0 is not available. * pcie@4,0 is not available.
*/ */
pcie@1,0 { pcie1: pcie@1,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
...@@ -124,7 +118,7 @@ pcie@1,0 { ...@@ -124,7 +118,7 @@ pcie@1,0 {
}; };
/* x1 port */ /* x1 port */
pcie@2,0 { pcie2: pcie@2,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
...@@ -142,7 +136,7 @@ pcie@2,0 { ...@@ -142,7 +136,7 @@ pcie@2,0 {
}; };
/* x1 port */ /* x1 port */
pcie@3,0 { pcie3: pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
...@@ -163,7 +157,7 @@ pcie@3,0 { ...@@ -163,7 +157,7 @@ pcie@3,0 {
* x1 port only available when pcie@1,0 is * x1 port only available when pcie@1,0 is
* configured as a x1 port * configured as a x1 port
*/ */
pcie@4,0 { pcie4: pcie@4,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
...@@ -182,3 +176,7 @@ pcie@4,0 { ...@@ -182,3 +176,7 @@ pcie@4,0 {
}; };
}; };
}; };
&pinctrl {
compatible = "marvell,mv88f6820-pinctrl";
};
...@@ -50,13 +50,8 @@ / { ...@@ -50,13 +50,8 @@ / {
model = "Marvell Armada 388 family SoC"; model = "Marvell Armada 388 family SoC";
compatible = "marvell,armada388", "marvell,armada385", compatible = "marvell,armada388", "marvell,armada385",
"marvell,armada380"; "marvell,armada380";
soc { soc {
internal-regs { internal-regs {
pinctrl@18000 {
compatible = "marvell,mv88f6828-pinctrl";
};
sata@e0000 { sata@e0000 {
compatible = "marvell,armada-380-ahci"; compatible = "marvell,armada-380-ahci";
reg = <0xe0000 0x2000>; reg = <0xe0000 0x2000>;
...@@ -68,3 +63,7 @@ sata@e0000 { ...@@ -68,3 +63,7 @@ sata@e0000 {
}; };
}; };
}; };
&pinctrl {
compatible = "marvell,mv88f6828-pinctrl";
};
...@@ -82,7 +82,7 @@ bootrom { ...@@ -82,7 +82,7 @@ bootrom {
reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>; reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
}; };
devbus-bootcs { devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>; reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>; ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
...@@ -92,7 +92,7 @@ devbus-bootcs { ...@@ -92,7 +92,7 @@ devbus-bootcs {
status = "disabled"; status = "disabled";
}; };
devbus-cs0 { devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>; reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>; ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
...@@ -102,7 +102,7 @@ devbus-cs0 { ...@@ -102,7 +102,7 @@ devbus-cs0 {
status = "disabled"; status = "disabled";
}; };
devbus-cs1 { devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>; reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>; ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
...@@ -112,7 +112,7 @@ devbus-cs1 { ...@@ -112,7 +112,7 @@ devbus-cs1 {
status = "disabled"; status = "disabled";
}; };
devbus-cs2 { devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>; reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>; ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
...@@ -122,7 +122,7 @@ devbus-cs2 { ...@@ -122,7 +122,7 @@ devbus-cs2 {
status = "disabled"; status = "disabled";
}; };
devbus-cs3 { devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>; reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>; ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
...@@ -339,7 +339,7 @@ gpio1: gpio@18140 { ...@@ -339,7 +339,7 @@ gpio1: gpio@18140 {
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
}; };
system-controller@18200 { systemc: system-controller@18200 {
compatible = "marvell,armada-380-system-controller", compatible = "marvell,armada-380-system-controller",
"marvell,armada-370-xp-system-controller"; "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>; reg = <0x18200 0x100>;
...@@ -373,7 +373,7 @@ mpic: interrupt-controller@20a00 { ...@@ -373,7 +373,7 @@ mpic: interrupt-controller@20a00 {
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
}; };
timer@20300 { timer: timer@20300 {
compatible = "marvell,armada-380-timer", compatible = "marvell,armada-380-timer",
"marvell,armada-xp-timer"; "marvell,armada-xp-timer";
reg = <0x20300 0x30>, <0x21040 0x30>; reg = <0x20300 0x30>, <0x21040 0x30>;
...@@ -387,14 +387,14 @@ timer@20300 { ...@@ -387,14 +387,14 @@ timer@20300 {
clock-names = "nbclk", "fixed"; clock-names = "nbclk", "fixed";
}; };
watchdog@20300 { watchdog: watchdog@20300 {
compatible = "marvell,armada-380-wdt"; compatible = "marvell,armada-380-wdt";
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>; reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
clocks = <&coreclk 2>, <&refclk>; clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed"; clock-names = "nbclk", "fixed";
}; };
cpurst@20800 { cpurst: cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset"; compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x10>; reg = <0x20800 0x10>;
}; };
...@@ -404,12 +404,12 @@ mpcore-soc-ctrl@20d20 { ...@@ -404,12 +404,12 @@ mpcore-soc-ctrl@20d20 {
reg = <0x20d20 0x6c>; reg = <0x20d20 0x6c>;
}; };
coherency-fabric@21010 { coherencyfab: coherency-fabric@21010 {
compatible = "marvell,armada-380-coherency-fabric"; compatible = "marvell,armada-380-coherency-fabric";
reg = <0x21010 0x1c>; reg = <0x21010 0x1c>;
}; };
pmsu@22000 { pmsu: pmsu@22000 {
compatible = "marvell,armada-380-pmsu"; compatible = "marvell,armada-380-pmsu";
reg = <0x22000 0x1000>; reg = <0x22000 0x1000>;
}; };
...@@ -451,7 +451,7 @@ eth2: ethernet@34000 { ...@@ -451,7 +451,7 @@ eth2: ethernet@34000 {
status = "disabled"; status = "disabled";
}; };
usb@58000 { usb0: usb@58000 {
compatible = "marvell,orion-ehci"; compatible = "marvell,orion-ehci";
reg = <0x58000 0x500>; reg = <0x58000 0x500>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
...@@ -459,7 +459,7 @@ usb@58000 { ...@@ -459,7 +459,7 @@ usb@58000 {
status = "disabled"; status = "disabled";
}; };
xor@60800 { xor0: xor@60800 {
compatible = "marvell,armada-380-xor", "marvell,orion-xor"; compatible = "marvell,armada-380-xor", "marvell,orion-xor";
reg = <0x60800 0x100 reg = <0x60800 0x100
0x60a00 0x100>; 0x60a00 0x100>;
...@@ -479,7 +479,7 @@ xor01 { ...@@ -479,7 +479,7 @@ xor01 {
}; };
}; };
xor@60900 { xor1: xor@60900 {
compatible = "marvell,armada-380-xor", "marvell,orion-xor"; compatible = "marvell,armada-380-xor", "marvell,orion-xor";
reg = <0x60900 0x100 reg = <0x60900 0x100
0x60b00 0x100>; 0x60b00 0x100>;
...@@ -507,7 +507,7 @@ mdio: mdio@72004 { ...@@ -507,7 +507,7 @@ mdio: mdio@72004 {
clocks = <&gateclk 4>; clocks = <&gateclk 4>;
}; };
crypto@90000 { cesa: crypto@90000 {
compatible = "marvell,armada-38x-crypto"; compatible = "marvell,armada-38x-crypto";
reg = <0x90000 0x10000>; reg = <0x90000 0x10000>;
reg-names = "regs"; reg-names = "regs";
...@@ -522,7 +522,7 @@ crypto@90000 { ...@@ -522,7 +522,7 @@ crypto@90000 {
marvell,crypto-sram-size = <0x800>; marvell,crypto-sram-size = <0x800>;
}; };
rtc@a3800 { rtc: rtc@a3800 {
compatible = "marvell,armada-380-rtc"; compatible = "marvell,armada-380-rtc";
reg = <0xa3800 0x20>, <0x184a0 0x0c>; reg = <0xa3800 0x20>, <0x184a0 0x0c>;
reg-names = "rtc", "rtc-soc"; reg-names = "rtc", "rtc-soc";
...@@ -561,13 +561,13 @@ coredivclk: clock@e4250 { ...@@ -561,13 +561,13 @@ coredivclk: clock@e4250 {
clock-output-names = "nand"; clock-output-names = "nand";
}; };
thermal@e8078 { thermal: thermal@e8078 {
compatible = "marvell,armada380-thermal"; compatible = "marvell,armada380-thermal";
reg = <0xe4078 0x4>, <0xe4074 0x4>; reg = <0xe4078 0x4>, <0xe4074 0x4>;
status = "okay"; status = "okay";
}; };
flash@d0000 { nand: flash@d0000 {
compatible = "marvell,armada370-nand"; compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>; reg = <0xd0000 0x54>;
#address-cells = <1>; #address-cells = <1>;
...@@ -577,7 +577,7 @@ flash@d0000 { ...@@ -577,7 +577,7 @@ flash@d0000 {
status = "disabled"; status = "disabled";
}; };
sdhci@d8000 { sdhci: sdhci@d8000 {
compatible = "marvell,armada-380-sdhci"; compatible = "marvell,armada-380-sdhci";
reg-names = "sdhci", "mbus", "conf-sdio3"; reg-names = "sdhci", "mbus", "conf-sdio3";
reg = <0xd8000 0x1000>, reg = <0xd8000 0x1000>,
......
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