Commit a264bf34 authored by Marc Zyngier's avatar Marc Zyngier

arm64: insn: Add N immediate encoding

We're missing the a way to generate the encoding of the N immediate,
which is only a single bit used in a number of instruction that take
an immediate.
Acked-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent dea5e2a4
...@@ -70,6 +70,7 @@ enum aarch64_insn_imm_type { ...@@ -70,6 +70,7 @@ enum aarch64_insn_imm_type {
AARCH64_INSN_IMM_6, AARCH64_INSN_IMM_6,
AARCH64_INSN_IMM_S, AARCH64_INSN_IMM_S,
AARCH64_INSN_IMM_R, AARCH64_INSN_IMM_R,
AARCH64_INSN_IMM_N,
AARCH64_INSN_IMM_MAX AARCH64_INSN_IMM_MAX
}; };
......
...@@ -343,6 +343,10 @@ static int __kprobes aarch64_get_imm_shift_mask(enum aarch64_insn_imm_type type, ...@@ -343,6 +343,10 @@ static int __kprobes aarch64_get_imm_shift_mask(enum aarch64_insn_imm_type type,
mask = BIT(6) - 1; mask = BIT(6) - 1;
shift = 16; shift = 16;
break; break;
case AARCH64_INSN_IMM_N:
mask = 1;
shift = 22;
break;
default: default:
return -EINVAL; return -EINVAL;
} }
......
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