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Commit a2884f37 authored by Grant Likely's avatar Grant Likely
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[POWERPC] mpc5200: Switch mpc5200 dts files to dts-v1 format 

Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent 8f3ba2dc
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Showing with 286 additions and 288 deletions
arch/powerpc/boot/dts/cm5200.dts
View file @ a2884f37
...@@ -10,11 +10,7 @@ ...@@ -10,11 +10,7 @@
* option) any later version. * option) any later version.
*/ */
/* /dts-v1/;
* WARNING: Do not depend on this tree layout remaining static just yet.
* The MPC5200 device tree conventions are still in flux
* Keep an eye on the linuxppc-dev mailing list for more details
*/
/ { / {
model = "schindler,cm5200"; model = "schindler,cm5200";
...@@ -29,10 +25,10 @@ cpus { ...@@ -29,10 +25,10 @@ cpus {
PowerPC,5200@0 { PowerPC,5200@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
d-cache-line-size = <20>; d-cache-line-size = <32>;
i-cache-line-size = <20>; i-cache-line-size = <32>;
d-cache-size = <4000>; // L1, 16K d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader
...@@ -41,34 +37,34 @@ PowerPC,5200@0 { ...@@ -41,34 +37,34 @@ PowerPC,5200@0 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <00000000 04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };
soc5200@f0000000 { soc5200@f0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc5200b-immr"; compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>; ranges = <0 0xf0000000 0x0000c000>;
reg = <f0000000 00000100>; reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader
cdm@200 { cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>; reg = <0x200 0x38>;
}; };
mpc5200_pic: pic@500 { mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels; // 5200 interrupts are encoded into two levels;
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>; reg = <0x500 0x80>;
}; };
timer@600 { // General Purpose Timer timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>; reg = <0x600 0x10>;
interrupts = <1 9 0>; interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt; fsl,has-wdt;
...@@ -76,108 +72,108 @@ timer@600 { // General Purpose Timer ...@@ -76,108 +72,108 @@ timer@600 { // General Purpose Timer
timer@610 { // General Purpose Timer timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>; reg = <0x610 0x10>;
interrupts = <1 a 0>; interrupts = <1 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@620 { // General Purpose Timer timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>; reg = <0x620 0x10>;
interrupts = <1 b 0>; interrupts = <1 11 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@630 { // General Purpose Timer timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>; reg = <0x630 0x10>;
interrupts = <1 c 0>; interrupts = <1 12 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@640 { // General Purpose Timer timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>; reg = <0x640 0x10>;
interrupts = <1 d 0>; interrupts = <1 13 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@650 { // General Purpose Timer timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>; reg = <0x650 0x10>;
interrupts = <1 e 0>; interrupts = <1 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@660 { // General Purpose Timer timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <660 10>; reg = <0x660 0x10>;
interrupts = <1 f 0>; interrupts = <1 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@670 { // General Purpose Timer timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <670 10>; reg = <0x670 0x10>;
interrupts = <1 10 0>; interrupts = <1 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
rtc@800 { // Real time clock rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>; reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>; interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
gpio@b00 { gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>; reg = <0xb00 0x40>;
interrupts = <1 7 0>; interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
gpio@c00 { gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>; reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>; interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
spi@f00 { spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>; reg = <0xf00 0x20>;
interrupts = <2 d 0 2 e 0>; interrupts = <2 13 0 2 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
usb@1000 { usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>; reg = <0x1000 0xff>;
interrupts = <2 6 0>; interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
dma-controller@1200 { dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>; reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0 3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0 3 8 0 3 9 0 3 10 0 3 11 0
3 c 0 3 d 0 3 e 0 3 f 0>; 3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
xlb@1f00 { xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>; reg = <0x1f00 0x100>;
}; };
serial@2000 { // PSC1 serial@2000 { // PSC1
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment port-number = <0>; // Logical port assignment
reg = <2000 100>; reg = <0x2000 0x100>;
interrupts = <2 1 0>; interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -186,7 +182,7 @@ serial@2200 { // PSC2 ...@@ -186,7 +182,7 @@ serial@2200 { // PSC2
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment port-number = <1>; // Logical port assignment
reg = <2200 100>; reg = <0x2200 0x100>;
interrupts = <2 2 0>; interrupts = <2 2 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -195,7 +191,7 @@ serial@2400 { // PSC3 ...@@ -195,7 +191,7 @@ serial@2400 { // PSC3
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment port-number = <2>; // Logical port assignment
reg = <2400 100>; reg = <0x2400 0x100>;
interrupts = <2 3 0>; interrupts = <2 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -204,7 +200,7 @@ serial@2c00 { // PSC6 ...@@ -204,7 +200,7 @@ serial@2c00 { // PSC6
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <5>; // Logical port assignment port-number = <5>; // Logical port assignment
reg = <2c00 100>; reg = <0x2c00 0x100>;
interrupts = <2 4 0>; interrupts = <2 4 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -212,7 +208,7 @@ serial@2c00 { // PSC6 ...@@ -212,7 +208,7 @@ serial@2c00 { // PSC6
ethernet@3000 { ethernet@3000 {
device_type = "network"; device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>; reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>; interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -223,7 +219,7 @@ mdio@3000 { ...@@ -223,7 +219,7 @@ mdio@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -237,15 +233,15 @@ i2c@3d40 { ...@@ -237,15 +233,15 @@ i2c@3d40 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>; reg = <0x3d40 0x40>;
interrupts = <2 10 0>; interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
}; };
sram@8000 { sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>; reg = <0x8000 0x4000>;
}; };
}; };
...@@ -254,12 +250,12 @@ lpb { ...@@ -254,12 +250,12 @@ lpb {
compatible = "fsl,lpb"; compatible = "fsl,lpb";
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 fc000000 2000000>; ranges = <0 0 0xfc000000 0x2000000>;
// 16-bit flash device at LocalPlus Bus CS0 // 16-bit flash device at LocalPlus Bus CS0
flash@0,0 { flash@0,0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0 0 2000000>; reg = <0 0 0x2000000>;
bank-width = <2>; bank-width = <2>;
device-width = <2>; device-width = <2>;
#size-cells = <1>; #size-cells = <1>;
......
arch/powerpc/boot/dts/lite5200.dts
View file @ a2884f37
...@@ -10,6 +10,8 @@ ...@@ -10,6 +10,8 @@
* option) any later version. * option) any later version.
*/ */
/dts-v1/;
/ { / {
model = "fsl,lite5200"; model = "fsl,lite5200";
compatible = "fsl,lite5200"; compatible = "fsl,lite5200";
...@@ -23,10 +25,10 @@ cpus { ...@@ -23,10 +25,10 @@ cpus {
PowerPC,5200@0 { PowerPC,5200@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
d-cache-line-size = <20>; d-cache-line-size = <32>;
i-cache-line-size = <20>; i-cache-line-size = <32>;
d-cache-size = <4000>; // L1, 16K d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader
...@@ -35,21 +37,21 @@ PowerPC,5200@0 { ...@@ -35,21 +37,21 @@ PowerPC,5200@0 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <00000000 04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };
soc5200@f0000000 { soc5200@f0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc5200-immr"; compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>; ranges = <0 0xf0000000 0x0000c000>;
reg = <f0000000 00000100>; reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader
cdm@200 { cdm@200 {
compatible = "fsl,mpc5200-cdm"; compatible = "fsl,mpc5200-cdm";
reg = <200 38>; reg = <0x200 0x38>;
}; };
mpc5200_pic: interrupt-controller@500 { mpc5200_pic: interrupt-controller@500 {
...@@ -58,13 +60,13 @@ mpc5200_pic: interrupt-controller@500 { ...@@ -58,13 +60,13 @@ mpc5200_pic: interrupt-controller@500 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
device_type = "interrupt-controller"; device_type = "interrupt-controller";
compatible = "fsl,mpc5200-pic"; compatible = "fsl,mpc5200-pic";
reg = <500 80>; reg = <0x500 0x80>;
}; };
timer@600 { // General Purpose Timer timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <0>; cell-index = <0>;
reg = <600 10>; reg = <0x600 0x10>;
interrupts = <1 9 0>; interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt; fsl,has-wdt;
...@@ -73,63 +75,63 @@ timer@600 { // General Purpose Timer ...@@ -73,63 +75,63 @@ timer@600 { // General Purpose Timer
timer@610 { // General Purpose Timer timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <1>; cell-index = <1>;
reg = <610 10>; reg = <0x610 0x10>;
interrupts = <1 a 0>; interrupts = <1 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@620 { // General Purpose Timer timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <2>; cell-index = <2>;
reg = <620 10>; reg = <0x620 0x10>;
interrupts = <1 b 0>; interrupts = <1 11 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@630 { // General Purpose Timer timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <3>; cell-index = <3>;
reg = <630 10>; reg = <0x630 0x10>;
interrupts = <1 c 0>; interrupts = <1 12 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@640 { // General Purpose Timer timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <4>; cell-index = <4>;
reg = <640 10>; reg = <0x640 0x10>;
interrupts = <1 d 0>; interrupts = <1 13 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@650 { // General Purpose Timer timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <5>; cell-index = <5>;
reg = <650 10>; reg = <0x650 0x10>;
interrupts = <1 e 0>; interrupts = <1 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@660 { // General Purpose Timer timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <6>; cell-index = <6>;
reg = <660 10>; reg = <0x660 0x10>;
interrupts = <1 f 0>; interrupts = <1 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@670 { // General Purpose Timer timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
cell-index = <7>; cell-index = <7>;
reg = <670 10>; reg = <0x670 0x10>;
interrupts = <1 10 0>; interrupts = <1 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
rtc@800 { // Real time clock rtc@800 { // Real time clock
compatible = "fsl,mpc5200-rtc"; compatible = "fsl,mpc5200-rtc";
device_type = "rtc"; device_type = "rtc";
reg = <800 100>; reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>; interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -137,43 +139,43 @@ rtc@800 { // Real time clock ...@@ -137,43 +139,43 @@ rtc@800 { // Real time clock
can@900 { can@900 {
compatible = "fsl,mpc5200-mscan"; compatible = "fsl,mpc5200-mscan";
cell-index = <0>; cell-index = <0>;
interrupts = <2 11 0>; interrupts = <2 17 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
reg = <900 80>; reg = <0x900 0x80>;
}; };
can@980 { can@980 {
compatible = "fsl,mpc5200-mscan"; compatible = "fsl,mpc5200-mscan";
cell-index = <1>; cell-index = <1>;
interrupts = <2 12 0>; interrupts = <2 18 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
reg = <980 80>; reg = <0x980 0x80>;
}; };
gpio@b00 { gpio@b00 {
compatible = "fsl,mpc5200-gpio"; compatible = "fsl,mpc5200-gpio";
reg = <b00 40>; reg = <0xb00 0x40>;
interrupts = <1 7 0>; interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
gpio@c00 { gpio@c00 {
compatible = "fsl,mpc5200-gpio-wkup"; compatible = "fsl,mpc5200-gpio-wkup";
reg = <c00 40>; reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>; interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
spi@f00 { spi@f00 {
compatible = "fsl,mpc5200-spi"; compatible = "fsl,mpc5200-spi";
reg = <f00 20>; reg = <0xf00 0x20>;
interrupts = <2 d 0 2 e 0>; interrupts = <2 13 0 2 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
usb@1000 { usb@1000 {
compatible = "fsl,mpc5200-ohci","ohci-be"; compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>; reg = <0x1000 0xff>;
interrupts = <2 6 0>; interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -181,17 +183,17 @@ usb@1000 { ...@@ -181,17 +183,17 @@ usb@1000 {
dma-controller@1200 { dma-controller@1200 {
device_type = "dma-controller"; device_type = "dma-controller";
compatible = "fsl,mpc5200-bestcomm"; compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>; reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0 3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0 3 8 0 3 9 0 3 10 0 3 11 0
3 c 0 3 d 0 3 e 0 3 f 0>; 3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
xlb@1f00 { xlb@1f00 {
compatible = "fsl,mpc5200-xlb"; compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>; reg = <0x1f00 0x100>;
}; };
serial@2000 { // PSC1 serial@2000 { // PSC1
...@@ -199,7 +201,7 @@ serial@2000 { // PSC1 ...@@ -199,7 +201,7 @@ serial@2000 { // PSC1
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment port-number = <0>; // Logical port assignment
cell-index = <0>; cell-index = <0>;
reg = <2000 100>; reg = <0x2000 0x100>;
interrupts = <2 1 0>; interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -208,7 +210,7 @@ serial@2000 { // PSC1 ...@@ -208,7 +210,7 @@ serial@2000 { // PSC1
//ac97@2200 { // PSC2 //ac97@2200 { // PSC2
// compatible = "fsl,mpc5200-psc-ac97"; // compatible = "fsl,mpc5200-psc-ac97";
// cell-index = <1>; // cell-index = <1>;
// reg = <2200 100>; // reg = <0x2200 0x100>;
// interrupts = <2 2 0>; // interrupts = <2 2 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -217,7 +219,7 @@ serial@2000 { // PSC1 ...@@ -217,7 +219,7 @@ serial@2000 { // PSC1
//i2s@2400 { // PSC3 //i2s@2400 { // PSC3
// compatible = "fsl,mpc5200-psc-i2s"; // compatible = "fsl,mpc5200-psc-i2s";
// cell-index = <2>; // cell-index = <2>;
// reg = <2400 100>; // reg = <0x2400 0x100>;
// interrupts = <2 3 0>; // interrupts = <2 3 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -227,8 +229,8 @@ serial@2000 { // PSC1 ...@@ -227,8 +229,8 @@ serial@2000 { // PSC1
// device_type = "serial"; // device_type = "serial";
// compatible = "fsl,mpc5200-psc-uart"; // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <3>; // cell-index = <3>;
// reg = <2600 100>; // reg = <0x2600 0x100>;
// interrupts = <2 b 0>; // interrupts = <2 11 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -237,8 +239,8 @@ serial@2000 { // PSC1 ...@@ -237,8 +239,8 @@ serial@2000 { // PSC1
// device_type = "serial"; // device_type = "serial";
// compatible = "fsl,mpc5200-psc-uart"; // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <4>; // cell-index = <4>;
// reg = <2800 100>; // reg = <0x2800 0x100>;
// interrupts = <2 c 0>; // interrupts = <2 12 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -246,7 +248,7 @@ serial@2000 { // PSC1 ...@@ -246,7 +248,7 @@ serial@2000 { // PSC1
//spi@2c00 { // PSC6 //spi@2c00 { // PSC6
// compatible = "fsl,mpc5200-psc-spi"; // compatible = "fsl,mpc5200-psc-spi";
// cell-index = <5>; // cell-index = <5>;
// reg = <2c00 100>; // reg = <0x2c00 0x100>;
// interrupts = <2 4 0>; // interrupts = <2 4 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -254,7 +256,7 @@ serial@2000 { // PSC1 ...@@ -254,7 +256,7 @@ serial@2000 { // PSC1
ethernet@3000 { ethernet@3000 {
device_type = "network"; device_type = "network";
compatible = "fsl,mpc5200-fec"; compatible = "fsl,mpc5200-fec";
reg = <3000 800>; reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>; interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -265,11 +267,11 @@ mdio@3000 { ...@@ -265,11 +267,11 @@ mdio@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200-mdio"; compatible = "fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
phy0:ethernet-phy@1 { phy0: ethernet-phy@1 {
device_type = "ethernet-phy"; device_type = "ethernet-phy";
reg = <1>; reg = <1>;
}; };
...@@ -278,7 +280,7 @@ phy0:ethernet-phy@1 { ...@@ -278,7 +280,7 @@ phy0:ethernet-phy@1 {
ata@3a00 { ata@3a00 {
device_type = "ata"; device_type = "ata";
compatible = "fsl,mpc5200-ata"; compatible = "fsl,mpc5200-ata";
reg = <3a00 100>; reg = <0x3a00 0x100>;
interrupts = <2 7 0>; interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -288,8 +290,8 @@ i2c@3d00 { ...@@ -288,8 +290,8 @@ i2c@3d00 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>; cell-index = <0>;
reg = <3d00 40>; reg = <0x3d00 0x40>;
interrupts = <2 f 0>; interrupts = <2 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
}; };
...@@ -299,14 +301,14 @@ i2c@3d40 { ...@@ -299,14 +301,14 @@ i2c@3d40 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>; cell-index = <1>;
reg = <3d40 40>; reg = <0x3d40 0x40>;
interrupts = <2 10 0>; interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
}; };
sram@8000 { sram@8000 {
compatible = "fsl,mpc5200-sram","sram"; compatible = "fsl,mpc5200-sram","sram";
reg = <8000 4000>; reg = <0x8000 0x4000>;
}; };
}; };
...@@ -316,18 +318,18 @@ pci@f0000d00 { ...@@ -316,18 +318,18 @@ pci@f0000d00 {
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
compatible = "fsl,mpc5200-pci"; compatible = "fsl,mpc5200-pci";
reg = <f0000d00 100>; reg = <0xf0000d00 0x100>;
interrupt-map-mask = <f800 0 0 7>; interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
c000 0 0 2 &mpc5200_pic 0 0 3 0xc000 0 0 2 &mpc5200_pic 0 0 3
c000 0 0 3 &mpc5200_pic 0 0 3 0xc000 0 0 3 &mpc5200_pic 0 0 3
c000 0 0 4 &mpc5200_pic 0 0 3>; 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 a 0>; interrupts = <2 8 0 2 9 0 2 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>; bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 20000000 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
02000000 0 a0000000 a0000000 0 10000000 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
01000000 0 00000000 b0000000 0 01000000>; 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
}; };
}; };
arch/powerpc/boot/dts/lite5200b.dts
View file @ a2884f37
...@@ -10,11 +10,7 @@ ...@@ -10,11 +10,7 @@
* option) any later version. * option) any later version.
*/ */
/* /dts-v1/;
* WARNING: Do not depend on this tree layout remaining static just yet.
* The MPC5200 device tree conventions are still in flux
* Keep an eye on the linuxppc-dev mailing list for more details
*/
/ { / {
model = "fsl,lite5200b"; model = "fsl,lite5200b";
...@@ -29,10 +25,10 @@ cpus { ...@@ -29,10 +25,10 @@ cpus {
PowerPC,5200@0 { PowerPC,5200@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
d-cache-line-size = <20>; d-cache-line-size = <32>;
i-cache-line-size = <20>; i-cache-line-size = <32>;
d-cache-size = <4000>; // L1, 16K d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader
...@@ -41,21 +37,21 @@ PowerPC,5200@0 { ...@@ -41,21 +37,21 @@ PowerPC,5200@0 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <00000000 10000000>; // 256MB reg = <0x00000000 0x10000000>; // 256MB
}; };
soc5200@f0000000 { soc5200@f0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc5200b-immr"; compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>; ranges = <0 0xf0000000 0x0000c000>;
reg = <f0000000 00000100>; reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader
cdm@200 { cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>; reg = <0x200 0x38>;
}; };
mpc5200_pic: interrupt-controller@500 { mpc5200_pic: interrupt-controller@500 {
...@@ -64,13 +60,13 @@ mpc5200_pic: interrupt-controller@500 { ...@@ -64,13 +60,13 @@ mpc5200_pic: interrupt-controller@500 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
device_type = "interrupt-controller"; device_type = "interrupt-controller";
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>; reg = <0x500 0x80>;
}; };
timer@600 { // General Purpose Timer timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <0>; cell-index = <0>;
reg = <600 10>; reg = <0x600 0x10>;
interrupts = <1 9 0>; interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt; fsl,has-wdt;
...@@ -79,63 +75,63 @@ timer@600 { // General Purpose Timer ...@@ -79,63 +75,63 @@ timer@600 { // General Purpose Timer
timer@610 { // General Purpose Timer timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <1>; cell-index = <1>;
reg = <610 10>; reg = <0x610 0x10>;
interrupts = <1 a 0>; interrupts = <1 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@620 { // General Purpose Timer timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <2>; cell-index = <2>;
reg = <620 10>; reg = <0x620 0x10>;
interrupts = <1 b 0>; interrupts = <1 11 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@630 { // General Purpose Timer timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <3>; cell-index = <3>;
reg = <630 10>; reg = <0x630 0x10>;
interrupts = <1 c 0>; interrupts = <1 12 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@640 { // General Purpose Timer timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <4>; cell-index = <4>;
reg = <640 10>; reg = <0x640 0x10>;
interrupts = <1 d 0>; interrupts = <1 13 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@650 { // General Purpose Timer timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <5>; cell-index = <5>;
reg = <650 10>; reg = <0x650 0x10>;
interrupts = <1 e 0>; interrupts = <1 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@660 { // General Purpose Timer timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <6>; cell-index = <6>;
reg = <660 10>; reg = <0x660 0x10>;
interrupts = <1 f 0>; interrupts = <1 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@670 { // General Purpose Timer timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <7>; cell-index = <7>;
reg = <670 10>; reg = <0x670 0x10>;
interrupts = <1 10 0>; interrupts = <1 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
rtc@800 { // Real time clock rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
device_type = "rtc"; device_type = "rtc";
reg = <800 100>; reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>; interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -143,43 +139,43 @@ rtc@800 { // Real time clock ...@@ -143,43 +139,43 @@ rtc@800 { // Real time clock
can@900 { can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <0>; cell-index = <0>;
interrupts = <2 11 0>; interrupts = <2 17 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
reg = <900 80>; reg = <0x900 0x80>;
}; };
can@980 { can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <1>; cell-index = <1>;
interrupts = <2 12 0>; interrupts = <2 18 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
reg = <980 80>; reg = <0x980 0x80>;
}; };
gpio@b00 { gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>; reg = <0xb00 0x40>;
interrupts = <1 7 0>; interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
gpio@c00 { gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>; reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>; interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
spi@f00 { spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>; reg = <0xf00 0x20>;
interrupts = <2 d 0 2 e 0>; interrupts = <2 13 0 2 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
usb@1000 { usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>; reg = <0x1000 0xff>;
interrupts = <2 6 0>; interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -187,17 +183,17 @@ usb@1000 { ...@@ -187,17 +183,17 @@ usb@1000 {
dma-controller@1200 { dma-controller@1200 {
device_type = "dma-controller"; device_type = "dma-controller";
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>; reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0 3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0 3 8 0 3 9 0 3 10 0 3 11 0
3 c 0 3 d 0 3 e 0 3 f 0>; 3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
xlb@1f00 { xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>; reg = <0x1f00 0x100>;
}; };
serial@2000 { // PSC1 serial@2000 { // PSC1
...@@ -205,7 +201,7 @@ serial@2000 { // PSC1 ...@@ -205,7 +201,7 @@ serial@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment port-number = <0>; // Logical port assignment
cell-index = <0>; cell-index = <0>;
reg = <2000 100>; reg = <0x2000 0x100>;
interrupts = <2 1 0>; interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -214,7 +210,7 @@ serial@2000 { // PSC1 ...@@ -214,7 +210,7 @@ serial@2000 { // PSC1
//ac97@2200 { // PSC2 //ac97@2200 { // PSC2
// compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
// cell-index = <1>; // cell-index = <1>;
// reg = <2200 100>; // reg = <0x2200 0x100>;
// interrupts = <2 2 0>; // interrupts = <2 2 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -223,7 +219,7 @@ serial@2000 { // PSC1 ...@@ -223,7 +219,7 @@ serial@2000 { // PSC1
//i2s@2400 { // PSC3 //i2s@2400 { // PSC3
// compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>; // cell-index = <2>;
// reg = <2400 100>; // reg = <0x2400 0x100>;
// interrupts = <2 3 0>; // interrupts = <2 3 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -233,8 +229,8 @@ serial@2000 { // PSC1 ...@@ -233,8 +229,8 @@ serial@2000 { // PSC1
// device_type = "serial"; // device_type = "serial";
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <3>; // cell-index = <3>;
// reg = <2600 100>; // reg = <0x2600 0x100>;
// interrupts = <2 b 0>; // interrupts = <2 11 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -243,8 +239,8 @@ serial@2000 { // PSC1 ...@@ -243,8 +239,8 @@ serial@2000 { // PSC1
// device_type = "serial"; // device_type = "serial";
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <4>; // cell-index = <4>;
// reg = <2800 100>; // reg = <0x2800 0x100>;
// interrupts = <2 c 0>; // interrupts = <2 12 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -252,7 +248,7 @@ serial@2000 { // PSC1 ...@@ -252,7 +248,7 @@ serial@2000 { // PSC1
//spi@2c00 { // PSC6 //spi@2c00 { // PSC6
// compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
// cell-index = <5>; // cell-index = <5>;
// reg = <2c00 100>; // reg = <0x2c00 0x100>;
// interrupts = <2 4 0>; // interrupts = <2 4 0>;
// interrupt-parent = <&mpc5200_pic>; // interrupt-parent = <&mpc5200_pic>;
//}; //};
...@@ -260,7 +256,7 @@ serial@2000 { // PSC1 ...@@ -260,7 +256,7 @@ serial@2000 { // PSC1
ethernet@3000 { ethernet@3000 {
device_type = "network"; device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>; reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>; interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -271,11 +267,11 @@ mdio@3000 { ...@@ -271,11 +267,11 @@ mdio@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
phy0:ethernet-phy@0 { phy0: ethernet-phy@0 {
device_type = "ethernet-phy"; device_type = "ethernet-phy";
reg = <0>; reg = <0>;
}; };
...@@ -284,7 +280,7 @@ phy0:ethernet-phy@0 { ...@@ -284,7 +280,7 @@ phy0:ethernet-phy@0 {
ata@3a00 { ata@3a00 {
device_type = "ata"; device_type = "ata";
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>; reg = <0x3a00 0x100>;
interrupts = <2 7 0>; interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -294,8 +290,8 @@ i2c@3d00 { ...@@ -294,8 +290,8 @@ i2c@3d00 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>; cell-index = <0>;
reg = <3d00 40>; reg = <0x3d00 0x40>;
interrupts = <2 f 0>; interrupts = <2 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
}; };
...@@ -305,14 +301,14 @@ i2c@3d40 { ...@@ -305,14 +301,14 @@ i2c@3d40 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>; cell-index = <1>;
reg = <3d40 40>; reg = <0x3d40 0x40>;
interrupts = <2 10 0>; interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
}; };
sram@8000 { sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
reg = <8000 4000>; reg = <0x8000 0x4000>;
}; };
}; };
...@@ -322,23 +318,23 @@ pci@f0000d00 { ...@@ -322,23 +318,23 @@ pci@f0000d00 {
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <f0000d00 100>; reg = <0xf0000d00 0x100>;
interrupt-map-mask = <f800 0 0 7>; interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
c000 0 0 2 &mpc5200_pic 1 1 3 0xc000 0 0 2 &mpc5200_pic 1 1 3
c000 0 0 3 &mpc5200_pic 1 2 3 0xc000 0 0 3 &mpc5200_pic 1 2 3
c000 0 0 4 &mpc5200_pic 1 3 3 0xc000 0 0 4 &mpc5200_pic 1 3 3
c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
c800 0 0 2 &mpc5200_pic 1 2 3 0xc800 0 0 2 &mpc5200_pic 1 2 3
c800 0 0 3 &mpc5200_pic 1 3 3 0xc800 0 0 3 &mpc5200_pic 1 3 3
c800 0 0 4 &mpc5200_pic 0 0 3>; 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 a 0>; interrupts = <2 8 0 2 9 0 2 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>; bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 20000000 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
02000000 0 a0000000 a0000000 0 10000000 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
01000000 0 00000000 b0000000 0 01000000>; 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
}; };
}; };
arch/powerpc/boot/dts/motionpro.dts
View file @ a2884f37
...@@ -10,6 +10,8 @@ ...@@ -10,6 +10,8 @@
* option) any later version. * option) any later version.
*/ */
/dts-v1/;
/ { / {
model = "promess,motionpro"; model = "promess,motionpro";
compatible = "promess,motionpro"; compatible = "promess,motionpro";
...@@ -23,10 +25,10 @@ cpus { ...@@ -23,10 +25,10 @@ cpus {
PowerPC,5200@0 { PowerPC,5200@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
d-cache-line-size = <20>; d-cache-line-size = <32>;
i-cache-line-size = <20>; i-cache-line-size = <32>;
d-cache-size = <4000>; // L1, 16K d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader
...@@ -35,21 +37,21 @@ PowerPC,5200@0 { ...@@ -35,21 +37,21 @@ PowerPC,5200@0 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <00000000 04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };
soc5200@f0000000 { soc5200@f0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc5200b-immr"; compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>; ranges = <0 0xf0000000 0x0000c000>;
reg = <f0000000 00000100>; reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader
cdm@200 { cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>; reg = <0x200 0x38>;
}; };
mpc5200_pic: interrupt-controller@500 { mpc5200_pic: interrupt-controller@500 {
...@@ -57,12 +59,12 @@ mpc5200_pic: interrupt-controller@500 { ...@@ -57,12 +59,12 @@ mpc5200_pic: interrupt-controller@500 {
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>; reg = <0x500 0x80>;
}; };
timer@600 { // General Purpose Timer timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>; reg = <0x600 0x10>;
interrupts = <1 9 0>; interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt; fsl,has-wdt;
...@@ -70,118 +72,118 @@ timer@600 { // General Purpose Timer ...@@ -70,118 +72,118 @@ timer@600 { // General Purpose Timer
timer@610 { // General Purpose Timer timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>; reg = <0x610 0x10>;
interrupts = <1 a 0>; interrupts = <1 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@620 { // General Purpose Timer timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>; reg = <0x620 0x10>;
interrupts = <1 b 0>; interrupts = <1 11 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@630 { // General Purpose Timer timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>; reg = <0x630 0x10>;
interrupts = <1 c 0>; interrupts = <1 12 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@640 { // General Purpose Timer timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>; reg = <0x640 0x10>;
interrupts = <1 d 0>; interrupts = <1 13 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
timer@650 { // General Purpose Timer timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>; reg = <0x650 0x10>;
interrupts = <1 e 0>; interrupts = <1 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
motionpro-led@660 { // Motion-PRO status LED motionpro-led@660 { // Motion-PRO status LED
compatible = "promess,motionpro-led"; compatible = "promess,motionpro-led";
label = "motionpro-statusled"; label = "motionpro-statusled";
reg = <660 10>; reg = <0x660 0x10>;
interrupts = <1 f 0>; interrupts = <1 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
blink-delay = <64>; // 100 msec blink-delay = <100>; // 100 msec
}; };
motionpro-led@670 { // Motion-PRO ready LED motionpro-led@670 { // Motion-PRO ready LED
compatible = "promess,motionpro-led"; compatible = "promess,motionpro-led";
label = "motionpro-readyled"; label = "motionpro-readyled";
reg = <670 10>; reg = <0x670 0x10>;
interrupts = <1 10 0>; interrupts = <1 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
rtc@800 { // Real time clock rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>; reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>; interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
mscan@980 { can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 12 0>; interrupts = <2 18 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
reg = <980 80>; reg = <0x980 0x80>;
}; };
gpio@b00 { gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>; reg = <0xb00 0x40>;
interrupts = <1 7 0>; interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
gpio@c00 { gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>; reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>; interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
spi@f00 { spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>; reg = <0xf00 0x20>;
interrupts = <2 d 0 2 e 0>; interrupts = <2 13 0 2 14 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
usb@1000 { usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>; reg = <0x1000 0xff>;
interrupts = <2 6 0>; interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
dma-controller@1200 { dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>; reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0 3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0 3 8 0 3 9 0 3 10 0 3 11 0
3 c 0 3 d 0 3 e 0 3 f 0>; 3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
xlb@1f00 { xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>; reg = <0x1f00 0x100>;
}; };
serial@2000 { // PSC1 serial@2000 { // PSC1
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment port-number = <0>; // Logical port assignment
reg = <2000 100>; reg = <0x2000 0x100>;
interrupts = <2 1 0>; interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -190,7 +192,7 @@ serial@2000 { // PSC1 ...@@ -190,7 +192,7 @@ serial@2000 { // PSC1
spi@2200 { // PSC2 spi@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
cell-index = <1>; cell-index = <1>;
reg = <2200 100>; reg = <0x2200 0x100>;
interrupts = <2 2 0>; interrupts = <2 2 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -200,15 +202,15 @@ serial@2800 { // PSC5 ...@@ -200,15 +202,15 @@ serial@2800 { // PSC5
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <4>; // Logical port assignment port-number = <4>; // Logical port assignment
reg = <2800 100>; reg = <0x2800 0x100>;
interrupts = <2 c 0>; interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
ethernet@3000 { ethernet@3000 {
device_type = "network"; device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>; reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>; interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -219,7 +221,7 @@ mdio@3000 { ...@@ -219,7 +221,7 @@ mdio@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -231,7 +233,7 @@ phy0: ethernet-phy@2 { ...@@ -231,7 +233,7 @@ phy0: ethernet-phy@2 {
ata@3a00 { ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>; reg = <0x3a00 0x100>;
interrupts = <2 7 0>; interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -240,21 +242,21 @@ i2c@3d40 { ...@@ -240,21 +242,21 @@ i2c@3d40 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>; reg = <0x3d40 0x40>;
interrupts = <2 10 0>; interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
rtc@68 { rtc@68 {
device_type = "rtc"; device_type = "rtc";
compatible = "dallas,ds1339"; compatible = "dallas,ds1339";
reg = <68>; reg = <0x68>;
}; };
}; };
sram@8000 { sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>; reg = <0x8000 0x4000>;
}; };
}; };
...@@ -262,15 +264,15 @@ lpb { ...@@ -262,15 +264,15 @@ lpb {
compatible = "fsl,lpb"; compatible = "fsl,lpb";
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 ff000000 01000000 ranges = <0 0 0xff000000 0x01000000
1 0 50000000 00010000 1 0 0x50000000 0x00010000
2 0 50010000 00010000 2 0 0x50010000 0x00010000
3 0 50020000 00010000>; 3 0 0x50020000 0x00010000>;
// 8-bit DualPort SRAM on LocalPlus Bus CS1 // 8-bit DualPort SRAM on LocalPlus Bus CS1
kollmorgen@1,0 { kollmorgen@1,0 {
compatible = "promess,motionpro-kollmorgen"; compatible = "promess,motionpro-kollmorgen";
reg = <1 0 10000>; reg = <1 0 0x10000>;
interrupts = <1 1 0>; interrupts = <1 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -278,13 +280,13 @@ kollmorgen@1,0 { ...@@ -278,13 +280,13 @@ kollmorgen@1,0 {
// 8-bit board CPLD on LocalPlus Bus CS2 // 8-bit board CPLD on LocalPlus Bus CS2
cpld@2,0 { cpld@2,0 {
compatible = "promess,motionpro-cpld"; compatible = "promess,motionpro-cpld";
reg = <2 0 10000>; reg = <2 0 0x10000>;
}; };
// 8-bit custom Anybus Module on LocalPlus Bus CS3 // 8-bit custom Anybus Module on LocalPlus Bus CS3
anybus@3,0 { anybus@3,0 {
compatible = "promess,motionpro-anybus"; compatible = "promess,motionpro-anybus";
reg = <3 0 10000>; reg = <3 0 0x10000>;
}; };
pro_module_general@3,0 { pro_module_general@3,0 {
compatible = "promess,pro_module_general"; compatible = "promess,pro_module_general";
...@@ -292,13 +294,13 @@ pro_module_general@3,0 { ...@@ -292,13 +294,13 @@ pro_module_general@3,0 {
}; };
pro_module_dio@3,800 { pro_module_dio@3,800 {
compatible = "promess,pro_module_dio"; compatible = "promess,pro_module_dio";
reg = <3 800 2>; reg = <3 0x800 2>;
}; };
// 16-bit flash device at LocalPlus Bus CS0 // 16-bit flash device at LocalPlus Bus CS0
flash@0,0 { flash@0,0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0 0 01000000>; reg = <0 0 0x01000000>;
bank-width = <2>; bank-width = <2>;
device-width = <2>; device-width = <2>;
#size-cells = <1>; #size-cells = <1>;
......
arch/powerpc/boot/dts/tqm5200.dts
View file @ a2884f37
...@@ -10,6 +10,8 @@ ...@@ -10,6 +10,8 @@
* option) any later version. * option) any later version.
*/ */
/dts-v1/;
/ { / {
model = "tqc,tqm5200"; model = "tqc,tqm5200";
compatible = "tqc,tqm5200"; compatible = "tqc,tqm5200";
...@@ -23,10 +25,10 @@ cpus { ...@@ -23,10 +25,10 @@ cpus {
PowerPC,5200@0 { PowerPC,5200@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
d-cache-line-size = <20>; d-cache-line-size = <32>;
i-cache-line-size = <20>; i-cache-line-size = <32>;
d-cache-size = <4000>; // L1, 16K d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader
...@@ -35,21 +37,21 @@ PowerPC,5200@0 { ...@@ -35,21 +37,21 @@ PowerPC,5200@0 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <00000000 04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };
soc5200@f0000000 { soc5200@f0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc5200-immr"; compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>; ranges = <0 0xf0000000 0x0000c000>;
reg = <f0000000 00000100>; reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader
cdm@200 { cdm@200 {
compatible = "fsl,mpc5200-cdm"; compatible = "fsl,mpc5200-cdm";
reg = <200 38>; reg = <0x200 0x38>;
}; };
mpc5200_pic: interrupt-controller@500 { mpc5200_pic: interrupt-controller@500 {
...@@ -57,12 +59,12 @@ mpc5200_pic: interrupt-controller@500 { ...@@ -57,12 +59,12 @@ mpc5200_pic: interrupt-controller@500 {
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
compatible = "fsl,mpc5200-pic"; compatible = "fsl,mpc5200-pic";
reg = <500 80>; reg = <0x500 0x80>;
}; };
timer@600 { // General Purpose Timer timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt"; compatible = "fsl,mpc5200-gpt";
reg = <600 10>; reg = <0x600 0x10>;
interrupts = <1 9 0>; interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt; fsl,has-wdt;
...@@ -70,38 +72,38 @@ timer@600 { // General Purpose Timer ...@@ -70,38 +72,38 @@ timer@600 { // General Purpose Timer
gpio@b00 { gpio@b00 {
compatible = "fsl,mpc5200-gpio"; compatible = "fsl,mpc5200-gpio";
reg = <b00 40>; reg = <0xb00 0x40>;
interrupts = <1 7 0>; interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
usb@1000 { usb@1000 {
compatible = "fsl,mpc5200-ohci","ohci-be"; compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>; reg = <0x1000 0xff>;
interrupts = <2 6 0>; interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
dma-controller@1200 { dma-controller@1200 {
compatible = "fsl,mpc5200-bestcomm"; compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>; reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0 3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0 3 8 0 3 9 0 3 10 0 3 11 0
3 c 0 3 d 0 3 e 0 3 f 0>; 3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
xlb@1f00 { xlb@1f00 {
compatible = "fsl,mpc5200-xlb"; compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>; reg = <0x1f00 0x100>;
}; };
serial@2000 { // PSC1 serial@2000 { // PSC1
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment port-number = <0>; // Logical port assignment
reg = <2000 100>; reg = <0x2000 0x100>;
interrupts = <2 1 0>; interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -110,7 +112,7 @@ serial@2200 { // PSC2 ...@@ -110,7 +112,7 @@ serial@2200 { // PSC2
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment port-number = <1>; // Logical port assignment
reg = <2200 100>; reg = <0x2200 0x100>;
interrupts = <2 2 0>; interrupts = <2 2 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -119,7 +121,7 @@ serial@2400 { // PSC3 ...@@ -119,7 +121,7 @@ serial@2400 { // PSC3
device_type = "serial"; device_type = "serial";
compatible = "fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment port-number = <2>; // Logical port assignment
reg = <2400 100>; reg = <0x2400 0x100>;
interrupts = <2 3 0>; interrupts = <2 3 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -127,7 +129,7 @@ serial@2400 { // PSC3 ...@@ -127,7 +129,7 @@ serial@2400 { // PSC3
ethernet@3000 { ethernet@3000 {
device_type = "network"; device_type = "network";
compatible = "fsl,mpc5200-fec"; compatible = "fsl,mpc5200-fec";
reg = <3000 400>; reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>; interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -137,8 +139,8 @@ ethernet@3000 { ...@@ -137,8 +139,8 @@ ethernet@3000 {
mdio@3000 { mdio@3000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; compatible = "fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
...@@ -150,7 +152,7 @@ phy0: ethernet-phy@0 { ...@@ -150,7 +152,7 @@ phy0: ethernet-phy@0 {
ata@3a00 { ata@3a00 {
compatible = "fsl,mpc5200-ata"; compatible = "fsl,mpc5200-ata";
reg = <3a00 100>; reg = <0x3a00 0x100>;
interrupts = <2 7 0>; interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
}; };
...@@ -159,21 +161,21 @@ i2c@3d40 { ...@@ -159,21 +161,21 @@ i2c@3d40 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c"; compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>; reg = <0x3d40 0x40>;
interrupts = <2 10 0>; interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking; fsl5200-clocking;
rtc@68 { rtc@68 {
device_type = "rtc"; device_type = "rtc";
compatible = "dallas,ds1307"; compatible = "dallas,ds1307";
reg = <68>; reg = <0x68>;
}; };
}; };
sram@8000 { sram@8000 {
compatible = "fsl,mpc5200-sram"; compatible = "fsl,mpc5200-sram";
reg = <8000 4000>; reg = <0x8000 0x4000>;
}; };
}; };
...@@ -182,11 +184,11 @@ lpb { ...@@ -182,11 +184,11 @@ lpb {
compatible = "fsl,lpb"; compatible = "fsl,lpb";
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 fc000000 02000000>; ranges = <0 0 0xfc000000 0x02000000>;
flash@0,0 { flash@0,0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0 0 02000000>; reg = <0 0 0x02000000>;
bank-width = <4>; bank-width = <4>;
device-width = <2>; device-width = <2>;
#size-cells = <1>; #size-cells = <1>;
...@@ -200,18 +202,18 @@ pci@f0000d00 { ...@@ -200,18 +202,18 @@ pci@f0000d00 {
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
compatible = "fsl,mpc5200-pci"; compatible = "fsl,mpc5200-pci";
reg = <f0000d00 100>; reg = <0xf0000d00 0x100>;
interrupt-map-mask = <f800 0 0 7>; interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
c000 0 0 2 &mpc5200_pic 0 0 3 0xc000 0 0 2 &mpc5200_pic 0 0 3
c000 0 0 3 &mpc5200_pic 0 0 3 0xc000 0 0 3 &mpc5200_pic 0 0 3
c000 0 0 4 &mpc5200_pic 0 0 3>; 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 a 0>; interrupts = <2 8 0 2 9 0 2 10 0>;
interrupt-parent = <&mpc5200_pic>; interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>; bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 10000000 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
02000000 0 90000000 90000000 0 10000000 0x02000000 0 0x90000000 0x90000000 0 0x10000000
01000000 0 00000000 a0000000 0 01000000>; 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
}; };
}; };
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