drm/amd/display: Remove DWB

It's not in a good shape and currently completely unused.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/core/dc.c

@@ -1525,15 +1525,6 @@ struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
 	return dc->links[link_index];
 }
 
-struct dwbc *dc_get_dwb_at_pipe(struct dc *dc, uint32_t pipe)
-{
-	if ((pipe >= dwb_pipe0) && (pipe < dwb_pipe_max_num)) {
-		return dc->res_pool->dwbc[(int)pipe];
-	} else {
-		return NULL;
-	}
-}
-
 const struct graphics_object_id dc_get_link_id_at_index(
 	struct dc *dc, uint32_t link_index)
 {

drivers/gpu/drm/amd/display/dc/dcn10/Makefile

@@ -3,7 +3,7 @@
 
 DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \
 		dcn10_dpp.o dcn10_opp.o dcn10_timing_generator.o \
-		dcn10_mem_input.o dcn10_mpc.o dcn10_dwb.o \
+		dcn10_mem_input.o dcn10_mpc.o \
 		dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_dpp_cm_helper.o
 
 AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c

@@ -32,7 +32,6 @@
 
 #include "dcn10/dcn10_ipp.h"
 #include "dcn10/dcn10_mpc.h"
-#include "dcn10/dcn10_dwb.h"
 #include "irq/dcn10/irq_service_dcn10.h"
 #include "dcn10/dcn10_dpp.h"
 #include "dcn10/dcn10_timing_generator.h"
@@ -326,24 +325,6 @@ static const struct dcn_dpp_mask tf_mask = {
 	TF_REG_LIST_SH_MASK_DCN10(_MASK),
 };
 
-#define dwbc_regs(id)\
-[id] = {\
-	DWBC_COMMON_REG_LIST_DCN1_0(id),\
-}
-
-static const struct dcn10_dwbc_registers dwbc10_regs[] = {
-	dwbc_regs(0),
-	dwbc_regs(1),
-};
-
-static const struct dcn10_dwbc_shift dwbc10_shift = {
-	DWBC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT)
-};
-
-static const struct dcn10_dwbc_mask dwbc10_mask = {
-	DWBC_COMMON_MASK_SH_LIST_DCN1_0(_MASK)
-};
-
 static const struct dcn_mpc_registers mpc_regs = {
 		MPC_COMMON_REG_LIST_DCN1_0(0),
 		MPC_COMMON_REG_LIST_DCN1_0(1),
@@ -430,7 +411,6 @@ static const struct resource_caps res_cap = {
 		.num_audio = 4,
 		.num_stream_encoder = 4,
 		.num_pll = 4,
-		.num_dwb = 2,
 };
 
 static const struct dc_debug debug_defaults_drv = {
@@ -767,11 +747,6 @@ static void destruct(struct dcn10_resource_pool *pool)
 			dce_aud_destroy(&pool->base.audios[i]);
 	}
 
-	for (i = 0; i < pool->base.res_cap->num_dwb; i++) {
-		kfree(pool->base.dwbc[i]);
-		pool->base.dwbc[i] = NULL;
-	}
-
 	for (i = 0; i < pool->base.clk_src_count; i++) {
 		if (pool->base.clock_sources[i] != NULL) {
 			dcn10_clock_source_destroy(&pool->base.clock_sources[i]);
@@ -1234,31 +1209,6 @@ static uint32_t read_pipe_fuses(struct dc_context *ctx)
 	return value;
 }
 
-static bool dcn10_dwbc_create(struct dc_context *ctx, struct resource_pool *pool)
-{
-	int i;
-	uint32_t dwb_count = pool->res_cap->num_dwb;
-
-	for (i = 0; i < dwb_count; i++) {
-		struct dcn10_dwbc *dwbc10 = kzalloc(sizeof(struct dcn10_dwbc),
-						    GFP_KERNEL);
-
-		if (!dwbc10) {
-			dm_error("DC: failed to create dwbc10!\n");
-			return false;
-		}
-
-		dcn10_dwbc_construct(dwbc10, ctx,
-				&dwbc10_regs[i],
-				&dwbc10_shift,
-				&dwbc10_mask,
-				i);
-
-		pool->dwbc[i] = &dwbc10->base;
-	}
-	return true;
-}
-
 static bool construct(
 	uint8_t num_virtual_links,
 	struct dc *dc,
@@ -1479,12 +1429,6 @@ static bool construct(
 		goto mpc_create_fail;
 	}
 
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-	if (!dcn10_dwbc_create(ctx, &pool->base)) {
-		goto dwbc_create_fail;
-	}
-#endif
-
 	if (!resource_construct(num_virtual_links, dc, &pool->base,
 			(!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ?
 			&res_create_funcs : &res_create_maximus_funcs)))
@@ -1507,7 +1451,6 @@ static bool construct(
 irqs_create_fail:
 res_create_fail:
 clock_source_create_fail:
-dwbc_create_fail:
 
 	destruct(pool);
 

drivers/gpu/drm/amd/display/dc/inc/core_types.h

@@ -35,7 +35,6 @@
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 #include "mpc.h"
 #endif
-#include "dwb.h"
 
 #define MAX_CLOCK_SOURCES 7
 
@@ -136,8 +135,6 @@ struct resource_pool {
 	struct pp_smu_funcs_rv *pp_smu;
 	struct pp_smu_display_requirement_rv pp_smu_req;
 
-	struct dwbc *dwbc[MAX_DWB_PIPES];
-
 	unsigned int pipe_count;
 	unsigned int underlay_pipe_index;
 	unsigned int stream_enc_count;

drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h

-/* Copyright 2012-17 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DC_DWBC_H__
-#define __DC_DWBC_H__
-
-#include "dc_hw_types.h"
-
-#define MAX_DWB_PIPES	3
-
-enum dce_version;
-
-enum dwb_sw_version {
-	dwb_ver_1_0 = 1,
-};
-
-enum dwb_source {
-	dwb_src_scl = 0,	/* for DCE7x/9x, DCN won't support. */
-	dwb_src_blnd,		/* for DCE7x/9x */
-	dwb_src_fmt,		/* for DCE7x/9x */
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-	dwb_src_otg0 = 0x100,	/* for DCN1.x, register: mmDWB_SOURCE_SELECT */
-	dwb_src_otg1,		/* for DCN1.x */
-	dwb_src_otg2,		/* for DCN1.x */
-	dwb_src_otg3,		/* for DCN1.x */
-#endif
-};
-
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-/* DCN1.x supports 2 pipes */
-#endif
-enum dwb_pipe {
-	dwb_pipe0 = 0,
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-	dwb_pipe1,
-#endif
-	dwb_pipe_max_num,
-};
-
-enum setting_flags {
-	sf_pipe				= 0x00000001,
-	sf_output_format	= 0x00000002,
-	sf_capture_rate		= 0x00000004,
-	sf_all				 = 0xffffffff,
-};
-
-enum dwb_capture_rate {
-
-	dwb_capture_rate_0 = 0,	/* Every frame is captured. */
-	dwb_capture_rate_1 = 1,	/* Every other frame is captured. */
-	dwb_capture_rate_2 = 2,	/* Every 3rd frame is captured. */
-	dwb_capture_rate_3 = 3,	/* Every 4th frame is captured. */
-};
-
-enum dwb_scaler_mode {
-	dwb_scaler_mode_bypass444 = 0,
-	dwb_scaler_mode_rgb444 = 1,
-	dwb_scaler_mode_yuv444 = 2,
-	dwb_scaler_mode_yuv420 = 3
-};
-
-struct dwb_caps {
-	enum dce_version hw_version;	/* DCN engine version. */
-	enum dwb_sw_version sw_version;	/* DWB sw implementation version. */
-	unsigned int	reserved[6];	/* Reserved for future use, MUST BE 0. */
-	unsigned int	adapter_id;
-	unsigned int	num_pipes;		/* number of DWB pipes */
-	struct {
-		unsigned int support_dwb					 :1;
-		unsigned int support_ogam					:1;
-		unsigned int support_wbscl					:1;
-		unsigned int support_ocsc					:1;
-	} caps;
-	unsigned int	 reserved2[10];	/* Reserved for future use, MUST BE 0. */
-};
-
-struct dwb_status {
-	bool			enabled;
-	/* Reserved ========================================================================= */
-	unsigned int	reserved[8];	/* Reserved fields */
-};
-
-struct dwb_basic_settings {
-	/* General DWB related input parameters ============================================= */
-	enum dwb_source	input_src_select;	 /* Select input source: (DCE) 0: SCL; 1: BLND; 2: FMT; (DCN) OTG* or MPC* */
-	enum dwb_pipe	input_pipe_select;	/* Select input pipe: 0: PIPE0; 1: PIPE1; 2: PIPE2 */
-
-	/* CNV: WND Related parameters ====================================================== */
-	unsigned int	capture_rate; /* Captures once every (capture_rate+1) frames */
-
-	/* CNV: CSC Related parameters ====================================================== */
-	unsigned int	start_x;	/* Horizontal window start position */
-	unsigned int	start_y;	/* Vertical window start position */
-	unsigned int	src_width;	/* Width of window captured within source window */
-	unsigned int	src_height;	/* Height of window captured within source window */
-
-	/* SISCL Related parameters ========================================================= */
-	unsigned int	dest_width; /* Destination width */
-	unsigned int	dest_height; /* Destination height */
-
-	/* MCIF bufer parameters	========================================================= */
-	unsigned long long luma_address[4];
-	unsigned long long chroma_address[4];
-	unsigned int	luma_pitch;
-	unsigned int	chroma_pitch;
-	unsigned int	slice_lines;
-
-	/* Reserved ========================================================================= */
-	unsigned int	reserved[8];	/* Reserved fields */
-
-};
-
-struct dwb_advanced_settings {
-	enum setting_flags		uFlag;
-	enum dwb_pipe			pipe;		/* default = DWB_PIPE_ALL */
-	enum dwb_scaler_mode	out_format;	/* default = DWBScalerMode_YUV420 */
-	enum dwb_capture_rate	capture_rate; /* default = Every frame is captured */
-	unsigned int			reserved[64]; /* reserved for future use, must be 0 */
-};
-
-/* / - dwb_frame_info is the info of the dumping data */
-struct dwb_frame_info {
-	unsigned int				 size;
-	unsigned int				 width;
-	unsigned int				 height;
-	unsigned int				 luma_pitch;
-	unsigned int				 chroma_pitch;
-	enum dwb_scaler_mode		 format;
-};
-
-struct dwbc_cfg {
-	struct	dwb_basic_settings basic_settings;
-	struct	dwb_advanced_settings advanced_settings;
-};
-
-struct dwbc {
-	const struct dwbc_funcs *funcs;
-	struct dc_context *ctx;
-	struct dwbc_cfg config;
-	struct dwb_status status;
-	int inst;
-};
-
-struct dwbc_funcs {
-	bool (*get_caps)(struct dwbc *dwbc, struct dwb_caps *caps);
-
-	bool (*enable)(struct dwbc *dwbc);
-
-	bool (*disable)(struct dwbc *dwbc);
-
-	bool (*get_status)(struct dwbc *dwbc, struct dwb_status *status);
-
-	bool (*dump_frame)(struct dwbc *dwbc, struct dwb_frame_info *frame_info,
-		unsigned char *luma_buffer, unsigned char *chroma_buffer,
-		unsigned char *dest_luma_buffer, unsigned char *dest_chroma_buffer);
-
-	bool (*set_basic_settings)(struct dwbc *dwbc,
-		const struct dwb_basic_settings *basic_settings);
-
-	bool (*get_basic_settings)(struct dwbc *dwbc,
-		struct dwb_basic_settings *basic_settings);
-
-	bool (*set_advanced_settings)(struct dwbc *dwbc,
-		const struct dwb_advanced_settings *advanced_settings);
-
-	bool (*get_advanced_settings)(struct dwbc *dwbc,
-		struct dwb_advanced_settings *advanced_settings);
-
-	bool (*reset_advanced_settings)(struct dwbc *dwbc);
-};
-
-#endif