Commit a32e24b4 authored by Roman Li's avatar Roman Li Committed by Alex Deucher

drm/amd/display: Initial prototype of FBC implementation

- Protected by ENABLE_FBC compile flag
- DC part will follow
Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cdc95cbb
...@@ -297,6 +297,30 @@ static void hotplug_notify_work_func(struct work_struct *work) ...@@ -297,6 +297,30 @@ static void hotplug_notify_work_func(struct work_struct *work)
drm_kms_helper_hotplug_event(dev); drm_kms_helper_hotplug_event(dev);
} }
#ifdef ENABLE_FBC
#include "dal_asic_id.h"
/* Allocate memory for FBC compressed data */
/* TODO: Dynamic allocation */
#define AMDGPU_FBC_SIZE (3840 * 2160 * 4)
void amdgpu_dm_initialize_fbc(struct amdgpu_device *adev)
{
int r;
struct dm_comressor_info *compressor = &adev->dm.compressor;
if (!compressor->bo_ptr) {
r = amdgpu_bo_create_kernel(adev, AMDGPU_FBC_SIZE, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM, &compressor->bo_ptr,
&compressor->gpu_addr, &compressor->cpu_addr);
if (r)
DRM_ERROR("DM: Failed to initialize fbc\n");
}
}
#endif
/* Init display KMS /* Init display KMS
* *
* Returns 0 on success * Returns 0 on success
...@@ -347,6 +371,11 @@ int amdgpu_dm_init(struct amdgpu_device *adev) ...@@ -347,6 +371,11 @@ int amdgpu_dm_init(struct amdgpu_device *adev)
init_data.dce_environment = DCE_ENV_PRODUCTION_DRV; init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
#ifdef ENABLE_FBC
if (adev->family == FAMILY_CZ)
amdgpu_dm_initialize_fbc(adev);
init_data.fbc_gpu_addr = adev->dm.compressor.gpu_addr;
#endif
/* Display Core create. */ /* Display Core create. */
adev->dm.dc = dc_create(&init_data); adev->dm.dc = dc_create(&init_data);
......
...@@ -72,6 +72,15 @@ struct irq_list_head { ...@@ -72,6 +72,15 @@ struct irq_list_head {
struct work_struct work; struct work_struct work;
}; };
#ifdef ENABLE_FBC
struct dm_comressor_info {
void *cpu_addr;
struct amdgpu_bo *bo_ptr;
uint64_t gpu_addr;
};
#endif
struct amdgpu_display_manager { struct amdgpu_display_manager {
struct dal *dal; struct dal *dal;
struct dc *dc; struct dc *dc;
...@@ -133,6 +142,9 @@ struct amdgpu_display_manager { ...@@ -133,6 +142,9 @@ struct amdgpu_display_manager {
* Caches device atomic state for suspend/resume * Caches device atomic state for suspend/resume
*/ */
struct drm_atomic_state *cached_state; struct drm_atomic_state *cached_state;
#ifdef ENABLE_FBC
struct dm_comressor_info compressor;
#endif
}; };
/* basic init/fini API */ /* basic init/fini API */
......
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