Do the timer interrupt only once on CPU 0 ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/sibyte/sb1250/time.c

@@ -107,17 +107,18 @@ void sb1250_timer_interrupt(struct pt_regs *regs)
 	____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
 		       IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
 
+	if (cpu == 0) {
 		/*
 		 * CPU 0 handles the global timer interrupt job
 		 */
-	if (cpu == 0) {
 		ll_timer_interrupt(irq, regs);
 	}
-
+	else {
 		/*
-	 * every CPU should do profiling and process accouting
+		 * other CPUs should just do profiling and process accounting
 		 */
 		ll_local_timer_interrupt(irq, regs);
+	}
 }
 
 /*