Commit a5d32c26 authored by Daniel Mentz's avatar Daniel Mentz Committed by Greg Kroah-Hartman

dma-debug: Fix dma_debug_entry offset calculation

commit 0354aec1 upstream.

dma-debug uses struct dma_debug_entry to keep track of dma coherent
memory allocation requests. The virtual address is converted into a pfn
and an offset. Previously, the offset was calculated using an incorrect
bit mask.  As a result, we saw incorrect error messages from dma-debug
like the following:

"DMA-API: exceeded 7 overlapping mappings of cacheline 0x03e00000"

Cacheline 0x03e00000 does not exist on our platform.

Fixes: 0abdd7a8 ("dma-debug: introduce debug_dma_assert_idle()")
Signed-off-by: default avatarDaniel Mentz <danielmentz@google.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8c62a2fc
...@@ -1440,7 +1440,7 @@ void debug_dma_alloc_coherent(struct device *dev, size_t size, ...@@ -1440,7 +1440,7 @@ void debug_dma_alloc_coherent(struct device *dev, size_t size,
entry->type = dma_debug_coherent; entry->type = dma_debug_coherent;
entry->dev = dev; entry->dev = dev;
entry->pfn = page_to_pfn(virt_to_page(virt)); entry->pfn = page_to_pfn(virt_to_page(virt));
entry->offset = (size_t) virt & PAGE_MASK; entry->offset = (size_t) virt & ~PAGE_MASK;
entry->size = size; entry->size = size;
entry->dev_addr = dma_addr; entry->dev_addr = dma_addr;
entry->direction = DMA_BIDIRECTIONAL; entry->direction = DMA_BIDIRECTIONAL;
...@@ -1456,7 +1456,7 @@ void debug_dma_free_coherent(struct device *dev, size_t size, ...@@ -1456,7 +1456,7 @@ void debug_dma_free_coherent(struct device *dev, size_t size,
.type = dma_debug_coherent, .type = dma_debug_coherent,
.dev = dev, .dev = dev,
.pfn = page_to_pfn(virt_to_page(virt)), .pfn = page_to_pfn(virt_to_page(virt)),
.offset = (size_t) virt & PAGE_MASK, .offset = (size_t) virt & ~PAGE_MASK,
.dev_addr = addr, .dev_addr = addr,
.size = size, .size = size,
.direction = DMA_BIDIRECTIONAL, .direction = DMA_BIDIRECTIONAL,
......
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