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Commit a845167d authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'tegra-for-4.7-arm64' of... 

Merge tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding

A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.

* tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable cros-ec and charger on Smaug
  arm64: tegra: Add pinmux for Smaug board
  arm64: tegra: Add stdout-path for various boards
  arm64: tegra: Remove unused #power-domain-cells property
  arm64: tegra: Add gpio-keys nodes for Smaug
  arm64: tegra: Enable power and volume keys on Jetson TX1
  arm64: tegra: Add support for Google Pixel C
  arm64: tegra: Replace legacy *,wakeup property with wakeup-source
  arm64: tegra: Fix copy/paste typo in several DTS includes
  arm64: tegra: Remove 0, prefix from unit-addresses
parents 318085c7 8d53957c
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arch/arm64/boot/dts/nvidia/Makefile
View file @ a845167d
...@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb ...@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
always := $(dtb-y) always := $(dtb-y)
clean-files := *.dtb clean-files := *.dtb
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
View file @ a845167d
...@@ -8,19 +8,22 @@ / { ...@@ -8,19 +8,22 @@ / {
compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124"; compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
aliases { aliases {
rtc0 = "/i2c@0,7000d000/as3722@40"; rtc0 = "/i2c@7000d000/as3722@40";
rtc1 = "/rtc@0,7000e000"; rtc1 = "/rtc@7000e000";
serial0 = &uarta;
}; };
chosen { }; chosen {
stdout-path = "serial0:115200n8";
};
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>; reg = <0x0 0x80000000 0x0 0x80000000>;
}; };
host1x@0,50000000 { host1x@50000000 {
hdmi@0,54280000 { hdmi@54280000 {
status = "disabled"; status = "disabled";
vdd-supply = <&vdd_3v3_hdmi>; vdd-supply = <&vdd_3v3_hdmi>;
...@@ -32,26 +35,26 @@ hdmi@0,54280000 { ...@@ -32,26 +35,26 @@ hdmi@0,54280000 {
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
}; };
sor@0,54540000 { sor@54540000 {
status = "okay"; status = "okay";
nvidia,dpaux = <&dpaux>; nvidia,dpaux = <&dpaux>;
nvidia,panel = <&panel>; nvidia,panel = <&panel>;
}; };
dpaux: dpaux@0,545c0000 { dpaux: dpaux@545c0000 {
vdd-supply = <&vdd_3v3_panel>; vdd-supply = <&vdd_3v3_panel>;
status = "okay"; status = "okay";
}; };
}; };
gpu@0,57000000 { gpu@57000000 {
status = "okay"; status = "okay";
vdd-supply = <&vdd_gpu>; vdd-supply = <&vdd_gpu>;
}; };
pinmux@0,70000868 { pinmux@70000868 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>; pinctrl-0 = <&pinmux_default>;
...@@ -523,21 +526,21 @@ soc_warm_reset_l { ...@@ -523,21 +526,21 @@ soc_warm_reset_l {
}; };
}; };
serial@0,70006000 { serial@70006000 {
status = "okay"; status = "okay";
}; };
pwm: pwm@0,7000a000 { pwm: pwm@7000a000 {
status = "okay"; status = "okay";
}; };
/* HDMI DDC */ /* HDMI DDC */
hdmi_ddc: i2c@0,7000c700 { hdmi_ddc: i2c@7000c700 {
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
}; };
i2c@0,7000d000 { i2c@7000d000 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -744,7 +747,7 @@ ldo11 { ...@@ -744,7 +747,7 @@ ldo11 {
}; };
}; };
spi@0,7000d400 { spi@7000d400 {
status = "okay"; status = "okay";
ec: cros-ec@0 { ec: cros-ec@0 {
...@@ -876,7 +879,7 @@ MATRIX_KEY(0x07, 0x0b, KEY_UP) ...@@ -876,7 +879,7 @@ MATRIX_KEY(0x07, 0x0b, KEY_UP)
}; };
}; };
pmc@0,7000e400 { pmc@7000e400 {
nvidia,invert-interrupt; nvidia,invert-interrupt;
nvidia,suspend-mode = <0>; nvidia,suspend-mode = <0>;
#wake-cells = <3>; #wake-cells = <3>;
...@@ -890,12 +893,12 @@ pmc@0,7000e400 { ...@@ -890,12 +893,12 @@ pmc@0,7000e400 {
}; };
/* WIFI/BT module */ /* WIFI/BT module */
sdhci@0,700b0000 { sdhci@700b0000 {
status = "disabled"; status = "disabled";
}; };
/* external SD/MMC */ /* external SD/MMC */
sdhci@0,700b0400 { sdhci@700b0400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
...@@ -905,35 +908,35 @@ sdhci@0,700b0400 { ...@@ -905,35 +908,35 @@ sdhci@0,700b0400 {
}; };
/* EMMC 4.51 */ /* EMMC 4.51 */
sdhci@0,700b0600 { sdhci@700b0600 {
status = "okay"; status = "okay";
bus-width = <8>; bus-width = <8>;
non-removable; non-removable;
}; };
usb@0,7d000000 { usb@7d000000 {
status = "okay"; status = "okay";
}; };
usb-phy@0,7d000000 { usb-phy@7d000000 {
status = "okay"; status = "okay";
vbus-supply = <&vdd_usb1_vbus>; vbus-supply = <&vdd_usb1_vbus>;
}; };
usb@0,7d004000 { usb@7d004000 {
status = "okay"; status = "okay";
}; };
usb-phy@0,7d004000 { usb-phy@7d004000 {
status = "okay"; status = "okay";
vbus-supply = <&vdd_run_cam>; vbus-supply = <&vdd_run_cam>;
}; };
usb@0,7d008000 { usb@7d008000 {
status = "okay"; status = "okay";
}; };
usb-phy@0,7d008000 { usb-phy@7d008000 {
status = "okay"; status = "okay";
vbus-supply = <&vdd_usb3_vbus>; vbus-supply = <&vdd_usb3_vbus>;
}; };
...@@ -973,7 +976,7 @@ lid { ...@@ -973,7 +976,7 @@ lid {
linux,input-type = <5>; linux,input-type = <5>;
linux,code = <0>; linux,code = <0>;
debounce-interval = <1>; debounce-interval = <1>;
gpio-key,wakeup; wakeup-source;
}; };
power { power {
...@@ -981,7 +984,7 @@ power { ...@@ -981,7 +984,7 @@ power {
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>; linux,code = <KEY_POWER>;
debounce-interval = <10>; debounce-interval = <10>;
gpio-key,wakeup; wakeup-source;
}; };
}; };
......
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View file @ a845167d
...@@ -11,7 +11,7 @@ / { ...@@ -11,7 +11,7 @@ / {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
pcie-controller@0,01003000 { pcie-controller@01003000 {
compatible = "nvidia,tegra124-pcie"; compatible = "nvidia,tegra124-pcie";
device_type = "pci"; device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
...@@ -77,7 +77,7 @@ pci@2,0 { ...@@ -77,7 +77,7 @@ pci@2,0 {
}; };
}; };
host1x@0,50000000 { host1x@50000000 {
compatible = "nvidia,tegra124-host1x", "simple-bus"; compatible = "nvidia,tegra124-host1x", "simple-bus";
reg = <0x0 0x50000000 0x0 0x00034000>; reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
...@@ -92,7 +92,7 @@ host1x@0,50000000 { ...@@ -92,7 +92,7 @@ host1x@0,50000000 {
ranges = <0 0x54000000 0 0x54000000 0 0x01000000>; ranges = <0 0x54000000 0 0x54000000 0 0x01000000>;
dc@0,54200000 { dc@54200000 {
compatible = "nvidia,tegra124-dc"; compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>; reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
...@@ -107,7 +107,7 @@ dc@0,54200000 { ...@@ -107,7 +107,7 @@ dc@0,54200000 {
nvidia,head = <0>; nvidia,head = <0>;
}; };
dc@0,54240000 { dc@54240000 {
compatible = "nvidia,tegra124-dc"; compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54240000 0x0 0x00040000>; reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
...@@ -122,7 +122,7 @@ dc@0,54240000 { ...@@ -122,7 +122,7 @@ dc@0,54240000 {
nvidia,head = <1>; nvidia,head = <1>;
}; };
hdmi@0,54280000 { hdmi@54280000 {
compatible = "nvidia,tegra124-hdmi"; compatible = "nvidia,tegra124-hdmi";
reg = <0x0 0x54280000 0x0 0x00040000>; reg = <0x0 0x54280000 0x0 0x00040000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
...@@ -134,7 +134,7 @@ hdmi@0,54280000 { ...@@ -134,7 +134,7 @@ hdmi@0,54280000 {
status = "disabled"; status = "disabled";
}; };
sor@0,54540000 { sor@54540000 {
compatible = "nvidia,tegra124-sor"; compatible = "nvidia,tegra124-sor";
reg = <0x0 0x54540000 0x0 0x00040000>; reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
...@@ -148,7 +148,7 @@ sor@0,54540000 { ...@@ -148,7 +148,7 @@ sor@0,54540000 {
status = "disabled"; status = "disabled";
}; };
dpaux: dpaux@0,545c0000 { dpaux: dpaux@545c0000 {
compatible = "nvidia,tegra124-dpaux"; compatible = "nvidia,tegra124-dpaux";
reg = <0x0 0x545c0000 0x0 0x00040000>; reg = <0x0 0x545c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
...@@ -161,7 +161,7 @@ dpaux: dpaux@0,545c0000 { ...@@ -161,7 +161,7 @@ dpaux: dpaux@0,545c0000 {
}; };
}; };
gic: interrupt-controller@0,50041000 { gic: interrupt-controller@50041000 {
compatible = "arm,cortex-a15-gic"; compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupt-controller; interrupt-controller;
...@@ -174,7 +174,7 @@ gic: interrupt-controller@0,50041000 { ...@@ -174,7 +174,7 @@ gic: interrupt-controller@0,50041000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
}; };
gpu@0,57000000 { gpu@57000000 {
compatible = "nvidia,gk20a"; compatible = "nvidia,gk20a";
reg = <0x0 0x57000000 0x0 0x01000000>, reg = <0x0 0x57000000 0x0 0x01000000>,
<0x0 0x58000000 0x0 0x01000000>; <0x0 0x58000000 0x0 0x01000000>;
...@@ -201,7 +201,7 @@ lic: interrupt-controller@60004000 { ...@@ -201,7 +201,7 @@ lic: interrupt-controller@60004000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
}; };
timer@0,60005000 { timer@60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer"; compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>; reg = <0x0 0x60005000 0x0 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
...@@ -214,7 +214,7 @@ timer@0,60005000 { ...@@ -214,7 +214,7 @@ timer@0,60005000 {
clock-names = "timer"; clock-names = "timer";
}; };
tegra_car: clock@0,60006000 { tegra_car: clock@60006000 {
compatible = "nvidia,tegra132-car"; compatible = "nvidia,tegra132-car";
reg = <0x0 0x60006000 0x0 0x1000>; reg = <0x0 0x60006000 0x0 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
...@@ -222,12 +222,12 @@ tegra_car: clock@0,60006000 { ...@@ -222,12 +222,12 @@ tegra_car: clock@0,60006000 {
nvidia,external-memory-controller = <&emc>; nvidia,external-memory-controller = <&emc>;
}; };
flow-controller@0,60007000 { flow-controller@60007000 {
compatible = "nvidia,tegra124-flowctrl"; compatible = "nvidia,tegra124-flowctrl";
reg = <0x0 0x60007000 0x0 0x1000>; reg = <0x0 0x60007000 0x0 0x1000>;
}; };
actmon@0,6000c800 { actmon@6000c800 {
compatible = "nvidia,tegra124-actmon"; compatible = "nvidia,tegra124-actmon";
reg = <0x0 0x6000c800 0x0 0x400>; reg = <0x0 0x6000c800 0x0 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
...@@ -238,7 +238,7 @@ actmon@0,6000c800 { ...@@ -238,7 +238,7 @@ actmon@0,6000c800 {
reset-names = "actmon"; reset-names = "actmon";
}; };
gpio: gpio@0,6000d000 { gpio: gpio@6000d000 {
compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
reg = <0x0 0x6000d000 0x0 0x1000>; reg = <0x0 0x6000d000 0x0 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
...@@ -255,7 +255,7 @@ gpio: gpio@0,6000d000 { ...@@ -255,7 +255,7 @@ gpio: gpio@0,6000d000 {
interrupt-controller; interrupt-controller;
}; };
apbdma: dma@0,60020000 { apbdma: dma@60020000 {
compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma"; compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
reg = <0x0 0x60020000 0x0 0x1400>; reg = <0x0 0x60020000 0x0 0x1400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
...@@ -297,13 +297,13 @@ apbdma: dma@0,60020000 { ...@@ -297,13 +297,13 @@ apbdma: dma@0,60020000 {
#dma-cells = <1>; #dma-cells = <1>;
}; };
apbmisc@0,70000800 { apbmisc@70000800 {
compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"; compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
<0x0 0x7000e864 0x0 0x04>; /* Strapping options */ <0x0 0x7000e864 0x0 0x04>; /* Strapping options */
}; };
pinmux: pinmux@0,70000868 { pinmux: pinmux@70000868 {
compatible = "nvidia,tegra124-pinmux"; compatible = "nvidia,tegra124-pinmux";
reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */ reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
<0x0 0x70003000 0x0 0x434>, /* Mux registers */ <0x0 0x70003000 0x0 0x434>, /* Mux registers */
...@@ -315,10 +315,10 @@ pinmux: pinmux@0,70000868 { ...@@ -315,10 +315,10 @@ pinmux: pinmux@0,70000868 {
* driver and APB DMA based serial driver for higher baudrate * driver and APB DMA based serial driver for higher baudrate
* and performance. To enable the 8250 based driver, the compatible * and performance. To enable the 8250 based driver, the compatible
* is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is * the APB DMA based serial driver, the compatible is
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
*/ */
uarta: serial@0,70006000 { uarta: serial@70006000 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006000 0x0 0x40>; reg = <0x0 0x70006000 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -332,7 +332,7 @@ uarta: serial@0,70006000 { ...@@ -332,7 +332,7 @@ uarta: serial@0,70006000 {
status = "disabled"; status = "disabled";
}; };
uartb: serial@0,70006040 { uartb: serial@70006040 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006040 0x0 0x40>; reg = <0x0 0x70006040 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -346,7 +346,7 @@ uartb: serial@0,70006040 { ...@@ -346,7 +346,7 @@ uartb: serial@0,70006040 {
status = "disabled"; status = "disabled";
}; };
uartc: serial@0,70006200 { uartc: serial@70006200 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006200 0x0 0x40>; reg = <0x0 0x70006200 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -360,7 +360,7 @@ uartc: serial@0,70006200 { ...@@ -360,7 +360,7 @@ uartc: serial@0,70006200 {
status = "disabled"; status = "disabled";
}; };
uartd: serial@0,70006300 { uartd: serial@70006300 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006300 0x0 0x40>; reg = <0x0 0x70006300 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -374,7 +374,7 @@ uartd: serial@0,70006300 { ...@@ -374,7 +374,7 @@ uartd: serial@0,70006300 {
status = "disabled"; status = "disabled";
}; };
pwm: pwm@0,7000a000 { pwm: pwm@7000a000 {
compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
reg = <0x0 0x7000a000 0x0 0x100>; reg = <0x0 0x7000a000 0x0 0x100>;
#pwm-cells = <2>; #pwm-cells = <2>;
...@@ -385,7 +385,7 @@ pwm: pwm@0,7000a000 { ...@@ -385,7 +385,7 @@ pwm: pwm@0,7000a000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c000 { i2c@7000c000 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c000 0x0 0x100>; reg = <0x0 0x7000c000 0x0 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
...@@ -400,7 +400,7 @@ i2c@0,7000c000 { ...@@ -400,7 +400,7 @@ i2c@0,7000c000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c400 { i2c@7000c400 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c400 0x0 0x100>; reg = <0x0 0x7000c400 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
...@@ -415,7 +415,7 @@ i2c@0,7000c400 { ...@@ -415,7 +415,7 @@ i2c@0,7000c400 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c500 { i2c@7000c500 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c500 0x0 0x100>; reg = <0x0 0x7000c500 0x0 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
...@@ -430,7 +430,7 @@ i2c@0,7000c500 { ...@@ -430,7 +430,7 @@ i2c@0,7000c500 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c700 { i2c@7000c700 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c700 0x0 0x100>; reg = <0x0 0x7000c700 0x0 0x100>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
...@@ -445,7 +445,7 @@ i2c@0,7000c700 { ...@@ -445,7 +445,7 @@ i2c@0,7000c700 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000d000 { i2c@7000d000 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000d000 0x0 0x100>; reg = <0x0 0x7000d000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
...@@ -460,7 +460,7 @@ i2c@0,7000d000 { ...@@ -460,7 +460,7 @@ i2c@0,7000d000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000d100 { i2c@7000d100 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000d100 0x0 0x100>; reg = <0x0 0x7000d100 0x0 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
...@@ -475,7 +475,7 @@ i2c@0,7000d100 { ...@@ -475,7 +475,7 @@ i2c@0,7000d100 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d400 { spi@7000d400 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d400 0x0 0x200>; reg = <0x0 0x7000d400 0x0 0x200>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
...@@ -490,7 +490,7 @@ spi@0,7000d400 { ...@@ -490,7 +490,7 @@ spi@0,7000d400 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d600 { spi@7000d600 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d600 0x0 0x200>; reg = <0x0 0x7000d600 0x0 0x200>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
...@@ -505,7 +505,7 @@ spi@0,7000d600 { ...@@ -505,7 +505,7 @@ spi@0,7000d600 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d800 { spi@7000d800 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d800 0x0 0x200>; reg = <0x0 0x7000d800 0x0 0x200>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
...@@ -520,7 +520,7 @@ spi@0,7000d800 { ...@@ -520,7 +520,7 @@ spi@0,7000d800 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000da00 { spi@7000da00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000da00 0x0 0x200>; reg = <0x0 0x7000da00 0x0 0x200>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
...@@ -535,7 +535,7 @@ spi@0,7000da00 { ...@@ -535,7 +535,7 @@ spi@0,7000da00 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000dc00 { spi@7000dc00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000dc00 0x0 0x200>; reg = <0x0 0x7000dc00 0x0 0x200>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
...@@ -550,7 +550,7 @@ spi@0,7000dc00 { ...@@ -550,7 +550,7 @@ spi@0,7000dc00 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000de00 { spi@7000de00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000de00 0x0 0x200>; reg = <0x0 0x7000de00 0x0 0x200>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
...@@ -565,7 +565,7 @@ spi@0,7000de00 { ...@@ -565,7 +565,7 @@ spi@0,7000de00 {
status = "disabled"; status = "disabled";
}; };
rtc@0,7000e000 { rtc@7000e000 {
compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc"; compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
reg = <0x0 0x7000e000 0x0 0x100>; reg = <0x0 0x7000e000 0x0 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
...@@ -573,14 +573,14 @@ rtc@0,7000e000 { ...@@ -573,14 +573,14 @@ rtc@0,7000e000 {
clock-names = "rtc"; clock-names = "rtc";
}; };
pmc@0,7000e400 { pmc@7000e400 {
compatible = "nvidia,tegra124-pmc"; compatible = "nvidia,tegra124-pmc";
reg = <0x0 0x7000e400 0x0 0x400>; reg = <0x0 0x7000e400 0x0 0x400>;
clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>; clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in"; clock-names = "pclk", "clk32k_in";
}; };
fuse@0,7000f800 { fuse@7000f800 {
compatible = "nvidia,tegra124-efuse"; compatible = "nvidia,tegra124-efuse";
reg = <0x0 0x7000f800 0x0 0x400>; reg = <0x0 0x7000f800 0x0 0x400>;
clocks = <&tegra_car TEGRA124_CLK_FUSE>; clocks = <&tegra_car TEGRA124_CLK_FUSE>;
...@@ -589,7 +589,7 @@ fuse@0,7000f800 { ...@@ -589,7 +589,7 @@ fuse@0,7000f800 {
reset-names = "fuse"; reset-names = "fuse";
}; };
mc: memory-controller@0,70019000 { mc: memory-controller@70019000 {
compatible = "nvidia,tegra132-mc"; compatible = "nvidia,tegra132-mc";
reg = <0x0 0x70019000 0x0 0x1000>; reg = <0x0 0x70019000 0x0 0x1000>;
clocks = <&tegra_car TEGRA124_CLK_MC>; clocks = <&tegra_car TEGRA124_CLK_MC>;
...@@ -600,14 +600,14 @@ mc: memory-controller@0,70019000 { ...@@ -600,14 +600,14 @@ mc: memory-controller@0,70019000 {
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
emc: emc@0,7001b000 { emc: emc@7001b000 {
compatible = "nvidia,tegra132-emc", "nvidia,tegra124-emc"; compatible = "nvidia,tegra132-emc", "nvidia,tegra124-emc";
reg = <0x0 0x7001b000 0x0 0x1000>; reg = <0x0 0x7001b000 0x0 0x1000>;
nvidia,memory-controller = <&mc>; nvidia,memory-controller = <&mc>;
}; };
sata@0,70020000 { sata@70020000 {
compatible = "nvidia,tegra124-ahci"; compatible = "nvidia,tegra124-ahci";
reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
<0x0 0x70020000 0x0 0x7000>; /* SATA */ <0x0 0x70020000 0x0 0x7000>; /* SATA */
...@@ -626,7 +626,7 @@ sata@0,70020000 { ...@@ -626,7 +626,7 @@ sata@0,70020000 {
status = "disabled"; status = "disabled";
}; };
hda@0,70030000 { hda@70030000 {
compatible = "nvidia,tegra132-hda", "nvidia,tegra124-hda", compatible = "nvidia,tegra132-hda", "nvidia,tegra124-hda",
"nvidia,tegra30-hda"; "nvidia,tegra30-hda";
reg = <0x0 0x70030000 0x0 0x10000>; reg = <0x0 0x70030000 0x0 0x10000>;
...@@ -642,7 +642,7 @@ hda@0,70030000 { ...@@ -642,7 +642,7 @@ hda@0,70030000 {
status = "disabled"; status = "disabled";
}; };
padctl: padctl@0,7009f000 { padctl: padctl@7009f000 {
compatible = "nvidia,tegra132-xusb-padctl", compatible = "nvidia,tegra132-xusb-padctl",
"nvidia,tegra124-xusb-padctl"; "nvidia,tegra124-xusb-padctl";
reg = <0x0 0x7009f000 0x0 0x1000>; reg = <0x0 0x7009f000 0x0 0x1000>;
...@@ -682,7 +682,7 @@ utmi-2 { ...@@ -682,7 +682,7 @@ utmi-2 {
}; };
}; };
sdhci@0,700b0000 { sdhci@700b0000 {
compatible = "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>; reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
...@@ -693,7 +693,7 @@ sdhci@0,700b0000 { ...@@ -693,7 +693,7 @@ sdhci@0,700b0000 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0200 { sdhci@700b0200 {
compatible = "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>; reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
...@@ -704,7 +704,7 @@ sdhci@0,700b0200 { ...@@ -704,7 +704,7 @@ sdhci@0,700b0200 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0400 { sdhci@700b0400 {
compatible = "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>; reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
...@@ -715,7 +715,7 @@ sdhci@0,700b0400 { ...@@ -715,7 +715,7 @@ sdhci@0,700b0400 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0600 { sdhci@700b0600 {
compatible = "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>; reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
...@@ -726,7 +726,7 @@ sdhci@0,700b0600 { ...@@ -726,7 +726,7 @@ sdhci@0,700b0600 {
status = "disabled"; status = "disabled";
}; };
soctherm: thermal-sensor@0,700e2000 { soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra124-soctherm"; compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>; reg = <0x0 0x700e2000 0x0 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
...@@ -738,7 +738,7 @@ soctherm: thermal-sensor@0,700e2000 { ...@@ -738,7 +738,7 @@ soctherm: thermal-sensor@0,700e2000 {
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
}; };
ahub@0,70300000 { ahub@70300000 {
compatible = "nvidia,tegra124-ahub"; compatible = "nvidia,tegra124-ahub";
reg = <0x0 0x70300000 0x0 0x200>, reg = <0x0 0x70300000 0x0 0x200>,
<0x0 0x70300800 0x0 0x800>, <0x0 0x70300800 0x0 0x800>,
...@@ -790,7 +790,7 @@ ahub@0,70300000 { ...@@ -790,7 +790,7 @@ ahub@0,70300000 {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
tegra_i2s0: i2s@0,70301000 { tegra_i2s0: i2s@70301000 {
compatible = "nvidia,tegra124-i2s"; compatible = "nvidia,tegra124-i2s";
reg = <0x0 0x70301000 0x0 0x100>; reg = <0x0 0x70301000 0x0 0x100>;
nvidia,ahub-cif-ids = <4 4>; nvidia,ahub-cif-ids = <4 4>;
...@@ -801,7 +801,7 @@ tegra_i2s0: i2s@0,70301000 { ...@@ -801,7 +801,7 @@ tegra_i2s0: i2s@0,70301000 {
status = "disabled"; status = "disabled";
}; };
tegra_i2s1: i2s@0,70301100 { tegra_i2s1: i2s@70301100 {
compatible = "nvidia,tegra124-i2s"; compatible = "nvidia,tegra124-i2s";
reg = <0x0 0x70301100 0x0 0x100>; reg = <0x0 0x70301100 0x0 0x100>;
nvidia,ahub-cif-ids = <5 5>; nvidia,ahub-cif-ids = <5 5>;
...@@ -812,7 +812,7 @@ tegra_i2s1: i2s@0,70301100 { ...@@ -812,7 +812,7 @@ tegra_i2s1: i2s@0,70301100 {
status = "disabled"; status = "disabled";
}; };
tegra_i2s2: i2s@0,70301200 { tegra_i2s2: i2s@70301200 {
compatible = "nvidia,tegra124-i2s"; compatible = "nvidia,tegra124-i2s";
reg = <0x0 0x70301200 0x0 0x100>; reg = <0x0 0x70301200 0x0 0x100>;
nvidia,ahub-cif-ids = <6 6>; nvidia,ahub-cif-ids = <6 6>;
...@@ -823,7 +823,7 @@ tegra_i2s2: i2s@0,70301200 { ...@@ -823,7 +823,7 @@ tegra_i2s2: i2s@0,70301200 {
status = "disabled"; status = "disabled";
}; };
tegra_i2s3: i2s@0,70301300 { tegra_i2s3: i2s@70301300 {
compatible = "nvidia,tegra124-i2s"; compatible = "nvidia,tegra124-i2s";
reg = <0x0 0x70301300 0x0 0x100>; reg = <0x0 0x70301300 0x0 0x100>;
nvidia,ahub-cif-ids = <7 7>; nvidia,ahub-cif-ids = <7 7>;
...@@ -834,7 +834,7 @@ tegra_i2s3: i2s@0,70301300 { ...@@ -834,7 +834,7 @@ tegra_i2s3: i2s@0,70301300 {
status = "disabled"; status = "disabled";
}; };
tegra_i2s4: i2s@0,70301400 { tegra_i2s4: i2s@70301400 {
compatible = "nvidia,tegra124-i2s"; compatible = "nvidia,tegra124-i2s";
reg = <0x0 0x70301400 0x0 0x100>; reg = <0x0 0x70301400 0x0 0x100>;
nvidia,ahub-cif-ids = <8 8>; nvidia,ahub-cif-ids = <8 8>;
...@@ -846,7 +846,7 @@ tegra_i2s4: i2s@0,70301400 { ...@@ -846,7 +846,7 @@ tegra_i2s4: i2s@0,70301400 {
}; };
}; };
usb@0,7d000000 { usb@7d000000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci"; compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x0 0x7d000000 0x0 0x4000>; reg = <0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
...@@ -859,7 +859,7 @@ usb@0,7d000000 { ...@@ -859,7 +859,7 @@ usb@0,7d000000 {
status = "disabled"; status = "disabled";
}; };
phy1: usb-phy@0,7d000000 { phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d000000 0x0 0x4000>, reg = <0x0 0x7d000000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
...@@ -884,7 +884,7 @@ phy1: usb-phy@0,7d000000 { ...@@ -884,7 +884,7 @@ phy1: usb-phy@0,7d000000 {
status = "disabled"; status = "disabled";
}; };
usb@0,7d004000 { usb@7d004000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci"; compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x0 0x7d004000 0x0 0x4000>; reg = <0x0 0x7d004000 0x0 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
...@@ -897,7 +897,7 @@ usb@0,7d004000 { ...@@ -897,7 +897,7 @@ usb@0,7d004000 {
status = "disabled"; status = "disabled";
}; };
phy2: usb-phy@0,7d004000 { phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d004000 0x0 0x4000>, reg = <0x0 0x7d004000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
...@@ -921,7 +921,7 @@ phy2: usb-phy@0,7d004000 { ...@@ -921,7 +921,7 @@ phy2: usb-phy@0,7d004000 {
status = "disabled"; status = "disabled";
}; };
usb@0,7d008000 { usb@7d008000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci"; compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x0 0x7d008000 0x0 0x4000>; reg = <0x0 0x7d008000 0x0 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
...@@ -934,7 +934,7 @@ usb@0,7d008000 { ...@@ -934,7 +934,7 @@ usb@0,7d008000 {
status = "disabled"; status = "disabled";
}; };
phy3: usb-phy@0,7d008000 { phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d008000 0x0 0x4000>, reg = <0x0 0x7d008000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
......
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
View file @ a845167d
...@@ -5,7 +5,7 @@ / { ...@@ -5,7 +5,7 @@ / {
compatible = "nvidia,p2180", "nvidia,tegra210"; compatible = "nvidia,p2180", "nvidia,tegra210";
aliases { aliases {
rtc1 = "/rtc@0,7000e000"; rtc1 = "/rtc@7000e000";
serial0 = &uarta; serial0 = &uarta;
}; };
...@@ -15,16 +15,16 @@ memory { ...@@ -15,16 +15,16 @@ memory {
}; };
/* debug port */ /* debug port */
serial@0,70006000 { serial@70006000 {
status = "okay"; status = "okay";
}; };
pmc@0,7000e400 { pmc@7000e400 {
nvidia,invert-interrupt; nvidia,invert-interrupt;
}; };
/* eMMC */ /* eMMC */
sdhci@0,700b0600 { sdhci@700b0600 {
status = "okay"; status = "okay";
bus-width = <8>; bus-width = <8>;
non-removable; non-removable;
......
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
View file @ a845167d
...@@ -5,31 +5,35 @@ / { ...@@ -5,31 +5,35 @@ / {
compatible = "nvidia,p2530", "nvidia,tegra210"; compatible = "nvidia,p2530", "nvidia,tegra210";
aliases { aliases {
rtc1 = "/rtc@0,7000e000"; rtc1 = "/rtc@7000e000";
serial0 = &uarta; serial0 = &uarta;
}; };
chosen {
stdout-path = "serial0:115200n8";
};
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>; reg = <0x0 0x80000000 0x0 0xc0000000>;
}; };
/* debug port */ /* debug port */
serial@0,70006000 { serial@70006000 {
status = "okay"; status = "okay";
}; };
i2c@0,7000d000 { i2c@7000d000 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
}; };
pmc@0,7000e400 { pmc@7000e400 {
nvidia,invert-interrupt; nvidia,invert-interrupt;
}; };
/* eMMC */ /* eMMC */
sdhci@0,700b0600 { sdhci@700b0600 {
status = "okay"; status = "okay";
bus-width = <8>; bus-width = <8>;
non-removable; non-removable;
......
arch/arm64/boot/dts/nvidia/tegra210-p2571.dts
View file @ a845167d
...@@ -7,7 +7,7 @@ / { ...@@ -7,7 +7,7 @@ / {
model = "NVIDIA Tegra210 P2571 reference design"; model = "NVIDIA Tegra210 P2571 reference design";
compatible = "nvidia,p2571", "nvidia,tegra210"; compatible = "nvidia,p2571", "nvidia,tegra210";
pinmux: pinmux@0,700008d4 { pinmux: pinmux@700008d4 {
pinctrl-names = "boot"; pinctrl-names = "boot";
pinctrl-0 = <&state_boot>; pinctrl-0 = <&state_boot>;
......
arch/arm64/boot/dts/nvidia/tegra210-p2595.dtsi
View file @ a845167d
...@@ -2,7 +2,7 @@ / { ...@@ -2,7 +2,7 @@ / {
model = "NVIDIA Tegra210 P2595 I/O board"; model = "NVIDIA Tegra210 P2595 I/O board";
compatible = "nvidia,p2595", "nvidia,tegra210"; compatible = "nvidia,p2595", "nvidia,tegra210";
pinmux: pinmux@0,700008d4 { pinmux: pinmux@700008d4 {
pinctrl-names = "boot"; pinctrl-names = "boot";
pinctrl-0 = <&state_boot>; pinctrl-0 = <&state_boot>;
......
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
View file @ a845167d
#include <dt-bindings/input/input.h>
/ { / {
model = "NVIDIA Tegra210 P2597 I/O board"; model = "NVIDIA Tegra210 P2597 I/O board";
compatible = "nvidia,p2597", "nvidia,tegra210"; compatible = "nvidia,p2597", "nvidia,tegra210";
pinmux: pinmux@0,700008d4 { pinmux: pinmux@700008d4 {
pinctrl-names = "boot"; pinctrl-names = "boot";
pinctrl-0 = <&state_boot>; pinctrl-0 = <&state_boot>;
...@@ -1260,11 +1262,35 @@ shutdown { ...@@ -1260,11 +1262,35 @@ shutdown {
}; };
/* MMC/SD */ /* MMC/SD */
sdhci@0,700b0000 { sdhci@700b0000 {
status = "okay"; status = "okay";
bus-width = <4>; bus-width = <4>;
no-1-8-v; no-1-8-v;
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
}; };
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
volume_down {
label = "Volume Down";
gpios = <&gpio TEGRA_GPIO(Y, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
volume_up {
label = "Volume Up";
gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
}; };
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts 0 → 100644
View file @ a845167d
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include "tegra210.dtsi"
/ {
model = "Google Pixel C";
compatible = "google,smaug-rev8", "google,smaug-rev7",
"google,smaug-rev6", "google,smaug-rev5",
"google,smaug-rev4", "google,smaug-rev3",
"google,smaug-rev1", "google,smaug", "nvidia,tegra210";
aliases {
serial0 = &uarta;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
pinmux: pinmux@700008d4 {
pinctrl-names = "boot";
pinctrl-0 = <&state_boot>;
state_boot: pinmux {
pex_l0_rst_n_pa0 {
nvidia,pins = "pex_l0_rst_n_pa0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
pex_l0_clkreq_n_pa1 {
nvidia,pins = "pex_l0_clkreq_n_pa1";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
pex_wake_n_pa2 {
nvidia,pins = "pex_wake_n_pa2";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
pex_l1_rst_n_pa3 {
nvidia,pins = "pex_l1_rst_n_pa3";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
pex_l1_clkreq_n_pa4 {
nvidia,pins = "pex_l1_clkreq_n_pa4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
sata_led_active_pa5 {
nvidia,pins = "sata_led_active_pa5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pa6 {
nvidia,pins = "pa6";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap1_fs_pb0 {
nvidia,pins = "dap1_fs_pb0";
nvidia,function = "i2s1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap1_din_pb1 {
nvidia,pins = "dap1_din_pb1";
nvidia,function = "i2s1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap1_dout_pb2 {
nvidia,pins = "dap1_dout_pb2";
nvidia,function = "i2s1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap1_sclk_pb3 {
nvidia,pins = "dap1_sclk_pb3";
nvidia,function = "i2s1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi2_mosi_pb4 {
nvidia,pins = "spi2_mosi_pb4";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi2_miso_pb5 {
nvidia,pins = "spi2_miso_pb5";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi2_sck_pb6 {
nvidia,pins = "spi2_sck_pb6";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi2_cs0_pb7 {
nvidia,pins = "spi2_cs0_pb7";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_mosi_pc0 {
nvidia,pins = "spi1_mosi_pc0";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_miso_pc1 {
nvidia,pins = "spi1_miso_pc1";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_sck_pc2 {
nvidia,pins = "spi1_sck_pc2";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_cs0_pc3 {
nvidia,pins = "spi1_cs0_pc3";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_cs1_pc4 {
nvidia,pins = "spi1_cs1_pc4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi4_sck_pc5 {
nvidia,pins = "spi4_sck_pc5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi4_cs0_pc6 {
nvidia,pins = "spi4_cs0_pc6";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi4_mosi_pc7 {
nvidia,pins = "spi4_mosi_pc7";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi4_miso_pd0 {
nvidia,pins = "spi4_miso_pd0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart3_tx_pd1 {
nvidia,pins = "uart3_tx_pd1";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart3_rx_pd2 {
nvidia,pins = "uart3_rx_pd2";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart3_rts_pd3 {
nvidia,pins = "uart3_rts_pd3";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart3_cts_pd4 {
nvidia,pins = "uart3_cts_pd4";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic1_clk_pe0 {
nvidia,pins = "dmic1_clk_pe0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic1_dat_pe1 {
nvidia,pins = "dmic1_dat_pe1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic2_clk_pe2 {
nvidia,pins = "dmic2_clk_pe2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic2_dat_pe3 {
nvidia,pins = "dmic2_dat_pe3";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic3_clk_pe4 {
nvidia,pins = "dmic3_clk_pe4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dmic3_dat_pe5 {
nvidia,pins = "dmic3_dat_pe5";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pe6 {
nvidia,pins = "pe6";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pe7 {
nvidia,pins = "pe7";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gen3_i2c_scl_pf0 {
nvidia,pins = "gen3_i2c_scl_pf0";
nvidia,function = "i2c3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
gen3_i2c_sda_pf1 {
nvidia,pins = "gen3_i2c_sda_pf1";
nvidia,function = "i2c3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
uart2_tx_pg0 {
nvidia,pins = "uart2_tx_pg0";
nvidia,function = "uartb";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart2_rx_pg1 {
nvidia,pins = "uart2_rx_pg1";
nvidia,function = "uartb";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart2_rts_pg2 {
nvidia,pins = "uart2_rts_pg2";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart2_cts_pg3 {
nvidia,pins = "uart2_cts_pg3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
wifi_en_ph0 {
nvidia,pins = "wifi_en_ph0";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
wifi_rst_ph1 {
nvidia,pins = "wifi_rst_ph1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
wifi_wake_ap_ph2 {
nvidia,pins = "wifi_wake_ap_ph2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
ap_wake_bt_ph3 {
nvidia,pins = "ap_wake_bt_ph3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
bt_rst_ph4 {
nvidia,pins = "bt_rst_ph4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
bt_wake_ap_ph5 {
nvidia,pins = "bt_wake_ap_ph5";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
ph6 {
nvidia,pins = "ph6";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
ap_wake_nfc_ph7 {
nvidia,pins = "ap_wake_nfc_ph7";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
nfc_en_pi0 {
nvidia,pins = "nfc_en_pi0";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
nfc_int_pi1 {
nvidia,pins = "nfc_int_pi1";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gps_en_pi2 {
nvidia,pins = "gps_en_pi2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gps_rst_pi3 {
nvidia,pins = "gps_rst_pi3";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart4_tx_pi4 {
nvidia,pins = "uart4_tx_pi4";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart4_rx_pi5 {
nvidia,pins = "uart4_rx_pi5";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart4_rts_pi6 {
nvidia,pins = "uart4_rts_pi6";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart4_cts_pi7 {
nvidia,pins = "uart4_cts_pi7";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gen1_i2c_sda_pj0 {
nvidia,pins = "gen1_i2c_sda_pj0";
nvidia,function = "i2c1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
gen1_i2c_scl_pj1 {
nvidia,pins = "gen1_i2c_scl_pj1";
nvidia,function = "i2c1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
gen2_i2c_scl_pj2 {
nvidia,pins = "gen2_i2c_scl_pj2";
nvidia,function = "i2c2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
};
gen2_i2c_sda_pj3 {
nvidia,pins = "gen2_i2c_sda_pj3";
nvidia,function = "i2c2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
};
dap4_fs_pj4 {
nvidia,pins = "dap4_fs_pj4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap4_din_pj5 {
nvidia,pins = "dap4_din_pj5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap4_dout_pj6 {
nvidia,pins = "dap4_dout_pj6";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap4_sclk_pj7 {
nvidia,pins = "dap4_sclk_pj7";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk0 {
nvidia,pins = "pk0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk1 {
nvidia,pins = "pk1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk2 {
nvidia,pins = "pk2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk3 {
nvidia,pins = "pk3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk4 {
nvidia,pins = "pk4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk5 {
nvidia,pins = "pk5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk6 {
nvidia,pins = "pk6";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pk7 {
nvidia,pins = "pk7";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pl0 {
nvidia,pins = "pl0";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pl1 {
nvidia,pins = "pl1";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_clk_pm0 {
nvidia,pins = "sdmmc1_clk_pm0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_cmd_pm1 {
nvidia,pins = "sdmmc1_cmd_pm1";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_dat3_pm2 {
nvidia,pins = "sdmmc1_dat3_pm2";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_dat2_pm3 {
nvidia,pins = "sdmmc1_dat2_pm3";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_dat1_pm4 {
nvidia,pins = "sdmmc1_dat1_pm4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc1_dat0_pm5 {
nvidia,pins = "sdmmc1_dat0_pm5";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_clk_pp0 {
nvidia,pins = "sdmmc3_clk_pp0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_cmd_pp1 {
nvidia,pins = "sdmmc3_cmd_pp1";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_dat3_pp2 {
nvidia,pins = "sdmmc3_dat3_pp2";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_dat2_pp3 {
nvidia,pins = "sdmmc3_dat2_pp3";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_dat1_pp4 {
nvidia,pins = "sdmmc3_dat1_pp4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
sdmmc3_dat0_pp5 {
nvidia,pins = "sdmmc3_dat0_pp5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam1_mclk_ps0 {
nvidia,pins = "cam1_mclk_ps0";
nvidia,function = "extperiph3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam2_mclk_ps1 {
nvidia,pins = "cam2_mclk_ps1";
nvidia,function = "extperiph3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam_i2c_scl_ps2 {
nvidia,pins = "cam_i2c_scl_ps2";
nvidia,function = "i2cvi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
cam_i2c_sda_ps3 {
nvidia,pins = "cam_i2c_sda_ps3";
nvidia,function = "i2cvi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
cam_rst_ps4 {
nvidia,pins = "cam_rst_ps4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam_af_en_ps5 {
nvidia,pins = "cam_af_en_ps5";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam_flash_en_ps6 {
nvidia,pins = "cam_flash_en_ps6";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam1_pwdn_ps7 {
nvidia,pins = "cam1_pwdn_ps7";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam2_pwdn_pt0 {
nvidia,pins = "cam2_pwdn_pt0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cam1_strobe_pt1 {
nvidia,pins = "cam1_strobe_pt1";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart1_tx_pu0 {
nvidia,pins = "uart1_tx_pu0";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart1_rx_pu1 {
nvidia,pins = "uart1_rx_pu1";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart1_rts_pu2 {
nvidia,pins = "uart1_rts_pu2";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
uart1_cts_pu3 {
nvidia,pins = "uart1_cts_pu3";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_bl_pwm_pv0 {
nvidia,pins = "lcd_bl_pwm_pv0";
nvidia,function = "rsvd3";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_bl_en_pv1 {
nvidia,pins = "lcd_bl_en_pv1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_rst_pv2 {
nvidia,pins = "lcd_rst_pv2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_gpio1_pv3 {
nvidia,pins = "lcd_gpio1_pv3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_gpio2_pv4 {
nvidia,pins = "lcd_gpio2_pv4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
ap_ready_pv5 {
nvidia,pins = "ap_ready_pv5";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
touch_rst_pv6 {
nvidia,pins = "touch_rst_pv6";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
touch_clk_pv7 {
nvidia,pins = "touch_clk_pv7";
nvidia,function = "touch";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
modem_wake_ap_px0 {
nvidia,pins = "modem_wake_ap_px0";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
touch_int_px1 {
nvidia,pins = "touch_int_px1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
motion_int_px2 {
nvidia,pins = "motion_int_px2";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
als_prox_int_px3 {
nvidia,pins = "als_prox_int_px3";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
temp_alert_px4 {
nvidia,pins = "temp_alert_px4";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
button_power_on_px5 {
nvidia,pins = "button_power_on_px5";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
button_vol_up_px6 {
nvidia,pins = "button_vol_up_px6";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
button_vol_down_px7 {
nvidia,pins = "button_vol_down_px7";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
button_slide_sw_py0 {
nvidia,pins = "button_slide_sw_py0";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
button_home_py1 {
nvidia,pins = "button_home_py1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
lcd_te_py2 {
nvidia,pins = "lcd_te_py2";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pwr_i2c_scl_py3 {
nvidia,pins = "pwr_i2c_scl_py3";
nvidia,function = "i2cpmu";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
pwr_i2c_sda_py4 {
nvidia,pins = "pwr_i2c_sda_py4";
nvidia,function = "i2cpmu";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
clk_32k_out_py5 {
nvidia,pins = "clk_32k_out_py5";
nvidia,function = "soc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz0 {
nvidia,pins = "pz0";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz1 {
nvidia,pins = "pz1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz2 {
nvidia,pins = "pz2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz3 {
nvidia,pins = "pz3";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz4 {
nvidia,pins = "pz4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pz5 {
nvidia,pins = "pz5";
nvidia,function = "soc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap2_fs_paa0 {
nvidia,pins = "dap2_fs_paa0";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap2_sclk_paa1 {
nvidia,pins = "dap2_sclk_paa1";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap2_din_paa2 {
nvidia,pins = "dap2_din_paa2";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dap2_dout_paa3 {
nvidia,pins = "dap2_dout_paa3";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
aud_mclk_pbb0 {
nvidia,pins = "aud_mclk_pbb0";
nvidia,function = "aud";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dvfs_pwm_pbb1 {
nvidia,pins = "dvfs_pwm_pbb1";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
dvfs_clk_pbb2 {
nvidia,pins = "dvfs_clk_pbb2";
nvidia,function = "rsvd0";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gpio_x1_aud_pbb3 {
nvidia,pins = "gpio_x1_aud_pbb3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
gpio_x3_aud_pbb4 {
nvidia,pins = "gpio_x3_aud_pbb4";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
hdmi_cec_pcc0 {
nvidia,pins = "hdmi_cec_pcc0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
hdmi_int_dp_hpd_pcc1 {
nvidia,pins = "hdmi_int_dp_hpd_pcc1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
spdif_out_pcc2 {
nvidia,pins = "spdif_out_pcc2";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spdif_in_pcc3 {
nvidia,pins = "spdif_in_pcc3";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
usb_vbus_en0_pcc4 {
nvidia,pins = "usb_vbus_en0_pcc4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
usb_vbus_en1_pcc5 {
nvidia,pins = "usb_vbus_en1_pcc5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
dp_hpd0_pcc6 {
nvidia,pins = "dp_hpd0_pcc6";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pcc7 {
nvidia,pins = "pcc7";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_DISABLE>;
};
spi2_cs1_pdd0 {
nvidia,pins = "spi2_cs1_pdd0";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_sck_pee0 {
nvidia,pins = "qspi_sck_pee0";
nvidia,function = "qspi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_cs_n_pee1 {
nvidia,pins = "qspi_cs_n_pee1";
nvidia,function = "qspi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_io0_pee2 {
nvidia,pins = "qspi_io0_pee2";
nvidia,function = "qspi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_io1_pee3 {
nvidia,pins = "qspi_io1_pee3";
nvidia,function = "qspi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_io2_pee4 {
nvidia,pins = "qspi_io2_pee4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
qspi_io3_pee5 {
nvidia,pins = "qspi_io3_pee5";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
core_pwr_req {
nvidia,pins = "core_pwr_req";
nvidia,function = "core";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
cpu_pwr_req {
nvidia,pins = "cpu_pwr_req";
nvidia,function = "cpu";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pwr_int_n {
nvidia,pins = "pwr_int_n";
nvidia,function = "pmi";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
clk_32k_in {
nvidia,pins = "clk_32k_in";
nvidia,function = "clk";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
jtag_rtck {
nvidia,pins = "jtag_rtck";
nvidia,function = "jtag";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
clk_req {
nvidia,pins = "clk_req";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
shutdown {
nvidia,pins = "shutdown";
nvidia,function = "shutdown";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
};
};
serial@70006000 {
status = "okay";
};
i2c@7000c400 {
status = "okay";
clock-frequency = <1000000>;
ec@1e {
compatible = "google,cros-ec-i2c";
reg = <0x1e>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
ec_i2c_0: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
#address-cells = <1>;
#size-cells = <0>;
google,remote-bus = <0>;
battery: bq27742@55 {
compatible = "ti,bq27742";
reg = <0x55>;
battery-name = "battery";
};
};
};
};
pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <0>;
nvidia,cpu-pwr-good-time = <0>;
nvidia,cpu-pwr-off-time = <0>;
nvidia,core-pwr-good-time = <12000 6000>;
nvidia,core-pwr-off-time = <39053>;
nvidia,core-power-req-active-high;
nvidia,sys-clock-req-active-high;
status = "okay";
};
sdhci@700b0600 {
bus-width = <8>;
non-removable;
status = "okay";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
cpus {
cpu@0 {
enable-method = "psci";
};
cpu@1 {
enable-method = "psci";
};
cpu@2 {
enable-method = "psci";
};
cpu@3 {
enable-method = "psci";
};
};
gpio-keys {
compatible = "gpio-keys";
gpio-keys,name = "gpio-keys";
power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <30>;
wakeup-source;
};
lid {
label = "Lid";
gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
wakeup-source;
};
tablet_mode {
label = "Tablet Mode";
gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
linux,input-type = <EV_SW>;
linux,code = <SW_TABLET_MODE>;
wakeup-source;
};
volume_down {
label = "Volume Down";
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
volume_up {
label = "Volume Up";
gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
};
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View file @ a845167d
...@@ -10,7 +10,7 @@ / { ...@@ -10,7 +10,7 @@ / {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
host1x@0,50000000 { host1x@50000000 {
compatible = "nvidia,tegra210-host1x", "simple-bus"; compatible = "nvidia,tegra210-host1x", "simple-bus";
reg = <0x0 0x50000000 0x0 0x00034000>; reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
...@@ -25,7 +25,7 @@ host1x@0,50000000 { ...@@ -25,7 +25,7 @@ host1x@0,50000000 {
ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>;
dpaux1: dpaux@0,54040000 { dpaux1: dpaux@54040000 {
compatible = "nvidia,tegra210-dpaux"; compatible = "nvidia,tegra210-dpaux";
reg = <0x0 0x54040000 0x0 0x00040000>; reg = <0x0 0x54040000 0x0 0x00040000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
...@@ -37,19 +37,19 @@ dpaux1: dpaux@0,54040000 { ...@@ -37,19 +37,19 @@ dpaux1: dpaux@0,54040000 {
status = "disabled"; status = "disabled";
}; };
vi@0,54080000 { vi@54080000 {
compatible = "nvidia,tegra210-vi"; compatible = "nvidia,tegra210-vi";
reg = <0x0 0x54080000 0x0 0x00040000>; reg = <0x0 0x54080000 0x0 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
tsec@0,54100000 { tsec@54100000 {
compatible = "nvidia,tegra210-tsec"; compatible = "nvidia,tegra210-tsec";
reg = <0x0 0x54100000 0x0 0x00040000>; reg = <0x0 0x54100000 0x0 0x00040000>;
}; };
dc@0,54200000 { dc@54200000 {
compatible = "nvidia,tegra210-dc"; compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54200000 0x0 0x00040000>; reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
...@@ -64,7 +64,7 @@ dc@0,54200000 { ...@@ -64,7 +64,7 @@ dc@0,54200000 {
nvidia,head = <0>; nvidia,head = <0>;
}; };
dc@0,54240000 { dc@54240000 {
compatible = "nvidia,tegra210-dc"; compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54240000 0x0 0x00040000>; reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
...@@ -79,7 +79,7 @@ dc@0,54240000 { ...@@ -79,7 +79,7 @@ dc@0,54240000 {
nvidia,head = <1>; nvidia,head = <1>;
}; };
dsi@0,54300000 { dsi@54300000 {
compatible = "nvidia,tegra210-dsi"; compatible = "nvidia,tegra210-dsi";
reg = <0x0 0x54300000 0x0 0x00040000>; reg = <0x0 0x54300000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA210_CLK_DSIA>, clocks = <&tegra_car TEGRA210_CLK_DSIA>,
...@@ -96,19 +96,19 @@ dsi@0,54300000 { ...@@ -96,19 +96,19 @@ dsi@0,54300000 {
#size-cells = <0>; #size-cells = <0>;
}; };
vic@0,54340000 { vic@54340000 {
compatible = "nvidia,tegra210-vic"; compatible = "nvidia,tegra210-vic";
reg = <0x0 0x54340000 0x0 0x00040000>; reg = <0x0 0x54340000 0x0 0x00040000>;
status = "disabled"; status = "disabled";
}; };
nvjpg@0,54380000 { nvjpg@54380000 {
compatible = "nvidia,tegra210-nvjpg"; compatible = "nvidia,tegra210-nvjpg";
reg = <0x0 0x54380000 0x0 0x00040000>; reg = <0x0 0x54380000 0x0 0x00040000>;
status = "disabled"; status = "disabled";
}; };
dsi@0,54400000 { dsi@54400000 {
compatible = "nvidia,tegra210-dsi"; compatible = "nvidia,tegra210-dsi";
reg = <0x0 0x54400000 0x0 0x00040000>; reg = <0x0 0x54400000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA210_CLK_DSIB>, clocks = <&tegra_car TEGRA210_CLK_DSIB>,
...@@ -125,25 +125,25 @@ dsi@0,54400000 { ...@@ -125,25 +125,25 @@ dsi@0,54400000 {
#size-cells = <0>; #size-cells = <0>;
}; };
nvdec@0,54480000 { nvdec@54480000 {
compatible = "nvidia,tegra210-nvdec"; compatible = "nvidia,tegra210-nvdec";
reg = <0x0 0x54480000 0x0 0x00040000>; reg = <0x0 0x54480000 0x0 0x00040000>;
status = "disabled"; status = "disabled";
}; };
nvenc@0,544c0000 { nvenc@544c0000 {
compatible = "nvidia,tegra210-nvenc"; compatible = "nvidia,tegra210-nvenc";
reg = <0x0 0x544c0000 0x0 0x00040000>; reg = <0x0 0x544c0000 0x0 0x00040000>;
status = "disabled"; status = "disabled";
}; };
tsec@0,54500000 { tsec@54500000 {
compatible = "nvidia,tegra210-tsec"; compatible = "nvidia,tegra210-tsec";
reg = <0x0 0x54500000 0x0 0x00040000>; reg = <0x0 0x54500000 0x0 0x00040000>;
status = "disabled"; status = "disabled";
}; };
sor@0,54540000 { sor@54540000 {
compatible = "nvidia,tegra210-sor"; compatible = "nvidia,tegra210-sor";
reg = <0x0 0x54540000 0x0 0x00040000>; reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
...@@ -157,7 +157,7 @@ sor@0,54540000 { ...@@ -157,7 +157,7 @@ sor@0,54540000 {
status = "disabled"; status = "disabled";
}; };
sor@0,54580000 { sor@54580000 {
compatible = "nvidia,tegra210-sor1"; compatible = "nvidia,tegra210-sor1";
reg = <0x0 0x54580000 0x0 0x00040000>; reg = <0x0 0x54580000 0x0 0x00040000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
...@@ -171,7 +171,7 @@ sor@0,54580000 { ...@@ -171,7 +171,7 @@ sor@0,54580000 {
status = "disabled"; status = "disabled";
}; };
dpaux: dpaux@0,545c0000 { dpaux: dpaux@545c0000 {
compatible = "nvidia,tegra124-dpaux"; compatible = "nvidia,tegra124-dpaux";
reg = <0x0 0x545c0000 0x0 0x00040000>; reg = <0x0 0x545c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
...@@ -183,21 +183,21 @@ dpaux: dpaux@0,545c0000 { ...@@ -183,21 +183,21 @@ dpaux: dpaux@0,545c0000 {
status = "disabled"; status = "disabled";
}; };
isp@0,54600000 { isp@54600000 {
compatible = "nvidia,tegra210-isp"; compatible = "nvidia,tegra210-isp";
reg = <0x0 0x54600000 0x0 0x00040000>; reg = <0x0 0x54600000 0x0 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
isp@0,54680000 { isp@54680000 {
compatible = "nvidia,tegra210-isp"; compatible = "nvidia,tegra210-isp";
reg = <0x0 0x54680000 0x0 0x00040000>; reg = <0x0 0x54680000 0x0 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
i2c@0,546c0000 { i2c@546c0000 {
compatible = "nvidia,tegra210-i2c-vi"; compatible = "nvidia,tegra210-i2c-vi";
reg = <0x0 0x546c0000 0x0 0x00040000>; reg = <0x0 0x546c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
...@@ -205,7 +205,7 @@ i2c@0,546c0000 { ...@@ -205,7 +205,7 @@ i2c@0,546c0000 {
}; };
}; };
gic: interrupt-controller@0,50041000 { gic: interrupt-controller@50041000 {
compatible = "arm,gic-400"; compatible = "arm,gic-400";
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupt-controller; interrupt-controller;
...@@ -218,7 +218,7 @@ gic: interrupt-controller@0,50041000 { ...@@ -218,7 +218,7 @@ gic: interrupt-controller@0,50041000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
}; };
gpu@0,57000000 { gpu@57000000 {
compatible = "nvidia,gm20b"; compatible = "nvidia,gm20b";
reg = <0x0 0x57000000 0x0 0x01000000>, reg = <0x0 0x57000000 0x0 0x01000000>,
<0x0 0x58000000 0x0 0x01000000>; <0x0 0x58000000 0x0 0x01000000>;
...@@ -233,7 +233,7 @@ gpu@0,57000000 { ...@@ -233,7 +233,7 @@ gpu@0,57000000 {
status = "disabled"; status = "disabled";
}; };
lic: interrupt-controller@0,60004000 { lic: interrupt-controller@60004000 {
compatible = "nvidia,tegra210-ictlr"; compatible = "nvidia,tegra210-ictlr";
reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */
<0x0 0x60004100 0x0 0x40>, /* secondary controller */ <0x0 0x60004100 0x0 0x40>, /* secondary controller */
...@@ -246,7 +246,7 @@ lic: interrupt-controller@0,60004000 { ...@@ -246,7 +246,7 @@ lic: interrupt-controller@0,60004000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
}; };
timer@0,60005000 { timer@60005000 {
compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>; reg = <0x0 0x60005000 0x0 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
...@@ -259,19 +259,19 @@ timer@0,60005000 { ...@@ -259,19 +259,19 @@ timer@0,60005000 {
clock-names = "timer"; clock-names = "timer";
}; };
tegra_car: clock@0,60006000 { tegra_car: clock@60006000 {
compatible = "nvidia,tegra210-car"; compatible = "nvidia,tegra210-car";
reg = <0x0 0x60006000 0x0 0x1000>; reg = <0x0 0x60006000 0x0 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
flow-controller@0,60007000 { flow-controller@60007000 {
compatible = "nvidia,tegra210-flowctrl"; compatible = "nvidia,tegra210-flowctrl";
reg = <0x0 0x60007000 0x0 0x1000>; reg = <0x0 0x60007000 0x0 0x1000>;
}; };
gpio: gpio@0,6000d000 { gpio: gpio@6000d000 {
compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
reg = <0x0 0x6000d000 0x0 0x1000>; reg = <0x0 0x6000d000 0x0 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
...@@ -288,7 +288,7 @@ gpio: gpio@0,6000d000 { ...@@ -288,7 +288,7 @@ gpio: gpio@0,6000d000 {
interrupt-controller; interrupt-controller;
}; };
apbdma: dma@0,60020000 { apbdma: dma@60020000 {
compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma";
reg = <0x0 0x60020000 0x0 0x1400>; reg = <0x0 0x60020000 0x0 0x1400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
...@@ -330,13 +330,13 @@ apbdma: dma@0,60020000 { ...@@ -330,13 +330,13 @@ apbdma: dma@0,60020000 {
#dma-cells = <1>; #dma-cells = <1>;
}; };
apbmisc@0,70000800 { apbmisc@70000800 {
compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
<0x0 0x7000e864 0x0 0x04>; /* Strapping options */ <0x0 0x7000e864 0x0 0x04>; /* Strapping options */
}; };
pinmux: pinmux@0,700008d4 { pinmux: pinmux@700008d4 {
compatible = "nvidia,tegra210-pinmux"; compatible = "nvidia,tegra210-pinmux";
reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */
<0x0 0x70003000 0x0 0x294>; /* Mux registers */ <0x0 0x70003000 0x0 0x294>; /* Mux registers */
...@@ -347,10 +347,10 @@ pinmux: pinmux@0,700008d4 { ...@@ -347,10 +347,10 @@ pinmux: pinmux@0,700008d4 {
* driver and APB DMA based serial driver for higher baudrate * driver and APB DMA based serial driver for higher baudrate
* and performance. To enable the 8250 based driver, the compatible * and performance. To enable the 8250 based driver, the compatible
* is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is * the APB DMA based serial driver, the compatible is
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
*/ */
uarta: serial@0,70006000 { uarta: serial@70006000 {
compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006000 0x0 0x40>; reg = <0x0 0x70006000 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -364,7 +364,7 @@ uarta: serial@0,70006000 { ...@@ -364,7 +364,7 @@ uarta: serial@0,70006000 {
status = "disabled"; status = "disabled";
}; };
uartb: serial@0,70006040 { uartb: serial@70006040 {
compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006040 0x0 0x40>; reg = <0x0 0x70006040 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -378,7 +378,7 @@ uartb: serial@0,70006040 { ...@@ -378,7 +378,7 @@ uartb: serial@0,70006040 {
status = "disabled"; status = "disabled";
}; };
uartc: serial@0,70006200 { uartc: serial@70006200 {
compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006200 0x0 0x40>; reg = <0x0 0x70006200 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -392,7 +392,7 @@ uartc: serial@0,70006200 { ...@@ -392,7 +392,7 @@ uartc: serial@0,70006200 {
status = "disabled"; status = "disabled";
}; };
uartd: serial@0,70006300 { uartd: serial@70006300 {
compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006300 0x0 0x40>; reg = <0x0 0x70006300 0x0 0x40>;
reg-shift = <2>; reg-shift = <2>;
...@@ -406,7 +406,7 @@ uartd: serial@0,70006300 { ...@@ -406,7 +406,7 @@ uartd: serial@0,70006300 {
status = "disabled"; status = "disabled";
}; };
pwm: pwm@0,7000a000 { pwm: pwm@7000a000 {
compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm";
reg = <0x0 0x7000a000 0x0 0x100>; reg = <0x0 0x7000a000 0x0 0x100>;
#pwm-cells = <2>; #pwm-cells = <2>;
...@@ -417,7 +417,7 @@ pwm: pwm@0,7000a000 { ...@@ -417,7 +417,7 @@ pwm: pwm@0,7000a000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c000 { i2c@7000c000 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c000 0x0 0x100>; reg = <0x0 0x7000c000 0x0 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
...@@ -432,7 +432,7 @@ i2c@0,7000c000 { ...@@ -432,7 +432,7 @@ i2c@0,7000c000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c400 { i2c@7000c400 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c400 0x0 0x100>; reg = <0x0 0x7000c400 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
...@@ -447,7 +447,7 @@ i2c@0,7000c400 { ...@@ -447,7 +447,7 @@ i2c@0,7000c400 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c500 { i2c@7000c500 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c500 0x0 0x100>; reg = <0x0 0x7000c500 0x0 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
...@@ -462,7 +462,7 @@ i2c@0,7000c500 { ...@@ -462,7 +462,7 @@ i2c@0,7000c500 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000c700 { i2c@7000c700 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000c700 0x0 0x100>; reg = <0x0 0x7000c700 0x0 0x100>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
...@@ -477,7 +477,7 @@ i2c@0,7000c700 { ...@@ -477,7 +477,7 @@ i2c@0,7000c700 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000d000 { i2c@7000d000 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000d000 0x0 0x100>; reg = <0x0 0x7000d000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
...@@ -492,7 +492,7 @@ i2c@0,7000d000 { ...@@ -492,7 +492,7 @@ i2c@0,7000d000 {
status = "disabled"; status = "disabled";
}; };
i2c@0,7000d100 { i2c@7000d100 {
compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
reg = <0x0 0x7000d100 0x0 0x100>; reg = <0x0 0x7000d100 0x0 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
...@@ -507,7 +507,7 @@ i2c@0,7000d100 { ...@@ -507,7 +507,7 @@ i2c@0,7000d100 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d400 { spi@7000d400 {
compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d400 0x0 0x200>; reg = <0x0 0x7000d400 0x0 0x200>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
...@@ -522,7 +522,7 @@ spi@0,7000d400 { ...@@ -522,7 +522,7 @@ spi@0,7000d400 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d600 { spi@7000d600 {
compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d600 0x0 0x200>; reg = <0x0 0x7000d600 0x0 0x200>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
...@@ -537,7 +537,7 @@ spi@0,7000d600 { ...@@ -537,7 +537,7 @@ spi@0,7000d600 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000d800 { spi@7000d800 {
compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000d800 0x0 0x200>; reg = <0x0 0x7000d800 0x0 0x200>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
...@@ -552,7 +552,7 @@ spi@0,7000d800 { ...@@ -552,7 +552,7 @@ spi@0,7000d800 {
status = "disabled"; status = "disabled";
}; };
spi@0,7000da00 { spi@7000da00 {
compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
reg = <0x0 0x7000da00 0x0 0x200>; reg = <0x0 0x7000da00 0x0 0x200>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
...@@ -567,7 +567,7 @@ spi@0,7000da00 { ...@@ -567,7 +567,7 @@ spi@0,7000da00 {
status = "disabled"; status = "disabled";
}; };
rtc@0,7000e000 { rtc@7000e000 {
compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc";
reg = <0x0 0x7000e000 0x0 0x100>; reg = <0x0 0x7000e000 0x0 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
...@@ -575,16 +575,14 @@ rtc@0,7000e000 { ...@@ -575,16 +575,14 @@ rtc@0,7000e000 {
clock-names = "rtc"; clock-names = "rtc";
}; };
pmc: pmc@0,7000e400 { pmc: pmc@7000e400 {
compatible = "nvidia,tegra210-pmc"; compatible = "nvidia,tegra210-pmc";
reg = <0x0 0x7000e400 0x0 0x400>; reg = <0x0 0x7000e400 0x0 0x400>;
clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in"; clock-names = "pclk", "clk32k_in";
#power-domain-cells = <1>;
}; };
fuse@0,7000f800 { fuse@7000f800 {
compatible = "nvidia,tegra210-efuse"; compatible = "nvidia,tegra210-efuse";
reg = <0x0 0x7000f800 0x0 0x400>; reg = <0x0 0x7000f800 0x0 0x400>;
clocks = <&tegra_car TEGRA210_CLK_FUSE>; clocks = <&tegra_car TEGRA210_CLK_FUSE>;
...@@ -593,7 +591,7 @@ fuse@0,7000f800 { ...@@ -593,7 +591,7 @@ fuse@0,7000f800 {
reset-names = "fuse"; reset-names = "fuse";
}; };
mc: memory-controller@0,70019000 { mc: memory-controller@70019000 {
compatible = "nvidia,tegra210-mc"; compatible = "nvidia,tegra210-mc";
reg = <0x0 0x70019000 0x0 0x1000>; reg = <0x0 0x70019000 0x0 0x1000>;
clocks = <&tegra_car TEGRA210_CLK_MC>; clocks = <&tegra_car TEGRA210_CLK_MC>;
...@@ -604,7 +602,7 @@ mc: memory-controller@0,70019000 { ...@@ -604,7 +602,7 @@ mc: memory-controller@0,70019000 {
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
hda@0,70030000 { hda@70030000 {
compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda";
reg = <0x0 0x70030000 0x0 0x10000>; reg = <0x0 0x70030000 0x0 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
...@@ -619,7 +617,7 @@ hda@0,70030000 { ...@@ -619,7 +617,7 @@ hda@0,70030000 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0000 { sdhci@700b0000 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>; reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
...@@ -630,7 +628,7 @@ sdhci@0,700b0000 { ...@@ -630,7 +628,7 @@ sdhci@0,700b0000 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0200 { sdhci@700b0200 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>; reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
...@@ -641,7 +639,7 @@ sdhci@0,700b0200 { ...@@ -641,7 +639,7 @@ sdhci@0,700b0200 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0400 { sdhci@700b0400 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>; reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
...@@ -652,7 +650,7 @@ sdhci@0,700b0400 { ...@@ -652,7 +650,7 @@ sdhci@0,700b0400 {
status = "disabled"; status = "disabled";
}; };
sdhci@0,700b0600 { sdhci@700b0600 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>; reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
...@@ -663,7 +661,7 @@ sdhci@0,700b0600 { ...@@ -663,7 +661,7 @@ sdhci@0,700b0600 {
status = "disabled"; status = "disabled";
}; };
mipi: mipi@0,700e3000 { mipi: mipi@700e3000 {
compatible = "nvidia,tegra210-mipi"; compatible = "nvidia,tegra210-mipi";
reg = <0x0 0x700e3000 0x0 0x100>; reg = <0x0 0x700e3000 0x0 0x100>;
clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>;
...@@ -671,7 +669,7 @@ mipi: mipi@0,700e3000 { ...@@ -671,7 +669,7 @@ mipi: mipi@0,700e3000 {
#nvidia,mipi-calibrate-cells = <1>; #nvidia,mipi-calibrate-cells = <1>;
}; };
spi@0,70410000 { spi@70410000 {
compatible = "nvidia,tegra210-qspi"; compatible = "nvidia,tegra210-qspi";
reg = <0x0 0x70410000 0x0 0x1000>; reg = <0x0 0x70410000 0x0 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
...@@ -686,7 +684,7 @@ spi@0,70410000 { ...@@ -686,7 +684,7 @@ spi@0,70410000 {
status = "disabled"; status = "disabled";
}; };
usb@0,7d000000 { usb@7d000000 {
compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x0 0x7d000000 0x0 0x4000>; reg = <0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
...@@ -699,7 +697,7 @@ usb@0,7d000000 { ...@@ -699,7 +697,7 @@ usb@0,7d000000 {
status = "disabled"; status = "disabled";
}; };
phy1: usb-phy@0,7d000000 { phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d000000 0x0 0x4000>, reg = <0x0 0x7d000000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
...@@ -724,7 +722,7 @@ phy1: usb-phy@0,7d000000 { ...@@ -724,7 +722,7 @@ phy1: usb-phy@0,7d000000 {
status = "disabled"; status = "disabled";
}; };
usb@0,7d004000 { usb@7d004000 {
compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x0 0x7d004000 0x0 0x4000>; reg = <0x0 0x7d004000 0x0 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
...@@ -737,7 +735,7 @@ usb@0,7d004000 { ...@@ -737,7 +735,7 @@ usb@0,7d004000 {
status = "disabled"; status = "disabled";
}; };
phy2: usb-phy@0,7d004000 { phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d004000 0x0 0x4000>, reg = <0x0 0x7d004000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
......
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