Commit abf0a1c2 authored by Lendacky, Thomas's avatar Lendacky, Thomas Committed by David S. Miller

amd-xgbe: Add support for SFP+ modules

Add support for recognizing and using SFP+ modules directly. This includes
using the I2C support to read and interpret the information returned from
an SFP+ module and configuring things properly.
Signed-off-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 372788f9
...@@ -178,6 +178,7 @@ config AMD_XGBE ...@@ -178,6 +178,7 @@ config AMD_XGBE
select BITREVERSE select BITREVERSE
select CRC32 select CRC32
select PTP_1588_CLOCK select PTP_1588_CLOCK
select PHYLIB
select AMD_XGBE_HAVE_ECC if X86 select AMD_XGBE_HAVE_ECC if X86
---help--- ---help---
This driver supports the AMD 10GbE Ethernet device found on an This driver supports the AMD 10GbE Ethernet device found on an
......
...@@ -929,6 +929,8 @@ ...@@ -929,6 +929,8 @@
#define XP_DRIVER_SCRATCH_0 0x0068 #define XP_DRIVER_SCRATCH_0 0x0068
#define XP_DRIVER_SCRATCH_1 0x006c #define XP_DRIVER_SCRATCH_1 0x006c
#define XP_INT_EN 0x0078 #define XP_INT_EN 0x0078
#define XP_I2C_MUTEX 0x0080
#define XP_MDIO_MUTEX 0x0084
/* MAC Control register entry bit positions and sizes */ /* MAC Control register entry bit positions and sizes */
#define XP_DRIVER_INT_REQ_REQUEST_INDEX 0 #define XP_DRIVER_INT_REQ_REQUEST_INDEX 0
...@@ -975,6 +977,12 @@ ...@@ -975,6 +977,12 @@
#define XP_ECC_ISR_TX_DED_WIDTH 1 #define XP_ECC_ISR_TX_DED_WIDTH 1
#define XP_ECC_ISR_TX_SEC_INDEX 5 #define XP_ECC_ISR_TX_SEC_INDEX 5
#define XP_ECC_ISR_TX_SEC_WIDTH 1 #define XP_ECC_ISR_TX_SEC_WIDTH 1
#define XP_I2C_MUTEX_BUSY_INDEX 31
#define XP_I2C_MUTEX_BUSY_WIDTH 1
#define XP_I2C_MUTEX_ID_INDEX 29
#define XP_I2C_MUTEX_ID_WIDTH 2
#define XP_I2C_MUTEX_ACTIVE_INDEX 0
#define XP_I2C_MUTEX_ACTIVE_WIDTH 1
#define XP_MAC_ADDR_HI_VALID_INDEX 31 #define XP_MAC_ADDR_HI_VALID_INDEX 31
#define XP_MAC_ADDR_HI_VALID_WIDTH 1 #define XP_MAC_ADDR_HI_VALID_WIDTH 1
#define XP_PROP_0_CONN_TYPE_INDEX 28 #define XP_PROP_0_CONN_TYPE_INDEX 28
...@@ -999,6 +1007,24 @@ ...@@ -999,6 +1007,24 @@
#define XP_PROP_2_RX_FIFO_SIZE_WIDTH 16 #define XP_PROP_2_RX_FIFO_SIZE_WIDTH 16
#define XP_PROP_2_TX_FIFO_SIZE_INDEX 0 #define XP_PROP_2_TX_FIFO_SIZE_INDEX 0
#define XP_PROP_2_TX_FIFO_SIZE_WIDTH 16 #define XP_PROP_2_TX_FIFO_SIZE_WIDTH 16
#define XP_PROP_3_GPIO_MASK_INDEX 28
#define XP_PROP_3_GPIO_MASK_WIDTH 4
#define XP_PROP_3_GPIO_MOD_ABS_INDEX 20
#define XP_PROP_3_GPIO_MOD_ABS_WIDTH 4
#define XP_PROP_3_GPIO_RATE_SELECT_INDEX 16
#define XP_PROP_3_GPIO_RATE_SELECT_WIDTH 4
#define XP_PROP_3_GPIO_RX_LOS_INDEX 24
#define XP_PROP_3_GPIO_RX_LOS_WIDTH 4
#define XP_PROP_3_GPIO_TX_FAULT_INDEX 12
#define XP_PROP_3_GPIO_TX_FAULT_WIDTH 4
#define XP_PROP_3_GPIO_ADDR_INDEX 8
#define XP_PROP_3_GPIO_ADDR_WIDTH 3
#define XP_PROP_4_MUX_ADDR_HI_INDEX 8
#define XP_PROP_4_MUX_ADDR_HI_WIDTH 5
#define XP_PROP_4_MUX_ADDR_LO_INDEX 0
#define XP_PROP_4_MUX_ADDR_LO_WIDTH 3
#define XP_PROP_4_MUX_CHAN_INDEX 4
#define XP_PROP_4_MUX_CHAN_WIDTH 3
/* I2C Control register offsets */ /* I2C Control register offsets */
#define IC_CON 0x0000 #define IC_CON 0x0000
...@@ -1235,6 +1261,14 @@ ...@@ -1235,6 +1261,14 @@
#define MDIO_VEND2_CTRL1_AN_RESTART BIT(9) #define MDIO_VEND2_CTRL1_AN_RESTART BIT(9)
#endif #endif
#ifndef MDIO_VEND2_CTRL1_SS6
#define MDIO_VEND2_CTRL1_SS6 BIT(6)
#endif
#ifndef MDIO_VEND2_CTRL1_SS13
#define MDIO_VEND2_CTRL1_SS13 BIT(13)
#endif
/* MDIO mask values */ /* MDIO mask values */
#define XGBE_AN_CL73_INT_CMPLT BIT(0) #define XGBE_AN_CL73_INT_CMPLT BIT(0)
#define XGBE_AN_CL73_INC_LINK BIT(1) #define XGBE_AN_CL73_INC_LINK BIT(1)
......
...@@ -252,6 +252,54 @@ static void xgbe_kx_1000_mode(struct xgbe_prv_data *pdata) ...@@ -252,6 +252,54 @@ static void xgbe_kx_1000_mode(struct xgbe_prv_data *pdata)
pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_1000); pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_1000);
} }
static void xgbe_sfi_mode(struct xgbe_prv_data *pdata)
{
/* Disable KR training */
xgbe_an73_disable_kr_training(pdata);
/* Set MAC to 10G speed */
pdata->hw_if.set_speed(pdata, SPEED_10000);
/* Call PHY implementation support to complete rate change */
pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SFI);
}
static void xgbe_x_mode(struct xgbe_prv_data *pdata)
{
/* Disable KR training */
xgbe_an73_disable_kr_training(pdata);
/* Set MAC to 1G speed */
pdata->hw_if.set_speed(pdata, SPEED_1000);
/* Call PHY implementation support to complete rate change */
pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_X);
}
static void xgbe_sgmii_1000_mode(struct xgbe_prv_data *pdata)
{
/* Disable KR training */
xgbe_an73_disable_kr_training(pdata);
/* Set MAC to 1G speed */
pdata->hw_if.set_speed(pdata, SPEED_1000);
/* Call PHY implementation support to complete rate change */
pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_1000);
}
static void xgbe_sgmii_100_mode(struct xgbe_prv_data *pdata)
{
/* Disable KR training */
xgbe_an73_disable_kr_training(pdata);
/* Set MAC to 1G speed */
pdata->hw_if.set_speed(pdata, SPEED_1000);
/* Call PHY implementation support to complete rate change */
pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_100);
}
static enum xgbe_mode xgbe_cur_mode(struct xgbe_prv_data *pdata) static enum xgbe_mode xgbe_cur_mode(struct xgbe_prv_data *pdata)
{ {
return pdata->phy_if.phy_impl.cur_mode(pdata); return pdata->phy_if.phy_impl.cur_mode(pdata);
...@@ -275,6 +323,18 @@ static void xgbe_change_mode(struct xgbe_prv_data *pdata, ...@@ -275,6 +323,18 @@ static void xgbe_change_mode(struct xgbe_prv_data *pdata,
case XGBE_MODE_KR: case XGBE_MODE_KR:
xgbe_kr_mode(pdata); xgbe_kr_mode(pdata);
break; break;
case XGBE_MODE_SGMII_100:
xgbe_sgmii_100_mode(pdata);
break;
case XGBE_MODE_SGMII_1000:
xgbe_sgmii_1000_mode(pdata);
break;
case XGBE_MODE_X:
xgbe_x_mode(pdata);
break;
case XGBE_MODE_SFI:
xgbe_sfi_mode(pdata);
break;
case XGBE_MODE_UNKNOWN: case XGBE_MODE_UNKNOWN:
break; break;
default: default:
...@@ -972,6 +1032,8 @@ static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata) ...@@ -972,6 +1032,8 @@ static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata)
static const char *xgbe_phy_speed_string(int speed) static const char *xgbe_phy_speed_string(int speed)
{ {
switch (speed) { switch (speed) {
case SPEED_100:
return "100Mbps";
case SPEED_1000: case SPEED_1000:
return "1Gbps"; return "1Gbps";
case SPEED_2500: case SPEED_2500:
...@@ -1057,6 +1119,10 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata) ...@@ -1057,6 +1119,10 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata)
case XGBE_MODE_KX_1000: case XGBE_MODE_KX_1000:
case XGBE_MODE_KX_2500: case XGBE_MODE_KX_2500:
case XGBE_MODE_KR: case XGBE_MODE_KR:
case XGBE_MODE_SGMII_100:
case XGBE_MODE_SGMII_1000:
case XGBE_MODE_X:
case XGBE_MODE_SFI:
break; break;
case XGBE_MODE_UNKNOWN: case XGBE_MODE_UNKNOWN:
default: default:
...@@ -1074,9 +1140,15 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata) ...@@ -1074,9 +1140,15 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata)
static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata) static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)
{ {
int ret;
set_bit(XGBE_LINK_INIT, &pdata->dev_state); set_bit(XGBE_LINK_INIT, &pdata->dev_state);
pdata->link_check = jiffies; pdata->link_check = jiffies;
ret = pdata->phy_if.phy_impl.an_config(pdata);
if (ret)
return ret;
if (pdata->phy.autoneg != AUTONEG_ENABLE) if (pdata->phy.autoneg != AUTONEG_ENABLE)
return xgbe_phy_config_fixed(pdata); return xgbe_phy_config_fixed(pdata);
...@@ -1092,6 +1164,14 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata) ...@@ -1092,6 +1164,14 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)
xgbe_set_mode(pdata, XGBE_MODE_KX_2500); xgbe_set_mode(pdata, XGBE_MODE_KX_2500);
} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) { } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {
xgbe_set_mode(pdata, XGBE_MODE_KX_1000); xgbe_set_mode(pdata, XGBE_MODE_KX_1000);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {
xgbe_set_mode(pdata, XGBE_MODE_SFI);
} else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {
xgbe_set_mode(pdata, XGBE_MODE_X);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {
xgbe_set_mode(pdata, XGBE_MODE_SGMII_1000);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {
xgbe_set_mode(pdata, XGBE_MODE_SGMII_100);
} else { } else {
enable_irq(pdata->an_irq); enable_irq(pdata->an_irq);
return -EINVAL; return -EINVAL;
...@@ -1167,13 +1247,19 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata) ...@@ -1167,13 +1247,19 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata)
mode = xgbe_phy_status_aneg(pdata); mode = xgbe_phy_status_aneg(pdata);
switch (mode) { switch (mode) {
case XGBE_MODE_SGMII_100:
pdata->phy.speed = SPEED_100;
break;
case XGBE_MODE_X:
case XGBE_MODE_KX_1000: case XGBE_MODE_KX_1000:
case XGBE_MODE_SGMII_1000:
pdata->phy.speed = SPEED_1000; pdata->phy.speed = SPEED_1000;
break; break;
case XGBE_MODE_KX_2500: case XGBE_MODE_KX_2500:
pdata->phy.speed = SPEED_2500; pdata->phy.speed = SPEED_2500;
break; break;
case XGBE_MODE_KR: case XGBE_MODE_KR:
case XGBE_MODE_SFI:
pdata->phy.speed = SPEED_10000; pdata->phy.speed = SPEED_10000;
break; break;
case XGBE_MODE_UNKNOWN: case XGBE_MODE_UNKNOWN:
...@@ -1189,6 +1275,7 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata) ...@@ -1189,6 +1275,7 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata)
static void xgbe_phy_status(struct xgbe_prv_data *pdata) static void xgbe_phy_status(struct xgbe_prv_data *pdata)
{ {
unsigned int link_aneg; unsigned int link_aneg;
int an_restart;
if (test_bit(XGBE_LINK_ERR, &pdata->dev_state)) { if (test_bit(XGBE_LINK_ERR, &pdata->dev_state)) {
netif_carrier_off(pdata->netdev); netif_carrier_off(pdata->netdev);
...@@ -1199,7 +1286,13 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata) ...@@ -1199,7 +1286,13 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata)
link_aneg = (pdata->phy.autoneg == AUTONEG_ENABLE); link_aneg = (pdata->phy.autoneg == AUTONEG_ENABLE);
pdata->phy.link = pdata->phy_if.phy_impl.link_status(pdata); pdata->phy.link = pdata->phy_if.phy_impl.link_status(pdata,
&an_restart);
if (an_restart) {
xgbe_phy_config_aneg(pdata);
return;
}
if (pdata->phy.link) { if (pdata->phy.link) {
if (link_aneg && !xgbe_phy_aneg_done(pdata)) { if (link_aneg && !xgbe_phy_aneg_done(pdata)) {
xgbe_check_link_timeout(pdata); xgbe_check_link_timeout(pdata);
...@@ -1284,6 +1377,14 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata) ...@@ -1284,6 +1377,14 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata)
xgbe_kx_2500_mode(pdata); xgbe_kx_2500_mode(pdata);
} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) { } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {
xgbe_kx_1000_mode(pdata); xgbe_kx_1000_mode(pdata);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {
xgbe_sfi_mode(pdata);
} else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {
xgbe_x_mode(pdata);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {
xgbe_sgmii_1000_mode(pdata);
} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {
xgbe_sgmii_100_mode(pdata);
} else { } else {
ret = -EINVAL; ret = -EINVAL;
goto err_irq; goto err_irq;
...@@ -1367,10 +1468,16 @@ static int xgbe_phy_best_advertised_speed(struct xgbe_prv_data *pdata) ...@@ -1367,10 +1468,16 @@ static int xgbe_phy_best_advertised_speed(struct xgbe_prv_data *pdata)
{ {
if (pdata->phy.advertising & ADVERTISED_10000baseKR_Full) if (pdata->phy.advertising & ADVERTISED_10000baseKR_Full)
return SPEED_10000; return SPEED_10000;
else if (pdata->phy.advertising & ADVERTISED_10000baseT_Full)
return SPEED_10000;
else if (pdata->phy.advertising & ADVERTISED_2500baseX_Full) else if (pdata->phy.advertising & ADVERTISED_2500baseX_Full)
return SPEED_2500; return SPEED_2500;
else if (pdata->phy.advertising & ADVERTISED_1000baseKX_Full) else if (pdata->phy.advertising & ADVERTISED_1000baseKX_Full)
return SPEED_1000; return SPEED_1000;
else if (pdata->phy.advertising & ADVERTISED_1000baseT_Full)
return SPEED_1000;
else if (pdata->phy.advertising & ADVERTISED_100baseT_Full)
return SPEED_100;
return SPEED_UNKNOWN; return SPEED_UNKNOWN;
} }
......
...@@ -295,6 +295,12 @@ static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata) ...@@ -295,6 +295,12 @@ static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
return mode; return mode;
} }
static int xgbe_phy_an_config(struct xgbe_prv_data *pdata)
{
/* Nothing uniquely required for an configuration */
return 0;
}
static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata) static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
{ {
return XGBE_AN_MODE_CL73; return XGBE_AN_MODE_CL73;
...@@ -607,10 +613,12 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed) ...@@ -607,10 +613,12 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
} }
} }
static int xgbe_phy_link_status(struct xgbe_prv_data *pdata) static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
{ {
unsigned int reg; unsigned int reg;
*an_restart = 0;
/* Link status is latched low, so read once to clear /* Link status is latched low, so read once to clear
* and then read again to get current state * and then read again to get current state
*/ */
...@@ -821,6 +829,8 @@ void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *phy_if) ...@@ -821,6 +829,8 @@ void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *phy_if)
phy_impl->an_mode = xgbe_phy_an_mode; phy_impl->an_mode = xgbe_phy_an_mode;
phy_impl->an_config = xgbe_phy_an_config;
phy_impl->an_outcome = xgbe_phy_an_outcome; phy_impl->an_outcome = xgbe_phy_an_outcome;
phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; phy_impl->kr_training_pre = xgbe_phy_kr_training_pre;
......
...@@ -115,6 +115,7 @@ ...@@ -115,6 +115,7 @@
*/ */
#include <linux/module.h> #include <linux/module.h>
#include <linux/device.h>
#include <linux/kmod.h> #include <linux/kmod.h>
#include <linux/mdio.h> #include <linux/mdio.h>
#include <linux/phy.h> #include <linux/phy.h>
...@@ -127,6 +128,22 @@ ...@@ -127,6 +128,22 @@
#define XGBE_PHY_PORT_SPEED_2500 BIT(2) #define XGBE_PHY_PORT_SPEED_2500 BIT(2)
#define XGBE_PHY_PORT_SPEED_10000 BIT(3) #define XGBE_PHY_PORT_SPEED_10000 BIT(3)
#define XGBE_MUTEX_RELEASE 0x80000000
#define XGBE_SFP_DIRECT 7
/* I2C target addresses */
#define XGBE_SFP_SERIAL_ID_ADDRESS 0x50
#define XGBE_SFP_DIAG_INFO_ADDRESS 0x51
#define XGBE_SFP_PHY_ADDRESS 0x56
#define XGBE_GPIO_ADDRESS_PCA9555 0x20
/* SFP sideband signal indicators */
#define XGBE_GPIO_NO_TX_FAULT BIT(0)
#define XGBE_GPIO_NO_RATE_SELECT BIT(1)
#define XGBE_GPIO_NO_MOD_ABSENT BIT(2)
#define XGBE_GPIO_NO_RX_LOS BIT(3)
/* Rate-change complete wait/retry count */ /* Rate-change complete wait/retry count */
#define XGBE_RATECHANGE_COUNT 500 #define XGBE_RATECHANGE_COUNT 500
...@@ -151,23 +168,1041 @@ enum xgbe_conn_type { ...@@ -151,23 +168,1041 @@ enum xgbe_conn_type {
XGBE_CONN_TYPE_MAX, XGBE_CONN_TYPE_MAX,
}; };
/* PHY related configuration information */ /* SFP/SFP+ related definitions */
struct xgbe_phy_data { enum xgbe_sfp_comm {
enum xgbe_port_mode port_mode; XGBE_SFP_COMM_DIRECT = 0,
XGBE_SFP_COMM_PCA9545,
};
enum xgbe_sfp_cable {
XGBE_SFP_CABLE_UNKNOWN = 0,
XGBE_SFP_CABLE_ACTIVE,
XGBE_SFP_CABLE_PASSIVE,
};
enum xgbe_sfp_base {
XGBE_SFP_BASE_UNKNOWN = 0,
XGBE_SFP_BASE_1000_T,
XGBE_SFP_BASE_1000_SX,
XGBE_SFP_BASE_1000_LX,
XGBE_SFP_BASE_1000_CX,
XGBE_SFP_BASE_10000_SR,
XGBE_SFP_BASE_10000_LR,
XGBE_SFP_BASE_10000_LRM,
XGBE_SFP_BASE_10000_ER,
XGBE_SFP_BASE_10000_CR,
};
enum xgbe_sfp_speed {
XGBE_SFP_SPEED_UNKNOWN = 0,
XGBE_SFP_SPEED_100_1000,
XGBE_SFP_SPEED_1000,
XGBE_SFP_SPEED_10000,
};
/* SFP Serial ID Base ID values relative to an offset of 0 */
#define XGBE_SFP_BASE_ID 0
#define XGBE_SFP_ID_SFP 0x03
#define XGBE_SFP_BASE_EXT_ID 1
#define XGBE_SFP_EXT_ID_SFP 0x04
#define XGBE_SFP_BASE_10GBE_CC 3
#define XGBE_SFP_BASE_10GBE_CC_SR BIT(4)
#define XGBE_SFP_BASE_10GBE_CC_LR BIT(5)
#define XGBE_SFP_BASE_10GBE_CC_LRM BIT(6)
#define XGBE_SFP_BASE_10GBE_CC_ER BIT(7)
#define XGBE_SFP_BASE_1GBE_CC 6
#define XGBE_SFP_BASE_1GBE_CC_SX BIT(0)
#define XGBE_SFP_BASE_1GBE_CC_LX BIT(1)
#define XGBE_SFP_BASE_1GBE_CC_CX BIT(2)
#define XGBE_SFP_BASE_1GBE_CC_T BIT(3)
#define XGBE_SFP_BASE_CABLE 8
#define XGBE_SFP_BASE_CABLE_PASSIVE BIT(2)
#define XGBE_SFP_BASE_CABLE_ACTIVE BIT(3)
#define XGBE_SFP_BASE_BR 12
#define XGBE_SFP_BASE_BR_1GBE_MIN 0x0a
#define XGBE_SFP_BASE_BR_1GBE_MAX 0x0d
#define XGBE_SFP_BASE_BR_10GBE_MIN 0x64
#define XGBE_SFP_BASE_BR_10GBE_MAX 0x68
#define XGBE_SFP_BASE_CU_CABLE_LEN 18
#define XGBE_SFP_BASE_VENDOR_NAME 20
#define XGBE_SFP_BASE_VENDOR_NAME_LEN 16
#define XGBE_SFP_BASE_VENDOR_PN 40
#define XGBE_SFP_BASE_VENDOR_PN_LEN 16
#define XGBE_SFP_BASE_VENDOR_REV 56
#define XGBE_SFP_BASE_VENDOR_REV_LEN 4
#define XGBE_SFP_BASE_CC 63
/* SFP Serial ID Extended ID values relative to an offset of 64 */
#define XGBE_SFP_BASE_VENDOR_SN 4
#define XGBE_SFP_BASE_VENDOR_SN_LEN 16
#define XGBE_SFP_EXTD_DIAG 28
#define XGBE_SFP_EXTD_DIAG_ADDR_CHANGE BIT(2)
#define XGBE_SFP_EXTD_SFF_8472 30
#define XGBE_SFP_EXTD_CC 31
struct xgbe_sfp_eeprom {
u8 base[64];
u8 extd[32];
u8 vendor[32];
};
#define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
#define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
struct xgbe_sfp_ascii {
union {
char vendor[XGBE_SFP_BASE_VENDOR_NAME_LEN + 1];
char partno[XGBE_SFP_BASE_VENDOR_PN_LEN + 1];
char rev[XGBE_SFP_BASE_VENDOR_REV_LEN + 1];
char serno[XGBE_SFP_BASE_VENDOR_SN_LEN + 1];
} u;
};
/* PHY related configuration information */
struct xgbe_phy_data {
enum xgbe_port_mode port_mode;
unsigned int port_id;
unsigned int port_speeds;
enum xgbe_conn_type conn_type;
enum xgbe_mode cur_mode;
enum xgbe_mode start_mode;
unsigned int rrc_count;
unsigned int mdio_addr;
unsigned int comm_owned;
/* SFP Support */
enum xgbe_sfp_comm sfp_comm;
unsigned int sfp_mux_address;
unsigned int sfp_mux_channel;
unsigned int sfp_gpio_address;
unsigned int sfp_gpio_mask;
unsigned int sfp_gpio_rx_los;
unsigned int sfp_gpio_tx_fault;
unsigned int sfp_gpio_mod_absent;
unsigned int sfp_gpio_rate_select;
unsigned int sfp_rx_los;
unsigned int sfp_tx_fault;
unsigned int sfp_mod_absent;
unsigned int sfp_diags;
unsigned int sfp_changed;
unsigned int sfp_phy_avail;
unsigned int sfp_cable_len;
enum xgbe_sfp_base sfp_base;
enum xgbe_sfp_cable sfp_cable;
enum xgbe_sfp_speed sfp_speed;
struct xgbe_sfp_eeprom sfp_eeprom;
/* External PHY support */
enum xgbe_mdio_mode phydev_mode;
struct mii_bus *mii;
struct phy_device *phydev;
};
/* I2C, MDIO and GPIO lines are muxed, so only one device at a time */
static DEFINE_MUTEX(xgbe_phy_comm_lock);
static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata);
static int xgbe_phy_i2c_xfer(struct xgbe_prv_data *pdata,
struct xgbe_i2c_op *i2c_op)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
/* Be sure we own the bus */
if (WARN_ON(!phy_data->comm_owned))
return -EIO;
return pdata->i2c_if.i2c_xfer(pdata, i2c_op);
}
static int xgbe_phy_i2c_write(struct xgbe_prv_data *pdata, unsigned int target,
void *val, unsigned int val_len)
{
struct xgbe_i2c_op i2c_op;
int retry, ret;
retry = 1;
again:
/* Write the specfied register */
i2c_op.cmd = XGBE_I2C_CMD_WRITE;
i2c_op.target = target;
i2c_op.len = val_len;
i2c_op.buf = val;
ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
if ((ret == -EAGAIN) && retry--)
goto again;
return ret;
}
static int xgbe_phy_i2c_read(struct xgbe_prv_data *pdata, unsigned int target,
void *reg, unsigned int reg_len,
void *val, unsigned int val_len)
{
struct xgbe_i2c_op i2c_op;
int retry, ret;
retry = 1;
again1:
/* Set the specified register to read */
i2c_op.cmd = XGBE_I2C_CMD_WRITE;
i2c_op.target = target;
i2c_op.len = reg_len;
i2c_op.buf = reg;
ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
if (ret) {
if ((ret == -EAGAIN) && retry--)
goto again1;
return ret;
}
retry = 1;
again2:
/* Read the specfied register */
i2c_op.cmd = XGBE_I2C_CMD_READ;
i2c_op.target = target;
i2c_op.len = val_len;
i2c_op.buf = val;
ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
if ((ret == -EAGAIN) && retry--)
goto again2;
return ret;
}
static int xgbe_phy_sfp_put_mux(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct xgbe_i2c_op i2c_op;
u8 mux_channel;
if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT)
return 0;
/* Select no mux channels */
mux_channel = 0;
i2c_op.cmd = XGBE_I2C_CMD_WRITE;
i2c_op.target = phy_data->sfp_mux_address;
i2c_op.len = sizeof(mux_channel);
i2c_op.buf = &mux_channel;
return xgbe_phy_i2c_xfer(pdata, &i2c_op);
}
static int xgbe_phy_sfp_get_mux(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct xgbe_i2c_op i2c_op;
u8 mux_channel;
if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT)
return 0;
/* Select desired mux channel */
mux_channel = 1 << phy_data->sfp_mux_channel;
i2c_op.cmd = XGBE_I2C_CMD_WRITE;
i2c_op.target = phy_data->sfp_mux_address;
i2c_op.len = sizeof(mux_channel);
i2c_op.buf = &mux_channel;
return xgbe_phy_i2c_xfer(pdata, &i2c_op);
}
static void xgbe_phy_put_comm_ownership(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
phy_data->comm_owned = 0;
mutex_unlock(&xgbe_phy_comm_lock);
}
static int xgbe_phy_get_comm_ownership(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned long timeout;
unsigned int mutex_id;
if (phy_data->comm_owned)
return 0;
/* The I2C and MDIO/GPIO bus is multiplexed between multiple devices,
* the driver needs to take the software mutex and then the hardware
* mutexes before being able to use the busses.
*/
mutex_lock(&xgbe_phy_comm_lock);
/* Clear the mutexes */
XP_IOWRITE(pdata, XP_I2C_MUTEX, XGBE_MUTEX_RELEASE);
XP_IOWRITE(pdata, XP_MDIO_MUTEX, XGBE_MUTEX_RELEASE);
/* Mutex formats are the same for I2C and MDIO/GPIO */
mutex_id = 0;
XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id);
XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ACTIVE, 1);
timeout = jiffies + (5 * HZ);
while (time_before(jiffies, timeout)) {
/* Must be all zeroes in order to obtain the mutex */
if (XP_IOREAD(pdata, XP_I2C_MUTEX) ||
XP_IOREAD(pdata, XP_MDIO_MUTEX)) {
usleep_range(100, 200);
continue;
}
/* Obtain the mutex */
XP_IOWRITE(pdata, XP_I2C_MUTEX, mutex_id);
XP_IOWRITE(pdata, XP_MDIO_MUTEX, mutex_id);
phy_data->comm_owned = 1;
return 0;
}
mutex_unlock(&xgbe_phy_comm_lock);
netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n");
return -ETIMEDOUT;
}
static int xgbe_phy_i2c_mii_write(struct xgbe_prv_data *pdata, int reg, u16 val)
{
__be16 *mii_val;
u8 mii_data[3];
int ret;
ret = xgbe_phy_sfp_get_mux(pdata);
if (ret)
return ret;
mii_data[0] = reg & 0xff;
mii_val = (__be16 *)&mii_data[1];
*mii_val = cpu_to_be16(val);
ret = xgbe_phy_i2c_write(pdata, XGBE_SFP_PHY_ADDRESS,
mii_data, sizeof(mii_data));
xgbe_phy_sfp_put_mux(pdata);
return ret;
}
static int xgbe_phy_mii_write(struct mii_bus *mii, int addr, int reg, u16 val)
{
struct xgbe_prv_data *pdata = mii->priv;
struct xgbe_phy_data *phy_data = pdata->phy_data;
int ret;
ret = xgbe_phy_get_comm_ownership(pdata);
if (ret)
return ret;
if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
ret = xgbe_phy_i2c_mii_write(pdata, reg, val);
else
ret = -ENOTSUPP;
xgbe_phy_put_comm_ownership(pdata);
return ret;
}
static int xgbe_phy_i2c_mii_read(struct xgbe_prv_data *pdata, int reg)
{
__be16 mii_val;
u8 mii_reg;
int ret;
ret = xgbe_phy_sfp_get_mux(pdata);
if (ret)
return ret;
mii_reg = reg;
ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_PHY_ADDRESS,
&mii_reg, sizeof(mii_reg),
&mii_val, sizeof(mii_val));
if (!ret)
ret = be16_to_cpu(mii_val);
xgbe_phy_sfp_put_mux(pdata);
return ret;
}
static int xgbe_phy_mii_read(struct mii_bus *mii, int addr, int reg)
{
struct xgbe_prv_data *pdata = mii->priv;
struct xgbe_phy_data *phy_data = pdata->phy_data;
int ret;
ret = xgbe_phy_get_comm_ownership(pdata);
if (ret)
return ret;
if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
ret = xgbe_phy_i2c_mii_read(pdata, reg);
else
ret = -ENOTSUPP;
xgbe_phy_put_comm_ownership(pdata);
return ret;
}
static void xgbe_phy_sfp_phy_settings(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
if (phy_data->sfp_mod_absent) {
pdata->phy.speed = SPEED_UNKNOWN;
pdata->phy.duplex = DUPLEX_UNKNOWN;
pdata->phy.autoneg = AUTONEG_ENABLE;
pdata->phy.advertising = pdata->phy.supported;
}
pdata->phy.advertising &= ~ADVERTISED_Autoneg;
pdata->phy.advertising &= ~ADVERTISED_TP;
pdata->phy.advertising &= ~ADVERTISED_FIBRE;
pdata->phy.advertising &= ~ADVERTISED_100baseT_Full;
pdata->phy.advertising &= ~ADVERTISED_1000baseT_Full;
pdata->phy.advertising &= ~ADVERTISED_10000baseT_Full;
pdata->phy.advertising &= ~ADVERTISED_10000baseR_FEC;
switch (phy_data->sfp_base) {
case XGBE_SFP_BASE_1000_T:
case XGBE_SFP_BASE_1000_SX:
case XGBE_SFP_BASE_1000_LX:
case XGBE_SFP_BASE_1000_CX:
pdata->phy.speed = SPEED_UNKNOWN;
pdata->phy.duplex = DUPLEX_UNKNOWN;
pdata->phy.autoneg = AUTONEG_ENABLE;
pdata->phy.advertising |= ADVERTISED_Autoneg;
break;
case XGBE_SFP_BASE_10000_SR:
case XGBE_SFP_BASE_10000_LR:
case XGBE_SFP_BASE_10000_LRM:
case XGBE_SFP_BASE_10000_ER:
case XGBE_SFP_BASE_10000_CR:
default:
pdata->phy.speed = SPEED_10000;
pdata->phy.duplex = DUPLEX_FULL;
pdata->phy.autoneg = AUTONEG_DISABLE;
break;
}
switch (phy_data->sfp_base) {
case XGBE_SFP_BASE_1000_T:
case XGBE_SFP_BASE_1000_CX:
case XGBE_SFP_BASE_10000_CR:
pdata->phy.advertising |= ADVERTISED_TP;
break;
default:
pdata->phy.advertising |= ADVERTISED_FIBRE;
}
switch (phy_data->sfp_speed) {
case XGBE_SFP_SPEED_100_1000:
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100)
pdata->phy.advertising |= ADVERTISED_100baseT_Full;
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
pdata->phy.advertising |= ADVERTISED_1000baseT_Full;
break;
case XGBE_SFP_SPEED_1000:
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
pdata->phy.advertising |= ADVERTISED_1000baseT_Full;
break;
case XGBE_SFP_SPEED_10000:
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
pdata->phy.advertising |= ADVERTISED_10000baseT_Full;
break;
default:
/* Choose the fastest supported speed */
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
pdata->phy.advertising |= ADVERTISED_10000baseT_Full;
else if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
pdata->phy.advertising |= ADVERTISED_1000baseT_Full;
else if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100)
pdata->phy.advertising |= ADVERTISED_100baseT_Full;
}
}
static bool xgbe_phy_sfp_bit_rate(struct xgbe_sfp_eeprom *sfp_eeprom,
enum xgbe_sfp_speed sfp_speed)
{
u8 *sfp_base, min, max;
sfp_base = sfp_eeprom->base;
switch (sfp_speed) {
case XGBE_SFP_SPEED_1000:
min = XGBE_SFP_BASE_BR_1GBE_MIN;
max = XGBE_SFP_BASE_BR_1GBE_MAX;
break;
case XGBE_SFP_SPEED_10000:
min = XGBE_SFP_BASE_BR_10GBE_MIN;
max = XGBE_SFP_BASE_BR_10GBE_MAX;
break;
default:
return false;
}
return ((sfp_base[XGBE_SFP_BASE_BR] >= min) &&
(sfp_base[XGBE_SFP_BASE_BR] <= max));
}
static void xgbe_phy_free_phy_device(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
if (phy_data->phydev) {
phy_detach(phy_data->phydev);
phy_device_remove(phy_data->phydev);
phy_device_free(phy_data->phydev);
phy_data->phydev = NULL;
}
}
static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int phy_id = phy_data->phydev->phy_id;
if ((phy_id & 0xfffffff0) != 0x01ff0cc0)
return false;
/* Enable Base-T AN */
phy_write(phy_data->phydev, 0x16, 0x0001);
phy_write(phy_data->phydev, 0x00, 0x9140);
phy_write(phy_data->phydev, 0x16, 0x0000);
/* Enable SGMII at 100Base-T/1000Base-T Full Duplex */
phy_write(phy_data->phydev, 0x1b, 0x9084);
phy_write(phy_data->phydev, 0x09, 0x0e00);
phy_write(phy_data->phydev, 0x00, 0x8140);
phy_write(phy_data->phydev, 0x04, 0x0d01);
phy_write(phy_data->phydev, 0x00, 0x9140);
phy_data->phydev->supported = PHY_GBIT_FEATURES;
phy_data->phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
phy_data->phydev->advertising = phy_data->phydev->supported;
netif_dbg(pdata, drv, pdata->netdev,
"Finisar PHY quirk in place\n");
return true;
}
static void xgbe_phy_external_phy_quirks(struct xgbe_prv_data *pdata)
{
if (xgbe_phy_finisar_phy_quirks(pdata))
return;
}
static int xgbe_phy_find_phy_device(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct phy_device *phydev;
int ret;
/* If we already have a PHY, just return */
if (phy_data->phydev)
return 0;
/* Check for the use of an external PHY */
if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE)
return 0;
/* For SFP, only use an external PHY if available */
if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) &&
!phy_data->sfp_phy_avail)
return 0;
/* Create and connect to the PHY device */
phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr,
(phy_data->phydev_mode == XGBE_MDIO_MODE_CL45));
if (IS_ERR(phydev)) {
netdev_err(pdata->netdev, "get_phy_device failed\n");
return -ENODEV;
}
netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n",
phydev->phy_id);
/*TODO: If c45, add request_module based on one of the MMD ids? */
ret = phy_device_register(phydev);
if (ret) {
netdev_err(pdata->netdev, "phy_device_register failed\n");
phy_device_free(phydev);
return ret;
}
ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags,
PHY_INTERFACE_MODE_SGMII);
if (ret) {
netdev_err(pdata->netdev, "phy_attach_direct failed\n");
phy_device_remove(phydev);
phy_device_free(phydev);
return ret;
}
phy_data->phydev = phydev;
xgbe_phy_external_phy_quirks(pdata);
phydev->advertising &= pdata->phy.advertising;
phy_start_aneg(phy_data->phydev);
return 0;
}
static void xgbe_phy_sfp_external_phy(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
int ret;
if (!phy_data->sfp_changed)
return;
phy_data->sfp_phy_avail = 0;
if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
return;
/* Check access to the PHY by reading CTRL1 */
ret = xgbe_phy_i2c_mii_read(pdata, MII_BMCR);
if (ret < 0)
return;
/* Successfully accessed the PHY */
phy_data->sfp_phy_avail = 1;
}
static bool xgbe_phy_belfuse_parse_quirks(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom;
if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME],
XGBE_BEL_FUSE_VENDOR, XGBE_SFP_BASE_VENDOR_NAME_LEN))
return false;
if (!memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN],
XGBE_BEL_FUSE_PARTNO, XGBE_SFP_BASE_VENDOR_PN_LEN)) {
phy_data->sfp_base = XGBE_SFP_BASE_1000_SX;
phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE;
phy_data->sfp_speed = XGBE_SFP_SPEED_1000;
if (phy_data->sfp_changed)
netif_dbg(pdata, drv, pdata->netdev,
"Bel-Fuse SFP quirk in place\n");
return true;
}
return false;
}
static bool xgbe_phy_sfp_parse_quirks(struct xgbe_prv_data *pdata)
{
if (xgbe_phy_belfuse_parse_quirks(pdata))
return true;
return false;
}
static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom;
u8 *sfp_base;
sfp_base = sfp_eeprom->base;
if (sfp_base[XGBE_SFP_BASE_ID] != XGBE_SFP_ID_SFP)
return;
if (sfp_base[XGBE_SFP_BASE_EXT_ID] != XGBE_SFP_EXT_ID_SFP)
return;
if (xgbe_phy_sfp_parse_quirks(pdata))
return;
/* Assume ACTIVE cable unless told it is PASSIVE */
if (sfp_base[XGBE_SFP_BASE_CABLE] & XGBE_SFP_BASE_CABLE_PASSIVE) {
phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE;
phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN];
} else {
phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE;
}
/* Determine the type of SFP */
if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR)
phy_data->sfp_base = XGBE_SFP_BASE_10000_SR;
else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_LR)
phy_data->sfp_base = XGBE_SFP_BASE_10000_LR;
else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_LRM)
phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM;
else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_ER)
phy_data->sfp_base = XGBE_SFP_BASE_10000_ER;
else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_SX)
phy_data->sfp_base = XGBE_SFP_BASE_1000_SX;
else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_LX)
phy_data->sfp_base = XGBE_SFP_BASE_1000_LX;
else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_CX)
phy_data->sfp_base = XGBE_SFP_BASE_1000_CX;
else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_T)
phy_data->sfp_base = XGBE_SFP_BASE_1000_T;
else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) &&
xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))
phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
switch (phy_data->sfp_base) {
case XGBE_SFP_BASE_1000_T:
phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000;
break;
case XGBE_SFP_BASE_1000_SX:
case XGBE_SFP_BASE_1000_LX:
case XGBE_SFP_BASE_1000_CX:
phy_data->sfp_speed = XGBE_SFP_SPEED_1000;
break;
case XGBE_SFP_BASE_10000_SR:
case XGBE_SFP_BASE_10000_LR:
case XGBE_SFP_BASE_10000_LRM:
case XGBE_SFP_BASE_10000_ER:
case XGBE_SFP_BASE_10000_CR:
phy_data->sfp_speed = XGBE_SFP_SPEED_10000;
break;
default:
break;
}
}
static void xgbe_phy_sfp_eeprom_info(struct xgbe_prv_data *pdata,
struct xgbe_sfp_eeprom *sfp_eeprom)
{
struct xgbe_sfp_ascii sfp_ascii;
char *sfp_data = (char *)&sfp_ascii;
netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n");
memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME],
XGBE_SFP_BASE_VENDOR_NAME_LEN);
sfp_data[XGBE_SFP_BASE_VENDOR_NAME_LEN] = '\0';
netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n",
sfp_data);
memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN],
XGBE_SFP_BASE_VENDOR_PN_LEN);
sfp_data[XGBE_SFP_BASE_VENDOR_PN_LEN] = '\0';
netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n",
sfp_data);
memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV],
XGBE_SFP_BASE_VENDOR_REV_LEN);
sfp_data[XGBE_SFP_BASE_VENDOR_REV_LEN] = '\0';
netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n",
sfp_data);
memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN],
XGBE_SFP_BASE_VENDOR_SN_LEN);
sfp_data[XGBE_SFP_BASE_VENDOR_SN_LEN] = '\0';
netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n",
sfp_data);
}
static bool xgbe_phy_sfp_verify_eeprom(u8 cc_in, u8 *buf, unsigned int len)
{
u8 cc;
for (cc = 0; len; buf++, len--)
cc += *buf;
return (cc == cc_in) ? true : false;
}
static int xgbe_phy_sfp_read_eeprom(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
struct xgbe_sfp_eeprom sfp_eeprom;
u8 eeprom_addr;
int ret;
ret = xgbe_phy_sfp_get_mux(pdata);
if (ret) {
netdev_err(pdata->netdev, "I2C error setting SFP MUX\n");
return ret;
}
/* Read the SFP serial ID eeprom */
eeprom_addr = 0;
ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_SERIAL_ID_ADDRESS,
&eeprom_addr, sizeof(eeprom_addr),
&sfp_eeprom, sizeof(sfp_eeprom));
if (ret) {
netdev_err(pdata->netdev, "I2C error reading SFP EEPROM\n");
goto put;
}
/* Validate the contents read */
if (!xgbe_phy_sfp_verify_eeprom(sfp_eeprom.base[XGBE_SFP_BASE_CC],
sfp_eeprom.base,
sizeof(sfp_eeprom.base) - 1)) {
ret = -EINVAL;
goto put;
}
if (!xgbe_phy_sfp_verify_eeprom(sfp_eeprom.extd[XGBE_SFP_EXTD_CC],
sfp_eeprom.extd,
sizeof(sfp_eeprom.extd) - 1)) {
ret = -EINVAL;
goto put;
}
/* Check for an added or changed SFP */
if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) {
phy_data->sfp_changed = 1;
if (netif_msg_drv(pdata))
xgbe_phy_sfp_eeprom_info(pdata, &sfp_eeprom);
memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom));
if (sfp_eeprom.extd[XGBE_SFP_EXTD_SFF_8472]) {
u8 diag_type = sfp_eeprom.extd[XGBE_SFP_EXTD_DIAG];
if (!(diag_type & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
phy_data->sfp_diags = 1;
}
xgbe_phy_free_phy_device(pdata);
} else {
phy_data->sfp_changed = 0;
}
put:
xgbe_phy_sfp_put_mux(pdata);
return ret;
}
static void xgbe_phy_sfp_signals(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int gpio_input;
u8 gpio_reg, gpio_ports[2];
int ret;
/* Read the input port registers */
gpio_reg = 0;
ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address,
&gpio_reg, sizeof(gpio_reg),
gpio_ports, sizeof(gpio_ports));
if (ret) {
netdev_err(pdata->netdev, "I2C error reading SFP GPIOs\n");
return;
}
gpio_input = (gpio_ports[1] << 8) | gpio_ports[0];
if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) {
/* No GPIO, just assume the module is present for now */
phy_data->sfp_mod_absent = 0;
} else {
if (!(gpio_input & (1 << phy_data->sfp_gpio_mod_absent)))
phy_data->sfp_mod_absent = 0;
}
if (!(phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) &&
(gpio_input & (1 << phy_data->sfp_gpio_rx_los)))
phy_data->sfp_rx_los = 1;
if (!(phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) &&
(gpio_input & (1 << phy_data->sfp_gpio_tx_fault)))
phy_data->sfp_tx_fault = 1;
}
static void xgbe_phy_sfp_mod_absent(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
xgbe_phy_free_phy_device(pdata);
phy_data->sfp_mod_absent = 1;
phy_data->sfp_phy_avail = 0;
memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom));
}
static void xgbe_phy_sfp_reset(struct xgbe_phy_data *phy_data)
{
phy_data->sfp_rx_los = 0;
phy_data->sfp_tx_fault = 0;
phy_data->sfp_mod_absent = 1;
phy_data->sfp_diags = 0;
phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN;
phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN;
phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN;
}
static void xgbe_phy_sfp_detect(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
int ret;
/* Reset the SFP signals and info */
xgbe_phy_sfp_reset(phy_data);
ret = xgbe_phy_get_comm_ownership(pdata);
if (ret)
return;
/* Read the SFP signals and check for module presence */
xgbe_phy_sfp_signals(pdata);
if (phy_data->sfp_mod_absent) {
xgbe_phy_sfp_mod_absent(pdata);
goto put;
}
ret = xgbe_phy_sfp_read_eeprom(pdata);
if (ret) {
/* Treat any error as if there isn't an SFP plugged in */
xgbe_phy_sfp_reset(phy_data);
xgbe_phy_sfp_mod_absent(pdata);
goto put;
}
xgbe_phy_sfp_parse_eeprom(pdata);
xgbe_phy_sfp_external_phy(pdata);
put:
xgbe_phy_sfp_phy_settings(pdata);
xgbe_phy_put_comm_ownership(pdata);
}
static enum xgbe_mode xgbe_phy_an37_sgmii_outcome(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
enum xgbe_mode mode;
pdata->phy.lp_advertising |= ADVERTISED_Autoneg;
pdata->phy.lp_advertising |= ADVERTISED_TP;
if (pdata->phy.pause_autoneg && phy_data->phydev) {
/* Flow control is obtained from the attached PHY */
u16 lcl_adv = 0, rmt_adv = 0;
u8 fc;
pdata->phy.tx_pause = 0;
pdata->phy.rx_pause = 0;
if (phy_data->phydev->advertising & ADVERTISED_Pause)
lcl_adv |= ADVERTISE_PAUSE_CAP;
if (phy_data->phydev->advertising & ADVERTISED_Asym_Pause)
lcl_adv |= ADVERTISE_PAUSE_ASYM;
if (phy_data->phydev->pause)
rmt_adv |= LPA_PAUSE_CAP;
if (phy_data->phydev->asym_pause)
rmt_adv |= LPA_PAUSE_ASYM;
fc = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
if (fc & FLOW_CTRL_TX)
pdata->phy.tx_pause = 1;
if (fc & FLOW_CTRL_RX)
pdata->phy.rx_pause = 1;
}
switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) {
case XGBE_SGMII_AN_LINK_SPEED_100:
if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) {
pdata->phy.lp_advertising |= ADVERTISED_100baseT_Full;
mode = XGBE_MODE_SGMII_100;
} else {
/* Half-duplex not supported */
pdata->phy.lp_advertising |= ADVERTISED_100baseT_Half;
mode = XGBE_MODE_UNKNOWN;
}
break;
case XGBE_SGMII_AN_LINK_SPEED_1000:
if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) {
pdata->phy.lp_advertising |= ADVERTISED_1000baseT_Full;
mode = XGBE_MODE_SGMII_1000;
} else {
/* Half-duplex not supported */
pdata->phy.lp_advertising |= ADVERTISED_1000baseT_Half;
mode = XGBE_MODE_UNKNOWN;
}
break;
default:
mode = XGBE_MODE_UNKNOWN;
}
return mode;
}
static enum xgbe_mode xgbe_phy_an37_outcome(struct xgbe_prv_data *pdata)
{
enum xgbe_mode mode;
unsigned int ad_reg, lp_reg;
pdata->phy.lp_advertising |= ADVERTISED_Autoneg;
pdata->phy.lp_advertising |= ADVERTISED_FIBRE;
/* Compare Advertisement and Link Partner register */
ad_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);
lp_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_LP_ABILITY);
if (lp_reg & 0x100)
pdata->phy.lp_advertising |= ADVERTISED_Pause;
if (lp_reg & 0x80)
pdata->phy.lp_advertising |= ADVERTISED_Asym_Pause;
unsigned int port_id; if (pdata->phy.pause_autoneg) {
/* Set flow control based on auto-negotiation result */
pdata->phy.tx_pause = 0;
pdata->phy.rx_pause = 0;
unsigned int port_speeds; if (ad_reg & lp_reg & 0x100) {
pdata->phy.tx_pause = 1;
pdata->phy.rx_pause = 1;
} else if (ad_reg & lp_reg & 0x80) {
if (ad_reg & 0x100)
pdata->phy.rx_pause = 1;
else if (lp_reg & 0x100)
pdata->phy.tx_pause = 1;
}
}
enum xgbe_conn_type conn_type; if (lp_reg & 0x40)
pdata->phy.lp_advertising |= ADVERTISED_1000baseT_Half;
if (lp_reg & 0x20)
pdata->phy.lp_advertising |= ADVERTISED_1000baseT_Full;
enum xgbe_mode cur_mode; /* Half duplex is not supported */
enum xgbe_mode start_mode; ad_reg &= lp_reg;
mode = (ad_reg & 0x20) ? XGBE_MODE_X : XGBE_MODE_UNKNOWN;
unsigned int rrc_count; return mode;
}; }
static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata) static enum xgbe_mode xgbe_phy_an73_outcome(struct xgbe_prv_data *pdata)
{ {
enum xgbe_mode mode; enum xgbe_mode mode;
unsigned int ad_reg, lp_reg; unsigned int ad_reg, lp_reg;
...@@ -224,6 +1259,60 @@ static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata) ...@@ -224,6 +1259,60 @@ static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
return mode; return mode;
} }
static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
{
switch (pdata->an_mode) {
case XGBE_AN_MODE_CL73:
return xgbe_phy_an73_outcome(pdata);
case XGBE_AN_MODE_CL37:
return xgbe_phy_an37_outcome(pdata);
case XGBE_AN_MODE_CL37_SGMII:
return xgbe_phy_an37_sgmii_outcome(pdata);
default:
return XGBE_MODE_UNKNOWN;
}
}
static int xgbe_phy_an_config(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
int ret;
ret = xgbe_phy_find_phy_device(pdata);
if (ret)
return ret;
if (!phy_data->phydev)
return 0;
phy_data->phydev->autoneg = pdata->phy.autoneg;
phy_data->phydev->advertising = phy_data->phydev->supported &
pdata->phy.advertising;
if (pdata->phy.autoneg != AUTONEG_ENABLE) {
phy_data->phydev->speed = pdata->phy.speed;
phy_data->phydev->duplex = pdata->phy.duplex;
}
ret = phy_start_aneg(phy_data->phydev);
return ret;
}
static enum xgbe_an_mode xgbe_phy_an_sfp_mode(struct xgbe_phy_data *phy_data)
{
switch (phy_data->sfp_base) {
case XGBE_SFP_BASE_1000_T:
return XGBE_AN_MODE_CL37_SGMII;
case XGBE_SFP_BASE_1000_SX:
case XGBE_SFP_BASE_1000_LX:
case XGBE_SFP_BASE_1000_CX:
return XGBE_AN_MODE_CL37;
default:
return XGBE_AN_MODE_NONE;
}
}
static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata) static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
{ {
struct xgbe_phy_data *phy_data = pdata->phy_data; struct xgbe_phy_data *phy_data = pdata->phy_data;
...@@ -238,7 +1327,9 @@ static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata) ...@@ -238,7 +1327,9 @@ static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return XGBE_AN_MODE_NONE;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
return xgbe_phy_an_sfp_mode(phy_data);
default: default:
return XGBE_AN_MODE_NONE; return XGBE_AN_MODE_NONE;
} }
...@@ -310,6 +1401,113 @@ static void xgbe_phy_power_off(struct xgbe_prv_data *pdata) ...@@ -310,6 +1401,113 @@ static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)
netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); netif_dbg(pdata, link, pdata->netdev, "phy powered off\n");
} }
static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int s0;
xgbe_phy_start_ratechange(pdata);
/* 10G/SFI */
s0 = 0;
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 3);
if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) {
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
} else {
if (phy_data->sfp_cable_len <= 1)
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 1);
else if (phy_data->sfp_cable_len <= 3)
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 2);
else if (phy_data->sfp_cable_len <= 5)
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 3);
else
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 3);
}
/* Call FW to make the change */
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
xgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = XGBE_MODE_SFI;
netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n");
}
static void xgbe_phy_x_mode(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int s0;
xgbe_phy_start_ratechange(pdata);
/* 1G/X */
s0 = 0;
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 1);
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 3);
/* Call FW to make the change */
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
xgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = XGBE_MODE_X;
netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n");
}
static void xgbe_phy_sgmii_1000_mode(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int s0;
xgbe_phy_start_ratechange(pdata);
/* 1G/SGMII */
s0 = 0;
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 1);
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 2);
/* Call FW to make the change */
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
xgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = XGBE_MODE_SGMII_1000;
netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n");
}
static void xgbe_phy_sgmii_100_mode(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int s0;
xgbe_phy_start_ratechange(pdata);
/* 1G/SGMII */
s0 = 0;
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 1);
XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 1);
/* Call FW to make the change */
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
xgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = XGBE_MODE_SGMII_100;
netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n");
}
static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata) static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)
{ {
struct xgbe_phy_data *phy_data = pdata->phy_data; struct xgbe_phy_data *phy_data = pdata->phy_data;
...@@ -420,7 +1618,29 @@ static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata) ...@@ -420,7 +1618,29 @@ static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return XGBE_MODE_UNKNOWN;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
/* No switching, so just return current mode */
return xgbe_phy_cur_mode(pdata);
default:
return XGBE_MODE_UNKNOWN;
}
}
static enum xgbe_mode xgbe_phy_get_sfp_mode(struct xgbe_phy_data *phy_data,
int speed)
{
switch (speed) {
case SPEED_100:
return XGBE_MODE_SGMII_100;
case SPEED_1000:
if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T)
return XGBE_MODE_SGMII_1000;
else
return XGBE_MODE_X;
case SPEED_10000:
case SPEED_UNKNOWN:
return XGBE_MODE_SFI;
default: default:
return XGBE_MODE_UNKNOWN; return XGBE_MODE_UNKNOWN;
} }
...@@ -463,7 +1683,9 @@ static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata, ...@@ -463,7 +1683,9 @@ static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return XGBE_MODE_UNKNOWN;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
return xgbe_phy_get_sfp_mode(phy_data, speed);
default: default:
return XGBE_MODE_UNKNOWN; return XGBE_MODE_UNKNOWN;
} }
...@@ -481,6 +1703,18 @@ static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) ...@@ -481,6 +1703,18 @@ static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
case XGBE_MODE_KR: case XGBE_MODE_KR:
xgbe_phy_kr_mode(pdata); xgbe_phy_kr_mode(pdata);
break; break;
case XGBE_MODE_SGMII_100:
xgbe_phy_sgmii_100_mode(pdata);
break;
case XGBE_MODE_SGMII_1000:
xgbe_phy_sgmii_1000_mode(pdata);
break;
case XGBE_MODE_X:
xgbe_phy_x_mode(pdata);
break;
case XGBE_MODE_SFI:
xgbe_phy_sfi_mode(pdata);
break;
default: default:
break; break;
} }
...@@ -503,6 +1737,35 @@ static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata, ...@@ -503,6 +1737,35 @@ static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,
return false; return false;
} }
static bool xgbe_phy_use_sfp_mode(struct xgbe_prv_data *pdata,
enum xgbe_mode mode)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
switch (mode) {
case XGBE_MODE_X:
if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T)
return false;
return xgbe_phy_check_mode(pdata, mode,
ADVERTISED_1000baseT_Full);
case XGBE_MODE_SGMII_100:
if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
return false;
return xgbe_phy_check_mode(pdata, mode,
ADVERTISED_100baseT_Full);
case XGBE_MODE_SGMII_1000:
if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
return false;
return xgbe_phy_check_mode(pdata, mode,
ADVERTISED_1000baseT_Full);
case XGBE_MODE_SFI:
return xgbe_phy_check_mode(pdata, mode,
ADVERTISED_10000baseT_Full);
default:
return false;
}
}
static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata, static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata,
enum xgbe_mode mode) enum xgbe_mode mode)
{ {
...@@ -544,7 +1807,25 @@ static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) ...@@ -544,7 +1807,25 @@ static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return false;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
return xgbe_phy_use_sfp_mode(pdata, mode);
default:
return false;
}
}
static bool xgbe_phy_valid_speed_sfp_mode(struct xgbe_phy_data *phy_data,
int speed)
{
switch (speed) {
case SPEED_100:
return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000);
case SPEED_1000:
return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) ||
(phy_data->sfp_speed == XGBE_SFP_SPEED_1000));
case SPEED_10000:
return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000);
default: default:
return false; return false;
} }
...@@ -585,16 +1866,47 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed) ...@@ -585,16 +1866,47 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return false;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
return xgbe_phy_valid_speed_sfp_mode(phy_data, speed);
default: default:
return false; return false;
} }
} }
static int xgbe_phy_link_status(struct xgbe_prv_data *pdata) static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
{ {
struct xgbe_phy_data *phy_data = pdata->phy_data; struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int reg; unsigned int ret, reg;
*an_restart = 0;
if (phy_data->port_mode == XGBE_PORT_MODE_SFP) {
/* Check SFP signals */
xgbe_phy_sfp_detect(pdata);
if (phy_data->sfp_changed) {
*an_restart = 1;
return 0;
}
if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los)
return 0;
}
if (phy_data->phydev) {
/* Check external PHY */
ret = phy_read_status(phy_data->phydev);
if (ret < 0)
return 0;
if ((pdata->phy.autoneg == AUTONEG_ENABLE) &&
!phy_aneg_done(phy_data->phydev))
return 0;
if (!phy_data->phydev->link)
return 0;
}
/* Link status is latched low, so read once to clear /* Link status is latched low, so read once to clear
* and then read again to get current state * and then read again to get current state
...@@ -613,6 +1925,73 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata) ...@@ -613,6 +1925,73 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata)
return 0; return 0;
} }
static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int reg;
reg = XP_IOREAD(pdata, XP_PROP_3);
phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 +
XP_GET_BITS(reg, XP_PROP_3, GPIO_ADDR);
phy_data->sfp_gpio_mask = XP_GET_BITS(reg, XP_PROP_3, GPIO_MASK);
phy_data->sfp_gpio_rx_los = XP_GET_BITS(reg, XP_PROP_3,
GPIO_RX_LOS);
phy_data->sfp_gpio_tx_fault = XP_GET_BITS(reg, XP_PROP_3,
GPIO_TX_FAULT);
phy_data->sfp_gpio_mod_absent = XP_GET_BITS(reg, XP_PROP_3,
GPIO_MOD_ABS);
phy_data->sfp_gpio_rate_select = XP_GET_BITS(reg, XP_PROP_3,
GPIO_RATE_SELECT);
if (netif_msg_probe(pdata)) {
dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n",
phy_data->sfp_gpio_address);
dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n",
phy_data->sfp_gpio_mask);
dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n",
phy_data->sfp_gpio_rx_los);
dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n",
phy_data->sfp_gpio_tx_fault);
dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n",
phy_data->sfp_gpio_mod_absent);
dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n",
phy_data->sfp_gpio_rate_select);
}
}
static void xgbe_phy_sfp_comm_setup(struct xgbe_prv_data *pdata)
{
struct xgbe_phy_data *phy_data = pdata->phy_data;
unsigned int reg, mux_addr_hi, mux_addr_lo;
reg = XP_IOREAD(pdata, XP_PROP_4);
mux_addr_hi = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_HI);
mux_addr_lo = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_LO);
if (mux_addr_lo == XGBE_SFP_DIRECT)
return;
phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545;
phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo;
phy_data->sfp_mux_channel = XP_GET_BITS(reg, XP_PROP_4, MUX_CHAN);
if (netif_msg_probe(pdata)) {
dev_dbg(pdata->dev, "SFP: mux_address=%#x\n",
phy_data->sfp_mux_address);
dev_dbg(pdata->dev, "SFP: mux_channel=%u\n",
phy_data->sfp_mux_channel);
}
}
static void xgbe_phy_sfp_setup(struct xgbe_prv_data *pdata)
{
xgbe_phy_sfp_comm_setup(pdata);
xgbe_phy_sfp_gpio_setup(pdata);
}
static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata)
{ {
struct xgbe_phy_data *phy_data = pdata->phy_data; struct xgbe_phy_data *phy_data = pdata->phy_data;
...@@ -708,6 +2087,15 @@ static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata) ...@@ -708,6 +2087,15 @@ static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata)
static void xgbe_phy_stop(struct xgbe_prv_data *pdata) static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
{ {
struct xgbe_phy_data *phy_data = pdata->phy_data;
/* If we have an external PHY, free it */
xgbe_phy_free_phy_device(pdata);
/* Reset SFP data */
xgbe_phy_sfp_reset(phy_data);
xgbe_phy_sfp_mod_absent(pdata);
/* Power off the PHY */ /* Power off the PHY */
xgbe_phy_power_off(pdata); xgbe_phy_power_off(pdata);
...@@ -728,7 +2116,26 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata) ...@@ -728,7 +2116,26 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata)
/* Start in highest supported mode */ /* Start in highest supported mode */
xgbe_phy_set_mode(pdata, phy_data->start_mode); xgbe_phy_set_mode(pdata, phy_data->start_mode);
/* After starting the I2C controller, we can check for an SFP */
switch (phy_data->port_mode) {
case XGBE_PORT_MODE_SFP:
xgbe_phy_sfp_detect(pdata);
break;
default:
break;
}
/* If we have an external PHY, start it */
ret = xgbe_phy_find_phy_device(pdata);
if (ret)
goto err_i2c;
return 0; return 0;
err_i2c:
pdata->i2c_if.i2c_stop(pdata);
return ret;
} }
static int xgbe_phy_reset(struct xgbe_prv_data *pdata) static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
...@@ -741,17 +2148,25 @@ static int xgbe_phy_reset(struct xgbe_prv_data *pdata) ...@@ -741,17 +2148,25 @@ static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
xgbe_phy_power_off(pdata); xgbe_phy_power_off(pdata);
xgbe_phy_set_mode(pdata, cur_mode); xgbe_phy_set_mode(pdata, cur_mode);
return 0; if (!phy_data->phydev)
return 0;
/* Reset the external PHY */
return phy_init_hw(phy_data->phydev);
} }
static void xgbe_phy_exit(struct xgbe_prv_data *pdata) static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
{ {
/* Nothing uniquely required for exit */ struct xgbe_phy_data *phy_data = pdata->phy_data;
/* Unregister for driving external PHYs */
mdiobus_unregister(phy_data->mii);
} }
static int xgbe_phy_init(struct xgbe_prv_data *pdata) static int xgbe_phy_init(struct xgbe_prv_data *pdata)
{ {
struct xgbe_phy_data *phy_data; struct xgbe_phy_data *phy_data;
struct mii_bus *mii;
unsigned int reg; unsigned int reg;
int ret; int ret;
...@@ -776,11 +2191,13 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) ...@@ -776,11 +2191,13 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)
phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID); phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID);
phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS); phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS);
phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE); phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE);
phy_data->mdio_addr = XP_GET_BITS(reg, XP_PROP_0, MDIO_ADDR);
if (netif_msg_probe(pdata)) { if (netif_msg_probe(pdata)) {
dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode);
dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id);
dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds);
dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type);
dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr);
} }
/* Validate the connection requested */ /* Validate the connection requested */
...@@ -818,19 +2235,48 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) ...@@ -818,19 +2235,48 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)
SUPPORTED_10000baseR_FEC; SUPPORTED_10000baseR_FEC;
phy_data->start_mode = XGBE_MODE_KR; phy_data->start_mode = XGBE_MODE_KR;
} }
phy_data->phydev_mode = XGBE_MDIO_MODE_NONE;
break; break;
case XGBE_PORT_MODE_BACKPLANE_2500: case XGBE_PORT_MODE_BACKPLANE_2500:
pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
pdata->phy.supported |= SUPPORTED_Backplane; pdata->phy.supported |= SUPPORTED_Backplane;
pdata->phy.supported |= SUPPORTED_2500baseX_Full; pdata->phy.supported |= SUPPORTED_2500baseX_Full;
phy_data->start_mode = XGBE_MODE_KX_2500; phy_data->start_mode = XGBE_MODE_KX_2500;
phy_data->phydev_mode = XGBE_MDIO_MODE_NONE;
break; break;
case XGBE_PORT_MODE_1000BASE_T: case XGBE_PORT_MODE_1000BASE_T:
case XGBE_PORT_MODE_1000BASE_X: case XGBE_PORT_MODE_1000BASE_X:
case XGBE_PORT_MODE_NBASE_T: case XGBE_PORT_MODE_NBASE_T:
case XGBE_PORT_MODE_10GBASE_T: case XGBE_PORT_MODE_10GBASE_T:
case XGBE_PORT_MODE_10GBASE_R: case XGBE_PORT_MODE_10GBASE_R:
return -ENODEV;
case XGBE_PORT_MODE_SFP: case XGBE_PORT_MODE_SFP:
pdata->phy.supported |= SUPPORTED_Autoneg;
pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
pdata->phy.supported |= SUPPORTED_TP;
pdata->phy.supported |= SUPPORTED_FIBRE;
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) {
pdata->phy.supported |= SUPPORTED_100baseT_Full;
phy_data->start_mode = XGBE_MODE_SGMII_100;
}
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
pdata->phy.supported |= SUPPORTED_1000baseT_Full;
phy_data->start_mode = XGBE_MODE_SGMII_1000;
}
if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
pdata->phy.supported |= SUPPORTED_10000baseT_Full;
phy_data->start_mode = XGBE_MODE_SFI;
if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
pdata->phy.supported |=
SUPPORTED_10000baseR_FEC;
}
phy_data->phydev_mode = XGBE_MDIO_MODE_CL22;
xgbe_phy_sfp_setup(pdata);
break;
default: default:
return -EINVAL; return -EINVAL;
} }
...@@ -839,6 +2285,27 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) ...@@ -839,6 +2285,27 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)
dev_dbg(pdata->dev, "phy supported=%#x\n", dev_dbg(pdata->dev, "phy supported=%#x\n",
pdata->phy.supported); pdata->phy.supported);
/* Register for driving external PHYs */
mii = devm_mdiobus_alloc(pdata->dev);
if (!mii) {
dev_err(pdata->dev, "mdiobus_alloc failed\n");
return -ENOMEM;
}
mii->priv = pdata;
mii->name = "amd-xgbe-mii";
mii->read = xgbe_phy_mii_read;
mii->write = xgbe_phy_mii_write;
mii->parent = pdata->dev;
mii->phy_mask = ~0;
snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev));
ret = mdiobus_register(mii);
if (ret) {
dev_err(pdata->dev, "mdiobus_register failed\n");
return ret;
}
phy_data->mii = mii;
return 0; return 0;
} }
...@@ -865,5 +2332,7 @@ void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *phy_if) ...@@ -865,5 +2332,7 @@ void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *phy_if)
phy_impl->an_mode = xgbe_phy_an_mode; phy_impl->an_mode = xgbe_phy_an_mode;
phy_impl->an_config = xgbe_phy_an_config;
phy_impl->an_outcome = xgbe_phy_an_outcome; phy_impl->an_outcome = xgbe_phy_an_outcome;
} }
...@@ -530,6 +530,10 @@ enum xgbe_mode { ...@@ -530,6 +530,10 @@ enum xgbe_mode {
XGBE_MODE_KX_1000 = 0, XGBE_MODE_KX_1000 = 0,
XGBE_MODE_KX_2500, XGBE_MODE_KX_2500,
XGBE_MODE_KR, XGBE_MODE_KR,
XGBE_MODE_X,
XGBE_MODE_SGMII_100,
XGBE_MODE_SGMII_1000,
XGBE_MODE_SFI,
XGBE_MODE_UNKNOWN, XGBE_MODE_UNKNOWN,
}; };
...@@ -538,6 +542,12 @@ enum xgbe_speedset { ...@@ -538,6 +542,12 @@ enum xgbe_speedset {
XGBE_SPEEDSET_2500_10000, XGBE_SPEEDSET_2500_10000,
}; };
enum xgbe_mdio_mode {
XGBE_MDIO_MODE_NONE = 0,
XGBE_MDIO_MODE_CL22,
XGBE_MDIO_MODE_CL45,
};
struct xgbe_phy { struct xgbe_phy {
u32 supported; u32 supported;
u32 advertising; u32 advertising;
...@@ -764,7 +774,7 @@ struct xgbe_phy_impl_if { ...@@ -764,7 +774,7 @@ struct xgbe_phy_impl_if {
void (*stop)(struct xgbe_prv_data *); void (*stop)(struct xgbe_prv_data *);
/* Return the link status */ /* Return the link status */
int (*link_status)(struct xgbe_prv_data *); int (*link_status)(struct xgbe_prv_data *, int *);
/* Indicate if a particular speed is valid */ /* Indicate if a particular speed is valid */
bool (*valid_speed)(struct xgbe_prv_data *, int); bool (*valid_speed)(struct xgbe_prv_data *, int);
...@@ -783,6 +793,9 @@ struct xgbe_phy_impl_if { ...@@ -783,6 +793,9 @@ struct xgbe_phy_impl_if {
/* Retrieve current auto-negotiation mode */ /* Retrieve current auto-negotiation mode */
enum xgbe_an_mode (*an_mode)(struct xgbe_prv_data *); enum xgbe_an_mode (*an_mode)(struct xgbe_prv_data *);
/* Configure auto-negotiation settings */
int (*an_config)(struct xgbe_prv_data *);
/* Process results of auto-negotiation */ /* Process results of auto-negotiation */
enum xgbe_mode (*an_outcome)(struct xgbe_prv_data *); enum xgbe_mode (*an_outcome)(struct xgbe_prv_data *);
......
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