Commit b0b0e13e authored by Ralf Baechle's avatar Ralf Baechle

[MIPS] Remove unused instances of prom_build_cpu_map.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c583122c
...@@ -33,25 +33,6 @@ void core_send_ipi(int cpu, unsigned int action) ...@@ -33,25 +33,6 @@ void core_send_ipi(int cpu, unsigned int action)
#endif /* CONFIG_MIPS_MT_SMTC */ #endif /* CONFIG_MIPS_MT_SMTC */
} }
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void __init prom_build_cpu_map(void)
{
int nextslot;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if (read_c0_config3() & (1<<2)) {
nextslot = mipsmt_build_cpu_map(1);
}
}
/* /*
* Platform "CPU" startup hook * Platform "CPU" startup hook
*/ */
......
...@@ -50,27 +50,6 @@ void core_send_ipi(int cpu, unsigned int action) ...@@ -50,27 +50,6 @@ void core_send_ipi(int cpu, unsigned int action)
} }
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void __init prom_build_cpu_map(void)
{
#ifdef CONFIG_MIPS_MT_SMTC
int nextslot;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if (read_c0_config3() & (1<<2)) {
nextslot = mipsmt_build_cpu_map(1);
}
#endif /* CONFIG_MIPS_MT_SMTC */
}
/* /*
* Platform "CPU" startup hook * Platform "CPU" startup hook
*/ */
......
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