Commit b50d5551 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher

drm/amd/display: allow DP RX to use more cr aux rd interval delay

[why]
Regression is caused by previous change with attempt to correct the
extended cr aux rd interval delay due to mis interpretation of the DP specs.
The change turns out not working well with certain RXs.
So we decided to keep the cr aux rd interval logic as before.
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Reviewed-by: default avatarGeorge Shen <George.Shen@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f43dc909
...@@ -49,6 +49,23 @@ static struct dc_link_settings get_common_supported_link_settings( ...@@ -49,6 +49,23 @@ static struct dc_link_settings get_common_supported_link_settings(
struct dc_link_settings link_setting_a, struct dc_link_settings link_setting_a,
struct dc_link_settings link_setting_b); struct dc_link_settings link_setting_b);
static uint32_t get_cr_training_aux_rd_interval(struct dc_link *link,
const struct dc_link_settings *link_settings)
{
union training_aux_rd_interval training_rd_interval;
uint32_t wait_in_micro_secs = 100;
memset(&training_rd_interval, 0, sizeof(training_rd_interval));
core_link_read_dpcd(
link,
DP_TRAINING_AUX_RD_INTERVAL,
(uint8_t *)&training_rd_interval,
sizeof(training_rd_interval));
if (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL)
wait_in_micro_secs = training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL * 4000;
return wait_in_micro_secs;
}
static uint32_t get_eq_training_aux_rd_interval( static uint32_t get_eq_training_aux_rd_interval(
struct dc_link *link, struct dc_link *link,
const struct dc_link_settings *link_settings) const struct dc_link_settings *link_settings)
...@@ -1247,7 +1264,7 @@ static void initialize_training_settings( ...@@ -1247,7 +1264,7 @@ static void initialize_training_settings(
if (overrides->cr_pattern_time != NULL) if (overrides->cr_pattern_time != NULL)
lt_settings->cr_pattern_time = *overrides->cr_pattern_time; lt_settings->cr_pattern_time = *overrides->cr_pattern_time;
else else
lt_settings->cr_pattern_time = 100; lt_settings->cr_pattern_time = get_cr_training_aux_rd_interval(link, link_setting);
if (overrides->eq_pattern_time != NULL) if (overrides->eq_pattern_time != NULL)
lt_settings->eq_pattern_time = *overrides->eq_pattern_time; lt_settings->eq_pattern_time = *overrides->eq_pattern_time;
......
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