ARM: Kirkwood: Fix PHY disable clk problems
Commit 98d9986c (ARM: Kirkwood: Replace clock gating) and the fix 5fb2ce (ARM: Kirkwood: clk_register_gate_fn: add fn assignment) introduced a custom variant of clock gating which allows to define a function to be called before gating the clock off. This is used to disable the SATA and PCIe PHYs if the respective clocks are unused after initialization. However, of these two drivers, the SATA driver may be compiled as a module. The driver re-enables the clocks at module init but the PHYs stay disabled. Since the custom clock gating disabled the PHYs when gating the clock off, it should also re-enable them when enabling the clock gate. This is done by adding a second function that may be used to enable the PHYs. Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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