Commit b72cc82e authored by Kumar Gala's avatar Kumar Gala Committed by Linus Torvalds

[PATCH] ppc32: Add support to use the DS1553 RTC/NVRAM on MPC8555 CDS system

This patch makes the MPC8555 CDS system utilize the DS1553 RTC/NVRAM.
Signed-off-by: default avatarKumar Gala <kumar.gala@freescale.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 5dbab45d
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/atomic.h> #include <asm/atomic.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/todc.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
...@@ -304,6 +305,8 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) ...@@ -304,6 +305,8 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
} }
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
TODC_ALLOC();
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -329,6 +332,13 @@ mpc85xx_cds_setup_arch(void) ...@@ -329,6 +332,13 @@ mpc85xx_cds_setup_arch(void)
cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1; cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot); printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot);
/* Setup TODC access */
TODC_INIT(TODC_TYPE_DS1743,
0,
0,
ioremap(CDS_RTC_ADDR, CDS_RTC_SIZE),
8);
/* Set loops_per_jiffy to a half-way reasonable value, /* Set loops_per_jiffy to a half-way reasonable value,
for use until calibrate_delay gets called. */ for use until calibrate_delay gets called. */
loops_per_jiffy = freq / HZ; loops_per_jiffy = freq / HZ;
...@@ -453,11 +463,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -453,11 +463,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
ppc_md.time_init = NULL;
ppc_md.set_rtc_time = NULL;
ppc_md.get_rtc_time = NULL;
ppc_md.calibrate_decr = mpc85xx_calibrate_decr; ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
ppc_md.time_init = todc_time_init;
ppc_md.set_rtc_time = todc_set_rtc_time;
ppc_md.get_rtc_time = todc_get_rtc_time;
ppc_md.nvram_read_val = todc_direct_read_val;
ppc_md.nvram_write_val = todc_direct_write_val;
#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
ppc_md.progress = gen550_progress; ppc_md.progress = gen550_progress;
#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
......
...@@ -33,6 +33,10 @@ ...@@ -33,6 +33,10 @@
#define CM_CSR (1) #define CM_CSR (1)
#define CM_RST (2) #define CM_RST (2)
/* CDS NVRAM/RTC */
#define CDS_RTC_ADDR (0xf8000000)
#define CDS_RTC_SIZE (8 * 1024)
/* PCI config */ /* PCI config */
#define PCI1_CFG_ADDR_OFFSET (0x8000) #define PCI1_CFG_ADDR_OFFSET (0x8000)
#define PCI1_CFG_DATA_OFFSET (0x8004) #define PCI1_CFG_DATA_OFFSET (0x8004)
......
...@@ -99,4 +99,5 @@ obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \ ...@@ -99,4 +99,5 @@ obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
ifeq ($(CONFIG_85xx),y) ifeq ($(CONFIG_85xx),y)
obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o
endif endif
obj-$(CONFIG_MPC8555_CDS) += todc_time.o
obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o
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