Commit b7b6be64 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'davinci-for-v4.19/dt' of...

Merge tag 'davinci-for-v4.19/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt

DaVinci Device-Tree updates for v4.19
-------------------------------------

* DA850 now uses clocks from device-tree
* DA850 EVM gains LCD (with backlight) and SATA support
* Lego Mindstorms gains bluetooth support
* DSP reset control support on DA850

* tag 'davinci-for-v4.19/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: dts: da850: Add power-domains to CPPI 4.1 node
  ARM: davinci: dts: add a reset control to the dsp node
  ARM: davinci: dts: make psc0 a reset provider
  ARM: dts: da850-lego-ev3: Add Bluetooth nodes
  ARM: dts: da850: Add power-domains to PWM nodes
  ARM: dts: da850: Add clocks
  dt-bindings: timer: new bindings for TI DaVinci timer
  ARM: dts: da850-evm: Enable LCD and backlight
  ARM: dts: da850-evm: Enable SATA port
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f9228c38 3117c173
* Device tree bindings for Texas Instruments DaVinci timer
This document provides bindings for the 64-bit timer in the DaVinci
architecture devices. The timer can be configured as a general-purpose 64-bit
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or independently
(unchained mode) of each other.
The timer is a free running up-counter and can generate interrupts when the
counter reaches preset counter values.
Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
watchdog timers.
Required properties:
- compatible : should be "ti,da830-timer".
- reg : specifies base physical address and count of the registers.
- interrupts : interrupts generated by the timer.
- interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1",
"cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6",
"cmpint7" ("cmpintX" may be omitted if not present in the
hardware).
- clocks : the clock feeding the timer clock.
Example:
clocksource: timer@20000 {
compatible = "ti,da830-timer";
reg = <0x20000 0x1000>;
interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>,
<80>, <81>;
interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1",
"cmpint2", "cmpint3", "cmpint4", "cmpint5",
"cmpint6", "cmpint7";
clocks = <&pll0_auxclk>;
};
......@@ -35,6 +35,10 @@ eth0: ethernet@220000 {
};
};
&ref_clk {
clock-frequency = <24000000>;
};
&edma0 {
ti,edma-reserved-slot-ranges = <32 50>;
};
......
......@@ -27,6 +27,65 @@ aliases {
spi0 = &spi1;
};
backlight: backlight-pwm {
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
power-supply = <&backlight_lcd>;
compatible = "pwm-backlight";
/*
* The PWM here corresponds to production hardware. The
* schematic needs to be 1015171 (15 March 2010), Rev A
* or newer.
*/
pwms = <&ecap2 0 50000 0>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
default-brightness-level = <7>;
};
panel {
compatible = "ti,tilcdc,panel";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
/*
* The vpif and the LCD are mutually exclusive.
* To enable VPIF, change the status below to 'disabled' then
* then change the status of the vpif below to 'okay'
*/
status = "okay";
enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <16>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
native-mode = <&timing0>;
timing0: 480x272 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <3>;
hback-porch = <2>;
hsync-len = <42>;
vback-porch = <3>;
vfront-porch = <4>;
vsync-len = <11>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
vbat: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
......@@ -35,6 +94,15 @@ vbat: fixedregulator0 {
regulator-boot-on;
};
backlight_lcd: backlight-regulator {
compatible = "regulator-fixed";
regulator-name = "lcd_backlight_pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */
enable-active-high;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "DA850/OMAP-L138 EVM";
......@@ -63,6 +131,14 @@ link0_codec: simple-audio-card,codec {
};
};
&ecap2 {
status = "okay";
};
&ref_clk {
clock-frequency = <24000000>;
};
&pmx_core {
status = "okay";
......@@ -93,6 +169,10 @@ nand_pins: nand_pins {
};
};
&sata {
status = "okay";
};
&serial0 {
status = "okay";
};
......@@ -109,6 +189,10 @@ &rtc0 {
status = "okay";
};
&lcdc {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
......@@ -336,5 +420,10 @@ &usb1 {
&vpif {
pinctrl-names = "default";
pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
status = "okay";
/*
* The vpif and the LCD are mutually exclusive.
* To enable VPIF, disable the ti,tilcdc,panel then
* change the status below to 'okay'
*/
status = "disabled";
};
......@@ -123,6 +123,10 @@ vga_con_in: endpoint {
};
};
&ref_clk {
clock-frequency = <24000000>;
};
&pmx_core {
status = "okay";
......@@ -175,6 +179,11 @@ &gpio {
status = "okay";
};
&sata_refclk {
status = "okay";
clock-frequency = <100000000>;
};
&sata {
status = "okay";
};
......
......@@ -173,6 +173,15 @@ battery {
rechargeable-gpios = <&gpio 136 GPIO_ACTIVE_LOW>;
};
bt_slow_clk: bt-clock {
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>, <&bt_clock_bias>;
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&ecap2 0 30518 0>;
};
/* ARM local RAM */
memory@ffff0000 {
compatible = "syscon", "simple-mfd";
......@@ -191,6 +200,10 @@ reboot-mode {
};
};
&ref_clk {
clock-frequency = <24000000>;
};
&pmx_core {
status = "okay";
......@@ -212,6 +225,20 @@ disable {
bias-disable;
};
};
bt_clock_bias: bt-clock-bias-groups {
disable {
groups = "cp2";
bias-disable;
};
};
bt_pic_bias: bt-pic-bias-groups {
disable {
groups = "cp20";
bias-disable;
};
};
};
/* Input port 1 */
......@@ -221,6 +248,22 @@ &serial1 {
pinctrl-0 = <&serial1_rxtx_pins>;
};
&serial2 {
pinctrl-names = "default";
pinctrl-0 = <&serial2_rxtx_pins>, <&serial2_rtscts_pins>, <&bt_pic_bias>;
status = "okay";
bluetooth {
compatible = "ti,cc2560";
clocks = <&bt_slow_clk>;
clock-names = "ext_clock";
enable-gpios = <&gpio 73 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
nvmem-cells = <&bdaddr>;
nvmem-cell-names = "bd-address";
};
};
&rtc0 {
status = "okay";
};
......@@ -239,6 +282,12 @@ eeprom@50 {
pagesize = <64>;
read-only;
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
bdaddr: bdaddr@3f06 {
reg = <0x3f06 0x06>;
};
};
};
......@@ -323,6 +372,10 @@ display@0{
};
};
&ecap2 {
status = "okay";
};
&ehrpwm0 {
status = "okay";
};
......@@ -336,6 +389,39 @@ batt_volt_en {
gpios = <6 GPIO_ACTIVE_HIGH>;
output-high;
};
/* Don't impede Bluetooth clock signal */
bt_clock_en {
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
input;
};
/*
* There is a PIC microcontroller for interfacing with an Apple MFi
* chip. This interferes with normal Bluetooth operation, so we need
* to make sure it is turned off. Note: The publicly available
* schematics from LEGO don't show that these pins are connected to
* anything, but they are present in the source code from LEGO.
*/
bt_pic_en {
gpio-hog;
gpios = <51 GPIO_ACTIVE_HIGH>;
output-low;
};
bt_pic_rst {
gpio-hog;
gpios = <78 GPIO_ACTIVE_HIGH>;
output-high;
};
bt_pic_cts {
gpio-hog;
gpios = <87 GPIO_ACTIVE_HIGH>;
input;
};
};
&usb_phy {
......
......@@ -32,6 +32,25 @@ intc: interrupt-controller@fffee000 {
reg = <0xfffee000 0x2000>;
};
};
clocks: clocks {
ref_clk: ref_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref_clk";
};
sata_refclk: sata_refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "sata_refclk";
status = "disabled";
};
usb_refclkin: usb_refclkin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "usb_refclkin";
status = "disabled";
};
};
dsp: dsp@11800000 {
compatible = "ti,da850-dsp";
reg = <0x11800000 0x40000>,
......@@ -42,6 +61,8 @@ dsp: dsp@11800000 {
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
interrupt-parent = <&intc>;
interrupts = <28>;
clocks = <&psc0 15>;
resets = <&psc0 15>;
status = "disabled";
};
soc@1c00000 {
......@@ -52,6 +73,38 @@ soc@1c00000 {
ranges = <0x0 0x01c00000 0x400000>;
interrupt-parent = <&intc>;
psc0: clock-controller@10000 {
compatible = "ti,da850-psc0";
reg = <0x10000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>,
<&pll0_sysclk 4>, <&pll0_sysclk 6>,
<&async1_clk>;
clock-names = "pll0_sysclk1", "pll0_sysclk2",
"pll0_sysclk4", "pll0_sysclk6",
"async1";
};
pll0: clock-controller@11000 {
compatible = "ti,da850-pll0";
reg = <0x11000 0x1000>;
clocks = <&ref_clk>, <&pll1_sysclk 3>;
clock-names = "clksrc", "extclksrc";
pll0_pllout: pllout {
#clock-cells = <0>;
};
pll0_sysclk: sysclk {
#clock-cells = <1>;
};
pll0_auxclk: auxclk {
#clock-cells = <0>;
};
pll0_obsclk: obsclk {
#clock-cells = <0>;
};
};
pmx_core: pinmux@14120 {
compatible = "pinctrl-single";
reg = <0x14120 0x50>;
......@@ -281,7 +334,40 @@ cfgchip: chip-controller@1417c {
usb_phy: usb-phy {
compatible = "ti,da830-usb-phy";
#phy-cells = <1>;
status = "disabled";
clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>;
clock-names = "usb0_clk48", "usb1_clk48";
status = "disabled";
};
usb_phy_clk: usb-phy-clocks {
compatible = "ti,da830-usb-phy-clocks";
#clock-cells = <1>;
clocks = <&psc1 1>, <&usb_refclkin>,
<&pll0_auxclk>;
clock-names = "fck", "usb_refclkin", "auxclk";
};
ehrpwm_tbclk: ehrpwm_tbclk {
compatible = "ti,da830-tbclksync";
#clock-cells = <0>;
clocks = <&psc1 17>;
clock-names = "fck";
};
div4p5_clk: div4.5 {
compatible = "ti,da830-div4p5ena";
#clock-cells = <0>;
clocks = <&pll0_pllout>;
clock-names = "pll0_pllout";
};
async1_clk: async1 {
compatible = "ti,da850-async1-clksrc";
#clock-cells = <0>;
clocks = <&pll0_sysclk 3>, <&div4p5_clk>;
clock-names = "pll0_sysclk3", "div4.5";
};
async3_clk: async3 {
compatible = "ti,da850-async3-clksrc";
#clock-cells = <0>;
clocks = <&pll0_sysclk 2>, <&pll1_sysclk 2>;
clock-names = "pll0_sysclk2", "pll1_sysclk2";
};
};
edma0: edma@0 {
......@@ -294,18 +380,21 @@ edma0: edma@0 {
#dma-cells = <2>;
ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
power-domains = <&psc0 0>;
};
edma0_tptc0: tptc@8000 {
compatible = "ti,edma3-tptc";
reg = <0x8000 0x400>;
interrupts = <13>;
interrupt-names = "edm3_tcerrint";
power-domains = <&psc0 1>;
};
edma0_tptc1: tptc@8400 {
compatible = "ti,edma3-tptc";
reg = <0x8400 0x400>;
interrupts = <32>;
interrupt-names = "edm3_tcerrint";
power-domains = <&psc0 2>;
};
edma1: edma@230000 {
compatible = "ti,edma3-tpcc";
......@@ -317,12 +406,14 @@ edma1: edma@230000 {
#dma-cells = <2>;
ti,tptcs = <&edma1_tptc0 7>;
power-domains = <&psc1 0>;
};
edma1_tptc0: tptc@238000 {
compatible = "ti,edma3-tptc";
reg = <0x238000 0x400>;
interrupts = <95>;
interrupt-names = "edm3_tcerrint";
power-domains = <&psc1 21>;
};
serial0: serial@42000 {
compatible = "ti,da830-uart", "ns16550a";
......@@ -330,6 +421,8 @@ serial0: serial@42000 {
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <25>;
clocks = <&psc0 9>;
power-domains = <&psc0 9>;
status = "disabled";
};
serial1: serial@10c000 {
......@@ -338,6 +431,8 @@ serial1: serial@10c000 {
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <53>;
clocks = <&psc1 12>;
power-domains = <&psc1 12>;
status = "disabled";
};
serial2: serial@10d000 {
......@@ -346,6 +441,8 @@ serial2: serial@10d000 {
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <61>;
clocks = <&psc1 13>;
power-domains = <&psc1 13>;
status = "disabled";
};
rtc0: rtc@23000 {
......@@ -353,6 +450,8 @@ rtc0: rtc@23000 {
reg = <0x23000 0x1000>;
interrupts = <19
19>;
clocks = <&pll0_auxclk>;
clock-names = "int-clk";
status = "disabled";
};
i2c0: i2c@22000 {
......@@ -361,6 +460,7 @@ i2c0: i2c@22000 {
interrupts = <15>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pll0_auxclk>;
status = "disabled";
};
i2c1: i2c@228000 {
......@@ -369,11 +469,21 @@ i2c1: i2c@228000 {
interrupts = <51>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&psc1 11>;
power-domains = <&psc1 11>;
status = "disabled";
};
clocksource: timer@20000 {
compatible = "ti,da830-timer";
reg = <0x20000 0x1000>;
interrupts = <12>, <13>;
interrupt-names = "tint12", "tint34";
clocks = <&pll0_auxclk>;
};
wdt: wdt@21000 {
compatible = "ti,davinci-wdt";
reg = <0x21000 0x1000>;
clocks = <&pll0_auxclk>;
status = "disabled";
};
mmc0: mmc@40000 {
......@@ -384,12 +494,14 @@ mmc0: mmc@40000 {
interrupts = <16>;
dmas = <&edma0 16 0>, <&edma0 17 0>;
dma-names = "rx", "tx";
clocks = <&psc0 5>;
status = "disabled";
};
vpif: video@217000 {
compatible = "ti,da850-vpif";
reg = <0x217000 0x1000>;
interrupts = <92>;
power-domains = <&psc1 9>;
status = "disabled";
/* VPIF capture port */
......@@ -412,6 +524,7 @@ mmc1: mmc@21b000 {
interrupts = <72>;
dmas = <&edma1 28 0>, <&edma1 29 0>;
dma-names = "rx", "tx";
clocks = <&psc1 18>;
status = "disabled";
};
ehrpwm0: pwm@300000 {
......@@ -419,6 +532,9 @@ ehrpwm0: pwm@300000 {
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x300000 0x2000>;
clocks = <&psc1 17>, <&ehrpwm_tbclk>;
clock-names = "fck", "tbclk";
power-domains = <&psc1 17>;
status = "disabled";
};
ehrpwm1: pwm@302000 {
......@@ -426,6 +542,9 @@ ehrpwm1: pwm@302000 {
"ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x302000 0x2000>;
clocks = <&psc1 17>, <&ehrpwm_tbclk>;
clock-names = "fck", "tbclk";
power-domains = <&psc1 17>;
status = "disabled";
};
ecap0: ecap@306000 {
......@@ -433,6 +552,9 @@ ecap0: ecap@306000 {
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x306000 0x80>;
clocks = <&psc1 20>;
clock-names = "fck";
power-domains = <&psc1 20>;
status = "disabled";
};
ecap1: ecap@307000 {
......@@ -440,6 +562,9 @@ ecap1: ecap@307000 {
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x307000 0x80>;
clocks = <&psc1 20>;
clock-names = "fck";
power-domains = <&psc1 20>;
status = "disabled";
};
ecap2: ecap@308000 {
......@@ -447,6 +572,9 @@ ecap2: ecap@308000 {
"ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x308000 0x80>;
clocks = <&psc1 20>;
clock-names = "fck";
power-domains = <&psc1 20>;
status = "disabled";
};
spi0: spi@41000 {
......@@ -459,6 +587,8 @@ spi0: spi@41000 {
interrupts = <20>;
dmas = <&edma0 14 0>, <&edma0 15 0>;
dma-names = "rx", "tx";
clocks = <&psc0 4>;
power-domains = <&psc0 4>;
status = "disabled";
};
spi1: spi@30e000 {
......@@ -471,6 +601,8 @@ spi1: spi@30e000 {
interrupts = <56>;
dmas = <&edma0 18 0>, <&edma0 19 0>;
dma-names = "rx", "tx";
clocks = <&psc1 10>;
power-domains = <&psc1 10>;
status = "disabled";
};
usb0: usb@200000 {
......@@ -482,6 +614,8 @@ usb0: usb@200000 {
dr_mode = "otg";
phys = <&usb_phy 0>;
phy-names = "usb-phy";
clocks = <&psc1 1>;
clock-ranges;
status = "disabled";
#address-cells = <1>;
......@@ -505,6 +639,7 @@ cppi41dma: dma-controller@201000 {
interrupts = <58>;
#dma-cells = <2>;
#dma-channels = <4>;
power-domains = <&psc1 1>;
status = "okay";
};
};
......@@ -512,13 +647,31 @@ sata: sata@218000 {
compatible = "ti,da850-ahci";
reg = <0x218000 0x2000>, <0x22c018 0x4>;
interrupts = <67>;
clocks = <&psc1 8>, <&sata_refclk>;
clock-names = "fck", "refclk";
status = "disabled";
};
pll1: clock-controller@21a000 {
compatible = "ti,da850-pll1";
reg = <0x21a000 0x1000>;
clocks = <&ref_clk>;
clock-names = "clksrc";
pll1_sysclk: sysclk {
#clock-cells = <1>;
};
pll1_obsclk: obsclk {
#clock-cells = <0>;
};
};
mdio: mdio@224000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x224000 0x1000>;
clocks = <&psc1 5>;
clock-names = "fck";
power-domains = <&psc1 5>;
status = "disabled";
};
eth0: ethernet@220000 {
......@@ -534,6 +687,8 @@ eth0: ethernet@220000 {
35
36
>;
clocks = <&psc1 5>;
power-domains = <&psc1 5>;
status = "disabled";
};
usb1: usb@225000 {
......@@ -542,6 +697,7 @@ usb1: usb@225000 {
interrupts = <59>;
phys = <&usb_phy 1>;
phy-names = "usb-phy";
clocks = <&psc1 2>;
status = "disabled";
};
gpio: gpio@226000 {
......@@ -552,6 +708,8 @@ gpio: gpio@226000 {
interrupts = <42 43 44 45 46 47 48 49 50>;
ti,ngpio = <144>;
ti,davinci-gpio-unbanked = <0>;
clocks = <&psc1 3>;
clock-names = "gpio";
status = "disabled";
interrupt-controller;
#interrupt-cells = <2>;
......@@ -700,6 +858,17 @@ gpio: gpio@226000 {
<&pmx_core 142 147 1>,
<&pmx_core 143 146 1>;
};
psc1: clock-controller@227000 {
compatible = "ti,da850-psc1";
reg = <0x227000 0x1000>;
#clock-cells = <1>;
#power-domain-cells = <1>;
clocks = <&pll0_sysclk 2>, <&pll0_sysclk 4>,
<&async3_clk>;
clock-names = "pll0_sysclk2", "pll0_sysclk4", "async3";
assigned-clocks = <&async3_clk>;
assigned-clock-parents = <&pll1_sysclk 2>;
};
pinconf: pin-controller@22c00c {
compatible = "ti,da850-pupd";
reg = <0x22c00c 0x8>;
......@@ -713,6 +882,7 @@ mcasp0: mcasp@100000 {
reg-names = "mpu", "dat";
interrupts = <54>;
interrupt-names = "common";
power-domains = <&psc1 7>;
status = "disabled";
dmas = <&edma0 1 1>,
<&edma0 0 1>;
......@@ -724,6 +894,9 @@ lcdc: display@213000 {
reg = <0x213000 0x1000>;
interrupts = <52>;
max-pixelclock = <37500>;
clocks = <&psc1 16>;
clock-names = "fck";
power-domains = <&psc1 16>;
status = "disabled";
};
};
......@@ -735,6 +908,9 @@ aemif: aemif@68000000 {
reg = <0x68000000 0x00008000>;
ranges = <0 0 0x60000000 0x08000000
1 0 0x68000000 0x00008000>;
clocks = <&psc0 3>;
clock-names = "aemif";
clock-ranges;
status = "disabled";
};
memctrl: memory-controller@b0000000 {
......
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