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Commit b8dd4c32 authored by Anton Blanchard's avatar Anton Blanchard
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ppc64: Paca -> paca, Naca -> naca from Dave Engebretsen

parent cc1d98a9
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Showing with 244 additions and 302 deletions
arch/ppc64/boot/zlib.c
View file @ b8dd4c32
......@@ -671,11 +671,6 @@ struct inflate_blocks_state {
/* load local pointers */
#define LOAD {LOADIN LOADOUT}
/*
* The IBM 150 firmware munges the data right after _etext[]. This
* protects it. -- Cort
*/
local uInt protect_mask[] = {0, 0, 0, 0, 0, 0, 0, 0, 0 ,0 ,0 ,0};
/* And'ing with mask[n] masks the lower n bits */
local uInt inflate_mask[] = {
0x0000,
......
arch/ppc64/kernel/ItLpQueue.c
View file @ b8dd4c32
......@@ -12,7 +12,7 @@
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/system.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/iSeries/HvLpEvent.h>
#include <asm/iSeries/HvCallEvent.h>
......
arch/ppc64/kernel/LparData.c
View file @ b8dd4c32
......@@ -14,13 +14,13 @@
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/init.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/abs_addr.h>
#include <asm/bitops.h>
#include <asm/iSeries/ItLpNaca.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/HvReleaseData.h>
#include <asm/iSeries/LparMap.h>
#include <asm/iSeries/ItVpdAreas.h>
......@@ -61,8 +61,8 @@ struct ItLpQueue xItLpQueue = {};
struct HvReleaseData hvReleaseData = {
0xc8a5d9c4, /* desc = "HvRD" ebcdic */
sizeof(struct HvReleaseData),
offsetof(struct Naca, xItVpdAreas),
(struct Naca *)(KERNELBASE+0x4000), /* 64-bit Naca address */
offsetof(struct naca_struct, xItVpdAreas),
(struct naca_struct *)(KERNELBASE+0x4000), /* 64-bit Naca address */
0x6000, /* offset of LparMap within loadarea (see head.S) */
0,
1, /* tags inactive */
......@@ -174,7 +174,7 @@ struct ItVpdAreas itVpdAreas = {
0, 0,
26, /* # VPD array entries */
10, /* # DMA array entries */
maxProcessors*2, maxPhysicalProcessors, /* Max logical, physical procs */
MAX_PROCESSORS*2, maxPhysicalProcessors, /* Max logical, physical procs */
offsetof(struct ItVpdAreas,xPlicDmaToks),/* offset to DMA toks */
offsetof(struct ItVpdAreas,xSlicVpdAdrs),/* offset to VPD addrs */
offsetof(struct ItVpdAreas,xPlicDmaLens),/* offset to DMA lens */
......@@ -186,7 +186,7 @@ struct ItVpdAreas itVpdAreas = {
{0}, /* DMA tokens */
{ /* VPD lengths */
0,0,0,0, /* 0 - 3 */
sizeof(struct Paca), /* 4 length of Paca */
sizeof(struct paca_struct), /* 4 length of Paca */
0, /* 5 */
sizeof(struct ItIplParmsReal),/* 6 length of IPL parms */
26992, /* 7 length of MS VPD */
......@@ -203,7 +203,7 @@ struct ItVpdAreas itVpdAreas = {
},
{ /* VPD addresses */
0,0,0,0, /* 0 - 3 */
&xPaca[0], /* 4 first Paca */
&paca[0], /* 4 first Paca */
0, /* 5 */
&xItIplParmsReal, /* 6 IPL parms */
&xMsVpd, /* 7 MS Vpd */
......
arch/ppc64/kernel/chrp_setup.c
View file @ b8dd4c32
......@@ -57,7 +57,7 @@
#include <asm/irq.h>
#include <asm/keyboard.h>
#include <asm/init.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/time.h>
#include "local_irq.h"
......@@ -67,7 +67,6 @@
#include <asm/ppcdebug.h>
extern volatile unsigned char *chrp_int_ack_special;
extern struct Naca *naca;
void chrp_setup_pci_ptrs(void);
void chrp_progress(char *, unsigned short);
......
arch/ppc64/kernel/eeh.c
View file @ b8dd4c32
......@@ -26,9 +26,9 @@
#include <linux/pci.h>
#include <linux/proc_fs.h>
#include <linux/bootmem.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/processor.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/io.h>
#include "pci.h"
......
arch/ppc64/kernel/entry.S
View file @ b8dd4c32
......@@ -290,7 +290,7 @@ _GLOBAL(_switch)
std r23,_CCR(r1)
std r1,KSP(r3) /* Set old stack pointer */
mfspr r5,SPRG3 /* Get Paca */
mfspr r5,SPRG3 /* Get paca */
addi r13,r4,-THREAD /* Convert THREAD to 'current' */
std r13,PACACURRENT(r5) /* Set new 'current' */
......
arch/ppc64/kernel/head.S
View file @ b8dd4c32
......@@ -54,7 +54,7 @@
* SPRG0 reserved for hypervisor
* SPRG1 temp - used to save gpr
* SPRG2 temp - used to save gpr
* SPRG3 virt addr of Paca
* SPRG3 virt addr of paca
*/
/*
......@@ -167,7 +167,7 @@ _GLOBAL(__secondary_hold)
#define EXCEPTION_PROLOG_PSERIES(label) \
mtspr SPRG2,r20; /* use SPRG2 as scratch reg */ \
mtspr SPRG1,r21; /* save r21 */ \
mfspr r20,SPRG3; /* get Paca virt addr */ \
mfspr r20,SPRG3; /* get paca virt addr */ \
ld r21,PACAEXCSP(r20); /* get exception stack ptr */ \
addi r21,r21,EXC_FRAME_SIZE; /* make exception frame */ \
std r22,EX_R22(r21); /* Save r22 in exc. frame */ \
......@@ -195,7 +195,7 @@ _GLOBAL(__secondary_hold)
#define EXCEPTION_PROLOG_ISERIES \
mtspr SPRG2,r20; /* use SPRG2 as scratch reg */\
mtspr SPRG1,r21; /* save r21 */\
mfspr r20,SPRG3; /* get Paca */\
mfspr r20,SPRG3; /* get paca */\
ld r21,PACAEXCSP(r20); /* get exception stack ptr */\
addi r21,r21,EXC_FRAME_SIZE; /* make exception frame */\
std r22,EX_R22(r21); /* save r22 on exception frame */\
......@@ -344,19 +344,20 @@ __start_interupts:
STD_EXCEPTION_PSERIES( 0xf00, PerformanceMonitor )
STD_EXCEPTION_PSERIES( 0x1300, InstructionBreakpoint )
/* Space for the naca. Architected to be located at real address
* 0x4000. Various tools rely on this location being fixed.
* The first dword of the naca is required by iSeries LPAR to
* point to itVpdAreas. On pSeries native, this value is not used.
*/
. = 0x4000
.globl __end_interupts
.globl __start_naca
__end_interupts:
__start_naca:
/* Save space for naca.
* The first dword of the Naca is required by iSeries LPAR to
* point to itVpdAreas. On pSeries native, this value is not used.
*/
.llong itVpdAreas
.llong 0x0
.llong 0x0
.llong xPaca
.llong paca
/*
* Space for the initial segment table
......@@ -421,7 +422,7 @@ __end_stab:
.globl SystemReset_Iseries
SystemReset_Iseries:
mfspr 25,SPRG3 /* Get Paca address */
mfspr 25,SPRG3 /* Get paca address */
lhz r24,PACAPACAINDEX(r25) /* Get processor # */
cmpi 0,r24,0 /* Are we processor 0? */
beq .__start_initialization_iSeries /* Start up the first processor */
......@@ -658,7 +659,7 @@ HardwareInterrupt_entry:
/* */
/* The call to do_irq will preserve the value of r14 - r31 */
/* */
mfspr r20,SPRG3 /* get Paca */
mfspr r20,SPRG3 /* get paca */
lbz r21,PACAHRDWINTCOUNT(r20) /* get hardware interrupt cnt */
cmpi 0,r21,1 /* */
addi r21,r21,1 /* incr hardware interrupt cnt*/
......@@ -1073,7 +1074,7 @@ _GLOBAL(save_remaining_regs)
/*
* Indicate that r1 contains the kernel stack and
* get the Kernel TOC and CURRENT pointers from the Paca
* get the Kernel TOC and CURRENT pointers from the paca
*/
mfspr r23,SPRG3 /* Get PACA */
std r22,PACAKSAVE(r23) /* r1 is now kernel sp */
......@@ -1132,12 +1133,12 @@ _GLOBAL(pseries_secondary_smp_init)
bl .enable_64b_mode
isync
/* Set up a Paca value for this processor. */
LOADADDR(r24, xPaca) /* Get base vaddr of Paca array */
mulli r25,r3,PACA_SIZE /* Calculate vaddr of right Paca */
/* Set up a paca value for this processor. */
LOADADDR(r24, paca) /* Get base vaddr of paca array */
mulli r25,r3,PACA_SIZE /* Calculate vaddr of right paca */
add r25,r25,r24 /* for this processor. */
mtspr SPRG3,r25 /* Save vaddr of Paca in SPRG3 */
mtspr SPRG3,r25 /* Save vaddr of paca in SPRG3 */
mr r24,r3 /* __secondary_start needs cpu# */
1:
......@@ -1177,7 +1178,7 @@ _GLOBAL(__start_initialization_iSeries)
std r4,0(r9) /* set the naca pointer */
/* Get the pointer to the segment table */
ld r6,PACA(r4) /* Get the base Paca pointer */
ld r6,PACA(r4) /* Get the base paca pointer */
ld r4,PACASTABVIRT(r6)
bl .iSeries_fixup_klimit
......@@ -1439,15 +1440,15 @@ _GLOBAL(giveup_fpu)
/*
* This function is called after the master CPU has released the
* secondary processors. The execution environment is relocation off.
* The Paca for this processor has the following fields initialized at
* The paca for this processor has the following fields initialized at
* this point:
* 1. Processor number
* 2. Segment table pointer (virtual address)
* On entry the following are set:
* r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries
* r24 = cpu# (in Linux terms)
* r25 = Paca virtual address
* SPRG3 = Paca virtual address
* r25 = paca virtual address
* SPRG3 = paca virtual address
*/
_GLOBAL(__secondary_start)
......@@ -1581,7 +1582,7 @@ _STATIC(start_here_pSeries)
#ifdef CONFIG_SMP
/* All secondary cpus are now spinning on a common
* spinloop, release them all now so they can start
* to spin on their individual Paca spinloops.
* to spin on their individual paca spinloops.
* For non SMP kernels, the secondary cpus never
* get out of the common spinloop.
*/
......@@ -1617,7 +1618,7 @@ _STATIC(start_here_pSeries)
/* Get the pointer to the segment table which is used by */
/* stab_initialize */
li r27,0x4000
ld r6,PACA(r27) /* Get the base Paca pointer */
ld r6,PACA(r27) /* Get the base paca pointer */
sub r6,r6,r26 /* convert to physical addr */
mtspr SPRG3,r6 /* PPPBBB: Temp... -Peter */
ld r3,PACASTABREAL(r6)
......@@ -1681,9 +1682,9 @@ _STATIC(start_here_common)
addi r8,r8,0x4000
std r8,0(r9) /* set the value of the naca ptr */
LOADADDR(r4,naca) /* Get Naca ptr address */
LOADADDR(r4,naca) /* Get naca ptr address */
ld r4,0(r4) /* Get the location of the naca */
ld r4,PACA(r4) /* Get the base Paca pointer */
ld r4,PACA(r4) /* Get the base paca pointer */
mtspr SPRG3,r4
/* ptr to current */
......@@ -1828,7 +1829,7 @@ hardware_int_paca0:
/* 1 page segment table per cpu (max 48, cpu0 allocated at 0x5000) */
.globl stab_array
stab_array:
.space 4096 * 47
.space 4096 * (48 - 1)
/*
* This space gets a copy of optional info passed to us by the bootstrap
......
arch/ppc64/kernel/htab.c
View file @ b8dd4c32
......@@ -38,7 +38,7 @@
#include <asm/init.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/system.h>
#include <asm/pmc.h>
#include <asm/machdep.h>
......@@ -99,7 +99,7 @@ htab_initialize(void)
unsigned long pteg_count;
unsigned long mode_rw, mask;
unsigned long offset = reloc_offset();
struct Naca *_naca = RELOC(naca);
struct naca_struct *_naca = RELOC(naca);
HTAB *_htab_data = PTRRELOC(&htab_data);
/*
......
arch/ppc64/kernel/iSeries_pci.c
View file @ b8dd4c32
......@@ -35,7 +35,7 @@
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/ppcdebug.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/flight_recorder.h>
#include <asm/pci_dma.h>
......@@ -55,7 +55,6 @@ extern struct pci_controller** hose_tail;
extern int global_phb_number;
extern int panic_timeout;
extern struct Naca *naca;
extern struct device_node *allnodes;
extern unsigned long phb_tce_table_init(struct pci_controller *phb);
extern unsigned long iSeries_Base_Io_Memory;
......
arch/ppc64/kernel/iSeries_setup.c
View file @ b8dd4c32
......@@ -37,8 +37,8 @@
#include <asm/time.h>
#include "iSeries_setup.h"
#include <asm/Naca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/iSeries/LparData.h>
#include <asm/iSeries/HvCallHpt.h>
#include <asm/iSeries/HvLpConfig.h>
......@@ -85,7 +85,6 @@ int piranha_simulator = 0;
extern char _end[];
extern struct Naca *naca;
extern int rd_size; /* Defined in drivers/block/rd.c */
extern unsigned long klimit;
extern unsigned long embedded_sysmap_start;
......@@ -889,13 +888,13 @@ static void iSeries_setup_dprofile(void)
{
if ( dprof_buffer ) {
unsigned i;
for (i=0; i<maxPacas; ++i) {
xPaca[i].prof_shift = dprof_shift;
xPaca[i].prof_len = dprof_len-1;
xPaca[i].prof_buffer = dprof_buffer;
xPaca[i].prof_stext = (unsigned *)&_stext;
for (i=0; i<MAX_PACAS; ++i) {
paca[i].prof_shift = dprof_shift;
paca[i].prof_len = dprof_len-1;
paca[i].prof_buffer = dprof_buffer;
paca[i].prof_stext = (unsigned *)&_stext;
mb();
xPaca[i].prof_enabled = 1;
paca[i].prof_enabled = 1;
}
}
}
arch/ppc64/kernel/idle.c
View file @ b8dd4c32
......@@ -68,7 +68,7 @@ static void yield_shared_processor(void)
int cpu_idle(void)
{
struct Paca *paca;
struct Paca *lpaca;
long oldval;
unsigned long CTRL;
......@@ -78,11 +78,11 @@ int cpu_idle(void)
CTRL &= ~RUNLATCH;
mtspr(CTRLT, CTRL);
paca = get_paca();
lpaca = get_paca();
while (1) {
if (paca->xLpPaca.xSharedProc) {
if (ItLpQueue_isLpIntPending(paca->lpQueuePtr))
if (lpaca->xLpPaca.xSharedProc) {
if (ItLpQueue_isLpIntPending(lpaca->lpQueuePtr))
process_iSeries_events();
if (!need_resched())
yield_shared_processor();
......@@ -94,7 +94,7 @@ int cpu_idle(void)
while (!need_resched()) {
HMT_medium();
if (ItLpQueue_isLpIntPending(paca->lpQueuePtr))
if (ItLpQueue_isLpIntPending(lpaca->lpQueuePtr))
process_iSeries_events();
HMT_low();
}
......
arch/ppc64/kernel/irq.c
View file @ b8dd4c32
......@@ -55,6 +55,7 @@
#include <asm/ptrace.h>
#include <asm/iSeries/LparData.h>
#include <asm/machdep.h>
#include <asm/paca.h>
#include "local_irq.h"
......@@ -506,21 +507,21 @@ int do_IRQ(struct pt_regs *regs)
int cpu = smp_processor_id();
int irq, first = 1;
#ifdef CONFIG_PPC_ISERIES
struct Paca *paca;
struct paca_struct *lpaca;
struct ItLpQueue *lpq;
#endif
irq_enter(cpu);
#ifdef CONFIG_PPC_ISERIES
paca = get_paca();
lpaca = get_paca();
#ifdef CONFIG_SMP
if (paca->xLpPaca.xIntDword.xFields.xIpiCnt) {
paca->xLpPaca.xIntDword.xFields.xIpiCnt = 0;
if (lpaca->xLpPaca.xIntDword.xFields.xIpiCnt) {
lpaca->xLpPaca.xIntDword.xFields.xIpiCnt = 0;
iSeries_smp_message_recv(regs);
}
#endif /* CONFIG_SMP */
lpq = paca->lpQueuePtr;
lpq = lpaca->lpQueuePtr;
if (lpq && ItLpQueue_isLpIntPending(lpq))
lpEvent_count += ItLpQueue_process(lpq, regs);
#else
......@@ -544,8 +545,8 @@ int do_IRQ(struct pt_regs *regs)
irq_exit(cpu);
#ifdef CONFIG_PPC_ISERIES
if (paca->xLpPaca.xIntDword.xFields.xDecrInt) {
paca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
if (lpaca->xLpPaca.xIntDword.xFields.xDecrInt) {
lpaca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
/* Signal a fake decrementer interrupt */
timer_interrupt(regs);
}
......@@ -844,11 +845,11 @@ static int prof_cpu_mask_write_proc (struct file *file, const char *buffer,
#ifdef CONFIG_PPC_ISERIES
{
unsigned i;
for (i=0; i<maxPacas; ++i) {
if ( xPaca[i].prof_buffer && (new_value & 1) )
xPaca[i].prof_enabled = 1;
for (i=0; i<MAX_PACAS; ++i) {
if ( paca[i].prof_buffer && (new_value & 1) )
paca[i].prof_enabled = 1;
else
xPaca[i].prof_enabled = 0;
paca[i].prof_enabled = 0;
new_value >>= 1;
}
}
......
arch/ppc64/kernel/mk_defs.c
View file @ b8dd4c32
......@@ -30,8 +30,8 @@
#include <asm/processor.h>
#include <asm/hardirq.h>
#include <asm/Naca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/iSeries/HvLpEvent.h>
......@@ -60,44 +60,44 @@ main(void)
DEFINE(MM, offsetof(struct task_struct, mm));
/* Naca */
DEFINE(DCACHEL1LINESIZE, offsetof(struct Naca, dCacheL1LineSize));
DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct Naca, dCacheL1LogLineSize));
DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct Naca, dCacheL1LinesPerPage));
DEFINE(ICACHEL1LINESIZE, offsetof(struct Naca, iCacheL1LineSize));
DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct Naca, iCacheL1LogLineSize));
DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct Naca, iCacheL1LinesPerPage));
DEFINE(SLBSIZE, offsetof(struct Naca, slb_size));
/* naca */
DEFINE(PACA, offsetof(struct naca_struct, paca));
DEFINE(DCACHEL1LINESIZE, offsetof(struct naca_struct, dCacheL1LineSize));
DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct naca_struct, dCacheL1LogLineSize));
DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct naca_struct, dCacheL1LinesPerPage));
DEFINE(ICACHEL1LINESIZE, offsetof(struct naca_struct, iCacheL1LineSize));
DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct naca_struct, iCacheL1LogLineSize));
DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct naca_struct, iCacheL1LinesPerPage));
DEFINE(SLBSIZE, offsetof(struct naca_struct, slb_size));
/* Paca */
DEFINE(PACA, offsetof(struct Naca, paca));
DEFINE(PACA_SIZE, sizeof(struct Paca));
DEFINE(PACAPACAINDEX, offsetof(struct Paca, xPacaIndex));
DEFINE(PACAPROCSTART, offsetof(struct Paca, xProcStart));
DEFINE(PACAKSAVE, offsetof(struct Paca, xKsave));
DEFINE(PACACURRENT, offsetof(struct Paca, xCurrent));
DEFINE(PACASAVEDMSR, offsetof(struct Paca, xSavedMsr));
DEFINE(PACASTABREAL, offsetof(struct Paca, xStab_data.real));
DEFINE(PACASTABVIRT, offsetof(struct Paca, xStab_data.virt));
DEFINE(PACASTABRR, offsetof(struct Paca, xStab_data.next_round_robin));
DEFINE(PACAR1, offsetof(struct Paca, xR1));
DEFINE(PACALPQUEUE, offsetof(struct Paca, lpQueuePtr));
DEFINE(PACATOC, offsetof(struct Paca, xTOC));
DEFINE(PACAEXCSP, offsetof(struct Paca, exception_sp));
DEFINE(PACAHRDWINTSTACK, offsetof(struct Paca, xHrdIntStack));
DEFINE(PACAPROCENABLED, offsetof(struct Paca, xProcEnabled));
DEFINE(PACAHRDWINTCOUNT, offsetof(struct Paca, xHrdIntCount));
DEFINE(PACADEFAULTDECR, offsetof(struct Paca, default_decr));
DEFINE(PACAPROFENABLED, offsetof(struct Paca, prof_enabled));
DEFINE(PACAPROFLEN, offsetof(struct Paca, prof_len));
DEFINE(PACAPROFSHIFT, offsetof(struct Paca, prof_shift));
DEFINE(PACAPROFBUFFER, offsetof(struct Paca, prof_buffer));
DEFINE(PACAPROFSTEXT, offsetof(struct Paca, prof_stext));
DEFINE(PACALPPACA, offsetof(struct Paca, xLpPaca));
DEFINE(LPPACA, offsetof(struct Paca, xLpPaca));
DEFINE(PACAREGSAV, offsetof(struct Paca, xRegSav));
DEFINE(PACAEXC, offsetof(struct Paca, exception_stack));
DEFINE(PACAGUARD, offsetof(struct Paca, guard));
/* paca */
DEFINE(PACA_SIZE, sizeof(struct paca_struct));
DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, xPacaIndex));
DEFINE(PACAPROCSTART, offsetof(struct paca_struct, xProcStart));
DEFINE(PACAKSAVE, offsetof(struct paca_struct, xKsave));
DEFINE(PACACURRENT, offsetof(struct paca_struct, xCurrent));
DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, xSavedMsr));
DEFINE(PACASTABREAL, offsetof(struct paca_struct, xStab_data.real));
DEFINE(PACASTABVIRT, offsetof(struct paca_struct, xStab_data.virt));
DEFINE(PACASTABRR, offsetof(struct paca_struct, xStab_data.next_round_robin));
DEFINE(PACAR1, offsetof(struct paca_struct, xR1));
DEFINE(PACALPQUEUE, offsetof(struct paca_struct, lpQueuePtr));
DEFINE(PACATOC, offsetof(struct paca_struct, xTOC));
DEFINE(PACAEXCSP, offsetof(struct paca_struct, exception_sp));
DEFINE(PACAHRDWINTSTACK, offsetof(struct paca_struct, xHrdIntStack));
DEFINE(PACAPROCENABLED, offsetof(struct paca_struct, xProcEnabled));
DEFINE(PACAHRDWINTCOUNT, offsetof(struct paca_struct, xHrdIntCount));
DEFINE(PACADEFAULTDECR, offsetof(struct paca_struct, default_decr));
DEFINE(PACAPROFENABLED, offsetof(struct paca_struct, prof_enabled));
DEFINE(PACAPROFLEN, offsetof(struct paca_struct, prof_len));
DEFINE(PACAPROFSHIFT, offsetof(struct paca_struct, prof_shift));
DEFINE(PACAPROFBUFFER, offsetof(struct paca_struct, prof_buffer));
DEFINE(PACAPROFSTEXT, offsetof(struct paca_struct, prof_stext));
DEFINE(PACALPPACA, offsetof(struct paca_struct, xLpPaca));
DEFINE(LPPACA, offsetof(struct paca_struct, xLpPaca));
DEFINE(PACAREGSAV, offsetof(struct paca_struct, xRegSav));
DEFINE(PACAEXC, offsetof(struct paca_struct, exception_stack));
DEFINE(PACAGUARD, offsetof(struct paca_struct, guard));
DEFINE(LPPACASRR0, offsetof(struct ItLpPaca, xSavedSrr0));
DEFINE(LPPACASRR1, offsetof(struct ItLpPaca, xSavedSrr1));
DEFINE(LPPACAANYINT, offsetof(struct ItLpPaca, xIntDword.xAnyInt));
......
arch/ppc64/kernel/pSeries_lpar.c
View file @ b8dd4c32
......@@ -31,7 +31,7 @@
#include <asm/ppcdebug.h>
#include <asm/pci_dma.h>
#include <linux/pci.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/tlbflush.h>
/* Status return values */
......
arch/ppc64/kernel/pSeries_pci.c
View file @ b8dd4c32
......@@ -39,7 +39,7 @@
#include <asm/init.h>
#include <asm/pci-bridge.h>
#include <asm/ppcdebug.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/pci_dma.h>
#ifdef CONFIG_PPC_EEH
#include <asm/eeh.h>
......
arch/ppc64/kernel/pacaData.c
View file @ b8dd4c32
......@@ -7,7 +7,7 @@
* 2 of the License, or (at your option) any later version.
*/
#define __KERNEL__ 1
#define __KERNEL__
#include <asm/types.h>
#include <asm/page.h>
#include <stddef.h>
......@@ -17,8 +17,10 @@
#include <asm/ptrace.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
struct naca_struct *naca;
/* The Paca is an array with one entry per processor. Each contains an
* ItLpPaca, which contains the information shared between the
......@@ -32,8 +34,8 @@
*/
#define PACAINITDATA(number,start,lpq,asrr,asrv) \
{ \
xLpPacaPtr: &xPaca[number].xLpPaca, \
xLpRegSavePtr: &xPaca[number].xRegSav, \
xLpPacaPtr: &paca[number].xLpPaca, \
xLpRegSavePtr: &paca[number].xRegSav, \
xPacaIndex: (number), /* Paca Index */ \
default_decr: 0x00ff0000, /* Initial Decr */ \
xStab_data: { \
......@@ -59,10 +61,10 @@
xSize: sizeof(struct ItLpRegSave) \
}, \
exception_sp: \
(&xPaca[number].exception_stack[0]) - EXC_FRAME_SIZE, \
(&paca[number].exception_stack[0]) - EXC_FRAME_SIZE, \
}
struct Paca xPaca[maxPacas] __page_aligned = {
struct paca_struct paca[MAX_PACAS] __page_aligned = {
#ifdef CONFIG_PPC_ISERIES
PACAINITDATA( 0, 1, &xItLpQueue, 0, 0xc000000000005000),
#else
......
arch/ppc64/kernel/pci.c
View file @ b8dd4c32
......@@ -30,7 +30,7 @@
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/ppcdebug.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/pci_dma.h>
#include <asm/machdep.h>
#ifdef CONFIG_PPC_EEH
......@@ -61,9 +61,6 @@ void fixup_resources(struct pci_dev* dev);
void iSeries_pcibios_init(void);
void pSeries_pcibios_init(void);
extern struct Naca *naca;
int pci_assign_all_busses = 0;
struct pci_controller* hose_head;
......@@ -584,7 +581,7 @@ int pcibios_enable_device(struct pci_dev *dev)
int idx;
struct resource *r;
PPCDBG(PPCDBG_BUSWALK,"PCI: "__FUNCTION__" for device %s \n",dev->slot_name);
PPCDBG(PPCDBG_BUSWALK,"PCI: %s for device %s \n",__FUNCTION__,dev->slot_name);
if (ppc_md.pcibios_enable_device_hook)
if (ppc_md.pcibios_enable_device_hook(dev, 0))
return -EINVAL;
......
arch/ppc64/kernel/pci_dn.c
View file @ b8dd4c32
......@@ -36,7 +36,7 @@
#include <asm/init.h>
#include <asm/pci-bridge.h>
#include <asm/ppcdebug.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/pci_dma.h>
#include "pci.h"
......
arch/ppc64/kernel/pmc.c
View file @ b8dd4c32
......@@ -23,7 +23,7 @@
*/
#include <asm/proc_fs.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/processor.h>
......@@ -32,9 +32,7 @@
#include <linux/spinlock.h>
#include <asm/pmc.h>
#include <asm/uaccess.h>
#include <asm/Naca.h>
extern struct Naca *naca;
#include <asm/naca.h>
struct _pmc_sw pmc_sw_system = {
0
......
arch/ppc64/kernel/ppc_asm.h
View file @ b8dd4c32
......@@ -13,7 +13,7 @@
#include <linux/config.h>
#include "ppc_asm.tmpl"
#include <asm/ppc_asm.tmpl>
#include "ppc_defs.h"
/*
......
arch/ppc64/kernel/ppc_ksyms.c
View file @ b8dd4c32
......@@ -47,6 +47,9 @@
#ifdef CONFIG_PPC_ISERIES
#include <asm/iSeries/iSeries_pci.h>
#include <asm/iSeries/iSeries_proc.h>
#include <asm/iSeries/mf.h>
#include <asm/iSeries/HvLpEvent.h>
#include <asm/iSeries/HvLpConfig.h>
#endif
/* Tell string.h we don't want memcpy etc. as cpp defines */
......@@ -150,6 +153,11 @@ EXPORT_SYMBOL(HvCall4);
EXPORT_SYMBOL(HvCall5);
EXPORT_SYMBOL(HvCall6);
EXPORT_SYMBOL(HvCall7);
EXPORT_SYMBOL(HvLpEvent_unregisterHandler);
EXPORT_SYMBOL(HvLpEvent_registerHandler);
EXPORT_SYMBOL(mf_allocateLpEvents);
EXPORT_SYMBOL(mf_deallocateLpEvents);
EXPORT_SYMBOL(HvLpConfig_getLpIndex_outline);
#endif
EXPORT_SYMBOL(_insb);
......
arch/ppc64/kernel/proc_pmc.c
View file @ b8dd4c32
......@@ -25,7 +25,7 @@
*/
#include <asm/proc_fs.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/iSeries/HvCallXm.h>
......@@ -38,7 +38,7 @@
#include <linux/spinlock.h>
#include <asm/pmc.h>
#include <asm/uaccess.h>
#include <asm/Naca.h>
#include <asm/naca.h>
static int proc_pmc_control_mode = 0;
......@@ -49,9 +49,6 @@ static struct proc_dir_entry *proc_ppc64_pmc_system_root = NULL;
static struct proc_dir_entry *proc_ppc64_pmc_cpu_root[NR_CPUS] = {NULL, };
static spinlock_t proc_ppc64_lock;
extern struct Naca *naca;
int proc_ppc64_pmc_find_file(void *data);
int proc_ppc64_pmc_read(char *page, char **start, off_t off,
int count, int *eof, char *buffer);
......@@ -385,7 +382,7 @@ int proc_get_lpevents
len += sprintf( page+len, "\n events processed by processor:\n" );
for (i=0; i<naca->processorCount; ++i) {
len += sprintf( page+len, " CPU%02d %10u\n",
i, xPaca[i].lpEvent_count );
i, paca[i].lpEvent_count );
}
return pmc_calc_metrics( page, start, off, count, eof, len );
......@@ -587,7 +584,7 @@ static inline void proc_pmc_cpi(void)
proc_pmc_control_mode = PMC_CONTROL_CPI;
/* Indicate to hypervisor that we are using the PMCs */
((struct Paca *)mfspr(SPRG3))->xLpPacaPtr->xPMCRegsInUse = 1;
get_paca()->xLpPacaPtr->xPMCRegsInUse = 1;
/* Freeze all counters */
mtspr( MMCR0, 0x80000000 );
......@@ -638,7 +635,7 @@ static inline void proc_pmc_tlb(void)
proc_pmc_control_mode = PMC_CONTROL_TLB;
/* Indicate to hypervisor that we are using the PMCs */
((struct Paca *)mfspr(SPRG3))->xLpPacaPtr->xPMCRegsInUse = 1;
get_paca()->xLpPacaPtr->xPMCRegsInUse = 1;
/* Freeze all counters */
mtspr( MMCR0, 0x80000000 );
......@@ -688,9 +685,9 @@ int proc_pmc_set_mmcr0( struct file *file, const char *buffer, unsigned long cou
v = proc_pmc_conv_int( buffer, count );
v = v & ~0x04000000; /* Don't allow interrupts for now */
if ( v & ~0x80000000 ) /* Inform hypervisor we are using PMCs */
((struct Paca *)mfspr(SPRG3))->xLpPacaPtr->xPMCRegsInUse = 1;
get_paca()->xLpPacaPtr->xPMCRegsInUse = 1;
else
((struct Paca *)mfspr(SPRG3))->xLpPacaPtr->xPMCRegsInUse = 0;
get_paca()->xLpPacaPtr->xPMCRegsInUse = 0;
mtspr( MMCR0, v );
return count;
......
arch/ppc64/kernel/process.c
View file @ b8dd4c32
......@@ -43,9 +43,6 @@
#include <asm/ppcdebug.h>
#include <asm/machdep.h>
#include <asm/iSeries/HvCallHpt.h>
#include <asm/Naca.h>
#include "ppc_defs.h"
int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs);
......@@ -300,7 +297,7 @@ int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
void initialize_paca_hardware_interrupt_stack(void)
{
extern struct Naca *naca;
extern struct naca_struct *naca;
int i;
unsigned long stack;
......@@ -317,8 +314,8 @@ void initialize_paca_hardware_interrupt_stack(void)
/* Store the stack value in the PACA for the processor */
xPaca[i].xHrdIntStack = stack + (8*PAGE_SIZE) - STACK_FRAME_OVERHEAD;
xPaca[i].xHrdIntCount = 0;
paca[i].xHrdIntStack = stack + (8*PAGE_SIZE) - STACK_FRAME_OVERHEAD;
paca[i].xHrdIntCount = 0;
}
......@@ -331,7 +328,7 @@ void initialize_paca_hardware_interrupt_stack(void)
for (i=0; i < naca->processorCount; i++) {
/* set page at the top of stack to be protected - prevent overflow */
end_of_stack = xPaca[i].xHrdIntStack - (8*PAGE_SIZE - STACK_FRAME_OVERHEAD);
end_of_stack = paca[i].xHrdIntStack - (8*PAGE_SIZE - STACK_FRAME_OVERHEAD);
ppc_md.hpte_updateboltedpp(PP_RXRX,end_of_stack);
}
}
......
arch/ppc64/kernel/prom.c
View file @ b8dd4c32
......@@ -64,7 +64,7 @@
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/bitops.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/pci.h>
#include "open_pic.h"
#include <asm/bootinfo.h>
......@@ -169,7 +169,6 @@ char *of_stdout_device = 0;
extern struct rtas_t rtas;
extern unsigned long klimit;
extern unsigned long embedded_sysmap_end;
extern struct Naca *naca;
extern struct lmb lmb;
#ifdef CONFIG_MSCHUNKS
extern struct msChunks msChunks;
......@@ -339,7 +338,7 @@ prom_initialize_naca(unsigned long mem)
unsigned long num_cpus = 0;
unsigned long offset = reloc_offset();
struct prom_t *_prom = PTRRELOC(&prom);
struct Naca *_naca = RELOC(naca);
struct naca_struct *_naca = RELOC(naca);
#ifdef DEBUG_PROM
prom_print(RELOC("prom_initialize_naca: start...\n"));
......@@ -1043,8 +1042,8 @@ prom_hold_cpus(unsigned long mem)
unsigned long *spinloop = __v2a(&__secondary_hold_spinloop);
unsigned long *acknowledge = __v2a(&__secondary_hold_acknowledge);
unsigned long secondary_hold = (unsigned long)__v2a(*PTRRELOC((unsigned long *)__secondary_hold));
struct Naca *_naca = RELOC(naca);
struct Paca *_xPaca = PTRRELOC(&xPaca[0]);
struct naca_struct *_naca = RELOC(naca);
struct paca_struct *_xPaca = PTRRELOC(&paca[0]);
struct prom_t *_prom = PTRRELOC(&prom);
/* Initially, we must have one active CPU. */
......@@ -1237,8 +1236,8 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp,
char *p, *d;
unsigned long phys;
u32 getprop_rval;
struct Naca *_naca = RELOC(naca);
struct Paca *_xPaca = PTRRELOC(&xPaca[0]);
struct naca_struct *_naca = RELOC(naca);
struct paca_struct *_xPaca = PTRRELOC(&paca[0]);
struct prom_t *_prom = PTRRELOC(&prom);
/* Default machine type. */
......
arch/ppc64/kernel/rtas.c
View file @ b8dd4c32
......@@ -20,7 +20,7 @@
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/machdep.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/udbg.h>
......
arch/ppc64/kernel/setup.c
View file @ b8dd4c32
......@@ -32,8 +32,8 @@
#include <asm/elf.h>
#include <asm/machdep.h>
#include <asm/iSeries/LparData.h>
#include <asm/Naca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/ppcdebug.h>
#include <asm/time.h>
......@@ -83,7 +83,6 @@ unsigned long SYSRQ_KEY;
#endif /* CONFIG_MAGIC_SYSRQ */
struct machdep_calls ppc_md;
struct Naca *naca;
/*
* Perhaps we can put the pmac screen_info[] here
......@@ -118,34 +117,11 @@ int ucache_bsize;
*/
void ppcdbg_initialize(void) {
unsigned long offset = reloc_offset();
struct Naca *_naca = RELOC(naca);
struct naca_struct *_naca = RELOC(naca);
_naca->debug_switch = PPC_DEBUG_DEFAULT; /* | PPCDBG_BUSWALK | PPCDBG_PHBINIT | PPCDBG_MM | PPCDBG_MMINIT | PPCDBG_TCEINIT | PPCDBG_TCE */;
}
/*
* Initialize a set of PACA's, one for each processor.
*
* At this point, relocation is on, but we have not done any other
* setup of the mm subsystem.
*/
void paca_init(void) {
#if 0
int processorCount = naca->processorCount, i;
struct Paca *paca[];
/* Put the array of paca's on a page boundary & allocate 1/2 page of */
/* storage for each. */
klimit += (PAGE_SIZE-1) & PAGE_MASK;
naca->xPaca = paca[0] = klimit;
klimit += ((PAGE_SIZE>>1) * processorCount);
for(i=0; i<processorCount; i++) {
paca[0]->xPacaIndex = i;
}
#endif
}
/*
* Do some initial setup of the system. The paramters are those which
* were passed in from the bootloader.
......@@ -300,14 +276,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
return 0;
#endif
pvr = xPaca[cpu_id].pvr;
pvr = paca[cpu_id].pvr;
maj = (pvr >> 8) & 0xFF;
min = pvr & 0xFF;
seq_printf(m, "processor\t: %lu\n", cpu_id);
seq_printf(m, "cpu\t\t: ");
pvr = xPaca[cpu_id].pvr;
pvr = paca[cpu_id].pvr;
switch (PVR_VER(pvr)) {
case PV_PULSAR:
......@@ -681,9 +657,9 @@ int set_spread_lpevents( char * str )
/* The parameter is the number of processors to share in processing lp events */
unsigned long i;
unsigned long val = simple_strtoul( str, NULL, 0 );
if ( ( val > 0 ) && ( val <= maxPacas ) ) {
if ( ( val > 0 ) && ( val <= MAX_PACAS ) ) {
for ( i=1; i<val; ++i )
xPaca[i].lpQueuePtr = xPaca[0].lpQueuePtr;
paca[i].lpQueuePtr = paca[0].lpQueuePtr;
printk("lpevent processing spread over %ld processors\n", val);
}
else
......@@ -694,13 +670,13 @@ int set_spread_lpevents( char * str )
/* This should only be called on processor 0 during calibrate decr */
void setup_default_decr(void)
{
struct Paca * paca = (struct Paca *)mfspr(SPRG3);
struct paca_struct *lpaca = get_paca();
if ( decr_overclock_set && !decr_overclock_proc0_set )
decr_overclock_proc0 = decr_overclock;
paca->default_decr = tb_ticks_per_jiffy / decr_overclock_proc0;
paca->next_jiffy_update_tb = get_tb() + tb_ticks_per_jiffy;
lpaca->default_decr = tb_ticks_per_jiffy / decr_overclock_proc0;
lpaca->next_jiffy_update_tb = get_tb() + tb_ticks_per_jiffy;
}
int set_decr_overclock_proc0( char * str )
......
arch/ppc64/kernel/smp.c
View file @ b8dd4c32
......@@ -43,8 +43,8 @@
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/Naca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/iSeries/LparData.h>
#include <asm/iSeries/HvCall.h>
#include <asm/iSeries/HvCallCfg.h>
......@@ -77,8 +77,6 @@ extern int cpu_idle(void *unused);
void smp_call_function_interrupt(void);
void smp_message_pass(int target, int msg, unsigned long data, int wait);
static unsigned long iSeries_smp_message[NR_CPUS];
extern struct Naca *naca;
extern struct Paca xPaca[];
void xics_setup_cpu(void);
void xics_cause_IPI(int cpu);
......@@ -123,7 +121,7 @@ static void smp_iSeries_message_pass(int target, int msg, unsigned long data, in
(target == i) ||
((target == MSG_ALL_BUT_SELF) && (i != smp_processor_id())) ) {
set_bit( msg, &iSeries_smp_message[i] );
HvCall_sendIPI(&(xPaca[i]));
HvCall_sendIPI(&(paca[i]));
}
}
}
......@@ -134,8 +132,8 @@ static int smp_iSeries_numProcs(void)
struct ItLpPaca * lpPaca;
np = 0;
for (i=0; i < maxPacas; ++i) {
lpPaca = xPaca[i].xLpPacaPtr;
for (i=0; i < MAX_PACAS; ++i) {
lpPaca = paca[i].xLpPacaPtr;
if ( lpPaca->xDynProcStatus < 2 ) {
++np;
}
......@@ -150,11 +148,11 @@ static int smp_iSeries_probe(void)
struct ItLpPaca * lpPaca;
np = 0;
for (i=0; i < maxPacas; ++i) {
lpPaca = xPaca[i].xLpPacaPtr;
for (i=0; i < MAX_PACAS; ++i) {
lpPaca = paca[i].xLpPacaPtr;
if ( lpPaca->xDynProcStatus < 2 ) {
++np;
xPaca[i].next_jiffy_update_tb = xPaca[0].next_jiffy_update_tb;
paca[i].next_jiffy_update_tb = paca[0].next_jiffy_update_tb;
}
}
......@@ -167,10 +165,10 @@ static void smp_iSeries_kick_cpu(int nr)
struct ItLpPaca * lpPaca;
/* Verify we have a Paca for processor nr */
if ( ( nr <= 0 ) ||
( nr >= maxPacas ) )
( nr >= MAX_PACAS ) )
return;
/* Verify that our partition has a processor nr */
lpPaca = xPaca[nr].xLpPacaPtr;
lpPaca = paca[nr].xLpPacaPtr;
if ( lpPaca->xDynProcStatus >= 2 )
return;
/* The processor is currently spinning, waiting
......@@ -178,7 +176,7 @@ static void smp_iSeries_kick_cpu(int nr)
* After we set xProcStart, the processor will
* continue on to secondary_start in iSeries_head.S
*/
xPaca[nr].xProcStart = 1;
paca[nr].xProcStart = 1;
}
static void smp_iSeries_setup_cpu(int nr)
......@@ -235,7 +233,7 @@ smp_kick_cpu(int nr)
{
/* Verify we have a Paca for processor nr */
if ( ( nr <= 0 ) ||
( nr >= maxPacas ) )
( nr >= MAX_PACAS ) )
return;
/* The processor is currently spinning, waiting
......@@ -243,7 +241,7 @@ smp_kick_cpu(int nr)
* After we set xProcStart, the processor will
* continue on to secondary_start in iSeries_head.S
*/
xPaca[nr].xProcStart = 1;
paca[nr].xProcStart = 1;
}
extern struct gettimeofday_struct do_gtod;
......@@ -254,7 +252,7 @@ static void smp_space_timers( unsigned nr )
offset = tb_ticks_per_jiffy / nr;
for ( i=1; i<nr; ++i ) {
xPaca[i].next_jiffy_update_tb = xPaca[i-1].next_jiffy_update_tb + offset;
paca[i].next_jiffy_update_tb = paca[i-1].next_jiffy_update_tb + offset;
}
}
......@@ -266,7 +264,7 @@ smp_chrp_setup_cpu(int cpu_nr)
if (_machine == _MACH_pSeriesLP) {
/* timebases already synced under the hypervisor. */
xPaca[cpu_nr].next_jiffy_update_tb = tb_last_stamp = get_tb();
paca[cpu_nr].next_jiffy_update_tb = tb_last_stamp = get_tb();
if (cpu_nr == 0) {
do_gtod.tb_orig_stamp = tb_last_stamp;
/* Should update do_gtod.stamp_xsec.
......@@ -286,7 +284,7 @@ smp_chrp_setup_cpu(int cpu_nr)
mb();
frozen = 1;
set_tb(0, 0);
xPaca[0].next_jiffy_update_tb = 0;
paca[0].next_jiffy_update_tb = 0;
smp_space_timers(smp_num_cpus);
while (atomic_read(&ready) < smp_num_cpus)
barrier();
......@@ -549,7 +547,6 @@ struct thread_struct *current_set[NR_CPUS] = {&init_thread_union, 0};
void __init smp_boot_cpus(void)
{
struct Paca *paca;
int i, cpu_nr;
struct task_struct *p;
......@@ -568,9 +565,8 @@ void __init smp_boot_cpus(void)
current_thread_info()->cpu = 0;
for (i = 0; i < NR_CPUS; i++) {
paca = &xPaca[i];
paca->prof_counter = 1;
paca->prof_multiplier = 1;
paca[i].prof_counter = 1;
paca[i].prof_multiplier = 1;
if(i != 0) {
/*
* Processor 0's segment table is statically
......@@ -578,10 +574,10 @@ void __init smp_boot_cpus(void)
* Other processor's tables are created and
* initialized here.
*/
paca->xStab_data.virt = (unsigned long)&stab_array[PAGE_SIZE * (i-1)];
memset((void *)paca->xStab_data.virt, 0, PAGE_SIZE);
paca->xStab_data.real = __v2a(paca->xStab_data.virt);
paca->default_decr = tb_ticks_per_jiffy / decr_overclock;
paca[i].xStab_data.virt = (unsigned long)&stab_array[PAGE_SIZE * (i-1)];
memset((void *)paca[i].xStab_data.virt, 0, PAGE_SIZE);
paca[i].xStab_data.real = __v2a(paca[i].xStab_data.virt);
paca[i].default_decr = tb_ticks_per_jiffy / decr_overclock;
}
}
......@@ -641,7 +637,7 @@ void __init smp_boot_cpus(void)
unhash_process(p);
xPaca[i].xCurrent = (u64)p;
paca[i].xCurrent = (u64)p;
current_set[i] = p->thread_info;
/* wake up cpus */
......@@ -690,7 +686,7 @@ void __init smp_callin(void)
int cpu = smp_processor_id();
smp_store_cpu_info(cpu);
set_dec(xPaca[cpu].default_decr);
set_dec(paca[cpu].default_decr);
cpu_callin_map[cpu] = 1;
set_bit(smp_processor_id(), &cpu_online_map);
......@@ -730,7 +726,7 @@ int __init setup_profiling_timer(unsigned int multiplier)
*/
void __init smp_store_cpu_info(int id)
{
xPaca[id].pvr = _get_PVR();
paca[id].pvr = _get_PVR();
}
static int __init maxcpus(char *str)
......
arch/ppc64/kernel/stab.c
View file @ b8dd4c32
......@@ -14,8 +14,8 @@
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
#include <asm/Paca.h>
#include <asm/Naca.h>
#include <asm/paca.h>
#include <asm/naca.h>
#include <asm/pmc.h>
int make_ste(unsigned long stab,
......
arch/ppc64/kernel/time.c
View file @ b8dd4c32
......@@ -250,8 +250,8 @@ int timer_interrupt(struct pt_regs * regs)
{
int next_dec;
unsigned long cur_tb;
struct Paca * paca = (struct Paca *)mfspr(SPRG3);
unsigned long cpu = paca->xPacaIndex;
struct paca_struct *lpaca = get_paca();
unsigned long cpu = lpaca->xPacaIndex;
struct ItLpQueue * lpq;
irq_enter(cpu);
......@@ -261,16 +261,16 @@ int timer_interrupt(struct pt_regs * regs)
ppc_do_profile(instruction_pointer(regs));
#endif
paca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
lpaca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
while (paca->next_jiffy_update_tb <= (cur_tb = get_tb())) {
while (lpaca->next_jiffy_update_tb <= (cur_tb = get_tb())) {
#ifdef CONFIG_SMP
smp_local_timer_interrupt(regs);
#endif
if (cpu == 0) {
write_lock(&xtime_lock);
tb_last_stamp = paca->next_jiffy_update_tb;
tb_last_stamp = lpaca->next_jiffy_update_tb;
do_timer(regs);
timer_sync_xtime( cur_tb );
timer_check_rtc();
......@@ -278,15 +278,15 @@ int timer_interrupt(struct pt_regs * regs)
if ( adjusting_time && (time_adjust == 0) )
ppc_adjtimex();
}
paca->next_jiffy_update_tb += tb_ticks_per_jiffy;
lpaca->next_jiffy_update_tb += tb_ticks_per_jiffy;
}
next_dec = paca->next_jiffy_update_tb - cur_tb;
if (next_dec > paca->default_decr)
next_dec = paca->default_decr;
next_dec = lpaca->next_jiffy_update_tb - cur_tb;
if (next_dec > lpaca->default_decr)
next_dec = lpaca->default_decr;
set_dec(next_dec);
lpq = paca->lpQueuePtr;
lpq = lpaca->lpQueuePtr;
if (lpq && ItLpQueue_isLpIntPending(lpq))
lpEvent_count += ItLpQueue_process(lpq, regs);
......
arch/ppc64/kernel/udbg.c
View file @ b8dd4c32
......@@ -19,11 +19,10 @@
#define WANT_PPCDBG_TAB /* Only defined here */
#include <asm/ppcdebug.h>
#include <asm/processor.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
extern struct Naca *naca;
extern int _machine;
struct NS16550 {
......
arch/ppc64/kernel/xics.c
View file @ b8dd4c32
......@@ -17,14 +17,12 @@
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/smp.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/rtas.h>
#include "i8259.h"
#include "xics.h"
#include <asm/ppcdebug.h>
extern struct Naca *naca;
void xics_enable_irq(u_int irq);
void xics_disable_irq(u_int irq);
void xics_mask_and_ack_irq(u_int irq);
......
arch/ppc64/lib/checksum.S
View file @ b8dd4c32
......@@ -15,7 +15,7 @@
#include <linux/sys.h>
#include <asm/processor.h>
#include <asm/errno.h>
#include "../kernel/ppc_asm.tmpl"
#include <asm/ppc_asm.tmpl>
/*
* ip_fast_csum(r3=buf, r4=len) -- Optimized for IP header
......
arch/ppc64/lib/string.S
View file @ b8dd4c32
......@@ -8,7 +8,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include "../kernel/ppc_asm.tmpl"
#include <asm/ppc_asm.tmpl>
#include <asm/processor.h>
#include <asm/errno.h>
......
arch/ppc64/mm/init.c
View file @ b8dd4c32
......@@ -57,10 +57,8 @@
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/tlb.h>
#include <asm/Naca.h>
#ifdef CONFIG_PPC_EEH
#include <asm/naca.h>
#include <asm/eeh.h>
#endif
#include <asm/ppcdebug.h>
......@@ -85,7 +83,6 @@ extern struct _of_tce_table of_tce_table[];
extern char _start[], _end[];
extern char _stext[], etext[];
extern struct task_struct *current_set[NR_CPUS];
extern struct Naca *naca;
void mm_init_ppc64(void);
......@@ -458,7 +455,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
* Do very early mm setup.
*/
void __init mm_init_ppc64(void) {
struct Paca *paca;
struct paca_struct *lpaca;
unsigned long guard_page, index;
ppc_md.progress("MM:init", 0);
......@@ -477,8 +474,8 @@ void __init mm_init_ppc64(void) {
/* Setup guard pages for the Paca's */
for (index = 0; index < NR_CPUS; index++) {
paca = &xPaca[index];
guard_page = ((unsigned long)paca) + 0x1000;
lpaca = &paca[index];
guard_page = ((unsigned long)lpaca) + 0x1000;
ppc_md.hpte_updateboltedpp(PP_RXRX, guard_page);
}
......
arch/ppc64/xmon/xmon.c
View file @ b8dd4c32
......@@ -22,8 +22,8 @@
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
#include <asm/Naca.h>
#include <asm/Paca.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/ppcdebug.h>
#include "nonstdio.h"
#include "privinst.h"
......@@ -141,7 +141,6 @@ extern int xmon_read_poll(void);
extern int setjmp(u_int *);
extern void longjmp(u_int *, int);
extern unsigned long _ASR;
extern struct Naca *naca;
pte_t *find_linux_pte(pgd_t *pgdir, unsigned long va); /* from htab.c */
......@@ -1261,7 +1260,7 @@ super_regs()
{
int i, cmd;
unsigned long val;
struct Paca* ptrPaca = NULL;
struct paca_struct* ptrPaca = NULL;
struct ItLpPaca* ptrLpPaca = NULL;
struct ItLpRegSave* ptrLpRegSave = NULL;
......@@ -1283,7 +1282,7 @@ super_regs()
// Dump out relevant Paca data areas.
printf("Paca: \n");
ptrPaca = (struct Paca*)get_sprg3();
ptrPaca = get_paca();
printf(" Local Processor Control Area (LpPaca): \n");
ptrLpPaca = ptrPaca->xLpPacaPtr;
......
include/asm-ppc64/iSeries/HvCall.h
View file @ b8dd4c32
......@@ -35,7 +35,7 @@
#include <asm/iSeries/HvTypes.h>
#endif
#include <asm/Paca.h>
#include <asm/paca.h>
//-------------------------------------------------------------------
// Constants
......@@ -133,10 +133,9 @@ enum HvCall_VaryOffChunkRc
//=====================================================================================
static inline void HvCall_setVirtualDecr(void)
{
// Ignore any error return codes - most likely means that the target value for the
// LP has been increased and this vary off would bring us below the new target.
/* Ignore any error return codes - most likely means that the target value for the
* LP has been increased and this vary off would bring us below the new target. */
HvCall0(HvCallBaseSetVirtualDecr);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//=====================================================================
static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
......@@ -147,21 +146,18 @@ static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
{
HvCall1(HvCallBaseSetEnabledInterrupts,enabledInterrupts);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//=====================================================================
static inline void HvCall_clearLogBuffer(HvLpIndex lpindex)
{
HvCall1(HvCallBaseClearLogBuffer,lpindex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//=====================================================================
static inline u32 HvCall_getLogBufferCodePage(HvLpIndex lpindex)
{
u32 retVal = HvCall1(HvCallBaseGetLogBufferCodePage,lpindex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
......@@ -169,7 +165,6 @@ static inline u32 HvCall_getLogBufferCodePage(HvLpIndex lpindex)
static inline int HvCall_getLogBufferFormat(HvLpIndex lpindex)
{
int retVal = HvCall1(HvCallBaseGetLogBufferFormat,lpindex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
......@@ -177,7 +172,6 @@ static inline int HvCall_getLogBufferFormat(HvLpIndex lpindex)
static inline u32 HvCall_getLogBufferLength(HvLpIndex lpindex)
{
u32 retVal = HvCall1(HvCallBaseGetLogBufferLength,lpindex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
......@@ -185,7 +179,6 @@ static inline u32 HvCall_getLogBufferLength(HvLpIndex lpindex)
static inline void HvCall_setLogBufferFormatAndCodepage(int format, u32 codePage)
{
HvCall2(HvCallBaseSetLogBufferFormatAndCodePage,format, codePage);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//=====================================================================
......@@ -193,7 +186,7 @@ int HvCall_readLogBuffer(HvLpIndex lpindex, void *buffer, u64 bufLen);
void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
//=====================================================================
static inline void HvCall_sendIPI(struct Paca * targetPaca)
static inline void HvCall_sendIPI(struct paca_struct * targetPaca)
{
HvCall1( HvCallBaseSendIPI, targetPaca->xPacaIndex );
}
......
include/asm-ppc64/iSeries/HvReleaseData.h
View file @ b8dd4c32
......@@ -52,7 +52,7 @@ struct HvReleaseData
u32 xDesc; // Descriptor "HvRD" ebcdic x00-x03
u16 xSize; // Size of this control block x04-x05
u16 xVpdAreasPtrOffset; // Offset in NACA of ItVpdAreas x06-x07
struct Naca * xSlicNacaAddr; // Virtual address of SLIC NACA x08-x0F
struct naca* xSlicNacaAddr; // Virtual address of SLIC NACA x08-x0F
u32 xMsNucDataOffset; // Offset of Linux Mapping Data x10-x13
u32 xRsvd1; // Reserved x14-x17
u16 xTagsMode:1; // 0 == tags active, 1 == tags inactive
......
include/asm-ppc64/iSeries/LparData.h
View file @ b8dd4c32
......@@ -28,11 +28,11 @@
#include <asm/page.h>
#include <asm/abs_addr.h>
#include <asm/Naca.h>
#include <asm/naca.h>
#include <asm/iSeries/ItLpNaca.h>
#include <asm/iSeries/ItLpPaca.h>
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/HvReleaseData.h>
#include <asm/iSeries/LparMap.h>
#include <asm/iSeries/ItVpdAreas.h>
......@@ -42,8 +42,6 @@
#include <asm/page.h>
extern struct LparMap xLparMap;
extern struct Naca xNaca;
extern struct Paca xPaca[];
extern struct HvReleaseData hvReleaseData;
extern struct ItLpNaca itLpNaca;
extern struct ItIplParmsReal xItIplParmsReal;
......
include/asm-ppc64/mmu.h
View file @ b8dd4c32
......@@ -22,7 +22,7 @@ typedef unsigned long mm_context_t;
* Define the size of the cache used for segment table entries. The first
* entry is used as a cache pointer, therefore the actual number of entries
* stored is one less than defined here. Do not change this value without
* considering the impact it will have on the layout of the paca in Paca.h.
* considering the impact it will have on the layout of the paca in paca.h.
*/
#define STAB_CACHE_SIZE 16
......@@ -90,7 +90,7 @@ typedef struct {
} SLBE;
/*
* This structure is used in Paca.h where the layout depends on the
* This structure is used in paca.h where the layout depends on the
* size being 24B.
*/
typedef struct {
......
include/asm-ppc64/Naca.h → include/asm-ppc64/naca.h
View file @ b8dd4c32
......@@ -12,12 +12,11 @@
#include <asm/types.h>
struct Naca
{
struct naca_struct {
void *xItVpdAreas;
void *xRamDisk;
u64 xRamDiskSize; /* In pages */
struct Paca *paca; /* Ptr to an array of pacas */
struct paca_struct *paca; /* Ptr to an array of pacas */
u64 debug_switch; /* Bits to control debug printing */
u16 processorCount; /* # of physical processors */
u16 dCacheL1LineSize; /* Line size of L1 DCache in bytes */
......@@ -34,6 +33,6 @@ struct Naca
u8 resv0[6]; /* Padding */
};
extern struct Naca *naca;
extern struct naca_struct *naca;
#endif /* _NACA_H */
include/asm-ppc64/Paca.h → include/asm-ppc64/paca.h
View file @ b8dd4c32
......@@ -3,7 +3,7 @@
/*============================================================================
* Header File Id
* Name______________: Paca.H
* Name______________: paca.h
*
* Description_______:
*
......@@ -33,26 +33,26 @@
#include <asm/mmu.h>
#include <asm/processor.h>
/* A Paca entry is required for each logical processor. On systems
/* A paca entry is required for each logical processor. On systems
* that support hardware multi-threading, this is equal to twice the
* number of physical processors. On LPAR systems, we are required
* to have space for the maximum number of logical processors we
* could ever possibly have. Currently, we are limited to allocating
* 24 processors to a partition which gives 48 logical processors on
* an HMT box. Therefore, we reserve this many Paca entries.
* an HMT box. Therefore, we reserve this many paca entries.
*/
#define maxProcessors 24
#define maxPacas maxProcessors * 2
#define MAX_PROCESSORS 24
#define MAX_PACAS MAX_PROCESSORS * 2
extern struct Paca xPaca[];
#define get_paca() ((struct Paca *)mfspr(SPRG3))
extern struct paca_struct paca[];
#define get_paca() ((struct paca_struct *)mfspr(SPRG3))
/*============================================================================
* Name_______: Paca
* Name_______: paca
*
* Description:
*
* Defines the layout of the Paca.
* Defines the layout of the paca.
*
* This structure is not directly accessed by PLIC or the SP except
* for the first two pointers that point to the ItLpPaca area and the
......@@ -62,8 +62,7 @@ extern struct Paca xPaca[];
*
*============================================================================
*/
struct Paca
{
struct paca_struct {
/*=====================================================================================
* CACHE_LINE_1 0x0000 - 0x007F
*=====================================================================================
......
include/asm-ppc64/page.h
View file @ b8dd4c32
......@@ -31,7 +31,7 @@
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
#include <asm/Naca.h>
#include <asm/naca.h>
#define STRICT_MM_TYPECHECKS
......
include/asm-ppc64/pgalloc.h
View file @ b8dd4c32
......@@ -3,8 +3,6 @@
#include <linux/threads.h>
#include <asm/processor.h>
#include <asm/Naca.h>
#include <asm/Paca.h>
/*
* This program is free software; you can redistribute it and/or
......
include/asm-ppc64/ppcdebug.h
View file @ b8dd4c32
......@@ -22,7 +22,7 @@
#define PPCDBG_BITVAL(X) ((1UL)<<((unsigned long)(X)))
/* Defined below are the bit positions of various debug flags in the
* debug_switch variable (defined in Naca.h).
* debug_switch variable (defined in naca.h).
* -- When adding new values, please enter them into trace names below --
*
* Values 62 & 63 can be used to stress the hardware page table management
......
include/asm-ppc64/smp.h
View file @ b8dd4c32
......@@ -25,7 +25,7 @@
#ifndef __ASSEMBLY__
#include <asm/Paca.h>
#include <asm/paca.h>
extern unsigned long cpu_online_map;
......@@ -46,7 +46,7 @@ extern volatile unsigned long cpu_callin_map[NR_CPUS];
#define smp_processor_id() (get_paca()->xPacaIndex)
#define hard_smp_processor_id() (get_paca()->xHwProcNum)
#define get_hard_smp_processor_id(CPU) (xPaca[(CPU)].xHwProcNum)
#define get_hard_smp_processor_id(CPU) (paca[(CPU)].xHwProcNum)
......
include/asm-ppc64/time.h
View file @ b8dd4c32
/*
*
* Common time prototypes and such for all ppc machines.
*
* Written by Cort Dougan (cort@cs.nmt.edu) to merge
......@@ -19,7 +18,7 @@
#include <linux/mc146818rtc.h>
#include <asm/processor.h>
#include <asm/Paca.h>
#include <asm/paca.h>
#include <asm/iSeries/HvCall.h>
/* time.c */
......@@ -74,18 +73,17 @@ static __inline__ unsigned int get_dec(void)
static __inline__ void set_dec(int val)
{
struct Paca * paca;
struct paca_struct *lpaca = get_paca();
int cur_dec;
paca = (struct Paca *)mfspr(SPRG3);
if ( paca->xLpPaca.xSharedProc ) {
paca->xLpPaca.xVirtualDecr = val;
if ( lpaca->xLpPaca.xSharedProc ) {
lpaca->xLpPaca.xVirtualDecr = val;
cur_dec = get_dec();
if ( cur_dec > val )
HvCall_setVirtualDecr();
}
else
} else {
mtspr(SPRN_DEC, val);
}
}
extern __inline__ unsigned long tb_ticks_since(unsigned long tstamp) {
......
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