Commit b912a1c7 authored by Andrew Morton's avatar Andrew Morton Committed by Ingo Molnar

x86: arch/x86/kernel/cpu/mcheck/ checkpatch fixes

#40: FILE: arch/x86/kernel/cpu/mcheck/k7.c:46:
+				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);

WARNING: line over 80 characters
#45: FILE: arch/x86/kernel/cpu/mcheck/k7.c:50:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#45: FILE: arch/x86/kernel/cpu/mcheck/k7.c:50:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#48: FILE: arch/x86/kernel/cpu/mcheck/k7.c:52:
+			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",

WARNING: no space between function name and open parenthesis '('
#65: FILE: arch/x86/kernel/cpu/mcheck/p4.c:161:
+		printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"

WARNING: no space between function name and open parenthesis '('
#88: FILE: arch/x86/kernel/cpu/mcheck/p4.c:182:
+				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);

WARNING: line over 80 characters
#93: FILE: arch/x86/kernel/cpu/mcheck/p4.c:186:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#93: FILE: arch/x86/kernel/cpu/mcheck/p4.c:186:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#96: FILE: arch/x86/kernel/cpu/mcheck/p4.c:188:
+			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",

WARNING: no space between function name and open parenthesis '('
#120: FILE: arch/x86/kernel/cpu/mcheck/p6.c:46:
+				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);

WARNING: line over 80 characters
#125: FILE: arch/x86/kernel/cpu/mcheck/p6.c:50:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#125: FILE: arch/x86/kernel/cpu/mcheck/p6.c:50:
+				snprintf (addr, 24, " at %08x%08x", ahigh, alow);

WARNING: no space between function name and open parenthesis '('
#128: FILE: arch/x86/kernel/cpu/mcheck/p6.c:52:
+			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",

total: 0 errors, 13 warnings, 100 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Please run checkpatch prior to sending patches

Cc: Min Zhang <mzhang@mvista.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 9e8b6d90
...@@ -27,11 +27,11 @@ static void k7_machine_check(struct pt_regs * regs, long error_code) ...@@ -27,11 +27,11 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
if (mcgstl & (1<<0)) /* Recoverable ? */ if (mcgstl & (1<<0)) /* Recoverable ? */
recover=0; recover=0;
printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
smp_processor_id(), mcgsth, mcgstl); smp_processor_id(), mcgsth, mcgstl);
for (i=1; i<nr_mce_banks; i++) { for (i = 1; i < nr_mce_banks; i++) {
rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
if (high&(1<<31)) { if (high&(1<<31)) {
char misc[20]; char misc[20];
char addr[24]; char addr[24];
...@@ -42,17 +42,17 @@ static void k7_machine_check(struct pt_regs * regs, long error_code) ...@@ -42,17 +42,17 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
recover |= 2; recover |= 2;
high &= ~(1<<31); high &= ~(1<<31);
if (high & (1<<27)) { if (high & (1<<27)) {
rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
snprintf (misc, 20, "[%08x%08x]", ahigh, alow); snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
} }
if (high & (1<<26)) { if (high & (1<<26)) {
rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
snprintf (addr, 24, " at %08x%08x", ahigh, alow); snprintf(addr, 24, " at %08x%08x", ahigh, alow);
} }
printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
smp_processor_id(), i, high, low, misc, addr); smp_processor_id(), i, high, low, misc, addr);
/* Clear it */ /* Clear it */
wrmsr (MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL); wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
/* Serialize */ /* Serialize */
wmb(); wmb();
add_taint(TAINT_MACHINE_CHECK); add_taint(TAINT_MACHINE_CHECK);
......
...@@ -152,13 +152,13 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) ...@@ -152,13 +152,13 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
if (mcgstl & (1<<0)) /* Recoverable ? */ if (mcgstl & (1<<0)) /* Recoverable ? */
recover=0; recover=0;
printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
smp_processor_id(), mcgsth, mcgstl); smp_processor_id(), mcgsth, mcgstl);
if (mce_num_extended_msrs > 0) { if (mce_num_extended_msrs > 0) {
struct intel_mce_extended_msrs dbg; struct intel_mce_extended_msrs dbg;
intel_get_extended_msrs(&dbg); intel_get_extended_msrs(&dbg);
printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n" printk(KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"
"\teax: %08x ebx: %08x ecx: %08x edx: %08x\n" "\teax: %08x ebx: %08x ecx: %08x edx: %08x\n"
"\tesi: %08x edi: %08x ebp: %08x esp: %08x\n", "\tesi: %08x edi: %08x ebp: %08x esp: %08x\n",
smp_processor_id(), dbg.eip, dbg.eflags, smp_processor_id(), dbg.eip, dbg.eflags,
...@@ -166,8 +166,8 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) ...@@ -166,8 +166,8 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
dbg.esi, dbg.edi, dbg.ebp, dbg.esp); dbg.esi, dbg.edi, dbg.ebp, dbg.esp);
} }
for (i=0; i<nr_mce_banks; i++) { for (i = 0; i < nr_mce_banks; i++) {
rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
if (high & (1<<31)) { if (high & (1<<31)) {
char misc[20]; char misc[20];
char addr[24]; char addr[24];
...@@ -178,14 +178,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) ...@@ -178,14 +178,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
recover |= 2; recover |= 2;
high &= ~(1<<31); high &= ~(1<<31);
if (high & (1<<27)) { if (high & (1<<27)) {
rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
snprintf (misc, 20, "[%08x%08x]", ahigh, alow); snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
} }
if (high & (1<<26)) { if (high & (1<<26)) {
rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
snprintf (addr, 24, " at %08x%08x", ahigh, alow); snprintf(addr, 24, " at %08x%08x", ahigh, alow);
} }
printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
smp_processor_id(), i, high, low, misc, addr); smp_processor_id(), i, high, low, misc, addr);
} }
} }
......
...@@ -27,11 +27,11 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) ...@@ -27,11 +27,11 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
if (mcgstl & (1<<0)) /* Recoverable ? */ if (mcgstl & (1<<0)) /* Recoverable ? */
recover=0; recover=0;
printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
smp_processor_id(), mcgsth, mcgstl); smp_processor_id(), mcgsth, mcgstl);
for (i=0; i<nr_mce_banks; i++) { for (i = 0; i < nr_mce_banks; i++) {
rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
if (high & (1<<31)) { if (high & (1<<31)) {
char misc[20]; char misc[20];
char addr[24]; char addr[24];
...@@ -42,14 +42,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) ...@@ -42,14 +42,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
recover |= 2; recover |= 2;
high &= ~(1<<31); high &= ~(1<<31);
if (high & (1<<27)) { if (high & (1<<27)) {
rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
snprintf (misc, 20, "[%08x%08x]", ahigh, alow); snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
} }
if (high & (1<<26)) { if (high & (1<<26)) {
rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
snprintf (addr, 24, " at %08x%08x", ahigh, alow); snprintf(addr, 24, " at %08x%08x", ahigh, alow);
} }
printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
smp_processor_id(), i, high, low, misc, addr); smp_processor_id(), i, high, low, misc, addr);
} }
} }
......
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