Commit b9b627a4 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'i3c/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux

Pull i3c updates from Boris Brezillon:
 "Core changes:

   - Make i3c_bus_set_mode() static

  Driver changes:

   - Add a per-SoC data_hold_delay property to the Cadence driver

   - Fix formatting issues in the 'CADENCE I3C MASTER IP' MAINTAINERS
     entry

   - Use devm_platform_ioremap_resource() where appropriate

   - Adjust DesignWare reattach logic"

* tag 'i3c/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux:
  i3c: master: dw: reattach device on first available location of address table
  i3c: master: cdns: convert to devm_platform_ioremap_resource
  i3c: master: dw: convert to devm_platform_ioremap_resource
  MAINTAINERS: fix style in CADENCE I3C MASTER IP entry
  i3c: master: make i3c_bus_set_mode static
  i3c: master: cdns: add data hold delay support
parents 067ba54c 3952cf8f
...@@ -527,7 +527,7 @@ static const struct device_type i3c_masterdev_type = { ...@@ -527,7 +527,7 @@ static const struct device_type i3c_masterdev_type = {
.groups = i3c_masterdev_groups, .groups = i3c_masterdev_groups,
}; };
int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
unsigned long max_i2c_scl_rate) unsigned long max_i2c_scl_rate)
{ {
struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
......
...@@ -899,6 +899,22 @@ static int dw_i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, ...@@ -899,6 +899,22 @@ static int dw_i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
struct dw_i3c_i2c_dev_data *data = i3c_dev_get_master_data(dev); struct dw_i3c_i2c_dev_data *data = i3c_dev_get_master_data(dev);
struct i3c_master_controller *m = i3c_dev_get_master(dev); struct i3c_master_controller *m = i3c_dev_get_master(dev);
struct dw_i3c_master *master = to_dw_i3c_master(m); struct dw_i3c_master *master = to_dw_i3c_master(m);
int pos;
pos = dw_i3c_master_get_free_pos(master);
if (data->index > pos && pos > 0) {
writel(0,
master->regs +
DEV_ADDR_TABLE_LOC(master->datstartaddr, data->index));
master->addrs[data->index] = 0;
master->free_pos |= BIT(data->index);
data->index = pos;
master->addrs[pos] = dev->info.dyn_addr;
master->free_pos &= ~BIT(pos);
}
writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr), writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr),
master->regs + master->regs +
...@@ -1100,15 +1116,13 @@ static const struct i3c_master_controller_ops dw_mipi_i3c_ops = { ...@@ -1100,15 +1116,13 @@ static const struct i3c_master_controller_ops dw_mipi_i3c_ops = {
static int dw_i3c_probe(struct platform_device *pdev) static int dw_i3c_probe(struct platform_device *pdev)
{ {
struct dw_i3c_master *master; struct dw_i3c_master *master;
struct resource *res;
int ret, irq; int ret, irq;
master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
if (!master) if (!master)
return -ENOMEM; return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); master->regs = devm_platform_ioremap_resource(pdev, 0);
master->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(master->regs)) if (IS_ERR(master->regs))
return PTR_ERR(master->regs); return PTR_ERR(master->regs);
......
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/workqueue.h> #include <linux/workqueue.h>
#include <linux/of_device.h>
#define DEV_ID 0x0 #define DEV_ID 0x0
#define DEV_ID_I3C_MASTER 0x5034 #define DEV_ID_I3C_MASTER 0x5034
...@@ -60,6 +61,7 @@ ...@@ -60,6 +61,7 @@
#define CTRL_HALT_EN BIT(30) #define CTRL_HALT_EN BIT(30)
#define CTRL_MCS BIT(29) #define CTRL_MCS BIT(29)
#define CTRL_MCS_EN BIT(28) #define CTRL_MCS_EN BIT(28)
#define CTRL_THD_DELAY(x) (((x) << 24) & GENMASK(25, 24))
#define CTRL_HJ_DISEC BIT(8) #define CTRL_HJ_DISEC BIT(8)
#define CTRL_MST_ACK BIT(7) #define CTRL_MST_ACK BIT(7)
#define CTRL_HJ_ACK BIT(6) #define CTRL_HJ_ACK BIT(6)
...@@ -70,6 +72,7 @@ ...@@ -70,6 +72,7 @@
#define CTRL_MIXED_FAST_BUS_MODE 2 #define CTRL_MIXED_FAST_BUS_MODE 2
#define CTRL_MIXED_SLOW_BUS_MODE 3 #define CTRL_MIXED_SLOW_BUS_MODE 3
#define CTRL_BUS_MODE_MASK GENMASK(1, 0) #define CTRL_BUS_MODE_MASK GENMASK(1, 0)
#define THD_DELAY_MAX 3
#define PRESCL_CTRL0 0x14 #define PRESCL_CTRL0 0x14
#define PRESCL_CTRL0_I2C(x) ((x) << 16) #define PRESCL_CTRL0_I2C(x) ((x) << 16)
...@@ -388,6 +391,10 @@ struct cdns_i3c_xfer { ...@@ -388,6 +391,10 @@ struct cdns_i3c_xfer {
struct cdns_i3c_cmd cmds[0]; struct cdns_i3c_cmd cmds[0];
}; };
struct cdns_i3c_data {
u8 thd_delay_ns;
};
struct cdns_i3c_master { struct cdns_i3c_master {
struct work_struct hj_work; struct work_struct hj_work;
struct i3c_master_controller base; struct i3c_master_controller base;
...@@ -408,6 +415,7 @@ struct cdns_i3c_master { ...@@ -408,6 +415,7 @@ struct cdns_i3c_master {
struct clk *pclk; struct clk *pclk;
struct cdns_i3c_master_caps caps; struct cdns_i3c_master_caps caps;
unsigned long i3c_scl_lim; unsigned long i3c_scl_lim;
const struct cdns_i3c_data *devdata;
}; };
static inline struct cdns_i3c_master * static inline struct cdns_i3c_master *
...@@ -1181,6 +1189,20 @@ static int cdns_i3c_master_do_daa(struct i3c_master_controller *m) ...@@ -1181,6 +1189,20 @@ static int cdns_i3c_master_do_daa(struct i3c_master_controller *m)
return 0; return 0;
} }
static u8 cdns_i3c_master_calculate_thd_delay(struct cdns_i3c_master *master)
{
unsigned long sysclk_rate = clk_get_rate(master->sysclk);
u8 thd_delay = DIV_ROUND_UP(master->devdata->thd_delay_ns,
(NSEC_PER_SEC / sysclk_rate));
/* Every value greater than 3 is not valid. */
if (thd_delay > THD_DELAY_MAX)
thd_delay = THD_DELAY_MAX;
/* CTLR_THD_DEL value is encoded. */
return (THD_DELAY_MAX - thd_delay);
}
static int cdns_i3c_master_bus_init(struct i3c_master_controller *m) static int cdns_i3c_master_bus_init(struct i3c_master_controller *m)
{ {
struct cdns_i3c_master *master = to_cdns_i3c_master(m); struct cdns_i3c_master *master = to_cdns_i3c_master(m);
...@@ -1264,6 +1286,15 @@ static int cdns_i3c_master_bus_init(struct i3c_master_controller *m) ...@@ -1264,6 +1286,15 @@ static int cdns_i3c_master_bus_init(struct i3c_master_controller *m)
* We will issue ENTDAA afterwards from the threaded IRQ handler. * We will issue ENTDAA afterwards from the threaded IRQ handler.
*/ */
ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC | CTRL_HALT_EN | CTRL_MCS_EN; ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC | CTRL_HALT_EN | CTRL_MCS_EN;
/*
* Configure data hold delay based on device-specific data.
*
* MIPI I3C Specification 1.0 defines non-zero minimal tHD_PP timing on
* master output. This setting allows to meet this timing on master's
* SoC outputs, regardless of PCB balancing.
*/
ctrl |= CTRL_THD_DELAY(cdns_i3c_master_calculate_thd_delay(master));
writel(ctrl, master->regs + CTRL); writel(ctrl, master->regs + CTRL);
cdns_i3c_master_enable(master); cdns_i3c_master_enable(master);
...@@ -1521,10 +1552,18 @@ static void cdns_i3c_master_hj(struct work_struct *work) ...@@ -1521,10 +1552,18 @@ static void cdns_i3c_master_hj(struct work_struct *work)
i3c_master_do_daa(&master->base); i3c_master_do_daa(&master->base);
} }
static struct cdns_i3c_data cdns_i3c_devdata = {
.thd_delay_ns = 10,
};
static const struct of_device_id cdns_i3c_master_of_ids[] = {
{ .compatible = "cdns,i3c-master", .data = &cdns_i3c_devdata },
{ /* sentinel */ },
};
static int cdns_i3c_master_probe(struct platform_device *pdev) static int cdns_i3c_master_probe(struct platform_device *pdev)
{ {
struct cdns_i3c_master *master; struct cdns_i3c_master *master;
struct resource *res;
int ret, irq; int ret, irq;
u32 val; u32 val;
...@@ -1532,8 +1571,11 @@ static int cdns_i3c_master_probe(struct platform_device *pdev) ...@@ -1532,8 +1571,11 @@ static int cdns_i3c_master_probe(struct platform_device *pdev)
if (!master) if (!master)
return -ENOMEM; return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); master->devdata = of_device_get_match_data(&pdev->dev);
master->regs = devm_ioremap_resource(&pdev->dev, res); if (!master->devdata)
return -EINVAL;
master->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(master->regs)) if (IS_ERR(master->regs))
return PTR_ERR(master->regs); return PTR_ERR(master->regs);
...@@ -1631,11 +1673,6 @@ static int cdns_i3c_master_remove(struct platform_device *pdev) ...@@ -1631,11 +1673,6 @@ static int cdns_i3c_master_remove(struct platform_device *pdev)
return 0; return 0;
} }
static const struct of_device_id cdns_i3c_master_of_ids[] = {
{ .compatible = "cdns,i3c-master" },
{ /* sentinel */ },
};
static struct platform_driver cdns_i3c_master = { static struct platform_driver cdns_i3c_master = {
.probe = cdns_i3c_master_probe, .probe = cdns_i3c_master_probe,
.remove = cdns_i3c_master_remove, .remove = cdns_i3c_master_remove,
......
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