Skip to content

L
linux
Commit bb21803e authored by Simon Horman's avatar Simon Horman
Browse files
Options

ARM: dts: r8a7791: add soc node 

Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.

The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node.  To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.

This patch should not introduce any functional change.
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 5025c78b
Show whitespace changes
Inline Side-by-side
Showing with 1489 additions and 1420 deletions
arch/arm/boot/dts/r8a7791.dtsi
View file @ bb21803e
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
/ { / {
compatible = "renesas,r8a7791"; compatible = "renesas,r8a7791";
interrupt-parent = <&gic>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
...@@ -102,30 +101,17 @@ cooling-maps { ...@@ -102,30 +101,17 @@ cooling-maps {
}; };
}; };
apmu@e6152000 { soc {
compatible = "renesas,r8a7791-apmu", "renesas,apmu"; compatible = "simple-bus";
reg = <0 0xe6152000 0 0x188>; interrupt-parent = <&gic>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 { #address-cells = <2>;
compatible = "arm,gic-400"; #size-cells = <2>;
#interrupt-cells = <3>; ranges;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6050000 0 0x50>; reg = <0 0xe6050000 0 0x50>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -139,7 +125,8 @@ gpio0: gpio@e6050000 { ...@@ -139,7 +125,8 @@ gpio0: gpio@e6050000 {
}; };
gpio1: gpio@e6051000 { gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6051000 0 0x50>; reg = <0 0xe6051000 0 0x50>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -153,7 +140,8 @@ gpio1: gpio@e6051000 { ...@@ -153,7 +140,8 @@ gpio1: gpio@e6051000 {
}; };
gpio2: gpio@e6052000 { gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6052000 0 0x50>; reg = <0 0xe6052000 0 0x50>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -167,7 +155,8 @@ gpio2: gpio@e6052000 { ...@@ -167,7 +155,8 @@ gpio2: gpio@e6052000 {
}; };
gpio3: gpio@e6053000 { gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6053000 0 0x50>; reg = <0 0xe6053000 0 0x50>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -181,7 +170,8 @@ gpio3: gpio@e6053000 { ...@@ -181,7 +170,8 @@ gpio3: gpio@e6053000 {
}; };
gpio4: gpio@e6054000 { gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6054000 0 0x50>; reg = <0 0xe6054000 0 0x50>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -195,7 +185,8 @@ gpio4: gpio@e6054000 { ...@@ -195,7 +185,8 @@ gpio4: gpio@e6054000 {
}; };
gpio5: gpio@e6055000 { gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055000 0 0x50>; reg = <0 0xe6055000 0 0x50>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -209,7 +200,8 @@ gpio5: gpio@e6055000 { ...@@ -209,7 +200,8 @@ gpio5: gpio@e6055000 {
}; };
gpio6: gpio@e6055400 { gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055400 0 0x50>; reg = <0 0xe6055400 0 0x50>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -223,7 +215,8 @@ gpio6: gpio@e6055400 { ...@@ -223,7 +215,8 @@ gpio6: gpio@e6055400 {
}; };
gpio7: gpio@e6055800 { gpio7: gpio@e6055800 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055800 0 0x50>; reg = <0 0xe6055800 0 0x50>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -236,56 +229,36 @@ gpio7: gpio@e6055800 { ...@@ -236,56 +229,36 @@ gpio7: gpio@e6055800 {
resets = <&cpg 904>; resets = <&cpg 904>;
}; };
thermal: thermal@e61f0000 { pfc: pin-controller@e6060000 {
compatible = "renesas,thermal-r8a7791", compatible = "renesas,pfc-r8a7791";
"renesas,rcar-gen2-thermal", reg = <0 0xe6060000 0 0x250>;
"renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
}; };
timer { cpg: clock-controller@e6150000 {
compatible = "arm,armv7-timer"; compatible = "renesas,r8a7791-cpg-mssr";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, reg = <0 0xe6150000 0 0x1000>;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, clocks = <&extal_clk>, <&usb_extal_clk>;
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, clock-names = "extal", "usb_extal";
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; #clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
}; };
cmt0: timer@ffca0000 { apmu@e6152000 {
compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0"; compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0 0xffca0000 0 0x1004>; reg = <0 0xe6152000 0 0x188>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, cpus = <&cpu0 &cpu1>;
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
}; };
cmt1: timer@e6130000 { rst: reset-controller@e6160000 {
compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1"; compatible = "renesas,r8a7791-rst";
reg = <0 0xe6130000 0 0x1004>; reg = <0 0xe6160000 0 0x0100>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled"; sysc: system-controller@e6180000 {
compatible = "renesas,r8a7791-sysc";
reg = <0 0xe6180000 0 0x0200>;
#power-domain-cells = <1>;
}; };
irqc0: interrupt-controller@e61c0000 { irqc0: interrupt-controller@e61c0000 {
...@@ -308,166 +281,116 @@ irqc0: interrupt-controller@e61c0000 { ...@@ -308,166 +281,116 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>; resets = <&cpg 407>;
}; };
dmac0: dma-controller@e6700000 { thermal: thermal@e61f0000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,thermal-r8a7791",
reg = <0 0xe6700000 0 0x20000>; "renesas,rcar-gen2-thermal",
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH "renesas,rcar-thermal";
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 522>;
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 219>; resets = <&cpg 522>;
#dma-cells = <1>; #thermal-sensor-cells = <0>;
dma-channels = <15>;
}; };
dmac1: dma-controller@e6720000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7791",
reg = <0 0xe6720000 0 0x20000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6280000 0 0x1000>;
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
}; };
audma0: dma-controller@ec700000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7791",
reg = <0 0xec700000 0 0x10000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6290000 0 0x1000>;
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
}; };
audma1: dma-controller@ec720000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7791",
reg = <0 0xec720000 0 0x10000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6740000 0 0x1000>;
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
}; };
usb_dmac0: dma-controller@e65a0000 { ipmmu_mp: mmu@ec680000 {
compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,ipmmu-r8a7791",
reg = <0 0xe65a0000 0 0x100>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH reg = <0 0xec680000 0 0x1000>;
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1"; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 330>; status = "disabled";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
}; };
usb_dmac1: dma-controller@e65b0000 { ipmmu_mx: mmu@fe951000 {
compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,ipmmu-r8a7791",
reg = <0 0xe65b0000 0 0x100>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH reg = <0 0xfe951000 0 0x1000>;
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
interrupt-names = "ch0", "ch1"; <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 331>; #iommu-cells = <1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
}; };
/* The memory map in the User's Manual maps the cores to bus numbers */ ipmmu_rt: mmu@ffc80000 {
i2c0: i2c@e6508000 { compatible = "renesas,ipmmu-r8a7791",
#address-cells = <1>; "renesas,ipmmu-vmsa";
#size-cells = <0>; reg = <0 0xffc80000 0 0x1000>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6508000 0 0x40>; #iommu-cells = <1>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
clocks = <&cpg CPG_MOD 931>; };
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>; ipmmu_gp: mmu@e62a0000 {
compatible = "renesas,ipmmu-r8a7791",
"renesas,ipmmu-vmsa";
reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63c0000 0x1000>;
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
};
};
/* The memory map in the User's Manual maps the cores to
* bus numbers
*/
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>; i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
...@@ -475,7 +398,8 @@ i2c0: i2c@e6508000 { ...@@ -475,7 +398,8 @@ i2c0: i2c@e6508000 {
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; clocks = <&cpg CPG_MOD 930>;
...@@ -488,7 +412,8 @@ i2c1: i2c@e6518000 { ...@@ -488,7 +412,8 @@ i2c1: i2c@e6518000 {
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>; clocks = <&cpg CPG_MOD 929>;
...@@ -501,7 +426,8 @@ i2c2: i2c@e6530000 { ...@@ -501,7 +426,8 @@ i2c2: i2c@e6530000 {
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>; clocks = <&cpg CPG_MOD 928>;
...@@ -514,7 +440,8 @@ i2c3: i2c@e6540000 { ...@@ -514,7 +440,8 @@ i2c3: i2c@e6540000 {
i2c4: i2c@e6520000 { i2c4: i2c@e6520000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>; clocks = <&cpg CPG_MOD 927>;
...@@ -528,7 +455,8 @@ i2c5: i2c@e6528000 { ...@@ -528,7 +455,8 @@ i2c5: i2c@e6528000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; compatible = "renesas,i2c-r8a7791",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>; clocks = <&cpg CPG_MOD 925>;
...@@ -542,7 +470,8 @@ i2c6: i2c@e60b0000 { ...@@ -542,7 +470,8 @@ i2c6: i2c@e60b0000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", compatible = "renesas,iic-r8a7791",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic"; "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
...@@ -558,7 +487,8 @@ i2c6: i2c@e60b0000 { ...@@ -558,7 +487,8 @@ i2c6: i2c@e60b0000 {
i2c7: i2c@e6500000 { i2c7: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", compatible = "renesas,iic-r8a7791",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic"; "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
...@@ -574,7 +504,8 @@ i2c7: i2c@e6500000 { ...@@ -574,7 +504,8 @@ i2c7: i2c@e6500000 {
i2c8: i2c@e6510000 { i2c8: i2c@e6510000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", compatible = "renesas,iic-r8a7791",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic"; "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
...@@ -587,68 +518,165 @@ i2c8: i2c@e6510000 { ...@@ -587,68 +518,165 @@ i2c8: i2c@e6510000 {
status = "disabled"; status = "disabled";
}; };
pfc: pin-controller@e6060000 { hsusb: usb@e6590000 {
compatible = "renesas,pfc-r8a7791"; compatible = "renesas,usbhs-r8a7791",
reg = <0 0xe6060000 0 0x250>; "renesas,rcar-gen2-usbhs";
reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled";
}; };
mmcif0: mmc@ee200000 { usbphy: usb-phy@e6590100 {
compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif"; compatible = "renesas,usb-phy-r8a7791",
reg = <0 0xee200000 0 0x80>; "renesas,rcar-gen2-usb-phy";
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6590100 0 0x100>;
clocks = <&cpg CPG_MOD 315>; #address-cells = <1>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, #size-cells = <0>;
<&dmac1 0xd1>, <&dmac1 0xd2>; clocks = <&cpg CPG_MOD 704>;
dma-names = "tx", "rx", "tx", "rx"; clock-names = "usbhs";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 315>; resets = <&cpg 704>;
reg-io-width = <4>;
status = "disabled"; status = "disabled";
max-frequency = <97500000>;
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
}; };
sdhi0: sd@ee100000 { usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,sdhi-r8a7791", compatible = "renesas,r8a7791-usb-dmac",
"renesas,rcar-gen2-sdhi"; "renesas,usb-dmac";
reg = <0 0xee100000 0 0x328>; reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 314>; GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, interrupt-names = "ch0", "ch1";
<&dmac1 0xcd>, <&dmac1 0xce>; clocks = <&cpg CPG_MOD 330>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 314>; resets = <&cpg 330>;
status = "disabled"; #dma-cells = <1>;
dma-channels = <2>;
}; };
sdhi1: sd@ee140000 { usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,sdhi-r8a7791", compatible = "renesas,r8a7791-usb-dmac",
"renesas,rcar-gen2-sdhi"; "renesas,usb-dmac";
reg = <0 0xee140000 0 0x100>; reg = <0 0xe65b0000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 312>; GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, interrupt-names = "ch0", "ch1";
<&dmac1 0xc1>, <&dmac1 0xc2>; clocks = <&cpg CPG_MOD 331>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 312>; resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7791",
"renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 {
compatible = "renesas,dmac-r8a7791",
"renesas,rcar-dmac";
reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7791",
"renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
sdhi2: sd@ee160000 { qspi: spi@e6b10000 {
compatible = "renesas,sdhi-r8a7791", compatible = "renesas,qspi-r8a7791", "renesas,qspi";
"renesas,rcar-gen2-sdhi"; reg = <0 0xe6b10000 0 0x2c>;
reg = <0 0xee160000 0 0x100>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>;
clocks = <&cpg CPG_MOD 311>; dmas = <&dmac0 0x17>, <&dmac0 0x18>,
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0x17>, <&dmac1 0x18>;
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 311>; resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
...@@ -788,8 +816,8 @@ scifb2: serial@e6ce0000 { ...@@ -788,8 +816,8 @@ scifb2: serial@e6ce0000 {
}; };
scif0: serial@e6e60000 { scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>; reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -804,8 +832,8 @@ scif0: serial@e6e60000 { ...@@ -804,8 +832,8 @@ scif0: serial@e6e60000 {
}; };
scif1: serial@e6e68000 { scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -819,19 +847,9 @@ scif1: serial@e6e68000 { ...@@ -819,19 +847,9 @@ scif1: serial@e6e68000 {
status = "disabled"; status = "disabled";
}; };
adc: adc@e6e54000 {
compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
reg = <0 0xe6e54000 0 64>;
clocks = <&cpg CPG_MOD 901>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 901>;
status = "disabled";
};
scif2: serial@e6e58000 { scif2: serial@e6e58000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e58000 0 64>; reg = <0 0xe6e58000 0 64>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -846,8 +864,8 @@ scif2: serial@e6e58000 { ...@@ -846,8 +864,8 @@ scif2: serial@e6e58000 {
}; };
scif3: serial@e6ea8000 { scif3: serial@e6ea8000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ea8000 0 64>; reg = <0 0xe6ea8000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -862,8 +880,8 @@ scif3: serial@e6ea8000 { ...@@ -862,8 +880,8 @@ scif3: serial@e6ea8000 {
}; };
scif4: serial@e6ee0000 { scif4: serial@e6ee0000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee0000 0 64>; reg = <0 0xe6ee0000 0 64>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -878,8 +896,8 @@ scif4: serial@e6ee0000 { ...@@ -878,8 +896,8 @@ scif4: serial@e6ee0000 {
}; };
scif5: serial@e6ee8000 { scif5: serial@e6ee8000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7791",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee8000 0 64>; reg = <0 0xe6ee8000 0 64>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
...@@ -941,111 +959,94 @@ hscif2: serial@e62d0000 { ...@@ -941,111 +959,94 @@ hscif2: serial@e62d0000 {
status = "disabled"; status = "disabled";
}; };
icram0: sram@e63a0000 { msiof0: spi@e6e20000 {
compatible = "mmio-sram"; compatible = "renesas,msiof-r8a7791",
reg = <0 0xe63a0000 0 0x12000>; "renesas,rcar-gen2-msiof";
}; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
icram1: sram@e63c0000 { clocks = <&cpg CPG_MOD 000>;
compatible = "mmio-sram"; dmas = <&dmac0 0x51>, <&dmac0 0x52>,
reg = <0 0xe63c0000 0 0x1000>; <&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <0>;
ranges = <0 0 0xe63c0000 0x1000>; status = "disabled";
};
smp-sram@0 { msiof1: spi@e6e10000 {
compatible = "renesas,smp-sram"; compatible = "renesas,msiof-r8a7791",
reg = <0 0x10>; "renesas,rcar-gen2-msiof";
}; reg = <0 0xe6e10000 0 0x0064>;
}; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>;
ether: ethernet@ee700000 { dmas = <&dmac0 0x55>, <&dmac0 0x56>,
compatible = "renesas,ether-r8a7791", <&dmac1 0x55>, <&dmac1 0x56>;
"renesas,rcar-gen2-ether"; dma-names = "tx", "rx", "tx", "rx";
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 813>; resets = <&cpg 208>;
phy-mode = "rmii";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
avb: ethernet@e6800000 { msiof2: spi@e6e00000 {
compatible = "renesas,etheravb-r8a7791", compatible = "renesas,msiof-r8a7791",
"renesas,etheravb-rcar-gen2"; "renesas,rcar-gen2-msiof";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>; clocks = <&cpg CPG_MOD 205>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 812>; resets = <&cpg 205>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
sata0: sata@ee300000 { adc: adc@e6e54000 {
compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; compatible = "renesas,r8a7791-gyroadc",
reg = <0 0xee300000 0 0x2000>; "renesas,rcar-gyroadc";
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e54000 0 64>;
clocks = <&cpg CPG_MOD 815>; clocks = <&cpg CPG_MOD 901>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clock-names = "fck";
resets = <&cpg 815>;
status = "disabled";
};
sata1: sata@ee500000 {
compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
reg = <0 0xee500000 0 0x2000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 814>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 814>; resets = <&cpg 901>;
status = "disabled"; status = "disabled";
}; };
hsusb: usb@e6590000 { can0: can@e6e80000 {
compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; compatible = "renesas,can-r8a7791",
reg = <0 0xe6590000 0 0x100>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e80000 0 0x1000>;
clocks = <&cpg CPG_MOD 704>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, clocks = <&cpg CPG_MOD 916>,
<&usb_dmac1 0>, <&usb_dmac1 1>; <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
dma-names = "ch0", "ch1", "ch2", "ch3"; clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 916>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
usbphy: usb-phy@e6590100 { can1: can@e6e88000 {
compatible = "renesas,usb-phy-r8a7791", compatible = "renesas,can-r8a7791",
"renesas,rcar-gen2-usb-phy"; "renesas,rcar-gen2-can";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6e88000 0 0x1000>;
#address-cells = <1>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <0>; clocks = <&cpg CPG_MOD 915>,
clocks = <&cpg CPG_MOD 704>; <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
clock-names = "usbhs"; clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 915>;
status = "disabled"; status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
}; };
vin0: video@e6ef0000 { vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7791",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef0000 0 0x1000>; reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>; clocks = <&cpg CPG_MOD 811>;
...@@ -1055,7 +1056,8 @@ vin0: video@e6ef0000 { ...@@ -1055,7 +1056,8 @@ vin0: video@e6ef0000 {
}; };
vin1: video@e6ef1000 { vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7791",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef1000 0 0x1000>; reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>; clocks = <&cpg CPG_MOD 810>;
...@@ -1065,7 +1067,8 @@ vin1: video@e6ef1000 { ...@@ -1065,7 +1067,8 @@ vin1: video@e6ef1000 {
}; };
vin2: video@e6ef2000 { vin2: video@e6ef2000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7791",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef2000 0 0x1000>; reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>; clocks = <&cpg CPG_MOD 809>;
...@@ -1074,247 +1077,271 @@ vin2: video@e6ef2000 { ...@@ -1074,247 +1077,271 @@ vin2: video@e6ef2000 {
status = "disabled"; status = "disabled";
}; };
vsp@fe928000 { rcar_sound: sound@ec500000 {
compatible = "renesas,vsp1"; /*
reg = <0 0xfe928000 0 0x8000>; * #sound-dai-cells is required
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; *
clocks = <&cpg CPG_MOD 131>; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
resets = <&cpg 131>; */
}; compatible = "renesas,rcar_sound-r8a7791",
"renesas,rcar_sound-gen2";
vsp@fe930000 { reg = <0 0xec500000 0 0x1000>, /* SCU */
compatible = "renesas,vsp1"; <0 0xec5a0000 0 0x100>, /* ADG */
reg = <0 0xfe930000 0 0x8000>; <0 0xec540000 0 0x1000>, /* SSIU */
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; <0 0xec541000 0 0x280>, /* SSI */
clocks = <&cpg CPG_MOD 128>; <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
resets = <&cpg 128>;
};
vsp@fe938000 { clocks = <&cpg CPG_MOD 1005>,
compatible = "renesas,vsp1"; <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
reg = <0 0xfe938000 0 0x8000>; <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
clocks = <&cpg CPG_MOD 127>; <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7791_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0", "src.9", "src.8",
"src.7", "src.6", "src.5", "src.4",
"src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 127>; resets = <&cpg 1005>,
}; <&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
du: display@feb00000 {
compatible = "renesas,du-r8a7791";
reg = <0 0xfeb00000 0 0x40000>,
<0 0xfeb90000 0 0x1c>;
reg-names = "du", "lvds.0";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 726>;
clock-names = "du.0", "du.1", "lvds.0";
status = "disabled"; status = "disabled";
ports { rcar_sound,dvc {
#address-cells = <1>; dvc0: dvc-0 {
#size-cells = <0>; dmas = <&audma1 0xbc>;
dma-names = "tx";
port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
}; };
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
}; };
}; };
can0: can@e6e80000 { rcar_sound,mix {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; mix0: mix-0 { };
reg = <0 0xe6e80000 0 0x1000>; mix1: mix-1 { };
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
}; };
can1: can@e6e88000 { rcar_sound,ctu {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; ctu00: ctu-0 { };
reg = <0 0xe6e88000 0 0x1000>; ctu01: ctu-1 { };
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; ctu02: ctu-2 { };
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>, ctu03: ctu-3 { };
<&can_clk>; ctu10: ctu-4 { };
clock-names = "clkp1", "clkp2", "can_clk"; ctu11: ctu-5 { };
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; ctu12: ctu-6 { };
resets = <&cpg 915>; ctu13: ctu-7 { };
status = "disabled";
}; };
jpu: jpeg-codec@fe980000 { rcar_sound,src {
compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; src0: src-0 {
reg = <0 0xfe980000 0 0x10300>; interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x85>, <&audma1 0x9a>;
clocks = <&cpg CPG_MOD 106>; dma-names = "rx", "tx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 106>;
}; };
src1: src-1 {
/* External root clock */ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
extal_clk: extal { dmas = <&audma0 0x87>, <&audma1 0x9c>;
compatible = "fixed-clock"; dma-names = "rx", "tx";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
src2: src-2 {
/* interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
* The external audio clocks are configured as 0 Hz fixed frequency dmas = <&audma0 0x89>, <&audma1 0x9e>;
* clocks by default. dma-names = "rx", "tx";
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
audio_clk_b: audio_clk_b { src3: src-3 {
compatible = "fixed-clock"; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <0>; dmas = <&audma0 0x8b>, <&audma1 0xa0>;
clock-frequency = <0>; dma-names = "rx", "tx";
}; };
audio_clk_c: audio_clk_c { src4: src-4 {
compatible = "fixed-clock"; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <0>; dmas = <&audma0 0x8d>, <&audma1 0xb0>;
clock-frequency = <0>; dma-names = "rx", "tx";
}; };
src5: src-5 {
/* External PCIe clock - can be overridden by the board */ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
pcie_bus_clk: pcie_bus { dmas = <&audma0 0x8f>, <&audma1 0xb2>;
compatible = "fixed-clock"; dma-names = "rx", "tx";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
src6: src-6 {
/* External SCIF clock */ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
scif_clk: scif { dmas = <&audma0 0x91>, <&audma1 0xb4>;
compatible = "fixed-clock"; dma-names = "rx", "tx";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
src7: src-7 {
/* External USB clock - can be overridden by the board */ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
usb_extal_clk: usb_extal { dmas = <&audma0 0x93>, <&audma1 0xb6>;
compatible = "fixed-clock"; dma-names = "rx", "tx";
#clock-cells = <0>;
clock-frequency = <48000000>;
}; };
src8: src-8 {
/* External CAN clock */ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
can_clk: can { dmas = <&audma0 0x95>, <&audma1 0xb8>;
compatible = "fixed-clock"; dma-names = "rx", "tx";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
src9: src-9 {
cpg: clock-controller@e6150000 { interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
compatible = "renesas,r8a7791-cpg-mssr"; dmas = <&audma0 0x97>, <&audma1 0xba>;
reg = <0 0xe6150000 0 0x1000>; dma-names = "rx", "tx";
clocks = <&extal_clk>, <&usb_extal_clk>;
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
}; };
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7791-rst";
reg = <0 0xe6160000 0 0x0100>;
}; };
prr: chipid@ff000044 { rcar_sound,ssi {
compatible = "renesas,prr"; ssi0: ssi-0 {
reg = <0 0xff000044 0 4>; interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>,
<&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi1: ssi-1 {
sysc: system-controller@e6180000 { interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
compatible = "renesas,r8a7791-sysc"; dmas = <&audma0 0x03>, <&audma1 0x04>,
reg = <0 0xe6180000 0 0x0200>; <&audma0 0x49>, <&audma1 0x4a>;
#power-domain-cells = <1>; dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>,
<&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>,
<&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>,
<&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
<&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
<&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>,
<&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>,
<&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>,
<&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7791",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 000>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
msiof1: spi@e6e10000 { audma0: dma-controller@ec700000 {
compatible = "renesas,msiof-r8a7791", compatible = "renesas,dmac-r8a7791",
"renesas,rcar-gen2-msiof"; "renesas,rcar-dmac";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 208>; GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x55>, <&dmac0 0x56>, GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x55>, <&dmac1 0x56>; GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 208>; resets = <&cpg 502>;
#address-cells = <1>; #dma-cells = <1>;
#size-cells = <0>; dma-channels = <13>;
status = "disabled";
}; };
msiof2: spi@e6e00000 { audma1: dma-controller@ec720000 {
compatible = "renesas,msiof-r8a7791", compatible = "renesas,dmac-r8a7791",
"renesas,rcar-gen2-msiof"; "renesas,rcar-dmac";
reg = <0 0xe6e00000 0 0x0064>; reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 205>; GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x41>, <&dmac0 0x42>, GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x41>, <&dmac1 0x42>; GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 205>; resets = <&cpg 501>;
#address-cells = <1>; #dma-cells = <1>;
#size-cells = <0>; dma-channels = <13>;
status = "disabled";
}; };
xhci: usb@ee000000 { xhci: usb@ee000000 {
compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; compatible = "renesas,xhci-r8a7791",
"renesas,rcar-gen2-xhci";
reg = <0 0xee000000 0 0xc00>; reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>; clocks = <&cpg CPG_MOD 328>;
...@@ -1326,7 +1353,8 @@ xhci: usb@ee000000 { ...@@ -1326,7 +1353,8 @@ xhci: usb@ee000000 {
}; };
pci0: pci@ee090000 { pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; compatible = "renesas,pci-r8a7791",
"renesas,pci-rcar-gen2";
device_type = "pci"; device_type = "pci";
reg = <0 0xee090000 0 0xc00>, reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>; <0 0xee080000 0 0x1100>;
...@@ -1360,7 +1388,8 @@ usb@2,0 { ...@@ -1360,7 +1388,8 @@ usb@2,0 {
}; };
pci1: pci@ee0d0000 { pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; compatible = "renesas,pci-r8a7791",
"renesas,pci-rcar-gen2";
device_type = "pci"; device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>, reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>; <0 0xee0c0000 0 0x1100>;
...@@ -1393,276 +1422,316 @@ usb@2,0 { ...@@ -1393,276 +1422,316 @@ usb@2,0 {
}; };
}; };
pciec: pcie@fe000000 { sdhi0: sd@ee100000 {
compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; compatible = "renesas,sdhi-r8a7791",
reg = <0 0xfe000000 0 0x80000>; "renesas,rcar-gen2-sdhi";
#address-cells = <3>; reg = <0 0xee100000 0 0x328>;
#size-cells = <2>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>; clocks = <&cpg CPG_MOD 314>;
device_type = "pci"; dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 <&dmac1 0xcd>, <&dmac1 0xce>;
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 dma-names = "tx", "rx", "tx", "rx";
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 max-frequency = <195000000>;
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
/* Map all possible DDR as inbound ranges */ resets = <&cpg 314>;
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
reg = <0 0xe6280000 0 0x1000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled"; status = "disabled";
}; };
ipmmu_sy1: mmu@e6290000 { sdhi1: sd@ee140000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,sdhi-r8a7791",
reg = <0 0xe6290000 0 0x1000>; "renesas,rcar-gen2-sdhi";
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee140000 0 0x100>;
#iommu-cells = <1>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled"; status = "disabled";
}; };
ipmmu_ds: mmu@e6740000 { sdhi2: sd@ee160000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,sdhi-r8a7791",
reg = <0 0xe6740000 0 0x1000>; "renesas,rcar-gen2-sdhi";
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee160000 0 0x100>;
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled"; status = "disabled";
}; };
ipmmu_mp: mmu@ec680000 { mmcif0: mmc@ee200000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,mmcif-r8a7791",
reg = <0 0xec680000 0 0x1000>; "renesas,sh-mmcif";
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee200000 0 0x80>;
#iommu-cells = <1>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled"; status = "disabled";
max-frequency = <97500000>;
}; };
ipmmu_mx: mmu@fe951000 { sata0: sata@ee300000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,sata-r8a7791",
reg = <0 0xfe951000 0 0x1000>; "renesas,rcar-gen2-sata";
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee300000 0 0x2000>;
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 815>;
status = "disabled"; status = "disabled";
}; };
ipmmu_rt: mmu@ffc80000 { sata1: sata@ee500000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,sata-r8a7791",
reg = <0 0xffc80000 0 0x1000>; "renesas,rcar-gen2-sata";
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee500000 0 0x2000>;
#iommu-cells = <1>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 814>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 814>;
status = "disabled"; status = "disabled";
}; };
ipmmu_gp: mmu@e62a0000 { ether: ethernet@ee700000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,ether-r8a7791",
reg = <0 0xe62a0000 0 0x1000>; "renesas,rcar-gen2-ether";
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee700000 0 0x400>;
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
rcar_sound: sound@ec500000 { gic: interrupt-controller@f1001000 {
/* compatible = "arm,gic-400";
* #sound-dai-cells is required #interrupt-cells = <3>;
* #address-cells = <0>;
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; interrupt-controller;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
*/ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
compatible = "renesas,rcar_sound-r8a7791", interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
"renesas,rcar_sound-gen2"; clocks = <&cpg CPG_MOD 408>;
reg = <0 0xec500000 0 0x1000>, /* SCU */ clock-names = "clk";
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7791_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1005>, resets = <&cpg 408>;
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, };
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7791",
"renesas,pcie-rcar-gen2";
reg = <0 0xfe000000 0 0x80000>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled"; status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
};
}; };
rcar_sound,mix { vsp@fe928000 {
mix0: mix-0 { }; compatible = "renesas,vsp1";
mix1: mix-1 { }; reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 131>;
}; };
rcar_sound,ctu { vsp@fe930000 {
ctu00: ctu-0 { }; compatible = "renesas,vsp1";
ctu01: ctu-1 { }; reg = <0 0xfe930000 0 0x8000>;
ctu02: ctu-2 { }; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
ctu03: ctu-3 { }; clocks = <&cpg CPG_MOD 128>;
ctu10: ctu-4 { }; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
ctu11: ctu-5 { }; resets = <&cpg 128>;
ctu12: ctu-6 { };
ctu13: ctu-7 { };
}; };
rcar_sound,src { vsp@fe938000 {
src0: src-0 { compatible = "renesas,vsp1";
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xfe938000 0 0x8000>;
dmas = <&audma0 0x85>, <&audma1 0x9a>; interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "rx", "tx"; clocks = <&cpg CPG_MOD 127>;
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
src1: src-1 { resets = <&cpg 127>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
}; };
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; jpu: jpeg-codec@fe980000 {
dmas = <&audma0 0x8b>, <&audma1 0xa0>; compatible = "renesas,jpu-r8a7791",
dma-names = "rx", "tx"; "renesas,rcar-gen2-jpu";
reg = <0 0xfe980000 0 0x10300>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 106>;
}; };
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; du: display@feb00000 {
dmas = <&audma0 0x8d>, <&audma1 0xb0>; compatible = "renesas,du-r8a7791";
dma-names = "rx", "tx"; reg = <0 0xfeb00000 0 0x40000>,
<0 0xfeb90000 0 0x1c>;
reg-names = "du", "lvds.0";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 726>;
clock-names = "du.0", "du.1", "lvds.0";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb: endpoint {
}; };
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
}; };
src6: src-6 { port@1 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; reg = <1>;
dmas = <&audma0 0x91>, <&audma1 0xb4>; du_out_lvds0: endpoint {
dma-names = "rx", "tx";
}; };
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
}; };
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
}; };
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
}; };
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
}; };
rcar_sound,ssi { cmt0: timer@ffca0000 {
ssi0: ssi-0 { compatible = "renesas,r8a7791-cmt0",
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-cmt0";
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; reg = <0 0xffca0000 0 0x1004>;
dma-names = "rx", "tx", "rxu", "txu"; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
}; };
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; cmt1: timer@e6130000 {
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; compatible = "renesas,r8a7791-cmt1",
dma-names = "rx", "tx", "rxu", "txu"; "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
}; };
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; timer {
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; compatible = "arm,armv7-timer";
dma-names = "rx", "tx", "rxu", "txu"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
}; };
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; /* External root clock */
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; extal_clk: extal {
dma-names = "rx", "tx", "rxu", "txu"; compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; /*
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; * The external audio clocks are configured as 0 Hz fixed frequency
dma-names = "rx", "tx", "rxu", "txu"; * clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
ssi6: ssi-6 { audio_clk_b: audio_clk_b {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; compatible = "fixed-clock";
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; #clock-cells = <0>;
dma-names = "rx", "tx", "rxu", "txu"; clock-frequency = <0>;
}; };
ssi7: ssi-7 { audio_clk_c: audio_clk_c {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; compatible = "fixed-clock";
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; #clock-cells = <0>;
dma-names = "rx", "tx", "rxu", "txu"; clock-frequency = <0>;
}; };
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; /* External PCIe clock - can be overridden by the board */
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; pcie_bus_clk: pcie_bus {
dma-names = "rx", "tx", "rxu", "txu"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
}; };
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; /* External SCIF clock */
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; scif_clk: scif {
dma-names = "rx", "tx", "rxu", "txu"; compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
}; };
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
}; };
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7