Commit c04f6ca8 authored by Alexander Duyck's avatar Alexander Duyck Committed by Jeff Kirsher

ixgbe: update perfect filter framework to support retaining filters

This change is meant to update the internal framework of ixgbe so that
perfect filters can be stored and tracked via software.
Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Tested-by: default avatarRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 03ecf91a
...@@ -543,16 +543,22 @@ extern void ixgbe_alloc_rx_buffers(struct ixgbe_ring *, u16); ...@@ -543,16 +543,22 @@ extern void ixgbe_alloc_rx_buffers(struct ixgbe_ring *, u16);
extern void ixgbe_write_eitr(struct ixgbe_q_vector *); extern void ixgbe_write_eitr(struct ixgbe_q_vector *);
extern int ethtool_ioctl(struct ifreq *ifr); extern int ethtool_ioctl(struct ifreq *ifr);
extern s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw); extern s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
extern s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc); extern s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
extern s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc); extern s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
extern s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, extern s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
union ixgbe_atr_hash_dword input, union ixgbe_atr_hash_dword input,
union ixgbe_atr_hash_dword common, union ixgbe_atr_hash_dword common,
u8 queue); u8 queue);
extern s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, extern s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
union ixgbe_atr_input *input_mask);
extern s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
union ixgbe_atr_input *input, union ixgbe_atr_input *input,
struct ixgbe_atr_input_masks *input_masks,
u16 soft_id, u8 queue); u16 soft_id, u8 queue);
extern s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
union ixgbe_atr_input *input,
u16 soft_id);
extern void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
union ixgbe_atr_input *mask);
extern void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, extern void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
struct ixgbe_ring *ring); struct ixgbe_ring *ring);
extern void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter, extern void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter,
......
This diff is collapsed.
...@@ -5130,7 +5130,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) ...@@ -5130,7 +5130,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
adapter->atr_sample_rate = 20; adapter->atr_sample_rate = 20;
adapter->ring_feature[RING_F_FDIR].indices = adapter->ring_feature[RING_F_FDIR].indices =
IXGBE_MAX_FDIR_INDICES; IXGBE_MAX_FDIR_INDICES;
adapter->fdir_pballoc = 0; adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
#ifdef IXGBE_FCOE #ifdef IXGBE_FCOE
adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE; adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
......
...@@ -2056,9 +2056,10 @@ enum { ...@@ -2056,9 +2056,10 @@ enum {
#define IXGBE_VFLREC(_i) (0x00700 + (_i * 4)) #define IXGBE_VFLREC(_i) (0x00700 + (_i * 4))
enum ixgbe_fdir_pballoc_type { enum ixgbe_fdir_pballoc_type {
IXGBE_FDIR_PBALLOC_64K = 0, IXGBE_FDIR_PBALLOC_NONE = 0,
IXGBE_FDIR_PBALLOC_128K, IXGBE_FDIR_PBALLOC_64K = 1,
IXGBE_FDIR_PBALLOC_256K, IXGBE_FDIR_PBALLOC_128K = 2,
IXGBE_FDIR_PBALLOC_256K = 3,
}; };
#define IXGBE_FDIR_PBALLOC_SIZE_SHIFT 16 #define IXGBE_FDIR_PBALLOC_SIZE_SHIFT 16
...@@ -2112,7 +2113,7 @@ enum ixgbe_fdir_pballoc_type { ...@@ -2112,7 +2113,7 @@ enum ixgbe_fdir_pballoc_type {
#define IXGBE_FDIRCMD_CMD_ADD_FLOW 0x00000001 #define IXGBE_FDIRCMD_CMD_ADD_FLOW 0x00000001
#define IXGBE_FDIRCMD_CMD_REMOVE_FLOW 0x00000002 #define IXGBE_FDIRCMD_CMD_REMOVE_FLOW 0x00000002
#define IXGBE_FDIRCMD_CMD_QUERY_REM_FILT 0x00000003 #define IXGBE_FDIRCMD_CMD_QUERY_REM_FILT 0x00000003
#define IXGBE_FDIRCMD_CMD_QUERY_REM_HASH 0x00000007 #define IXGBE_FDIRCMD_FILTER_VALID 0x00000004
#define IXGBE_FDIRCMD_FILTER_UPDATE 0x00000008 #define IXGBE_FDIRCMD_FILTER_UPDATE 0x00000008
#define IXGBE_FDIRCMD_IPv6DMATCH 0x00000010 #define IXGBE_FDIRCMD_IPv6DMATCH 0x00000010
#define IXGBE_FDIRCMD_L4TYPE_UDP 0x00000020 #define IXGBE_FDIRCMD_L4TYPE_UDP 0x00000020
...@@ -2131,6 +2132,8 @@ enum ixgbe_fdir_pballoc_type { ...@@ -2131,6 +2132,8 @@ enum ixgbe_fdir_pballoc_type {
#define IXGBE_FDIR_INIT_DONE_POLL 10 #define IXGBE_FDIR_INIT_DONE_POLL 10
#define IXGBE_FDIRCMD_CMD_POLL 10 #define IXGBE_FDIRCMD_CMD_POLL 10
#define IXGBE_FDIR_DROP_QUEUE 127
/* Manageablility Host Interface defines */ /* Manageablility Host Interface defines */
#define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */ #define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
#define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */ #define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */
...@@ -2350,7 +2353,7 @@ union ixgbe_atr_input { ...@@ -2350,7 +2353,7 @@ union ixgbe_atr_input {
* src_port - 2 bytes * src_port - 2 bytes
* dst_port - 2 bytes * dst_port - 2 bytes
* flex_bytes - 2 bytes * flex_bytes - 2 bytes
* rsvd0 - 2 bytes - space reserved must be 0. * bkt_hash - 2 bytes
*/ */
struct { struct {
u8 vm_pool; u8 vm_pool;
...@@ -2361,7 +2364,7 @@ union ixgbe_atr_input { ...@@ -2361,7 +2364,7 @@ union ixgbe_atr_input {
__be16 src_port; __be16 src_port;
__be16 dst_port; __be16 dst_port;
__be16 flex_bytes; __be16 flex_bytes;
__be16 rsvd0; __be16 bkt_hash;
} formatted; } formatted;
__be32 dword_stream[11]; __be32 dword_stream[11];
}; };
...@@ -2382,16 +2385,6 @@ union ixgbe_atr_hash_dword { ...@@ -2382,16 +2385,6 @@ union ixgbe_atr_hash_dword {
__be32 dword; __be32 dword;
}; };
struct ixgbe_atr_input_masks {
__be16 rsvd0;
__be16 vlan_id_mask;
__be32 dst_ip_mask[4];
__be32 src_ip_mask[4];
__be16 src_port_mask;
__be16 dst_port_mask;
__be16 flex_mask;
};
enum ixgbe_eeprom_type { enum ixgbe_eeprom_type {
ixgbe_eeprom_uninitialized = 0, ixgbe_eeprom_uninitialized = 0,
ixgbe_eeprom_spi, ixgbe_eeprom_spi,
......
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