Commit c5e1766d authored by Jerome Brunet's avatar Jerome Brunet Committed by Ulf Hansson

mmc: meson-gx: align default phase on soc vendor tree

Align the default Core and Tx phase with the SoC vendor tree.
Even if the Tx phase is different from what the documentation
recommends, it seems to provide better results.
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 83076d22
...@@ -634,14 +634,8 @@ static int meson_mmc_clk_init(struct meson_host *host) ...@@ -634,14 +634,8 @@ static int meson_mmc_clk_init(struct meson_host *host)
if (ret) if (ret)
return ret; return ret;
/*
* Set phases : These values are mostly the datasheet recommended ones
* except for the Tx phase. Datasheet recommends 180 but some cards
* fail at initialisation with it. 270 works just fine, it fixes these
* initialisation issues and enable eMMC DDR52 mode.
*/
clk_set_phase(host->mmc_clk, 180); clk_set_phase(host->mmc_clk, 180);
clk_set_phase(host->tx_clk, 270); clk_set_phase(host->tx_clk, 0);
clk_set_phase(host->rx_clk, 0); clk_set_phase(host->rx_clk, 0);
return clk_prepare_enable(host->mmc_clk); return clk_prepare_enable(host->mmc_clk);
......
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