Commit c913fc41 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late DT updates from Arnd Bergmann:
 "These updates have been kept in a separate branch mostly because they
  rely on updates to the respective clk drivers to keep the shared
  header files in sync.

   - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
     automotive SoC similar to the ⅹ8a7795 chip we already support, but
     the dts changes rely on a clock driver change that has been merged
     for v4.9 through the clk tree.

   - The Amlogic meson-gxbb (S905) platform gains support for a few
     drivers merged through our tree, in particular the network and usb
     driver changes are required and included here, and also the clk
     tree changes.

   - The Allwinner platforms have seen a large-scale change to their clk
     drivers and the dts file updates must come after that. This
     includes the newly added Nextthing GR8 platform, which is derived
     from sun5i/A13.

   - Some integrator (arm32) changes rely on clk driver changes.

   - A single patch for lpc32xx has no such dependency but wasn't added
     until just before the merge window"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
  ARM: dts: lpc32xx: add device node for IRAM on-chip memory
  ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
  ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
  ARM: dts: sun8i: add pinmux for UART1 at PG
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
  dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
  dts: sun8i-h3: add pinmux definitions for UART2-3
  ARM: dts: sun9i: a80-optimus: Disable EHCI1
  ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
  ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
  ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
  ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
  ...
parents a439f8f2 8185041f
...@@ -49,6 +49,8 @@ Boards: ...@@ -49,6 +49,8 @@ Boards:
compatible = "renesas,genmai", "renesas,r7s72100" compatible = "renesas,genmai", "renesas,r7s72100"
- Gose - Gose
compatible = "renesas,gose", "renesas,r8a7793" compatible = "renesas,gose", "renesas,r8a7793"
- H3ULCB (RTP0RC7795SKB00010S)
compatible = "renesas,h3ulcb", "renesas,r8a7795";
- Henninger - Henninger
compatible = "renesas,henninger", "renesas,r8a7791" compatible = "renesas,henninger", "renesas,r8a7791"
- Koelsch (RTP0RC7791SEB00010S) - Koelsch (RTP0RC7791SEB00010S)
......
* Amlogic Secure Monitor
In the Amlogic SoCs the Secure Monitor code is used to provide access to the
NVMEM, enable JTAG, set USB boot, etc...
Required properties for the secure monitor node:
- compatible: Should be "amlogic,meson-gxbb-sm"
Example:
firmware {
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
};
};
* Amlogic Meson IR remote control receiver * Amlogic Meson IR remote control receiver
Required properties: Required properties:
- compatible : should be "amlogic,meson6-ir" - compatible : depending on the platform this should be one of:
- "amlogic,meson6-ir"
- "amlogic,meson8b-ir"
- "amlogic,meson-gxbb-ir"
- reg : physical base address and length of the device registers - reg : physical base address and length of the device registers
- interrupts : a single specifier for the interrupt from the device - interrupts : a single specifier for the interrupt from the device
......
* Amlogic Meson DWMAC Ethernet controller * Amlogic Meson DWMAC Ethernet controller
The device inherits all the properties of the dwmac/stmmac devices The device inherits all the properties of the dwmac/stmmac devices
described in the file net/stmmac.txt with the following changes. described in the file stmmac.txt in the current directory with the
following changes.
Required properties: Required properties on all platforms:
- compatible: should be "amlogic,meson6-dwmac" along with "snps,dwmac" - compatible: Depending on the platform this should be one of:
and any applicable more detailed version number - "amlogic,meson6-dwmac"
described in net/stmmac.txt - "amlogic,meson8b-dwmac"
- "amlogic,meson-gxbb-dwmac"
Additionally "snps,dwmac" and any applicable more
detailed version number described in net/stmmac.txt
should be used.
- reg: should contain a register range for the dwmac controller and - reg: The first register range should be the one of the DWMAC
another one for the Amlogic specific configuration controller. The second range is is for the Amlogic specific
configuration (for example the PRG_ETHERNET register range
on Meson8b and newer)
Example: Required properties on Meson8b and newer:
- clock-names: Should contain the following:
- "stmmaceth" - see stmmac.txt
- "clkin0" - first parent clock of the internal mux
- "clkin1" - second parent clock of the internal mux
Example for Meson6:
ethmac: ethernet@c9410000 { ethmac: ethernet@c9410000 {
compatible = "amlogic,meson6-dwmac", "snps,dwmac"; compatible = "amlogic,meson6-dwmac", "snps,dwmac";
...@@ -23,3 +37,18 @@ Example: ...@@ -23,3 +37,18 @@ Example:
clocks = <&clk81>; clocks = <&clk81>;
clock-names = "stmmaceth"; clock-names = "stmmaceth";
} }
Example for GXBB:
ethmac: ethernet@c9410000 {
compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000>,
<0x0 0xc8834540 0x0 0x8>;
interrupts = <0 8 1>;
interrupt-names = "macirq";
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
phy-mode = "rgmii";
status = "disabled";
};
= Amlogic eFuse device tree bindings =
Required properties:
- compatible: should be "amlogic,meson-gxbb-efuse"
= Data cells =
Are child nodes of eFuse, bindings of which as described in
bindings/nvmem/nvmem.txt
Example:
efuse: efuse {
compatible = "amlogic,meson-gxbb-efuse";
#address-cells = <1>;
#size-cells = <1>;
sn: sn@14 {
reg = <0x14 0x10>;
};
eth_mac: eth_mac@34 {
reg = <0x34 0x10>;
};
bid: bid@46 {
reg = <0x46 0x30>;
};
};
= Data consumers =
Are device nodes which consume nvmem data cells.
For example:
eth_mac {
...
nvmem-cells = <&eth_mac>;
nvmem-cell-names = "eth_mac";
};
* Amlogic USB2 PHY
Required properties:
- compatible: Depending on the platform this should be one of:
"amlogic,meson8b-usb2-phy"
"amlogic,meson-gxbb-usb2-phy"
- reg: The base address and length of the registers
- #phys-cells: should be 0 (see phy-bindings.txt in this directory)
- clocks: phandle and clock identifier for the phy clocks
- clock-names: "usb_general" and "usb"
Optional properties:
- resets: reference to the reset controller
- phy-supply: see phy-bindings.txt in this directory
Example:
usb0_phy: usb_phy@0 {
compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0x0 0x0 0x20>;
resets = <&reset RESET_USB_OTG>;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
clock-names = "usb_general", "usb";
phy-supply = <&usb_vbus>;
};
...@@ -10,6 +10,8 @@ Required properties: ...@@ -10,6 +10,8 @@ Required properties:
- "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
- "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
- "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
- "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
- "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
- snps,dwc2: A generic DWC2 USB controller with default parameters. - snps,dwc2: A generic DWC2 USB controller with default parameters.
- reg : Should contain 1 register range (address and length) - reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt - interrupts : Should contain 1 interrupt
......
...@@ -745,6 +745,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ ...@@ -745,6 +745,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-pcduino2.dtb \ sun4i-a10-pcduino2.dtb \
sun4i-a10-pov-protab2-ips9.dtb sun4i-a10-pov-protab2-ips9.dtb
dtb-$(CONFIG_MACH_SUN5I) += \ dtb-$(CONFIG_MACH_SUN5I) += \
ntc-gr8-evb.dtb \
sun5i-a10s-auxtek-t003.dtb \ sun5i-a10s-auxtek-t003.dtb \
sun5i-a10s-auxtek-t004.dtb \ sun5i-a10s-auxtek-t004.dtb \
sun5i-a10s-mk802.dtb \ sun5i-a10s-mk802.dtb \
......
...@@ -19,7 +19,7 @@ chosen { ...@@ -19,7 +19,7 @@ chosen {
bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
}; };
/* 24 MHz chrystal on the core module */ /* 24 MHz chrystal on the Integrator/AP development board */
xtal24mhz: xtal24mhz@24M { xtal24mhz: xtal24mhz@24M {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
...@@ -39,6 +39,34 @@ uartclk: uartclk@14.74M { ...@@ -39,6 +39,34 @@ uartclk: uartclk@14.74M {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <14745600>; clock-frequency = <14745600>;
clocks = <&xtal24mhz>;
};
core-module@10000000 {
/* 24 MHz chrystal on the core module */
cm24mhz: cm24mhz@24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
/* Oscillator on the core module, clocks the CPU core */
cmosc: cmosc@24M {
compatible = "arm,syscon-icst525-integratorap-cm";
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x08>;
clocks = <&cm24mhz>;
};
/* Auxilary oscillator on the core module, 32.369MHz at boot */
auxosc: auxosc@24M {
compatible = "arm,syscon-icst525";
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x1c>;
clocks = <&cm24mhz>;
};
}; };
syscon { syscon {
...@@ -47,6 +75,27 @@ syscon { ...@@ -47,6 +75,27 @@ syscon {
interrupt-parent = <&pic>; interrupt-parent = <&pic>;
/* These are the logical module IRQs */ /* These are the logical module IRQs */
interrupts = <9>, <10>, <11>, <12>; interrupts = <9>, <10>, <11>, <12>;
/*
* SYSCLK clocks PCIv3 bridge, system controller and the
* logic modules.
*/
sysclk: apsys@24M {
compatible = "arm,syscon-icst525-integratorap-sys";
#clock-cells = <0>;
lock-offset = <0x1c>;
vco-offset = <0x04>;
clocks = <&xtal24mhz>;
};
/* One-bit control for the PCI bus clock (33 or 25 MHz) */
pciclk: pciclk@24M {
compatible = "arm,syscon-icst525-integratorap-pci";
#clock-cells = <0>;
lock-offset = <0x1c>;
vco-offset = <0x04>;
clocks = <&xtal24mhz>;
};
}; };
timer0: timer@13000000 { timer0: timer@13000000 {
......
...@@ -58,20 +58,37 @@ pclk: pclk@0 { ...@@ -58,20 +58,37 @@ pclk: pclk@0 {
core-module@10000000 { core-module@10000000 {
/* 24 MHz chrystal on the core module */ /* 24 MHz chrystal on the core module */
xtal24mhz: xtal24mhz@24M { cm24mhz: cm24mhz@24M {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
/* /* Oscillator on the core module, clocks the CPU core */
* External oscillator on the core module, usually used cmcore: cmosc@24M {
* to drive video circuitry. Driven from the 24MHz clock. compatible = "arm,syscon-icst525-integratorcp-cm-core";
*/ #clock-cells = <0>;
auxosc: cm_aux_osc@25M { lock-offset = <0x14>;
vco-offset = <0x08>;
clocks = <&cm24mhz>;
};
/* Oscillator on the core module, clocks the memory bus */
cmmem: cmosc@24M {
compatible = "arm,syscon-icst525-integratorcp-cm-mem";
#clock-cells = <0>; #clock-cells = <0>;
compatible = "arm,integrator-cm-auxosc"; lock-offset = <0x14>;
clocks = <&xtal24mhz>; vco-offset = <0x08>;
clocks = <&cm24mhz>;
};
/* Auxilary oscillator on the core module, clocks the CLCD */
auxosc: auxosc@24M {
compatible = "arm,syscon-icst525";
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x1c>;
clocks = <&cm24mhz>;
}; };
/* The KMI clock is the 24 MHz oscillator divided to 8MHz */ /* The KMI clock is the 24 MHz oscillator divided to 8MHz */
...@@ -80,7 +97,7 @@ kmiclk: kmiclk@1M { ...@@ -80,7 +97,7 @@ kmiclk: kmiclk@1M {
compatible = "fixed-factor-clock"; compatible = "fixed-factor-clock";
clock-div = <3>; clock-div = <3>;
clock-mult = <1>; clock-mult = <1>;
clocks = <&xtal24mhz>; clocks = <&cm24mhz>;
}; };
/* The timer clock is the 24 MHz oscillator divided to 1MHz */ /* The timer clock is the 24 MHz oscillator divided to 1MHz */
...@@ -89,7 +106,7 @@ timclk: timclk@1M { ...@@ -89,7 +106,7 @@ timclk: timclk@1M {
compatible = "fixed-factor-clock"; compatible = "fixed-factor-clock";
clock-div = <24>; clock-div = <24>;
clock-mult = <1>; clock-mult = <1>;
clocks = <&xtal24mhz>; clocks = <&cm24mhz>;
}; };
}; };
...@@ -209,7 +226,42 @@ clcd@c0000000 { ...@@ -209,7 +226,42 @@ clcd@c0000000 {
reg = <0xC0000000 0x1000>; reg = <0xC0000000 0x1000>;
interrupts = <22>; interrupts = <22>;
clocks = <&auxosc>, <&pclk>; clocks = <&auxosc>, <&pclk>;
clock-names = "clcd", "apb_pclk"; clock-names = "clcdclk", "apb_pclk";
port {
/*
* The VGA connected is implemented with a
* THS8134A triple DAC that can be run in 24bit
* or 16bit RGB mode.
*/
clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>;
arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
};
};
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
}; };
}; };
}; };
...@@ -51,9 +51,19 @@ ahb { ...@@ -51,9 +51,19 @@ ahb {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "simple-bus"; compatible = "simple-bus";
ranges = <0x20000000 0x20000000 0x30000000>, ranges = <0x00000000 0x00000000 0x10000000>,
<0x20000000 0x20000000 0x30000000>,
<0xe0000000 0xe0000000 0x04000000>; <0xe0000000 0xe0000000 0x04000000>;
iram: sram@08000000 {
compatible = "mmio-sram";
reg = <0x08000000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x08000000 0x20000>;
};
/* /*
* Enable either SLC or MLC * Enable either SLC or MLC
*/ */
......
/*
* Copyright 2016 Free Electrons
* Copyright 2016 NextThing Co
*
* Mylène Josserand <mylene.josserand@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "ntc-gr8.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "NextThing GR8-EVB";
compatible = "nextthing,gr8-evb", "nextthing,gr8";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
serial0 = &uart1;
serial1 = &uart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 10000 0>;
enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
};
};
&be0 {
status = "okay";
};
&codec {
status = "okay";
};
&ehci0 {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic@34 {
reg = <0x34>;
/*
* The interrupt is routed through the "External Fast
* Interrupt Request" pin (ball G13 of the module)
* directly to the main interrupt controller, without
* any other controller interfering.
*/
interrupts = <0>;
};
};
#include "axp209.dtsi"
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
wm8978: codec@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8978";
reg = <0x1a>;
};
pcf8563: rtc@51 {
compatible = "phg,pcf8563";
reg = <0x51>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
};
&i2s0 {
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;
status = "okay";
};
&ir0 {
pinctrl-names = "default";
pinctrl-0 = <&ir0_rx_pins_a>;
status = "okay";
};
&lradc {
vref-supply = <&reg_ldo2>;
status = "okay";
button@190 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <190000>;
};
button@390 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <390000>;
};
button@600 {
label = "Menu";
linux,code = <KEY_MENU>;
channel = <0>;
voltage = <600000>;
};
button@800 {
label = "Search";
linux,code = <KEY_SEARCH>;
channel = <0>;
voltage = <800000>;
};
button@980 {
label = "Home";
linux,code = <KEY_HOMEPAGE>;
channel = <0>;
voltage = <980000>;
};
button@1180 {
label = "Esc";
linux,code = <KEY_ESC>;
channel = <0>;
voltage = <1180000>;
};
button@1400 {
label = "Enter";
linux,code = <KEY_ENTER>;
channel = <0>;
voltage = <1400000>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gr8_evb>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
cd-inverted;
status = "okay";
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
/* MLC Support sucks for now */
status = "disabled";
};
&ohci0 {
status = "okay";
};
&otg_sram {
status = "okay";
};
&pio {
mmc0_cd_pin_gr8_evb: mmc0-cd-pin@0 {
allwinner,pins = "PG0";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_pin_gr8_evb: usb0-id-pin@0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_det_pin_gr8_evb: usb0-vbus-det-pin@0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_gr8_evb: usb1-vbus-pin@0 {
allwinner,pins = "PG13";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>;
status = "okay";
};
&reg_dcdc2 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
regulator-always-on;
};
&reg_dcdc3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-sys";
regulator-always-on;
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "avcc";
regulator-always-on;
};
&reg_usb1_vbus {
pinctrl-0 = <&usb1_vbus_pin_gr8_evb>;
gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&rtp {
allwinner,ts-attached;
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pins_a>;
status = "okay";
};
&tve0 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
status = "okay";
};
&usb_otg {
/*
* The GR8-EVB has a somewhat interesting design. There's a
* pin supposed to control VBUS, an ID pin, a VBUS detect pin,
* so everything should work just fine.
*
* Except that the pin supposed to control VBUS is not
* connected to any controllable output, neither to the SoC
* through a GPIO or to the PMIC, and it is pulled down,
* meaning that we will never be able to enable VBUS on this
* board.
*/
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_pin_gr8_evb>, <&usb0_vbus_det_pin_gr8_evb>;
usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
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...@@ -53,6 +53,15 @@ &ehci0 { ...@@ -53,6 +53,15 @@ &ehci0 {
status = "okay"; status = "okay";
}; };
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl3675";
firmware-name = "gsl3675-gt90h.fw";
touchscreen-size-x = <1792>;
touchscreen-size-y = <1024>;
status = "okay";
};
&lradc { &lradc {
button@600 { button@600 {
label = "Back"; label = "Back";
......
...@@ -53,6 +53,15 @@ &ehci0 { ...@@ -53,6 +53,15 @@ &ehci0 {
status = "okay"; status = "okay";
}; };
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl1680";
firmware-name = "gsl1680-inet86dz.fw";
touchscreen-size-x = <960>;
touchscreen-size-y = <640>;
status = "okay";
};
&usbphy { &usbphy {
usb1_vbus-supply = <&reg_dldo1>; usb1_vbus-supply = <&reg_dldo1>;
}; };
...@@ -62,6 +62,13 @@ wifi_pwrseq: wifi_pwrseq { ...@@ -62,6 +62,13 @@ wifi_pwrseq: wifi_pwrseq {
}; };
}; };
&i2c1 {
mma7660: accelerometer@4c {
reg = <0x4c>;
compatible = "fsl,mma7660";
};
};
&mmc1 { &mmc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>; pinctrl-0 = <&mmc1_pins_a>;
...@@ -90,3 +97,22 @@ wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 { ...@@ -90,3 +97,22 @@ wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
}; };
&reg_ldo_io1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-touchscreen";
status = "okay";
};
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl1680";
firmware-name = "gsl1680-polaroid-mid2407pxe03.fw";
touchscreen-size-x = <960>;
touchscreen-size-y = <640>;
touchscreen-inverted-x;
touchscreen-inverted-y;
vddio-supply = <&reg_ldo_io1>;
status = "okay";
};
...@@ -90,3 +90,12 @@ wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 { ...@@ -90,3 +90,12 @@ wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
}; };
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl3670";
firmware-name = "gsl3670-polaroid-mid2809pxe04.fw";
touchscreen-size-x = <1660>;
touchscreen-size-y = <890>;
status = "okay";
};
...@@ -48,74 +48,10 @@ / { ...@@ -48,74 +48,10 @@ / {
memory { memory {
reg = <0x40000000 0x40000000>; reg = <0x40000000 0x40000000>;
}; };
};
clocks { &ccu {
ahb1_gates: clk@01c20060 { compatible = "allwinner,sun8i-a23-ccu";
#clock-cells = <1>;
compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
reg = <0x01c20060 0x8>;
clocks = <&ahb1>;
clock-indices = <1>, <6>,
<8>, <9>, <10>,
<13>, <14>,
<19>, <20>,
<21>, <24>, <26>,
<29>, <32>, <36>,
<40>, <44>, <46>,
<52>, <53>,
<54>, <57>;
clock-output-names = "ahb1_mipidsi", "ahb1_dma",
"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
"ahb1_nand", "ahb1_sdram",
"ahb1_hstimer", "ahb1_spi0",
"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
"ahb1_csi", "ahb1_be", "ahb1_fe",
"ahb1_gpu", "ahb1_msgbox",
"ahb1_spinlock", "ahb1_drc";
};
mbus_clk: clk@01c2015c {
#clock-cells = <0>;
compatible = "allwinner,sun8i-a23-mbus-clk";
reg = <0x01c2015c 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5>;
clock-output-names = "mbus";
};
};
soc@01c00000 {
usb_otg: usb@01c19000 {
compatible = "allwinner,sun6i-a31-musb";
reg = <0x01c19000 0x0400>;
clocks = <&ahb1_gates 24>;
resets = <&ahb1_rst 24>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
status = "disabled";
};
usbphy: phy@01c19400 {
compatible = "allwinner,sun8i-a23-usb-phy";
reg = <0x01c19400 0x10>,
<0x01c1a800 0x4>;
reg-names = "phy_ctrl",
"pmu1";
clocks = <&usb_clk 8>,
<&usb_clk 9>;
clock-names = "usb0_phy",
"usb1_phy";
resets = <&usb_clk 0>,
<&usb_clk 1>;
reset-names = "usb0_reset",
"usb1_reset";
status = "disabled";
#phy-cells = <1>;
};
};
}; };
&pio { &pio {
...@@ -124,3 +60,13 @@ &pio { ...@@ -124,3 +60,13 @@ &pio {
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
}; };
&usb_otg {
compatible = "allwinner,sun6i-a31-musb";
};
&usbphy {
compatible = "allwinner,sun8i-a23-usb-phy";
reg = <0x01c19400 0x10>, <0x01c1a800 0x4>;
reg-names = "phy_ctrl", "pmu1";
};
...@@ -58,6 +58,16 @@ &ehci0 { ...@@ -58,6 +58,16 @@ &ehci0 {
status = "okay"; status = "okay";
}; };
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl3675";
firmware-name = "gsl3675-ga10h.fw";
touchscreen-size-x = <1630>;
touchscreen-size-y = <990>;
touchscreen-inverted-y;
status = "okay";
};
&lradc { &lradc {
button@600 { button@600 {
label = "Back"; label = "Back";
......
...@@ -49,6 +49,15 @@ / { ...@@ -49,6 +49,15 @@ / {
model = "INet-D978 Rev 02"; model = "INet-D978 Rev 02";
compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33"; compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33";
aliases {
serial0 = &uart1;
};
chosen {
/* Delete debug UART as serial0 is the UART for bluetooth */
/delete-property/stdout-path;
};
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -86,3 +95,14 @@ led_pin_d978: led_pin_d978@0 { ...@@ -86,3 +95,14 @@ led_pin_d978: led_pin_d978@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
}; };
&r_uart {
status = "disabled";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>,
<&uart1_pins_cts_rts_a>;
status = "okay";
};
...@@ -59,105 +59,177 @@ cpu@3 { ...@@ -59,105 +59,177 @@ cpu@3 {
}; };
}; };
de: display-engine {
compatible = "allwinner,sun8i-a33-display-engine";
allwinner,pipelines = <&fe0>;
status = "disabled";
};
memory { memory {
reg = <0x40000000 0x80000000>; reg = <0x40000000 0x80000000>;
}; };
clocks { soc@01c00000 {
/* Dummy clock for pll11 (DDR1) until actually implemented */ tcon0: lcd-controller@01c0c000 {
pll11: pll11_clk { compatible = "allwinner,sun8i-a33-tcon";
#clock-cells = <0>; reg = <0x01c0c000 0x1000>;
compatible = "fixed-clock"; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; clocks = <&ccu CLK_BUS_LCD>,
clock-output-names = "pll11"; <&ccu CLK_LCD_CH0>;
}; clock-names = "ahb",
"tcon-ch0";
ahb1_gates: clk@01c20060 { clock-output-names = "tcon-pixel-clock";
#clock-cells = <1>; resets = <&ccu RST_BUS_LCD>;
compatible = "allwinner,sun8i-a33-ahb1-gates-clk"; reset-names = "lcd";
reg = <0x01c20060 0x8>; status = "disabled";
clocks = <&ahb1>;
clock-indices = <1>, <5>, ports {
<6>, <8>, <9>, #address-cells = <1>;
<10>, <13>, <14>, #size-cells = <0>;
<19>, <20>,
<21>, <24>, <26>, tcon0_in: port@0 {
<29>, <32>, <36>, #address-cells = <1>;
<40>, <44>, <46>, #size-cells = <0>;
<52>, <53>, reg = <0>;
<54>, <57>,
<58>; tcon0_in_drc0: endpoint@0 {
clock-output-names = "ahb1_mipidsi", "ahb1_ss", reg = <0>;
"ahb1_dma","ahb1_mmc0", "ahb1_mmc1", remote-endpoint = <&drc0_out_tcon0>;
"ahb1_mmc2", "ahb1_nand", "ahb1_sdram", };
"ahb1_hstimer", "ahb1_spi0", };
"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
"ahb1_ohci", "ahb1_ve", "ahb1_lcd", tcon0_out: port@1 {
"ahb1_csi", "ahb1_be", "ahb1_fe", #address-cells = <1>;
"ahb1_gpu", "ahb1_msgbox", #size-cells = <0>;
"ahb1_spinlock", "ahb1_drc", reg = <1>;
"ahb1_sat"; };
};
ss_clk: clk@01c2009c {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01c2009c 0x4>;
clocks = <&osc24M>, <&pll6 0>;
clock-output-names = "ss";
};
mbus_clk: clk@01c2015c {
#clock-cells = <0>;
compatible = "allwinner,sun8i-a23-mbus-clk";
reg = <0x01c2015c 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>;
clock-output-names = "mbus";
}; };
}; };
soc@01c00000 {
crypto: crypto-engine@01c15000 { crypto: crypto-engine@01c15000 {
compatible = "allwinner,sun4i-a10-crypto"; compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>; reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ahb1_gates 5>, <&ss_clk>; clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
clock-names = "ahb", "mod"; clock-names = "ahb", "mod";
resets = <&ahb1_rst 5>; resets = <&ccu RST_BUS_SS>;
reset-names = "ahb"; reset-names = "ahb";
}; };
usb_otg: usb@01c19000 { fe0: display-frontend@01e00000 {
compatible = "allwinner,sun8i-a33-musb"; compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01c19000 0x0400>; reg = <0x01e00000 0x20000>;
clocks = <&ahb1_gates 24>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ahb1_rst 24>; clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; <&ccu CLK_DRAM_DE_FE>;
interrupt-names = "mc"; clock-names = "ahb", "mod",
phys = <&usbphy 0>; "ram";
phy-names = "usb"; resets = <&ccu RST_BUS_DE_FE>;
extcon = <&usbphy 0>;
status = "disabled"; status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
}; };
usbphy: phy@01c19400 { be0: display-backend@01e60000 {
compatible = "allwinner,sun8i-a33-usb-phy"; compatible = "allwinner,sun8i-a33-display-backend";
reg = <0x01c19400 0x14>, reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
<0x01c1a800 0x4>; reg-names = "be", "sat";
reg-names = "phy_ctrl", interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
"pmu1"; clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
clocks = <&usb_clk 8>, <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
<&usb_clk 9>; clock-names = "ahb", "mod",
clock-names = "usb0_phy", "ram", "sat";
"usb1_phy"; resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
resets = <&usb_clk 0>, reset-names = "be", "sat";
<&usb_clk 1>; assigned-clocks = <&ccu CLK_DE_BE>;
reset-names = "usb0_reset", assigned-clock-rates = <300000000>;
"usb1_reset";
status = "disabled"; ports {
#phy-cells = <1>; #address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
}; };
}; };
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_drc0: endpoint@0 {
reg = <0>;
remote-endpoint = <&drc0_in_be0>;
};
};
};
};
drc0: drc@01e70000 {
compatible = "allwinner,sun8i-a33-drc";
reg = <0x01e70000 0x10000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>,
<&ccu CLK_DRAM_DRC>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_DRC>;
assigned-clocks = <&ccu CLK_DRC>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
drc0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
drc0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_drc0>;
};
};
drc0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
drc0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_drc0>;
};
};
};
};
};
};
&ccu {
compatible = "allwinner,sun8i-a33-ccu";
}; };
&pio { &pio {
...@@ -173,3 +245,13 @@ uart0_pins_b: uart0@1 { ...@@ -173,3 +245,13 @@ uart0_pins_b: uart0@1 {
}; };
}; };
&usb_otg {
compatible = "allwinner,sun8i-a33-musb";
};
&usbphy {
compatible = "allwinner,sun8i-a33-usb-phy";
reg = <0x01c19400 0x14>, <0x01c1a800 0x4>;
reg-names = "phy_ctrl", "pmu1";
};
...@@ -185,7 +185,7 @@ &uart0 { ...@@ -185,7 +185,7 @@ &uart0 {
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>; pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay"; status = "okay";
}; };
......
...@@ -186,6 +186,24 @@ &uart0 { ...@@ -186,6 +186,24 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
&usb1_vbus_pin_a { &usb1_vbus_pin_a {
allwinner,pins = "PG13"; allwinner,pins = "PG13";
}; };
......
...@@ -139,6 +139,24 @@ &uart0 { ...@@ -139,6 +139,24 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
&usbphy { &usbphy {
/* USB VBUS is always on */ /* USB VBUS is always on */
status = "okay"; status = "okay";
......
...@@ -161,6 +161,24 @@ &uart0 { ...@@ -161,6 +161,24 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
&usbphy { &usbphy {
/* USB VBUS is always on */ /* USB VBUS is always on */
status = "okay"; status = "okay";
......
...@@ -327,6 +327,27 @@ pio: pinctrl@01c20800 { ...@@ -327,6 +327,27 @@ pio: pinctrl@01c20800 {
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
i2c0_pins: i2c0 {
allwinner,pins = "PA11", "PA12";
allwinner,function = "i2c0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins: i2c1 {
allwinner,pins = "PA18", "PA19";
allwinner,function = "i2c1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins: i2c2 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0@0 { mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3", allwinner,pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5"; "PF4", "PF5";
...@@ -367,12 +388,33 @@ uart0_pins_a: uart0@0 { ...@@ -367,12 +388,33 @@ uart0_pins_a: uart0@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
uart1_pins_a: uart1@0 { uart1_pins: uart1 {
allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,pins = "PG6", "PG7";
allwinner,function = "uart1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1"; allwinner,function = "uart1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
uart2_pins: uart2 {
allwinner,pins = "PA0", "PA1";
allwinner,function = "uart2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins: uart3 {
allwinner,pins = "PG13", "PG14";
allwinner,function = "uart3";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
}; };
timer@01c20c00 { timer@01c20c00 {
...@@ -449,6 +491,45 @@ uart3: serial@01c28c00 { ...@@ -449,6 +491,45 @@ uart3: serial@01c28c00 {
status = "disabled"; status = "disabled";
}; };
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C0>;
resets = <&ccu RST_BUS_I2C0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@01c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C1>;
resets = <&ccu RST_BUS_I2C1>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@01c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>;
resets = <&ccu RST_BUS_I2C2>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
gic: interrupt-controller@01c81000 { gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>, reg = <0x01c81000 0x1000>,
......
...@@ -253,6 +253,122 @@ reg_ldo_io1: ldo_io1 { ...@@ -253,6 +253,122 @@ reg_ldo_io1: ldo_io1 {
reg_rtc_ldo: rtc_ldo { reg_rtc_ldo: rtc_ldo {
regulator-name = "vcc-rtc-vdd1v8-io"; regulator-name = "vcc-rtc-vdd1v8-io";
}; };
sw {
/* unused */
};
};
};
axp806: pmic@745 {
compatible = "x-powers,axp806";
reg = <0x745>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
bldoin-supply = <&reg_dcdce>;
regulators {
reg_s_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
aldo2 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo2";
};
aldo3 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo3";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name = "vcc18-efuse-adc-display-csi";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name =
"vdd18-drampll-vcc18-pll-cpvdd";
};
bldo3 {
/* unused */
};
reg_bldo4: bldo4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vcc12-hsic";
};
reg_cldo1: cldo1 {
/*
* This was 3V in the original design, but
* 3.3V is the recommended supply voltage
* for the Ethernet PHY.
*/
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-gmac-phy";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-cam";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-io-wifi-codec-io2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-vpu";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
regulator-name = "vcc-bldo-codec-ldoin";
};
sw {
/*
* unused, but use a different name to
* avoid name clash with axp809's sw
*/
regulator-name = "s_sw";
};
}; };
}; };
......
...@@ -112,7 +112,8 @@ &ehci0 { ...@@ -112,7 +112,8 @@ &ehci0 {
}; };
&ehci1 { &ehci1 {
status = "okay"; /* Enable if HSIC peripheral is connected */
status = "disabled";
}; };
&ehci2 { &ehci2 {
...@@ -325,6 +326,122 @@ reg_ldo_io1: ldo_io1 { ...@@ -325,6 +326,122 @@ reg_ldo_io1: ldo_io1 {
reg_rtc_ldo: rtc_ldo { reg_rtc_ldo: rtc_ldo {
regulator-name = "vcc-rtc-vdd1v8-io"; regulator-name = "vcc-rtc-vdd1v8-io";
}; };
sw {
/* unused */
};
};
};
axp806: pmic@745 {
compatible = "x-powers,axp806";
reg = <0x745>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
bldoin-supply = <&reg_dcdce>;
regulators {
reg_s_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
aldo2 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo2";
};
aldo3 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo3";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name = "vcc18-efuse-adc-display-csi";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name =
"vdd18-drampll-vcc18-pll-cpvdd";
};
bldo3 {
/* unused */
};
reg_bldo4: bldo4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vcc12-hsic";
};
reg_cldo1: cldo1 {
/*
* This was 3V in the original design, but
* 3.3V is the recommended supply voltage
* for the Ethernet PHY.
*/
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-gmac-phy";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-cam";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-io-wifi-codec-io2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-vpu";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
regulator-name = "vcc-bldo-codec-ldoin";
};
sw {
/*
* unused, but use a different name to
* avoid name clash with axp809's sw
*/
regulator-name = "s_sw";
};
}; };
}; };
...@@ -367,7 +484,9 @@ &usbphy1 { ...@@ -367,7 +484,9 @@ &usbphy1 {
}; };
&usbphy2 { &usbphy2 {
status = "okay"; phy-supply = <&reg_bldo4>;
/* Enable if HSIC peripheral is connected */
status = "disabled";
}; };
&usbphy3 { &usbphy3 {
......
...@@ -17,33 +17,19 @@ ...@@ -17,33 +17,19 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <linux/types.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/list.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/syscore_ops.h> #include <linux/syscore_ops.h>
#include <linux/amba/bus.h> #include <linux/amba/bus.h>
#include <linux/amba/kmi.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irqchip.h> #include <linux/irqchip.h>
#include <linux/platform_data/clk-integrator.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/stat.h>
#include <linux/termios.h> #include <linux/termios.h>
#include <asm/setup.h>
#include <asm/param.h> /* HZ */
#include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <asm/mach/time.h>
#include "hardware.h" #include "hardware.h"
#include "cm.h" #include "cm.h"
...@@ -68,14 +54,8 @@ static void __iomem *ebi_base; ...@@ -68,14 +54,8 @@ static void __iomem *ebi_base;
/* /*
* Logical Physical * Logical Physical
* ef000000 Cache flush
* f1100000 11000000 System controller registers
* f1300000 13000000 Counter/Timer
* f1400000 14000000 Interrupt controller * f1400000 14000000 Interrupt controller
* f1600000 16000000 UART 0 * f1600000 16000000 UART 0
* f1700000 17000000 UART 1
* f1a00000 1a000000 Debug LEDs
* f1b00000 1b000000 GPIO
*/ */
static struct map_desc ap_io_desc[] __initdata __maybe_unused = { static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
...@@ -89,16 +69,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = { ...@@ -89,16 +69,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE), .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE .type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_AP_GPIO_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),
.length = SZ_4K,
.type = MT_DEVICE
} }
}; };
...@@ -196,16 +166,10 @@ static void __init ap_init_irq_of(void) ...@@ -196,16 +166,10 @@ static void __init ap_init_irq_of(void)
/* For the Device Tree, add in the UART callbacks as AUXDATA */ /* For the Device Tree, add in the UART callbacks as AUXDATA */
static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
"rtc", NULL),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
"uart0", &ap_uart_data), "uart0", &ap_uart_data),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
"uart1", &ap_uart_data), "uart1", &ap_uart_data),
OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
"kmi0", NULL),
OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
"kmi1", NULL),
{ /* sentinel */ }, { /* sentinel */ },
}; };
......
...@@ -7,67 +7,40 @@ ...@@ -7,67 +7,40 @@
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License. * the Free Software Foundation; either version 2 of the License.
*/ */
#include <linux/types.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/string.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/kmi.h>
#include <linux/amba/clcd.h>
#include <linux/platform_data/video-clcd-versatile.h>
#include <linux/amba/mmci.h> #include <linux/amba/mmci.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irqchip.h> #include <linux/irqchip.h>
#include <linux/gfp.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/sched_clock.h> #include <linux/sched_clock.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <asm/mach/time.h>
#include "hardware.h" #include "hardware.h"
#include "cm.h" #include "cm.h"
#include "common.h" #include "common.h"
/* Base address to the core module header */
static struct regmap *cm_map;
/* Base address to the CP controller */ /* Base address to the CP controller */
static void __iomem *intcp_con_base; static void __iomem *intcp_con_base;
#define INTCP_PA_CLCD_BASE 0xc0000000 #define CM_COUNTER_OFFSET 0x28
/* /*
* Logical Physical * Logical Physical
* f1000000 10000000 Core module registers
* f1300000 13000000 Counter/Timer
* f1400000 14000000 Interrupt controller * f1400000 14000000 Interrupt controller
* f1600000 16000000 UART 0 * f1600000 16000000 UART 0
* f1700000 17000000 UART 1
* f1a00000 1a000000 Debug LEDs
* fc900000 c9000000 GPIO
* fca00000 ca000000 SIC * fca00000 ca000000 SIC
*/ */
static struct map_desc intcp_io_desc[] __initdata __maybe_unused = { static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
{ {
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_IC_BASE), .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
.length = SZ_4K, .length = SZ_4K,
...@@ -77,16 +50,6 @@ static struct map_desc intcp_io_desc[] __initdata __maybe_unused = { ...@@ -77,16 +50,6 @@ static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE), .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE .type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, { }, {
.virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE), .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE), .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
...@@ -121,66 +84,20 @@ static struct mmci_platform_data mmc_data = { ...@@ -121,66 +84,20 @@ static struct mmci_platform_data mmc_data = {
.gpio_cd = -1, .gpio_cd = -1,
}; };
/*
* CLCD support
*/
/*
* Ensure VGA is selected.
*/
static void cp_clcd_enable(struct clcd_fb *fb)
{
struct fb_var_screeninfo *var = &fb->fb.var;
u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2
| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;
if (var->bits_per_pixel <= 8 ||
(var->bits_per_pixel == 16 && var->green.length == 5))
/* Pseudocolor, RGB555, BGR555 */
val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
else if (fb->fb.var.bits_per_pixel <= 16)
/* truecolor RGB565 */
val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
else
val = 0; /* no idea for this, don't trust the docs */
cm_control(CM_CTRL_LCDMUXSEL_MASK|
CM_CTRL_LCDEN0|
CM_CTRL_LCDEN1|
CM_CTRL_STATIC1|
CM_CTRL_STATIC2|
CM_CTRL_STATIC|
CM_CTRL_n24BITEN, val);
}
static int cp_clcd_setup(struct clcd_fb *fb)
{
fb->panel = versatile_clcd_get_panel("VGA");
if (!fb->panel)
return -EINVAL;
return versatile_clcd_setup_dma(fb, SZ_1M);
}
static struct clcd_board clcd_data = {
.name = "Integrator/CP",
.caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
.check = clcdfb_check,
.decode = clcdfb_decode,
.enable = cp_clcd_enable,
.setup = cp_clcd_setup,
.mmap = versatile_clcd_mmap_dma,
.remove = versatile_clcd_remove_dma,
};
#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
static u64 notrace intcp_read_sched_clock(void) static u64 notrace intcp_read_sched_clock(void)
{ {
return readl(REFCOUNTER); unsigned int val;
/* MMIO so discard return code */
regmap_read(cm_map, CM_COUNTER_OFFSET, &val);
return val;
} }
static void __init intcp_init_early(void) static void __init intcp_init_early(void)
{ {
cm_map = syscon_regmap_lookup_by_compatible("arm,core-module-integrator");
if (IS_ERR(cm_map))
return;
sched_clock_register(intcp_read_sched_clock, 32, 24000000); sched_clock_register(intcp_read_sched_clock, 32, 24000000);
} }
...@@ -195,22 +112,8 @@ static void __init intcp_init_irq_of(void) ...@@ -195,22 +112,8 @@ static void __init intcp_init_irq_of(void)
* and enforce the bus names since these are used for clock lookups. * and enforce the bus names since these are used for clock lookups.
*/ */
static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
"rtc", NULL),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
"uart0", NULL),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
"uart1", NULL),
OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
"kmi0", NULL),
OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
"kmi1", NULL),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE, OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
"mmci", &mmc_data), "mmci", &mmc_data),
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
"aaci", &mmc_data),
OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
"clcd", &clcd_data),
{ /* sentinel */ }, { /* sentinel */ },
}; };
......
...@@ -87,3 +87,14 @@ &ethmac { ...@@ -87,3 +87,14 @@ &ethmac {
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&i2c_A {
status = "okay";
pinctrl-0 = <&i2c_a_pins>;
pinctrl-names = "default";
};
...@@ -50,3 +50,9 @@ / { ...@@ -50,3 +50,9 @@ / {
compatible = "amlogic,p200", "amlogic,meson-gxbb"; compatible = "amlogic,p200", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P200 Development Board"; model = "Amlogic Meson GXBB P200 Development Board";
}; };
&i2c_B {
status = "okay";
pinctrl-0 = <&i2c_b_pins>;
pinctrl-names = "default";
};
...@@ -57,6 +57,19 @@ memory@0 { ...@@ -57,6 +57,19 @@ memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>; reg = <0x0 0x0 0x0 0x40000000>;
}; };
usb_pwr: regulator-usb-pwrs {
compatible = "regulator-fixed";
regulator-name = "USB_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* signal name in schematic: USB_PWR_EN */
gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
}; };
/* This UART is brought out to the DB9 connector */ /* This UART is brought out to the DB9 connector */
...@@ -72,3 +85,25 @@ &ethmac { ...@@ -72,3 +85,25 @@ &ethmac {
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "okay";
phy-supply = <&usb_pwr>;
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
...@@ -52,6 +52,19 @@ aliases { ...@@ -52,6 +52,19 @@ aliases {
chosen { chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
usb_vbus: regulator-usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "USB0_VBUS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
}; };
&uart_AO { &uart_AO {
...@@ -60,3 +73,32 @@ &uart_AO { ...@@ -60,3 +73,32 @@ &uart_AO {
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "okay";
phy-supply = <&usb_vbus>;
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
...@@ -45,6 +45,9 @@ ...@@ -45,6 +45,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/meson-gxbb-gpio.h> #include <dt-bindings/gpio/meson-gxbb-gpio.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/clock/gxbb-clkc.h>
#include <dt-bindings/clock/gxbb-aoclkc.h>
#include <dt-bindings/reset/gxbb-aoclkc.h>
/ { / {
compatible = "amlogic,meson-gxbb"; compatible = "amlogic,meson-gxbb";
...@@ -99,6 +102,30 @@ psci { ...@@ -99,6 +102,30 @@ psci {
method = "smc"; method = "smc";
}; };
firmware {
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
};
};
efuse: efuse {
compatible = "amlogic,meson-gxbb-efuse";
#address-cells = <1>;
#size-cells = <1>;
sn: sn@14 {
reg = <0x14 0x10>;
};
eth_mac: eth_mac@34 {
reg = <0x34 0x10>;
};
bid: bid@46 {
reg = <0x46 0x30>;
};
};
timer { timer {
compatible = "arm,armv8-timer"; compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 interrupts = <GIC_PPI 13
...@@ -124,6 +151,25 @@ soc { ...@@ -124,6 +151,25 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
usb0_phy: phy@c0000000 {
compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0xc0000000 0x0 0x20>;
resets = <&reset RESET_USB_OTG>;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
clock-names = "usb_general", "usb";
status = "disabled";
};
usb1_phy: phy@c0000020 {
compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0xc0000020 0x0 0x20>;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
clock-names = "usb_general", "usb";
status = "disabled";
};
cbus: cbus@c1100000 { cbus: cbus@c1100000 {
compatible = "simple-bus"; compatible = "simple-bus";
reg = <0x0 0xc1100000 0x0 0x100000>; reg = <0x0 0xc1100000 0x0 0x100000>;
...@@ -153,6 +199,27 @@ uart_B: serial@84dc { ...@@ -153,6 +199,27 @@ uart_B: serial@84dc {
status = "disabled"; status = "disabled";
}; };
pwm_ab: pwm@8550 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x08550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x08650 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x086c0 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
uart_C: serial@8700 { uart_C: serial@8700 {
compatible = "amlogic,meson-uart"; compatible = "amlogic,meson-uart";
reg = <0x0 0x8700 0x0 0x14>; reg = <0x0 0x8700 0x0 0x14>;
...@@ -160,6 +227,51 @@ uart_C: serial@8700 { ...@@ -160,6 +227,51 @@ uart_C: serial@8700 {
clocks = <&xtal>; clocks = <&xtal>;
status = "disabled"; status = "disabled";
}; };
watchdog@98d0 {
compatible = "amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
clocks = <&xtal>;
};
spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_SPI>;
status = "disabled";
};
i2c_A: i2c@8500 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_B: i2c@87c0 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_C: i2c@87e0 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
gic: interrupt-controller@c4301000 { gic: interrupt-controller@c4301000 {
...@@ -203,6 +315,56 @@ mux { ...@@ -203,6 +315,56 @@ mux {
function = "uart_ao"; function = "uart_ao";
}; };
}; };
remote_input_ao_pins: remote_input_ao {
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
};
};
i2c_ao_pins: i2c_ao {
mux {
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
};
};
pwm_ao_a_3_pins: pwm_ao_a_3 {
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a_3";
};
};
pwm_ao_a_6_pins: pwm_ao_a_6 {
mux {
groups = "pwm_ao_a_6";
function = "pwm_ao_a_6";
};
};
pwm_ao_a_12_pins: pwm_ao_a_12 {
mux {
groups = "pwm_ao_a_12";
function = "pwm_ao_a_12";
};
};
pwm_ao_b_pins: pwm_ao_b {
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
};
};
};
clkc_AO: clock-controller@040 {
compatible = "amlogic,gxbb-aoclkc";
reg = <0x0 0x00040 0x0 0x4>;
#clock-cells = <1>;
#reset-cells = <1>;
}; };
uart_AO: serial@4c0 { uart_AO: serial@4c0 {
...@@ -212,6 +374,30 @@ uart_AO: serial@4c0 { ...@@ -212,6 +374,30 @@ uart_AO: serial@4c0 {
clocks = <&xtal>; clocks = <&xtal>;
status = "disabled"; status = "disabled";
}; };
ir: ir@580 {
compatible = "amlogic,meson-gxbb-ir";
reg = <0x0 0x00580 0x0 0x40>;
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
pwm_ab_AO: pwm@550 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x0550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
i2c_AO: i2c@500 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x500 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_AO_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
periphs: periphs@c8834000 { periphs: periphs@c8834000 {
...@@ -251,6 +437,16 @@ mux { ...@@ -251,6 +437,16 @@ mux {
}; };
}; };
nor_pins: nor {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_cs";
function = "nor";
};
};
sdcard_pins: sdcard { sdcard_pins: sdcard {
mux { mux {
groups = "sdcard_d0", groups = "sdcard_d0",
...@@ -263,6 +459,25 @@ mux { ...@@ -263,6 +459,25 @@ mux {
}; };
}; };
sdio_pins: sdio {
mux {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_cmd",
"sdio_clk";
function = "sdio";
};
};
sdio_irq_pins: sdio_irq {
mux {
groups = "sdio_irq";
function = "sdio";
};
};
uart_a_pins: uart_a { uart_a_pins: uart_a {
mux { mux {
groups = "uart_tx_a", groups = "uart_tx_a",
...@@ -287,6 +502,30 @@ mux { ...@@ -287,6 +502,30 @@ mux {
}; };
}; };
i2c_a_pins: i2c_a {
mux {
groups = "i2c_sck_a",
"i2c_sda_a";
function = "i2c_a";
};
};
i2c_b_pins: i2c_b {
mux {
groups = "i2c_sck_b",
"i2c_sda_b";
function = "i2c_b";
};
};
i2c_c_pins: i2c_c {
mux {
groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
};
};
eth_pins: eth_c { eth_pins: eth_c {
mux { mux {
groups = "eth_mdio", groups = "eth_mdio",
...@@ -306,6 +545,55 @@ mux { ...@@ -306,6 +545,55 @@ mux {
function = "eth"; function = "eth";
}; };
}; };
pwm_a_x_pins: pwm_a_x {
mux {
groups = "pwm_a_x";
function = "pwm_a_x";
};
};
pwm_a_y_pins: pwm_a_y {
mux {
groups = "pwm_a_y";
function = "pwm_a_y";
};
};
pwm_b_pins: pwm_b {
mux {
groups = "pwm_b";
function = "pwm_b";
};
};
pwm_d_pins: pwm_d {
mux {
groups = "pwm_d";
function = "pwm_d";
};
};
pwm_e_pins: pwm_e {
mux {
groups = "pwm_e";
function = "pwm_e";
};
};
pwm_f_x_pins: pwm_f_x {
mux {
groups = "pwm_f_x";
function = "pwm_f_x";
};
};
pwm_f_y_pins: pwm_f_y {
mux {
groups = "pwm_f_y";
function = "pwm_f_y";
};
};
}; };
}; };
...@@ -321,6 +609,15 @@ clkc: clock-controller@0 { ...@@ -321,6 +609,15 @@ clkc: clock-controller@0 {
#clock-cells = <1>; #clock-cells = <1>;
reg = <0x0 0x0 0x0 0x3db>; reg = <0x0 0x0 0x0 0x3db>;
}; };
mailbox: mailbox@404 {
compatible = "amlogic,meson-gxbb-mhu";
reg = <0 0x404 0 0x4c>;
interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
<0 209 IRQ_TYPE_EDGE_RISING>,
<0 210 IRQ_TYPE_EDGE_RISING>;
#mbox-cells = <1>;
};
}; };
apb: apb@d0000000 { apb: apb@d0000000 {
...@@ -331,14 +628,40 @@ apb: apb@d0000000 { ...@@ -331,14 +628,40 @@ apb: apb@d0000000 {
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
}; };
usb0: usb@c9000000 {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc9000000 0x0 0x40000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
clock-names = "otg";
phys = <&usb0_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
usb1: usb@c9100000 {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc9100000 0x0 0x40000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "otg";
phys = <&usb1_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
ethmac: ethernet@c9410000 { ethmac: ethernet@c9410000 {
compatible = "amlogic,meson6-dwmac", "snps,dwmac"; compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000 reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>; 0x0 0xc8834540 0x0 0x4>;
interrupts = <0 8 1>; interrupts = <0 8 1>;
interrupt-names = "macirq"; interrupt-names = "macirq";
clocks = <&xtal>; clocks = <&clkc CLKID_ETH>,
clock-names = "stmmaceth"; <&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
phy-mode = "rgmii"; phy-mode = "rgmii";
status = "disabled"; status = "disabled";
}; };
......
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
always := $(dtb-y) always := $(dtb-y)
......
/*
* Device Tree Source for the H3ULCB board
*
* Copyright (C) 2016 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7795.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Renesas H3ULCB board based on r8a7795";
compatible = "renesas,h3ulcb", "renesas,r8a7795";
aliases {
serial0 = &scif2;
ethernet0 = &avb;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
leds {
compatible = "gpio-leds";
led5 {
gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
};
led6 {
gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
};
};
keyboard {
compatible = "gpio-keys";
key-1 {
linux,code = <KEY_1>;
label = "SW3";
wakeup-source;
debounce-interval = <20>;
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
};
};
x12_clk: x12 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
audio_clkout: audio-clkout {
/*
* This is same as <&rcar_sound 0>
* but needed to avoid cs2000/rcar_sound probe dead-lock
*/
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
};
rsnd_ak4613: sound {
compatible = "simple-audio-card";
simple-audio-card,format = "left_j";
simple-audio-card,bitclock-master = <&sndcpu>;
simple-audio-card,frame-master = <&sndcpu>;
sndcpu: simple-audio-card,cpu {
sound-dai = <&rcar_sound>;
};
sndcodec: simple-audio-card,codec {
sound-dai = <&ak4613>;
};
};
};
&extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
i2c2_pins: i2c2 {
groups = "i2c2_a";
function = "i2c2";
};
avb_pins: avb {
groups = "avb_mdc";
function = "avb";
};
sdhi0_pins_3v3: sd0_3v3 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_1v8: sd0_1v8 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
function = "ssi";
};
sound_clk_pins: sound-clk {
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
"audio_clkout_a", "audio_clkout3_a";
function = "audio_clk";
};
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
};
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <100000>;
ak4613: codec@10 {
compatible = "asahi-kasei,ak4613";
#sound-dai-cells = <0>;
reg = <0x10>;
clocks = <&rcar_sound 3>;
asahi-kasei,in1-single-end;
asahi-kasei,in2-single-end;
asahi-kasei,out1-single-end;
asahi-kasei,out2-single-end;
asahi-kasei,out3-single-end;
asahi-kasei,out4-single-end;
asahi-kasei,out5-single-end;
asahi-kasei,out6-single-end;
};
cs2000: clk-multiplier@4f {
#clock-cells = <0>;
compatible = "cirrus,cs2000-cp";
reg = <0x4f>;
clocks = <&audio_clkout>, <&x12_clk>;
clock-names = "clk_in", "ref_clk";
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24576000>; /* 1/1 divide */
};
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <11289600>;
status = "okay";
/* update <audio_clk_b> to <cs2000> */
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
<&cpg CPG_CORE R8A7795_CLK_S0D4>;
rcar_sound,dai {
dai0 {
playback = <&ssi0 &src0 &dvc0>;
capture = <&ssi1 &src1 &dvc1>;
};
};
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins_3v3>;
pinctrl-1 = <&sdhi0_pins_1v8>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr50;
status = "okay";
};
&ssi1 {
shared-pin;
};
&wdt0 {
timeout-sec = <60>;
status = "okay";
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <900>;
rxdv-skew-ps = <0>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txc-skew-ps = <900>;
txen-skew-ps = <0>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
};
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
status = "okay";
};
&ehci1 {
status = "okay";
};
&ohci1 {
status = "okay";
};
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...@@ -9,7 +9,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \ ...@@ -9,7 +9,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o
obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o
obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o
obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
......
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