Commit cae617b6 authored by Olof Johansson's avatar Olof Johansson

Merge branch 'fixes-for-3.9' into next/fixes-non-critical

This is a branch of fixes that originally were scheduled for 3.8 but
due to the request from Linus to hold back on all but the most critical
of fixes, we're re-queueing them for 3.9 here.

* fixes-for-3.9:
  ARM: dts: imx6: fix fec ptp clock slow 10 time
  ARM: highbank: mask cluster id from cpu_logical_map
  ARM: scu: mask cluster id from cpu_logical_map
  ARM: scu: add empty scu_enable for !CONFIG_SMP
  ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
  ARM: at91: at91sam9x5: fix usart3 pinctrl name
  ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
  ARM: dts: fix tick and alarm irq numbers for exynos5440
  ARM: dts: fix compatible value for exynos pinctrl
  ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
  ARM: S3C24XX: fix uninitialized variable warning
  mfd/vexpress: vexpress_sysreg_setup must not be __init
  ARM: ux500: Fix u9540 booting issues
  arm: mvebu: i2c come back in defconfig
  arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
  Dove: activate GPIO interrupts in DT
  ARM: ux500: add spin_unlock(&master_lock).
  ARM: ux500: Disable Power Supply and Battery Management by default
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 389d2111 9916c159
...@@ -7,9 +7,9 @@ on-chip controllers onto these pads. ...@@ -7,9 +7,9 @@ on-chip controllers onto these pads.
Required Properties: Required Properties:
- compatible: should be one of the following. - compatible: should be one of the following.
- "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
- "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller. - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
- "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
- reg: Base address of the pin controller hardware module and length of - reg: Base address of the pin controller hardware module and length of
the address space it occupies. the address space it occupies.
...@@ -142,7 +142,7 @@ the following format 'pinctrl{n}' where n is a unique number for the alias. ...@@ -142,7 +142,7 @@ the following format 'pinctrl{n}' where n is a unique number for the alias.
Example: A pin-controller node with pin banks: Example: A pin-controller node with pin banks:
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 0>; interrupts = <0 47 0>;
...@@ -185,7 +185,7 @@ Example: A pin-controller node with pin banks: ...@@ -185,7 +185,7 @@ Example: A pin-controller node with pin banks:
Example 1: A pin-controller node with pin groups. Example 1: A pin-controller node with pin groups.
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 0>; interrupts = <0 47 0>;
...@@ -230,7 +230,7 @@ Example 1: A pin-controller node with pin groups. ...@@ -230,7 +230,7 @@ Example 1: A pin-controller node with pin groups.
Example 2: A pin-controller node with external wakeup interrupt controller node. Example 2: A pin-controller node with external wakeup interrupt controller node.
pinctrl_1: pinctrl@11000000 { pinctrl_1: pinctrl@11000000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>; reg = <0x11000000 0x1000>;
interrupts = <0 46 0> interrupts = <0 46 0>
......
...@@ -197,9 +197,9 @@ pinctrl_usart2_sck: usart2_sck-0 { ...@@ -197,9 +197,9 @@ pinctrl_usart2_sck: usart2_sck-0 {
}; };
usart3 { usart3 {
pinctrl_uart3: usart3-0 { pinctrl_usart3: usart3-0 {
atmel,pins = atmel,pins =
<2 23 0x2 0x1 /* PC22 periph B with pullup */ <2 22 0x2 0x1 /* PC22 periph B with pullup */
2 23 0x2 0x0>; /* PC23 periph B */ 2 23 0x2 0x0>; /* PC23 periph B */
}; };
......
...@@ -93,6 +93,7 @@ gpio0: gpio@d0400 { ...@@ -93,6 +93,7 @@ gpio0: gpio@d0400 {
reg = <0xd0400 0x20>; reg = <0xd0400 0x20>;
ngpios = <32>; ngpios = <32>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
interrupts = <12>, <13>, <14>, <60>; interrupts = <12>, <13>, <14>, <60>;
}; };
...@@ -103,6 +104,7 @@ gpio1: gpio@d0420 { ...@@ -103,6 +104,7 @@ gpio1: gpio@d0420 {
reg = <0xd0420 0x20>; reg = <0xd0420 0x20>;
ngpios = <32>; ngpios = <32>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
interrupts = <61>; interrupts = <61>;
}; };
......
...@@ -48,13 +48,13 @@ combiner:interrupt-controller@10440000 { ...@@ -48,13 +48,13 @@ combiner:interrupt-controller@10440000 {
}; };
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 0>; interrupts = <0 47 0>;
}; };
pinctrl_1: pinctrl@11000000 { pinctrl_1: pinctrl@11000000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>; reg = <0x11000000 0x1000>;
interrupts = <0 46 0>; interrupts = <0 46 0>;
...@@ -66,7 +66,7 @@ wakup_eint: wakeup-interrupt-controller { ...@@ -66,7 +66,7 @@ wakup_eint: wakeup-interrupt-controller {
}; };
pinctrl_2: pinctrl@03860000 { pinctrl_2: pinctrl@03860000 {
compatible = "samsung,pinctrl-exynos4210"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x03860000 0x1000>; reg = <0x03860000 0x1000>;
}; };
......
...@@ -37,13 +37,13 @@ combiner:interrupt-controller@10440000 { ...@@ -37,13 +37,13 @@ combiner:interrupt-controller@10440000 {
}; };
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,pinctrl-exynos4x12"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 0>; interrupts = <0 47 0>;
}; };
pinctrl_1: pinctrl@11000000 { pinctrl_1: pinctrl@11000000 {
compatible = "samsung,pinctrl-exynos4x12"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>; reg = <0x11000000 0x1000>;
interrupts = <0 46 0>; interrupts = <0 46 0>;
...@@ -55,14 +55,14 @@ wakup_eint: wakeup-interrupt-controller { ...@@ -55,14 +55,14 @@ wakup_eint: wakeup-interrupt-controller {
}; };
pinctrl_2: pinctrl@03860000 { pinctrl_2: pinctrl@03860000 {
compatible = "samsung,pinctrl-exynos4x12"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x03860000 0x1000>; reg = <0x03860000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <10 0>; interrupts = <10 0>;
}; };
pinctrl_3: pinctrl@106E0000 { pinctrl_3: pinctrl@106E0000 {
compatible = "samsung,pinctrl-exynos4x12"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>; reg = <0x106E0000 0x1000>;
interrupts = <0 72 0>; interrupts = <0 72 0>;
}; };
......
...@@ -86,7 +86,7 @@ spi { ...@@ -86,7 +86,7 @@ spi {
}; };
pinctrl { pinctrl {
compatible = "samsung,pinctrl-exynos5440"; compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>; reg = <0xE0000 0x1000>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
...@@ -154,6 +154,6 @@ pdma1: pdma@121B0000 { ...@@ -154,6 +154,6 @@ pdma1: pdma@121B0000 {
rtc { rtc {
compatible = "samsung,s3c6410-rtc"; compatible = "samsung,s3c6410-rtc";
reg = <0x130000 0x1000>; reg = <0x130000 0x1000>;
interrupts = <0 16 0>, <0 17 0>; interrupts = <0 17 0>, <0 16 0>;
}; };
}; };
...@@ -866,7 +866,7 @@ fec: ethernet@02188000 { ...@@ -866,7 +866,7 @@ fec: ethernet@02188000 {
compatible = "fsl,imx6q-fec"; compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupts = <0 118 0x04 0 119 0x04>; interrupts = <0 118 0x04 0 119 0x04>;
clocks = <&clks 117>, <&clks 117>, <&clks 177>; clocks = <&clks 117>, <&clks 117>, <&clks 190>;
clock-names = "ipg", "ahb", "ptp"; clock-names = "ipg", "ahb", "ptp";
status = "disabled"; status = "disabled";
}; };
......
...@@ -33,6 +33,8 @@ CONFIG_MVNETA=y ...@@ -33,6 +33,8 @@ CONFIG_MVNETA=y
CONFIG_MARVELL_PHY=y CONFIG_MARVELL_PHY=y
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_MV64XXX=y
CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_8250_DW=y
CONFIG_GPIOLIB=y CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SYSFS=y
......
...@@ -66,9 +66,9 @@ CONFIG_SPI=y ...@@ -66,9 +66,9 @@ CONFIG_SPI=y
CONFIG_SPI_PL022=y CONFIG_SPI_PL022=y
CONFIG_GPIO_STMPE=y CONFIG_GPIO_STMPE=y
CONFIG_GPIO_TC3589X=y CONFIG_GPIO_TC3589X=y
CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY is not set
CONFIG_AB8500_BM=y # CONFIG_AB8500_BM is not set
CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y # CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set
CONFIG_THERMAL=y CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y CONFIG_CPU_THERMAL=y
CONFIG_MFD_STMPE=y CONFIG_MFD_STMPE=y
......
...@@ -7,8 +7,14 @@ ...@@ -7,8 +7,14 @@
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
unsigned int scu_get_core_count(void __iomem *); unsigned int scu_get_core_count(void __iomem *);
void scu_enable(void __iomem *);
int scu_power_mode(void __iomem *, unsigned int); int scu_power_mode(void __iomem *, unsigned int);
#ifdef CONFIG_SMP
void scu_enable(void __iomem *scu_base);
#else
static inline void scu_enable(void __iomem *scu_base) {}
#endif
#endif #endif
#endif #endif
...@@ -75,7 +75,7 @@ void scu_enable(void __iomem *scu_base) ...@@ -75,7 +75,7 @@ void scu_enable(void __iomem *scu_base)
int scu_power_mode(void __iomem *scu_base, unsigned int mode) int scu_power_mode(void __iomem *scu_base, unsigned int mode)
{ {
unsigned int val; unsigned int val;
int cpu = cpu_logical_map(smp_processor_id()); int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
if (mode > 3 || mode == 1 || cpu > 3) if (mode > 3 || mode == 1 || cpu > 3)
return -EINVAL; return -EINVAL;
......
...@@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd) ...@@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd)
void exynos5_restart(char mode, const char *cmd) void exynos5_restart(char mode, const char *cmd)
{ {
struct device_node *np;
u32 val; u32 val;
void __iomem *addr; void __iomem *addr;
...@@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd) ...@@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd)
val = 0x1; val = 0x1;
addr = EXYNOS_SWRESET; addr = EXYNOS_SWRESET;
} else if (of_machine_is_compatible("samsung,exynos5440")) { } else if (of_machine_is_compatible("samsung,exynos5440")) {
val = (0x10 << 20) | (0x1 << 16); np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
addr = EXYNOS5440_SWRESET; addr = of_iomap(np, 0) + 0xcc;
val = (0xfff << 20) | (0x1 << 16);
} else { } else {
pr_err("%s: cannot support non-DT\n", __func__); pr_err("%s: cannot support non-DT\n", __func__);
return; return;
...@@ -1031,8 +1033,8 @@ static int __init exynos_init_irq_eint(void) ...@@ -1031,8 +1033,8 @@ static int __init exynos_init_irq_eint(void)
* interrupt support code here can be completely removed. * interrupt support code here can be completely removed.
*/ */
static const struct of_device_id exynos_pinctrl_ids[] = { static const struct of_device_id exynos_pinctrl_ids[] = {
{ .compatible = "samsung,pinctrl-exynos4210", }, { .compatible = "samsung,exynos4210-pinctrl", },
{ .compatible = "samsung,pinctrl-exynos4x12", }, { .compatible = "samsung,exynos4x12-pinctrl", },
}; };
struct device_node *pctrl_np, *wkup_np; struct device_node *pctrl_np, *wkup_np;
const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#include <asm/arch_timer.h> #include <asm/arch_timer.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
#include <asm/smp_twd.h> #include <asm/smp_twd.h>
#include <asm/hardware/arm_timer.h> #include <asm/hardware/arm_timer.h>
...@@ -59,7 +60,7 @@ static void __init highbank_scu_map_io(void) ...@@ -59,7 +60,7 @@ static void __init highbank_scu_map_io(void)
void highbank_set_cpu_jump(int cpu, void *jump_addr) void highbank_set_cpu_jump(int cpu, void *jump_addr)
{ {
cpu = cpu_logical_map(cpu); cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0);
writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
......
...@@ -37,7 +37,7 @@ extern void __iomem *sregs_base; ...@@ -37,7 +37,7 @@ extern void __iomem *sregs_base;
static inline void highbank_set_core_pwr(void) static inline void highbank_set_core_pwr(void)
{ {
int cpu = cpu_logical_map(smp_processor_id()); int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
if (scu_base_addr) if (scu_base_addr)
scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
else else
...@@ -46,7 +46,7 @@ static inline void highbank_set_core_pwr(void) ...@@ -46,7 +46,7 @@ static inline void highbank_set_core_pwr(void)
static inline void highbank_clear_core_pwr(void) static inline void highbank_clear_core_pwr(void)
{ {
int cpu = cpu_logical_map(smp_processor_id()); int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
if (scu_base_addr) if (scu_base_addr)
scu_power_mode(scu_base_addr, SCU_PM_NORMAL); scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
else else
......
...@@ -197,7 +197,7 @@ static unsigned long s3c24xx_read_idcode_v4(void) ...@@ -197,7 +197,7 @@ static unsigned long s3c24xx_read_idcode_v4(void)
static void s3c24xx_default_idle(void) static void s3c24xx_default_idle(void)
{ {
unsigned long tmp; unsigned long tmp = 0;
int i; int i;
/* idle the system by using the idle mode which will wait for an /* idle the system by using the idle mode which will wait for an
......
...@@ -71,13 +71,11 @@ void __init ux500_init_irq(void) ...@@ -71,13 +71,11 @@ void __init ux500_init_irq(void)
* Init clocks here so that they are available for system timer * Init clocks here so that they are available for system timer
* initialization. * initialization.
*/ */
if (cpu_is_u8500_family()) if (cpu_is_u8500_family() || cpu_is_u9540())
db8500_prcmu_early_init(); db8500_prcmu_early_init();
if (cpu_is_u8500_family()) if (cpu_is_u8500_family() || cpu_is_u9540())
u8500_clk_init(); u8500_clk_init();
else if (cpu_is_u9540())
u9540_clk_init();
else if (cpu_is_u8540()) else if (cpu_is_u8540())
u8540_clk_init(); u8540_clk_init();
} }
......
...@@ -40,8 +40,10 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev, ...@@ -40,8 +40,10 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev,
goto wfi; goto wfi;
/* decouple the gic from the A9 cores */ /* decouple the gic from the A9 cores */
if (prcmu_gic_decouple()) if (prcmu_gic_decouple()) {
spin_unlock(&master_lock);
goto out; goto out;
}
/* If an error occur, we will have to recouple the gic /* If an error occur, we will have to recouple the gic
* manually */ * manually */
......
...@@ -49,7 +49,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, ...@@ -49,7 +49,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
"number (%u)\n", num); "number (%u)\n", num);
continue; continue;
} }
if (variant_mask & !(*mpp_list & variant_mask)) { if (variant_mask && !(*mpp_list & variant_mask)) {
printk(KERN_WARNING printk(KERN_WARNING
"orion_mpp_conf: requested MPP%u config " "orion_mpp_conf: requested MPP%u config "
"unavailable on this hardware\n", num); "unavailable on this hardware\n", num);
......
...@@ -3023,9 +3023,9 @@ static __init int samsung_gpiolib_init(void) ...@@ -3023,9 +3023,9 @@ static __init int samsung_gpiolib_init(void)
*/ */
struct device_node *pctrl_np; struct device_node *pctrl_np;
static const struct of_device_id exynos_pinctrl_ids[] = { static const struct of_device_id exynos_pinctrl_ids[] = {
{ .compatible = "samsung,pinctrl-exynos4210", }, { .compatible = "samsung,exynos4210-pinctrl", },
{ .compatible = "samsung,pinctrl-exynos4x12", }, { .compatible = "samsung,exynos4x12-pinctrl", },
{ .compatible = "samsung,pinctrl-exynos5440", }, { .compatible = "samsung,exynos5440-pinctrl", },
}; };
for_each_matching_node(pctrl_np, exynos_pinctrl_ids) for_each_matching_node(pctrl_np, exynos_pinctrl_ids)
if (pctrl_np && of_device_is_available(pctrl_np)) if (pctrl_np && of_device_is_available(pctrl_np))
......
...@@ -313,7 +313,7 @@ static void vexpress_sysreg_config_complete(unsigned long data) ...@@ -313,7 +313,7 @@ static void vexpress_sysreg_config_complete(unsigned long data)
} }
void __init vexpress_sysreg_setup(struct device_node *node) void vexpress_sysreg_setup(struct device_node *node)
{ {
if (WARN_ON(!vexpress_sysreg_base)) if (WARN_ON(!vexpress_sysreg_base))
return; return;
......
...@@ -947,9 +947,9 @@ static int samsung_pinctrl_probe(struct platform_device *pdev) ...@@ -947,9 +947,9 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
} }
static const struct of_device_id samsung_pinctrl_dt_match[] = { static const struct of_device_id samsung_pinctrl_dt_match[] = {
{ .compatible = "samsung,pinctrl-exynos4210", { .compatible = "samsung,exynos4210-pinctrl",
.data = (void *)exynos4210_pin_ctrl }, .data = (void *)exynos4210_pin_ctrl },
{ .compatible = "samsung,pinctrl-exynos4x12", { .compatible = "samsung,exynos4x12-pinctrl",
.data = (void *)exynos4x12_pin_ctrl }, .data = (void *)exynos4x12_pin_ctrl },
{}, {},
}; };
......
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