Skip to content

L
linux
Commit cc277069 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Greg Kroah-Hartman
Browse files
Options

Staging: rt28x0: fix comments in *.h files 

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 8281958b
Show whitespace changes
Inline Side-by-side
Showing with 2672 additions and 2673 deletions
drivers/staging/rt2860/ap.h
View file @ cc277069
......@@ -40,7 +40,7 @@
#ifndef __AP_H__
#define __AP_H__
// ap_wpa.c
/* ap_wpa.c */
VOID WpaStateMachineInit(IN PRTMP_ADAPTER pAd,
IN STATE_MACHINE * Sm, OUT STATE_MACHINE_FUNC Trans[]);
......@@ -48,7 +48,7 @@ VOID WpaStateMachineInit(IN PRTMP_ADAPTER pAd,
VOID BeaconUpdateExec(IN PVOID SystemSpecific1,
IN PVOID FunctionContext,
IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
VOID RTMPSetPiggyBack(IN PRTMP_ADAPTER pAd, IN BOOLEAN bPiggyBack);
......@@ -63,4 +63,4 @@ BOOLEAN MacTableDeleteEntry(IN PRTMP_ADAPTER pAd,
MAC_TABLE_ENTRY *MacTableLookup(IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr);
#endif // __AP_H__
#endif /* __AP_H__ */
drivers/staging/rt2860/chip/mac_pci.h
View file @ cc277069
......@@ -178,7 +178,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
#define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
(((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
//(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
......
drivers/staging/rt2860/chip/mac_usb.h
View file @ cc277069
......@@ -46,18 +46,18 @@
#define USB_CYC_CFG 0x02a4
#define BEACON_RING_SIZE 2
#define MGMTPIPEIDX 0 // EP6 is highest priority
#define MGMTPIPEIDX 0 /* EP6 is highest priority */
#define RTMP_PKT_TAIL_PADDING 11 // 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding)
#define RTMP_PKT_TAIL_PADDING 11 /* 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) */
#define fRTMP_ADAPTER_NEED_STOP_TX \
(fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS | \
fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_BULKOUT_RESET | \
fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_REMOVE_IN_PROGRESS)
//
// RXINFO appends at the end of each rx packet.
//
/* */
/* RXINFO appends at the end of each rx packet. */
/* */
#define RXINFO_SIZE 4
#define RT2870_RXDMALEN_FIELD_SIZE 4
......@@ -66,17 +66,17 @@ typedef struct PACKED _RXINFO_STRUC {
UINT32 DATA:1;
UINT32 NULLDATA:1;
UINT32 FRAG:1;
UINT32 U2M:1; // 1: this RX frame is unicast to me
UINT32 Mcast:1; // 1: this is a multicast frame
UINT32 Bcast:1; // 1: this is a broadcast frame
UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
UINT32 Crc:1; // 1: CRC error
UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
UINT32 U2M:1; /* 1: this RX frame is unicast to me */
UINT32 Mcast:1; /* 1: this is a multicast frame */
UINT32 Bcast:1; /* 1: this is a broadcast frame */
UINT32 MyBss:1; /* 1: this frame belongs to the same BSSID */
UINT32 Crc:1; /* 1: CRC error */
UINT32 CipherErr:2; /* 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid */
UINT32 AMSDU:1; /* rx with 802.3 header, not 802.11 header. */
UINT32 HTC:1;
UINT32 RSSI:1;
UINT32 L2PAD:1;
UINT32 AMPDU:1; // To be moved
UINT32 AMPDU:1; /* To be moved */
UINT32 Decrypted:1;
UINT32 PlcpRssil:1;
UINT32 CipherAlg:1;
......@@ -84,35 +84,35 @@ typedef struct PACKED _RXINFO_STRUC {
UINT32 PlcpSignal:12;
} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
//
// TXINFO
//
/* */
/* TXINFO */
/* */
#define TXINFO_SIZE 4
typedef struct _TXINFO_STRUC {
// Word 0
UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame.
/* Word 0 */
UINT32 USBDMATxPktLen:16; /*used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame. */
UINT32 rsv:8;
UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
UINT32 SwUseLastRound:1; // Software use.
UINT32 rsv2:2; // Software use.
UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid
UINT32 USBDMATxburst:1; //used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint
UINT32 WIV:1; /* Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition */
UINT32 QSEL:2; /* select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA */
UINT32 SwUseLastRound:1; /* Software use. */
UINT32 rsv2:2; /* Software use. */
UINT32 USBDMANextVLD:1; /*used ONLY in USB bulk Aggregation, NextValid */
UINT32 USBDMATxburst:1; /*used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint */
} TXINFO_STRUC, *PTXINFO_STRUC;
//
// Management ring buffer format
//
/* */
/* Management ring buffer format */
/* */
typedef struct _MGMT_STRUC {
BOOLEAN Valid;
PUCHAR pBuffer;
ULONG Length;
} MGMT_STRUC, *PMGMT_STRUC;
////////////////////////////////////////////////////////////////////////////
// The TX_BUFFER structure forms the transmitted USB packet to the device
////////////////////////////////////////////////////////////////////////////
/*////////////////////////////////////////////////////////////////////////// */
/* The TX_BUFFER structure forms the transmitted USB packet to the device */
/*////////////////////////////////////////////////////////////////////////// */
typedef struct __TX_BUFFER {
union {
UCHAR WirelessPacket[TX_BUFFER_NORMSIZE];
......@@ -120,7 +120,7 @@ typedef struct __TX_BUFFER {
PSPOLL_FRAME PsPollPacket;
RTS_FRAME RTSFrame;
} field;
UCHAR Aggregation[4]; //Buffer for save Aggregation size.
UCHAR Aggregation[4]; /*Buffer for save Aggregation size. */
} TX_BUFFER, *PTX_BUFFER;
typedef struct __HTTX_BUFFER {
......@@ -130,22 +130,22 @@ typedef struct __HTTX_BUFFER {
PSPOLL_FRAME PsPollPacket;
RTS_FRAME RTSFrame;
} field;
UCHAR Aggregation[4]; //Buffer for save Aggregation size.
UCHAR Aggregation[4]; /*Buffer for save Aggregation size. */
} HTTX_BUFFER, *PHTTX_BUFFER;
// used to track driver-generated write irps
/* used to track driver-generated write irps */
typedef struct _TX_CONTEXT {
PVOID pAd; //Initialized in MiniportInitialize
PURB pUrb; //Initialized in MiniportInitialize
PIRP pIrp; //used to cancel pending bulk out.
//Initialized in MiniportInitialize
PTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize
PVOID pAd; /*Initialized in MiniportInitialize */
PURB pUrb; /*Initialized in MiniportInitialize */
PIRP pIrp; /*used to cancel pending bulk out. */
/*Initialized in MiniportInitialize */
PTX_BUFFER TransferBuffer; /*Initialized in MiniportInitialize */
ULONG BulkOutSize;
UCHAR BulkOutPipeId;
UCHAR SelfIdx;
BOOLEAN InUse;
BOOLEAN bWaitingBulkOut; // at least one packet is in this TxContext, ready for making IRP anytime.
BOOLEAN bFullForBulkOut; // all tx buffer are full , so waiting for tx bulkout.
BOOLEAN bWaitingBulkOut; /* at least one packet is in this TxContext, ready for making IRP anytime. */
BOOLEAN bFullForBulkOut; /* all tx buffer are full , so waiting for tx bulkout. */
BOOLEAN IRPPending;
BOOLEAN LastOne;
BOOLEAN bAggregatible;
......@@ -153,18 +153,18 @@ typedef struct _TX_CONTEXT {
UCHAR Rsv[2];
ULONG DataOffset;
UINT TxRate;
dma_addr_t data_dma; // urb dma on linux
dma_addr_t data_dma; /* urb dma on linux */
} TX_CONTEXT, *PTX_CONTEXT, **PPTX_CONTEXT;
// used to track driver-generated write irps
/* used to track driver-generated write irps */
typedef struct _HT_TX_CONTEXT {
PVOID pAd; //Initialized in MiniportInitialize
PURB pUrb; //Initialized in MiniportInitialize
PIRP pIrp; //used to cancel pending bulk out.
//Initialized in MiniportInitialize
PHTTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize
ULONG BulkOutSize; // Indicate the total bulk-out size in bytes in one bulk-transmission
PVOID pAd; /*Initialized in MiniportInitialize */
PURB pUrb; /*Initialized in MiniportInitialize */
PIRP pIrp; /*used to cancel pending bulk out. */
/*Initialized in MiniportInitialize */
PHTTX_BUFFER TransferBuffer; /*Initialized in MiniportInitialize */
ULONG BulkOutSize; /* Indicate the total bulk-out size in bytes in one bulk-transmission */
UCHAR BulkOutPipeId;
BOOLEAN IRPPending;
BOOLEAN LastOne;
......@@ -173,33 +173,33 @@ typedef struct _HT_TX_CONTEXT {
BOOLEAN bCopySavePad;
UCHAR SavedPad[8];
UCHAR Header_802_3[LENGTH_802_3];
ULONG CurWritePosition; // Indicate the buffer offset which packet will be inserted start from.
ULONG CurWriteRealPos; // Indicate the buffer offset which packet now are writing to.
ULONG NextBulkOutPosition; // Indicate the buffer start offset of a bulk-transmission
ULONG ENextBulkOutPosition; // Indicate the buffer end offset of a bulk-transmission
ULONG CurWritePosition; /* Indicate the buffer offset which packet will be inserted start from. */
ULONG CurWriteRealPos; /* Indicate the buffer offset which packet now are writing to. */
ULONG NextBulkOutPosition; /* Indicate the buffer start offset of a bulk-transmission */
ULONG ENextBulkOutPosition; /* Indicate the buffer end offset of a bulk-transmission */
UINT TxRate;
dma_addr_t data_dma; // urb dma on linux
dma_addr_t data_dma; /* urb dma on linux */
} HT_TX_CONTEXT, *PHT_TX_CONTEXT, **PPHT_TX_CONTEXT;
//
// Structure to keep track of receive packets and buffers to indicate
// receive data to the protocol.
//
/* */
/* Structure to keep track of receive packets and buffers to indicate */
/* receive data to the protocol. */
/* */
typedef struct _RX_CONTEXT {
PUCHAR TransferBuffer;
PVOID pAd;
PIRP pIrp; //used to cancel pending bulk in.
PIRP pIrp; /*used to cancel pending bulk in. */
PURB pUrb;
//These 2 Boolean shouldn't both be 1 at the same time.
ULONG BulkInOffset; // number of packets waiting for reordering .
// BOOLEAN ReorderInUse; // At least one packet in this buffer are in reordering buffer and wait for receive indication
BOOLEAN bRxHandling; // Notify this packet is being process now.
BOOLEAN InUse; // USB Hardware Occupied. Wait for USB HW to put packet.
BOOLEAN Readable; // Receive Complete back. OK for driver to indicate receiving packet.
BOOLEAN IRPPending; // TODO: To be removed
/*These 2 Boolean shouldn't both be 1 at the same time. */
ULONG BulkInOffset; /* number of packets waiting for reordering . */
/* BOOLEAN ReorderInUse; // At least one packet in this buffer are in reordering buffer and wait for receive indication */
BOOLEAN bRxHandling; /* Notify this packet is being process now. */
BOOLEAN InUse; /* USB Hardware Occupied. Wait for USB HW to put packet. */
BOOLEAN Readable; /* Receive Complete back. OK for driver to indicate receiving packet. */
BOOLEAN IRPPending; /* TODO: To be removed */
atomic_t IrpLock;
NDIS_SPIN_LOCK RxContextLock;
dma_addr_t data_dma; // urb dma on linux
dma_addr_t data_dma; /* urb dma on linux */
} RX_CONTEXT, *PRX_CONTEXT;
/******************************************************************************
......@@ -207,9 +207,9 @@ typedef struct _RX_CONTEXT {
USB Frimware Related MACRO
******************************************************************************/
// 8051 firmware image for usb - use last-half base address = 0x3000
/* 8051 firmware image for usb - use last-half base address = 0x3000 */
#define FIRMWARE_IMAGE_BASE 0x3000
#define MAX_FIRMWARE_IMAGE_SIZE 0x1000 // 4kbyte
#define MAX_FIRMWARE_IMAGE_SIZE 0x1000 /* 4kbyte */
#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
RTUSBFirmwareWrite(_pAd, _pFwImage, _FwLen)
......@@ -278,7 +278,7 @@ typedef struct _RX_CONTEXT {
#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
RtmpUSBNullFrameKickOut(_pAd, _QueIdx, _pNullFrame, _frameLen)
#define GET_TXRING_FREENO(_pAd, _QueIdx) (_QueIdx) //(_pAd->TxRing[_QueIdx].TxSwFreeIdx)
#define GET_TXRING_FREENO(_pAd, _QueIdx) (_QueIdx) /*(_pAd->TxRing[_QueIdx].TxSwFreeIdx) */
#define GET_MGMTRING_FREENO(_pAd) (_pAd->MgmtRing.TxSwFreeIdx)
/* ----------------- RX Related MACRO ----------------- */
......@@ -344,4 +344,4 @@ typedef struct _RX_CONTEXT {
#define RTMP_MLME_RADIO_OFF(pAd) \
RT28xxUsbMlmeRadioOFF(pAd);
#endif //__MAC_USB_H__ //
#endif /*__MAC_USB_H__ // */
drivers/staging/rt2860/chip/rt2860.h
View file @ cc277069
......@@ -38,17 +38,17 @@
#error "For RT2880, you should define the compile flag -DRTMP_MAC_PCI"
#endif
//
// Device ID & Vendor ID, these values should match EEPROM value
//
/* */
/* Device ID & Vendor ID, these values should match EEPROM value */
/* */
#define NIC2860_PCI_DEVICE_ID 0x0601
#define NIC2860_PCIe_DEVICE_ID 0x0681
#define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ???
#define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard
#define NIC2760_PCI_DEVICE_ID 0x0701 /* 1T/2R Cardbus ??? */
#define NIC2790_PCIe_DEVICE_ID 0x0781 /* 1T/2R miniCard */
#define VEN_AWT_PCIe_DEVICE_ID 0x1059
#define VEN_AWT_PCI_VENDOR_ID 0x1A3B
#define EDIMAX_PCI_VENDOR_ID 0x1432
#endif //__RT2860_H__ //
#endif /*__RT2860_H__ // */
drivers/staging/rt2860/chip/rt2870.h
View file @ cc277069
......@@ -40,7 +40,7 @@
#include "../rtmp_type.h"
#include "mac_usb.h"
//#define RTMP_CHIP_NAME "RT2870"
/*#define RTMP_CHIP_NAME "RT2870" */
#endif // RT2870 //
#endif //__RT2870_H__ //
#endif /* RT2870 // */
#endif /*__RT2870_H__ // */
drivers/staging/rt2860/chip/rt3070.h
View file @ cc277069
......@@ -58,10 +58,10 @@
#include "mac_usb.h"
#include "rt30xx.h"
//
// Device ID & Vendor ID, these values should match EEPROM value
//
/* */
/* Device ID & Vendor ID, these values should match EEPROM value */
/* */
#endif // RT3070 //
#endif /* RT3070 // */
#endif //__RT3070_H__ //
#endif /*__RT3070_H__ // */
drivers/staging/rt2860/chip/rt3090.h
View file @ cc277069
......@@ -60,13 +60,13 @@
#include "mac_pci.h"
#include "rt30xx.h"
//
// Device ID & Vendor ID, these values should match EEPROM value
//
#define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard
#define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard
#define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard
/* */
/* Device ID & Vendor ID, these values should match EEPROM value */
/* */
#define NIC3090_PCIe_DEVICE_ID 0x3090 /* 1T/1R miniCard */
#define NIC3091_PCIe_DEVICE_ID 0x3091 /* 1T/2R miniCard */
#define NIC3092_PCIe_DEVICE_ID 0x3092 /* 2T/2R miniCard */
#endif // RT3090 //
#endif /* RT3090 // */
#endif //__RT3090_H__ //
#endif /*__RT3090_H__ // */
drivers/staging/rt2860/chip/rt30xx.h
View file @ cc277069
......@@ -42,6 +42,6 @@
extern REG_PAIR RT30xx_RFRegTable[];
extern UCHAR NUM_RF_REG_PARMS;
#endif // RT30xx //
#endif /* RT30xx // */
#endif //__RT30XX_H__ //
#endif /*__RT30XX_H__ // */
drivers/staging/rt2860/chip/rtmp_mac.h
View file @ cc277069
......@@ -38,70 +38,70 @@
#ifndef __RTMP_MAC_H__
#define __RTMP_MAC_H__
// =================================================================================
// TX / RX ring descriptor format
// =================================================================================
/* ================================================================================= */
/* TX / RX ring descriptor format */
/* ================================================================================= */
// the first 24-byte in TXD is called TXINFO and will be DMAed to MAC block through TXFIFO.
// MAC block use this TXINFO to control the transmission behavior of this frame.
/* the first 24-byte in TXD is called TXINFO and will be DMAed to MAC block through TXFIFO. */
/* MAC block use this TXINFO to control the transmission behavior of this frame. */
#define FIFO_MGMT 0
#define FIFO_HCCA 1
#define FIFO_EDCA 2
//
// TXD Wireless Information format for Tx ring and Mgmt Ring
//
//txop : for txop mode
// 0:txop for the MPDU frame will be handles by ASIC by register
// 1/2/3:the MPDU frame is send after PIFS/backoff/SIFS
/* */
/* TXD Wireless Information format for Tx ring and Mgmt Ring */
/* */
/*txop : for txop mode */
/* 0:txop for the MPDU frame will be handles by ASIC by register */
/* 1/2/3:the MPDU frame is send after PIFS/backoff/SIFS */
typedef struct PACKED _TXWI_STRUC {
// Word 0
// ex: 00 03 00 40 means txop = 3, PHYMODE = 1
UINT32 FRAG:1; // 1 to inform TKIP engine this is a fragment.
UINT32 MIMOps:1; // the remote peer is in dynamic MIMO-PS mode
/* Word 0 */
/* ex: 00 03 00 40 means txop = 3, PHYMODE = 1 */
UINT32 FRAG:1; /* 1 to inform TKIP engine this is a fragment. */
UINT32 MIMOps:1; /* the remote peer is in dynamic MIMO-PS mode */
UINT32 CFACK:1;
UINT32 TS:1;
UINT32 AMPDU:1;
UINT32 MpduDensity:3;
UINT32 txop:2; //FOR "THIS" frame. 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful.
UINT32 txop:2; /*FOR "THIS" frame. 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful. */
UINT32 rsv:6;
UINT32 MCS:7;
UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz
UINT32 BW:1; /*channel bandwidth 20MHz or 40 MHz */
UINT32 ShortGI:1;
UINT32 STBC:2; // 1: STBC support MCS =0-7, 2,3 : RESERVE
UINT32 Ifs:1; //
// UINT32 rsv2:2; //channel bandwidth 20MHz or 40 MHz
UINT32 STBC:2; /* 1: STBC support MCS =0-7, 2,3 : RESERVE */
UINT32 Ifs:1; /* */
/* UINT32 rsv2:2; //channel bandwidth 20MHz or 40 MHz */
UINT32 rsv2:1;
UINT32 TxBF:1; // 3*3
UINT32 TxBF:1; /* 3*3 */
UINT32 PHYMODE:2;
// Word1
// ex: 1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCount = 0x38
/* Word1 */
/* ex: 1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCount = 0x38 */
UINT32 ACK:1;
UINT32 NSEQ:1;
UINT32 BAWinSize:6;
UINT32 WirelessCliID:8;
UINT32 MPDUtotalByteCount:12;
UINT32 PacketId:4;
//Word2
/*Word2 */
UINT32 IV;
//Word3
/*Word3 */
UINT32 EIV;
} TXWI_STRUC, *PTXWI_STRUC;
//
// RXWI wireless information format, in PBF. invisible in driver.
//
/* */
/* RXWI wireless information format, in PBF. invisible in driver. */
/* */
typedef struct PACKED _RXWI_STRUC {
// Word 0
/* Word 0 */
UINT32 WirelessCliID:8;
UINT32 KeyIndex:2;
UINT32 BSSID:3;
UINT32 UDF:3;
UINT32 MPDUtotalByteCount:12;
UINT32 TID:4;
// Word 1
/* Word 1 */
UINT32 FRAG:4;
UINT32 SEQUENCE:12;
UINT32 MCS:7;
......@@ -109,29 +109,29 @@ typedef struct PACKED _RXWI_STRUC {
UINT32 ShortGI:1;
UINT32 STBC:2;
UINT32 rsv:3;
UINT32 PHYMODE:2; // 1: this RX frame is unicast to me
//Word2
UINT32 PHYMODE:2; /* 1: this RX frame is unicast to me */
/*Word2 */
UINT32 RSSI0:8;
UINT32 RSSI1:8;
UINT32 RSSI2:8;
UINT32 rsv1:8;
//Word3
/*Word3 */
UINT32 SNR0:8;
UINT32 SNR1:8;
UINT32 FOFFSET:8; // RT35xx
UINT32 FOFFSET:8; /* RT35xx */
UINT32 rsv2:8;
/*UINT32 rsv2:16; */
} RXWI_STRUC, *PRXWI_STRUC;
// =================================================================================
// Register format
// =================================================================================
/* ================================================================================= */
/* Register format */
/* ================================================================================= */
//
// SCH/DMA registers - base address 0x0200
//
// INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit
//
/* */
/* SCH/DMA registers - base address 0x0200 */
/* */
/* INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit */
/* */
#define DMA_CSR0 0x200
#define INT_SOURCE_CSR 0x200
typedef union _INT_SOURCE_CSR_STRUC {
......@@ -139,29 +139,29 @@ typedef union _INT_SOURCE_CSR_STRUC {
UINT32 RxDelayINT:1;
UINT32 TxDelayINT:1;
UINT32 RxDone:1;
UINT32 Ac0DmaDone:1; //4
UINT32 Ac0DmaDone:1; /*4 */
UINT32 Ac1DmaDone:1;
UINT32 Ac2DmaDone:1;
UINT32 Ac3DmaDone:1;
UINT32 HccaDmaDone:1; // bit7
UINT32 HccaDmaDone:1; /* bit7 */
UINT32 MgmtDmaDone:1;
UINT32 MCUCommandINT:1; //bit 9
UINT32 MCUCommandINT:1; /*bit 9 */
UINT32 RxTxCoherent:1;
UINT32 TBTTInt:1;
UINT32 PreTBTT:1;
UINT32 TXFifoStatusInt:1; //FIFO Statistics is full, sw should read 0x171c
UINT32 AutoWakeup:1; //bit14
UINT32 TXFifoStatusInt:1; /*FIFO Statistics is full, sw should read 0x171c */
UINT32 AutoWakeup:1; /*bit14 */
UINT32 GPTimer:1;
UINT32 RxCoherent:1; //bit16
UINT32 RxCoherent:1; /*bit16 */
UINT32 TxCoherent:1;
UINT32:14;
} field;
UINT32 word;
} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
//
// INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF
//
/* */
/* INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF */
/* */
#define INT_MASK_CSR 0x204
typedef union _INT_MASK_CSR_STRUC {
struct {
......@@ -228,99 +228,99 @@ typedef union _DELAY_INT_CFG_STRUC {
#define WMM_AIFSN_CFG 0x0214
typedef union _AIFSN_CSR_STRUC {
struct {
UINT32 Aifsn0:4; // for AC_BE
UINT32 Aifsn1:4; // for AC_BK
UINT32 Aifsn2:4; // for AC_VI
UINT32 Aifsn3:4; // for AC_VO
UINT32 Aifsn0:4; /* for AC_BE */
UINT32 Aifsn1:4; /* for AC_BK */
UINT32 Aifsn2:4; /* for AC_VI */
UINT32 Aifsn3:4; /* for AC_VO */
UINT32 Rsv:16;
} field;
UINT32 word;
} AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
//
// CWMIN_CSR: CWmin for each EDCA AC
//
/* */
/* CWMIN_CSR: CWmin for each EDCA AC */
/* */
#define WMM_CWMIN_CFG 0x0218
typedef union _CWMIN_CSR_STRUC {
struct {
UINT32 Cwmin0:4; // for AC_BE
UINT32 Cwmin1:4; // for AC_BK
UINT32 Cwmin2:4; // for AC_VI
UINT32 Cwmin3:4; // for AC_VO
UINT32 Cwmin0:4; /* for AC_BE */
UINT32 Cwmin1:4; /* for AC_BK */
UINT32 Cwmin2:4; /* for AC_VI */
UINT32 Cwmin3:4; /* for AC_VO */
UINT32 Rsv:16;
} field;
UINT32 word;
} CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
//
// CWMAX_CSR: CWmin for each EDCA AC
//
/* */
/* CWMAX_CSR: CWmin for each EDCA AC */
/* */
#define WMM_CWMAX_CFG 0x021c
typedef union _CWMAX_CSR_STRUC {
struct {
UINT32 Cwmax0:4; // for AC_BE
UINT32 Cwmax1:4; // for AC_BK
UINT32 Cwmax2:4; // for AC_VI
UINT32 Cwmax3:4; // for AC_VO
UINT32 Cwmax0:4; /* for AC_BE */
UINT32 Cwmax1:4; /* for AC_BK */
UINT32 Cwmax2:4; /* for AC_VI */
UINT32 Cwmax3:4; /* for AC_VO */
UINT32 Rsv:16;
} field;
UINT32 word;
} CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
//
// AC_TXOP_CSR0: AC_BK/AC_BE TXOP register
//
/* */
/* AC_TXOP_CSR0: AC_BK/AC_BE TXOP register */
/* */
#define WMM_TXOP0_CFG 0x0220
typedef union _AC_TXOP_CSR0_STRUC {
struct {
USHORT Ac0Txop; // for AC_BK, in unit of 32us
USHORT Ac1Txop; // for AC_BE, in unit of 32us
USHORT Ac0Txop; /* for AC_BK, in unit of 32us */
USHORT Ac1Txop; /* for AC_BE, in unit of 32us */
} field;
UINT32 word;
} AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
//
// AC_TXOP_CSR1: AC_VO/AC_VI TXOP register
//
/* */
/* AC_TXOP_CSR1: AC_VO/AC_VI TXOP register */
/* */
#define WMM_TXOP1_CFG 0x0224
typedef union _AC_TXOP_CSR1_STRUC {
struct {
USHORT Ac2Txop; // for AC_VI, in unit of 32us
USHORT Ac3Txop; // for AC_VO, in unit of 32us
USHORT Ac2Txop; /* for AC_VI, in unit of 32us */
USHORT Ac3Txop; /* for AC_VO, in unit of 32us */
} field;
UINT32 word;
} AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
#define RINGREG_DIFF 0x10
#define GPIO_CTRL_CFG 0x0228 //MAC_CSR13
#define GPIO_CTRL_CFG 0x0228 /*MAC_CSR13 */
#define MCU_CMD_CFG 0x022c
#define TX_BASE_PTR0 0x0230 //AC_BK base address
#define TX_BASE_PTR0 0x0230 /*AC_BK base address */
#define TX_MAX_CNT0 0x0234
#define TX_CTX_IDX0 0x0238
#define TX_DTX_IDX0 0x023c
#define TX_BASE_PTR1 0x0240 //AC_BE base address
#define TX_BASE_PTR1 0x0240 /*AC_BE base address */
#define TX_MAX_CNT1 0x0244
#define TX_CTX_IDX1 0x0248
#define TX_DTX_IDX1 0x024c
#define TX_BASE_PTR2 0x0250 //AC_VI base address
#define TX_BASE_PTR2 0x0250 /*AC_VI base address */
#define TX_MAX_CNT2 0x0254
#define TX_CTX_IDX2 0x0258
#define TX_DTX_IDX2 0x025c
#define TX_BASE_PTR3 0x0260 //AC_VO base address
#define TX_BASE_PTR3 0x0260 /*AC_VO base address */
#define TX_MAX_CNT3 0x0264
#define TX_CTX_IDX3 0x0268
#define TX_DTX_IDX3 0x026c
#define TX_BASE_PTR4 0x0270 //HCCA base address
#define TX_BASE_PTR4 0x0270 /*HCCA base address */
#define TX_MAX_CNT4 0x0274
#define TX_CTX_IDX4 0x0278
#define TX_DTX_IDX4 0x027c
#define TX_BASE_PTR5 0x0280 //MGMT base address
#define TX_BASE_PTR5 0x0280 /*MGMT base address */
#define TX_MAX_CNT5 0x0284
#define TX_CTX_IDX5 0x0288
#define TX_DTX_IDX5 0x028c
#define TX_MGMTMAX_CNT TX_MAX_CNT5
#define TX_MGMTCTX_IDX TX_CTX_IDX5
#define TX_MGMTDTX_IDX TX_DTX_IDX5
#define RX_BASE_PTR 0x0290 //RX base address
#define RX_BASE_PTR 0x0290 /*RX base address */
#define RX_MAX_CNT 0x0294
#define RX_CRX_IDX 0x0298
#define RX_DRX_IDX 0x029c
......@@ -328,27 +328,27 @@ typedef union _AC_TXOP_CSR1_STRUC {
#define USB_DMA_CFG 0x02a0
typedef union _USB_DMA_CFG_STRUC {
struct {
UINT32 RxBulkAggTOut:8; //Rx Bulk Aggregation TimeOut in unit of 33ns
UINT32 RxBulkAggLmt:8; //Rx Bulk Aggregation Limit in unit of 256 bytes
UINT32 phyclear:1; //phy watch dog enable. write 1
UINT32 RxBulkAggTOut:8; /*Rx Bulk Aggregation TimeOut in unit of 33ns */
UINT32 RxBulkAggLmt:8; /*Rx Bulk Aggregation Limit in unit of 256 bytes */
UINT32 phyclear:1; /*phy watch dog enable. write 1 */
UINT32 rsv:2;
UINT32 TxClear:1; //Clear USB DMA TX path
UINT32 TxopHalt:1; //Halt TXOP count down when TX buffer is full.
UINT32 RxBulkAggEn:1; //Enable Rx Bulk Aggregation
UINT32 RxBulkEn:1; //Enable USB DMA Rx
UINT32 TxBulkEn:1; //Enable USB DMA Tx
UINT32 EpoutValid:6; //OUT endpoint data valid
UINT32 RxBusy:1; //USB DMA RX FSM busy
UINT32 TxBusy:1; //USB DMA TX FSM busy
UINT32 TxClear:1; /*Clear USB DMA TX path */
UINT32 TxopHalt:1; /*Halt TXOP count down when TX buffer is full. */
UINT32 RxBulkAggEn:1; /*Enable Rx Bulk Aggregation */
UINT32 RxBulkEn:1; /*Enable USB DMA Rx */
UINT32 TxBulkEn:1; /*Enable USB DMA Tx */
UINT32 EpoutValid:6; /*OUT endpoint data valid */
UINT32 RxBusy:1; /*USB DMA RX FSM busy */
UINT32 TxBusy:1; /*USB DMA TX FSM busy */
} field;
UINT32 word;
} USB_DMA_CFG_STRUC, *PUSB_DMA_CFG_STRUC;
//
// 3 PBF registers
//
//
// Most are for debug. Driver doesn't touch PBF register.
/* */
/* 3 PBF registers */
/* */
/* */
/* Most are for debug. Driver doesn't touch PBF register. */
#define PBF_SYS_CTRL 0x0400
#define PBF_CFG 0x0408
#define PBF_MAX_PCNT 0x040C
......@@ -361,224 +361,224 @@ typedef union _USB_DMA_CFG_STRUC {
#ifdef RT30xx
#ifdef RTMP_EFUSE_SUPPORT
// eFuse registers
/* eFuse registers */
#define EFUSE_CTRL 0x0580
#define EFUSE_DATA0 0x0590
#define EFUSE_DATA1 0x0594
#define EFUSE_DATA2 0x0598
#define EFUSE_DATA3 0x059c
#endif // RTMP_EFUSE_SUPPORT //
#endif // RT30xx //
#endif /* RTMP_EFUSE_SUPPORT // */
#endif /* RT30xx // */
#define OSC_CTRL 0x5a4
#define PCIE_PHY_TX_ATTENUATION_CTRL 0x05C8
#define LDO_CFG0 0x05d4
#define GPIO_SWITCH 0x05dc
//
// 4 MAC registers
//
//
// 4.1 MAC SYSTEM configuration registers (offset:0x1000)
//
/* */
/* 4 MAC registers */
/* */
/* */
/* 4.1 MAC SYSTEM configuration registers (offset:0x1000) */
/* */
#define MAC_CSR0 0x1000
typedef union _ASIC_VER_ID_STRUC {
struct {
USHORT ASICRev; // reversion : 0
USHORT ASICVer; // version : 2860
USHORT ASICRev; /* reversion : 0 */
USHORT ASICVer; /* version : 2860 */
} field;
UINT32 word;
} ASIC_VER_ID_STRUC, *PASIC_VER_ID_STRUC;
#define MAC_SYS_CTRL 0x1004 //MAC_CSR1
#define MAC_ADDR_DW0 0x1008 // MAC ADDR DW0
#define MAC_ADDR_DW1 0x100c // MAC ADDR DW1
//
// MAC_CSR2: STA MAC register 0
//
#define MAC_SYS_CTRL 0x1004 /*MAC_CSR1 */
#define MAC_ADDR_DW0 0x1008 /* MAC ADDR DW0 */
#define MAC_ADDR_DW1 0x100c /* MAC ADDR DW1 */
/* */
/* MAC_CSR2: STA MAC register 0 */
/* */
typedef union _MAC_DW0_STRUC {
struct {
UCHAR Byte0; // MAC address byte 0
UCHAR Byte1; // MAC address byte 1
UCHAR Byte2; // MAC address byte 2
UCHAR Byte3; // MAC address byte 3
UCHAR Byte0; /* MAC address byte 0 */
UCHAR Byte1; /* MAC address byte 1 */
UCHAR Byte2; /* MAC address byte 2 */
UCHAR Byte3; /* MAC address byte 3 */
} field;
UINT32 word;
} MAC_DW0_STRUC, *PMAC_DW0_STRUC;
//
// MAC_CSR3: STA MAC register 1
//
/* */
/* MAC_CSR3: STA MAC register 1 */
/* */
typedef union _MAC_DW1_STRUC {
struct {
UCHAR Byte4; // MAC address byte 4
UCHAR Byte5; // MAC address byte 5
UCHAR Byte4; /* MAC address byte 4 */
UCHAR Byte5; /* MAC address byte 5 */
UCHAR U2MeMask;
UCHAR Rsvd1;
} field;
UINT32 word;
} MAC_DW1_STRUC, *PMAC_DW1_STRUC;
#define MAC_BSSID_DW0 0x1010 // MAC BSSID DW0
#define MAC_BSSID_DW1 0x1014 // MAC BSSID DW1
#define MAC_BSSID_DW0 0x1010 /* MAC BSSID DW0 */
#define MAC_BSSID_DW1 0x1014 /* MAC BSSID DW1 */
//
// MAC_CSR5: BSSID register 1
//
/* */
/* MAC_CSR5: BSSID register 1 */
/* */
typedef union _MAC_CSR5_STRUC {
struct {
UCHAR Byte4; // BSSID byte 4
UCHAR Byte5; // BSSID byte 5
USHORT BssIdMask:2; // 0: one BSSID, 10: 4 BSSID, 01: 2 BSSID , 11: 8BSSID
UCHAR Byte4; /* BSSID byte 4 */
UCHAR Byte5; /* BSSID byte 5 */
USHORT BssIdMask:2; /* 0: one BSSID, 10: 4 BSSID, 01: 2 BSSID , 11: 8BSSID */
USHORT MBssBcnNum:3;
USHORT Rsvd:11;
} field;
UINT32 word;
} MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
#define MAX_LEN_CFG 0x1018 // rt2860b max 16k bytes. bit12:13 Maximum PSDU length (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
#define BBP_CSR_CFG 0x101c //
//
// BBP_CSR_CFG: BBP serial control register
//
#define MAX_LEN_CFG 0x1018 /* rt2860b max 16k bytes. bit12:13 Maximum PSDU length (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16 */
#define BBP_CSR_CFG 0x101c /* */
/* */
/* BBP_CSR_CFG: BBP serial control register */
/* */
typedef union _BBP_CSR_CFG_STRUC {
struct {
UINT32 Value:8; // Register value to program into BBP
UINT32 RegNum:8; // Selected BBP register
UINT32 fRead:1; // 0: Write BBP, 1: Read BBP
UINT32 Busy:1; // 1: ASIC is busy execute BBP programming.
UINT32 BBP_PAR_DUR:1; // 0: 4 MAC clock cycles 1: 8 MAC clock cycles
UINT32 BBP_RW_MODE:1; // 0: use serial mode 1:parallel
UINT32 Value:8; /* Register value to program into BBP */
UINT32 RegNum:8; /* Selected BBP register */
UINT32 fRead:1; /* 0: Write BBP, 1: Read BBP */
UINT32 Busy:1; /* 1: ASIC is busy execute BBP programming. */
UINT32 BBP_PAR_DUR:1; /* 0: 4 MAC clock cycles 1: 8 MAC clock cycles */
UINT32 BBP_RW_MODE:1; /* 0: use serial mode 1:parallel */
UINT32:12;
} field;
UINT32 word;
} BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC;
#define RF_CSR_CFG0 0x1020
//
// RF_CSR_CFG: RF control register
//
/* */
/* RF_CSR_CFG: RF control register */
/* */
typedef union _RF_CSR_CFG0_STRUC {
struct {
UINT32 RegIdAndContent:24; // Register value to program into BBP
UINT32 bitwidth:5; // Selected BBP register
UINT32 StandbyMode:1; // 0: high when stand by 1: low when standby
UINT32 Sel:1; // 0:RF_LE0 activate 1:RF_LE1 activate
UINT32 Busy:1; // 0: idle 1: 8busy
UINT32 RegIdAndContent:24; /* Register value to program into BBP */
UINT32 bitwidth:5; /* Selected BBP register */
UINT32 StandbyMode:1; /* 0: high when stand by 1: low when standby */
UINT32 Sel:1; /* 0:RF_LE0 activate 1:RF_LE1 activate */
UINT32 Busy:1; /* 0: idle 1: 8busy */
} field;
UINT32 word;
} RF_CSR_CFG0_STRUC, *PRF_CSR_CFG0_STRUC;
#define RF_CSR_CFG1 0x1024
typedef union _RF_CSR_CFG1_STRUC {
struct {
UINT32 RegIdAndContent:24; // Register value to program into BBP
UINT32 RFGap:5; // Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec)
UINT32 rsv:7; // 0: idle 1: 8busy
UINT32 RegIdAndContent:24; /* Register value to program into BBP */
UINT32 RFGap:5; /* Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec) */
UINT32 rsv:7; /* 0: idle 1: 8busy */
} field;
UINT32 word;
} RF_CSR_CFG1_STRUC, *PRF_CSR_CFG1_STRUC;
#define RF_CSR_CFG2 0x1028 //
#define RF_CSR_CFG2 0x1028 /* */
typedef union _RF_CSR_CFG2_STRUC {
struct {
UINT32 RegIdAndContent:24; // Register value to program into BBP
UINT32 rsv:8; // 0: idle 1: 8busy
UINT32 RegIdAndContent:24; /* Register value to program into BBP */
UINT32 rsv:8; /* 0: idle 1: 8busy */
} field;
UINT32 word;
} RF_CSR_CFG2_STRUC, *PRF_CSR_CFG2_STRUC;
#define LED_CFG 0x102c // MAC_CSR14
#define LED_CFG 0x102c /* MAC_CSR14 */
typedef union _LED_CFG_STRUC {
struct {
UINT32 OnPeriod:8; // blinking on period unit 1ms
UINT32 OffPeriod:8; // blinking off period unit 1ms
UINT32 SlowBlinkPeriod:6; // slow blinking period. unit:1ms
UINT32 OnPeriod:8; /* blinking on period unit 1ms */
UINT32 OffPeriod:8; /* blinking off period unit 1ms */
UINT32 SlowBlinkPeriod:6; /* slow blinking period. unit:1ms */
UINT32 rsv:2;
UINT32 RLedMode:2; // red Led Mode 0: off1: blinking upon TX2: periodic slow blinking3: always on
UINT32 GLedMode:2; // green Led Mode
UINT32 YLedMode:2; // yellow Led Mode
UINT32 LedPolar:1; // Led Polarity. 0: active low1: active high
UINT32 RLedMode:2; /* red Led Mode 0: off1: blinking upon TX2: periodic slow blinking3: always on */
UINT32 GLedMode:2; /* green Led Mode */
UINT32 YLedMode:2; /* yellow Led Mode */
UINT32 LedPolar:1; /* Led Polarity. 0: active low1: active high */
UINT32:1;
} field;
UINT32 word;
} LED_CFG_STRUC, *PLED_CFG_STRUC;
//
// 4.2 MAC TIMING configuration registers (offset:0x1100)
//
#define XIFS_TIME_CFG 0x1100 // MAC_CSR8 MAC_CSR9
/* */
/* 4.2 MAC TIMING configuration registers (offset:0x1100) */
/* */
#define XIFS_TIME_CFG 0x1100 /* MAC_CSR8 MAC_CSR9 */
typedef union _IFS_SLOT_CFG_STRUC {
struct {
UINT32 CckmSifsTime:8; // unit 1us. Applied after CCK RX/TX
UINT32 OfdmSifsTime:8; // unit 1us. Applied after OFDM RX/TX
UINT32 OfdmXifsTime:4; //OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND
UINT32 EIFS:9; // unit 1us
UINT32 BBRxendEnable:1; // reference RXEND signal to begin XIFS defer
UINT32 CckmSifsTime:8; /* unit 1us. Applied after CCK RX/TX */
UINT32 OfdmSifsTime:8; /* unit 1us. Applied after OFDM RX/TX */
UINT32 OfdmXifsTime:4; /*OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND */
UINT32 EIFS:9; /* unit 1us */
UINT32 BBRxendEnable:1; /* reference RXEND signal to begin XIFS defer */
UINT32 rsv:2;
} field;
UINT32 word;
} IFS_SLOT_CFG_STRUC, *PIFS_SLOT_CFG_STRUC;
#define BKOFF_SLOT_CFG 0x1104 // mac_csr9 last 8 bits
#define NAV_TIME_CFG 0x1108 // NAV (MAC_CSR15)
#define CH_TIME_CFG 0x110C // Count as channel busy
#define PBF_LIFE_TIMER 0x1110 //TX/RX MPDU timestamp timer (free run)Unit: 1us
#define BCN_TIME_CFG 0x1114 // TXRX_CSR9
#define BKOFF_SLOT_CFG 0x1104 /* mac_csr9 last 8 bits */
#define NAV_TIME_CFG 0x1108 /* NAV (MAC_CSR15) */
#define CH_TIME_CFG 0x110C /* Count as channel busy */
#define PBF_LIFE_TIMER 0x1110 /*TX/RX MPDU timestamp timer (free run)Unit: 1us */
#define BCN_TIME_CFG 0x1114 /* TXRX_CSR9 */
#define BCN_OFFSET0 0x042C
#define BCN_OFFSET1 0x0430
//
// BCN_TIME_CFG : Synchronization control register
//
/* */
/* BCN_TIME_CFG : Synchronization control register */
/* */
typedef union _BCN_TIME_CFG_STRUC {
struct {
UINT32 BeaconInterval:16; // in unit of 1/16 TU
UINT32 bTsfTicking:1; // Enable TSF auto counting
UINT32 TsfSyncMode:2; // Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
UINT32 BeaconInterval:16; /* in unit of 1/16 TU */
UINT32 bTsfTicking:1; /* Enable TSF auto counting */
UINT32 TsfSyncMode:2; /* Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode */
UINT32 bTBTTEnable:1;
UINT32 bBeaconGen:1; // Enable beacon generator
UINT32 bBeaconGen:1; /* Enable beacon generator */
UINT32:3;
UINT32 TxTimestampCompensate:8;
} field;
UINT32 word;
} BCN_TIME_CFG_STRUC, *PBCN_TIME_CFG_STRUC;
#define TBTT_SYNC_CFG 0x1118 // txrx_csr10
#define TSF_TIMER_DW0 0x111C // Local TSF timer lsb 32 bits. Read-only
#define TSF_TIMER_DW1 0x1120 // msb 32 bits. Read-only.
#define TBTT_TIMER 0x1124 // TImer remains till next TBTT. Read-only. TXRX_CSR14
#define INT_TIMER_CFG 0x1128 //
#define INT_TIMER_EN 0x112c // GP-timer and pre-tbtt Int enable
#define CH_IDLE_STA 0x1130 // channel idle time
#define CH_BUSY_STA 0x1134 // channle busy time
//
// 4.2 MAC POWER configuration registers (offset:0x1200)
//
#define MAC_STATUS_CFG 0x1200 // old MAC_CSR12
#define PWR_PIN_CFG 0x1204 // old MAC_CSR12
#define AUTO_WAKEUP_CFG 0x1208 // old MAC_CSR10
//
// AUTO_WAKEUP_CFG: Manual power control / status register
//
#define TBTT_SYNC_CFG 0x1118 /* txrx_csr10 */
#define TSF_TIMER_DW0 0x111C /* Local TSF timer lsb 32 bits. Read-only */
#define TSF_TIMER_DW1 0x1120 /* msb 32 bits. Read-only. */
#define TBTT_TIMER 0x1124 /* TImer remains till next TBTT. Read-only. TXRX_CSR14 */
#define INT_TIMER_CFG 0x1128 /* */
#define INT_TIMER_EN 0x112c /* GP-timer and pre-tbtt Int enable */
#define CH_IDLE_STA 0x1130 /* channel idle time */
#define CH_BUSY_STA 0x1134 /* channle busy time */
/* */
/* 4.2 MAC POWER configuration registers (offset:0x1200) */
/* */
#define MAC_STATUS_CFG 0x1200 /* old MAC_CSR12 */
#define PWR_PIN_CFG 0x1204 /* old MAC_CSR12 */
#define AUTO_WAKEUP_CFG 0x1208 /* old MAC_CSR10 */
/* */
/* AUTO_WAKEUP_CFG: Manual power control / status register */
/* */
typedef union _AUTO_WAKEUP_STRUC {
struct {
UINT32 AutoLeadTime:8;
UINT32 NumofSleepingTbtt:7; // ForceWake has high privilege than PutToSleep when both set
UINT32 EnableAutoWakeup:1; // 0:sleep, 1:awake
UINT32 NumofSleepingTbtt:7; /* ForceWake has high privilege than PutToSleep when both set */
UINT32 EnableAutoWakeup:1; /* 0:sleep, 1:awake */
UINT32:16;
} field;
UINT32 word;
} AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC;
//
// 4.3 MAC TX configuration registers (offset:0x1300)
//
/* */
/* 4.3 MAC TX configuration registers (offset:0x1300) */
/* */
#define EDCA_AC0_CFG 0x1300 //AC_TXOP_CSR0 0x3474
#define EDCA_AC0_CFG 0x1300 /*AC_TXOP_CSR0 0x3474 */
#define EDCA_AC1_CFG 0x1304
#define EDCA_AC2_CFG 0x1308
#define EDCA_AC3_CFG 0x130c
typedef union _EDCA_AC_CFG_STRUC {
struct {
UINT32 AcTxop:8; // in unit of 32us
UINT32 Aifsn:4; // # of slot time
UINT32 Cwmin:4; //
UINT32 Cwmax:4; //unit power of 2
UINT32:12; //
UINT32 AcTxop:8; /* in unit of 32us */
UINT32 Aifsn:4; /* # of slot time */
UINT32 Cwmin:4; /* */
UINT32 Cwmax:4; /*unit power of 2 */
UINT32:12; /* */
} field;
UINT32 word;
} EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC;
......@@ -590,7 +590,7 @@ typedef union _EDCA_AC_CFG_STRUC {
#define TX_PWR_CFG_3 0x1320
#define TX_PWR_CFG_4 0x1324
#define TX_PIN_CFG 0x1328
#define TX_BAND_CFG 0x132c // 0x1 use upper 20MHz. 0 juse lower 20MHz
#define TX_BAND_CFG 0x132c /* 0x1 use upper 20MHz. 0 juse lower 20MHz */
#define TX_SW_CFG0 0x1330
#define TX_SW_CFG1 0x1334
#define TX_SW_CFG2 0x1338
......@@ -601,9 +601,9 @@ typedef union _EDCA_AC_CFG_STRUC {
typedef union _TX_RTS_CFG_STRUC {
struct {
UINT32 AutoRtsRetryLimit:8;
UINT32 RtsThres:16; // unit:byte
UINT32 RtsFbkEn:1; // enable rts rate fallback
UINT32 rsv:7; // 1: HT non-STBC control frame enable
UINT32 RtsThres:16; /* unit:byte */
UINT32 RtsFbkEn:1; /* enable rts rate fallback */
UINT32 rsv:7; /* 1: HT non-STBC control frame enable */
} field;
UINT32 word;
} TX_RTS_CFG_STRUC, *PTX_RTS_CFG_STRUC;
......@@ -611,38 +611,38 @@ typedef union _TX_RTS_CFG_STRUC {
typedef union _TX_TIMEOUT_CFG_STRUC {
struct {
UINT32 rsv:4;
UINT32 MpduLifeTime:4; // expiration time = 2^(9+MPDU LIFE TIME) us
UINT32 RxAckTimeout:8; // unit:slot. Used for TX precedure
UINT32 TxopTimeout:8; //TXOP timeout value for TXOP truncation. It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
UINT32 rsv2:8; // 1: HT non-STBC control frame enable
UINT32 MpduLifeTime:4; /* expiration time = 2^(9+MPDU LIFE TIME) us */
UINT32 RxAckTimeout:8; /* unit:slot. Used for TX precedure */
UINT32 TxopTimeout:8; /*TXOP timeout value for TXOP truncation. It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT) */
UINT32 rsv2:8; /* 1: HT non-STBC control frame enable */
} field;
UINT32 word;
} TX_TIMEOUT_CFG_STRUC, *PTX_TIMEOUT_CFG_STRUC;
#define TX_RTY_CFG 0x134c
typedef union PACKED _TX_RTY_CFG_STRUC {
struct {
UINT32 ShortRtyLimit:8; // short retry limit
UINT32 LongRtyLimit:8; //long retry limit
UINT32 LongRtyThre:12; // Long retry threshoold
UINT32 NonAggRtyMode:1; // Non-Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer
UINT32 AggRtyMode:1; // Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer
UINT32 TxautoFBEnable:1; // Tx retry PHY rate auto fallback enable
UINT32 rsv:1; // 1: HT non-STBC control frame enable
UINT32 ShortRtyLimit:8; /* short retry limit */
UINT32 LongRtyLimit:8; /*long retry limit */
UINT32 LongRtyThre:12; /* Long retry threshoold */
UINT32 NonAggRtyMode:1; /* Non-Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer */
UINT32 AggRtyMode:1; /* Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer */
UINT32 TxautoFBEnable:1; /* Tx retry PHY rate auto fallback enable */
UINT32 rsv:1; /* 1: HT non-STBC control frame enable */
} field;
UINT32 word;
} TX_RTY_CFG_STRUC, *PTX_RTY_CFG_STRUC;
#define TX_LINK_CFG 0x1350
typedef union PACKED _TX_LINK_CFG_STRUC {
struct PACKED {
UINT32 RemoteMFBLifeTime:8; //remote MFB life time. unit : 32us
UINT32 MFBEnable:1; // TX apply remote MFB 1:enable
UINT32 RemoteUMFSEnable:1; // remote unsolicit MFB enable. 0: not apply remote remote unsolicit (MFS=7)
UINT32 TxMRQEn:1; // MCS request TX enable
UINT32 TxRDGEn:1; // RDG TX enable
UINT32 TxCFAckEn:1; // Piggyback CF-ACK enable
UINT32 rsv:3; //
UINT32 RemotMFB:8; // remote MCS feedback
UINT32 RemotMFS:8; //remote MCS feedback sequence number
UINT32 RemoteMFBLifeTime:8; /*remote MFB life time. unit : 32us */
UINT32 MFBEnable:1; /* TX apply remote MFB 1:enable */
UINT32 RemoteUMFSEnable:1; /* remote unsolicit MFB enable. 0: not apply remote remote unsolicit (MFS=7) */
UINT32 TxMRQEn:1; /* MCS request TX enable */
UINT32 TxRDGEn:1; /* RDG TX enable */
UINT32 TxCFAckEn:1; /* Piggyback CF-ACK enable */
UINT32 rsv:3; /* */
UINT32 RemotMFB:8; /* remote MCS feedback */
UINT32 RemotMFS:8; /*remote MCS feedback sequence number */
} field;
UINT32 word;
} TX_LINK_CFG_STRUC, *PTX_LINK_CFG_STRUC;
......@@ -677,116 +677,116 @@ typedef union _HT_FBK_CFG1_STRUC {
#define LG_FBK_CFG0 0x135c
typedef union _LG_FBK_CFG0_STRUC {
struct {
UINT32 OFDMMCS0FBK:4; //initial value is 0
UINT32 OFDMMCS1FBK:4; //initial value is 0
UINT32 OFDMMCS2FBK:4; //initial value is 1
UINT32 OFDMMCS3FBK:4; //initial value is 2
UINT32 OFDMMCS4FBK:4; //initial value is 3
UINT32 OFDMMCS5FBK:4; //initial value is 4
UINT32 OFDMMCS6FBK:4; //initial value is 5
UINT32 OFDMMCS7FBK:4; //initial value is 6
UINT32 OFDMMCS0FBK:4; /*initial value is 0 */
UINT32 OFDMMCS1FBK:4; /*initial value is 0 */
UINT32 OFDMMCS2FBK:4; /*initial value is 1 */
UINT32 OFDMMCS3FBK:4; /*initial value is 2 */
UINT32 OFDMMCS4FBK:4; /*initial value is 3 */
UINT32 OFDMMCS5FBK:4; /*initial value is 4 */
UINT32 OFDMMCS6FBK:4; /*initial value is 5 */
UINT32 OFDMMCS7FBK:4; /*initial value is 6 */
} field;
UINT32 word;
} LG_FBK_CFG0_STRUC, *PLG_FBK_CFG0_STRUC;
#define LG_FBK_CFG1 0x1360
typedef union _LG_FBK_CFG1_STRUC {
struct {
UINT32 CCKMCS0FBK:4; //initial value is 0
UINT32 CCKMCS1FBK:4; //initial value is 0
UINT32 CCKMCS2FBK:4; //initial value is 1
UINT32 CCKMCS3FBK:4; //initial value is 2
UINT32 CCKMCS0FBK:4; /*initial value is 0 */
UINT32 CCKMCS1FBK:4; /*initial value is 0 */
UINT32 CCKMCS2FBK:4; /*initial value is 1 */
UINT32 CCKMCS3FBK:4; /*initial value is 2 */
UINT32 rsv:16;
} field;
UINT32 word;
} LG_FBK_CFG1_STRUC, *PLG_FBK_CFG1_STRUC;
//=======================================================
//================ Protection Paramater================================
//=======================================================
#define CCK_PROT_CFG 0x1364 //CCK Protection
/*======================================================= */
/*================ Protection Paramater================================ */
/*======================================================= */
#define CCK_PROT_CFG 0x1364 /*CCK Protection */
#define ASIC_SHORTNAV 1
#define ASIC_LONGNAV 2
#define ASIC_RTS 1
#define ASIC_CTS 2
typedef union _PROT_CFG_STRUC {
struct {
UINT32 ProtectRate:16; //Protection control frame rate for CCK TX(RTS/CTS/CFEnd).
UINT32 ProtectCtrl:2; //Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv
UINT32 ProtectNav:2; //TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect, 2:LongNAVProtect, 3:rsv
UINT32 TxopAllowCck:1; //CCK TXOP allowance.0:disallow.
UINT32 TxopAllowOfdm:1; //CCK TXOP allowance.0:disallow.
UINT32 TxopAllowMM20:1; //CCK TXOP allowance. 0:disallow.
UINT32 TxopAllowMM40:1; //CCK TXOP allowance.0:disallow.
UINT32 TxopAllowGF20:1; //CCK TXOP allowance.0:disallow.
UINT32 TxopAllowGF40:1; //CCK TXOP allowance.0:disallow.
UINT32 RTSThEn:1; //RTS threshold enable on CCK TX
UINT32 ProtectRate:16; /*Protection control frame rate for CCK TX(RTS/CTS/CFEnd). */
UINT32 ProtectCtrl:2; /*Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv */
UINT32 ProtectNav:2; /*TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect, 2:LongNAVProtect, 3:rsv */
UINT32 TxopAllowCck:1; /*CCK TXOP allowance.0:disallow. */
UINT32 TxopAllowOfdm:1; /*CCK TXOP allowance.0:disallow. */
UINT32 TxopAllowMM20:1; /*CCK TXOP allowance. 0:disallow. */
UINT32 TxopAllowMM40:1; /*CCK TXOP allowance.0:disallow. */
UINT32 TxopAllowGF20:1; /*CCK TXOP allowance.0:disallow. */
UINT32 TxopAllowGF40:1; /*CCK TXOP allowance.0:disallow. */
UINT32 RTSThEn:1; /*RTS threshold enable on CCK TX */
UINT32 rsv:5;
} field;
UINT32 word;
} PROT_CFG_STRUC, *PPROT_CFG_STRUC;
#define OFDM_PROT_CFG 0x1368 //OFDM Protection
#define MM20_PROT_CFG 0x136C //MM20 Protection
#define MM40_PROT_CFG 0x1370 //MM40 Protection
#define GF20_PROT_CFG 0x1374 //GF20 Protection
#define GF40_PROT_CFG 0x1378 //GR40 Protection
#define EXP_CTS_TIME 0x137C //
#define EXP_ACK_TIME 0x1380 //
//
// 4.4 MAC RX configuration registers (offset:0x1400)
//
#define RX_FILTR_CFG 0x1400 //TXRX_CSR0
#define AUTO_RSP_CFG 0x1404 //TXRX_CSR4
//
// TXRX_CSR4: Auto-Responder/
//
#define OFDM_PROT_CFG 0x1368 /*OFDM Protection */
#define MM20_PROT_CFG 0x136C /*MM20 Protection */
#define MM40_PROT_CFG 0x1370 /*MM40 Protection */
#define GF20_PROT_CFG 0x1374 /*GF20 Protection */
#define GF40_PROT_CFG 0x1378 /*GR40 Protection */
#define EXP_CTS_TIME 0x137C /* */
#define EXP_ACK_TIME 0x1380 /* */
/* */
/* 4.4 MAC RX configuration registers (offset:0x1400) */
/* */
#define RX_FILTR_CFG 0x1400 /*TXRX_CSR0 */
#define AUTO_RSP_CFG 0x1404 /*TXRX_CSR4 */
/* */
/* TXRX_CSR4: Auto-Responder/ */
/* */
typedef union _AUTO_RSP_CFG_STRUC {
struct {
UINT32 AutoResponderEnable:1;
UINT32 BACAckPolicyEnable:1; // 0:long, 1:short preamble
UINT32 CTS40MMode:1; // Response CTS 40MHz duplicate mode
UINT32 CTS40MRef:1; // Response CTS 40MHz duplicate mode
UINT32 AutoResponderPreamble:1; // 0:long, 1:short preamble
UINT32 rsv:1; // Power bit value in conrtrol frame
UINT32 DualCTSEn:1; // Power bit value in conrtrol frame
UINT32 AckCtsPsmBit:1; // Power bit value in conrtrol frame
UINT32 BACAckPolicyEnable:1; /* 0:long, 1:short preamble */
UINT32 CTS40MMode:1; /* Response CTS 40MHz duplicate mode */
UINT32 CTS40MRef:1; /* Response CTS 40MHz duplicate mode */
UINT32 AutoResponderPreamble:1; /* 0:long, 1:short preamble */
UINT32 rsv:1; /* Power bit value in conrtrol frame */
UINT32 DualCTSEn:1; /* Power bit value in conrtrol frame */
UINT32 AckCtsPsmBit:1; /* Power bit value in conrtrol frame */
UINT32:24;
} field;
UINT32 word;
} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC;
#define LEGACY_BASIC_RATE 0x1408 // TXRX_CSR5 0x3054
#define LEGACY_BASIC_RATE 0x1408 /* TXRX_CSR5 0x3054 */
#define HT_BASIC_RATE 0x140c
#define HT_CTRL_CFG 0x1410
#define SIFS_COST_CFG 0x1414
#define RX_PARSER_CFG 0x1418 //Set NAV for all received frames
//
// 4.5 MAC Security configuration (offset:0x1500)
//
#define TX_SEC_CNT0 0x1500 //
#define RX_SEC_CNT0 0x1504 //
#define CCMP_FC_MUTE 0x1508 //
//
// 4.6 HCCA/PSMP (offset:0x1600)
//
#define RX_PARSER_CFG 0x1418 /*Set NAV for all received frames */
/* */
/* 4.5 MAC Security configuration (offset:0x1500) */
/* */
#define TX_SEC_CNT0 0x1500 /* */
#define RX_SEC_CNT0 0x1504 /* */
#define CCMP_FC_MUTE 0x1508 /* */
/* */
/* 4.6 HCCA/PSMP (offset:0x1600) */
/* */
#define TXOP_HLDR_ADDR0 0x1600
#define TXOP_HLDR_ADDR1 0x1604
#define TXOP_HLDR_ET 0x1608
#define QOS_CFPOLL_RA_DW0 0x160c
#define QOS_CFPOLL_A1_DW1 0x1610
#define QOS_CFPOLL_QC 0x1614
//
// 4.7 MAC Statistis registers (offset:0x1700)
//
#define RX_STA_CNT0 0x1700 //
#define RX_STA_CNT1 0x1704 //
#define RX_STA_CNT2 0x1708 //
//
// RX_STA_CNT0_STRUC: RX PLCP error count & RX CRC error count
//
/* */
/* 4.7 MAC Statistis registers (offset:0x1700) */
/* */
#define RX_STA_CNT0 0x1700 /* */
#define RX_STA_CNT1 0x1704 /* */
#define RX_STA_CNT2 0x1708 /* */
/* */
/* RX_STA_CNT0_STRUC: RX PLCP error count & RX CRC error count */
/* */
typedef union _RX_STA_CNT0_STRUC {
struct {
USHORT CrcErr;
......@@ -795,9 +795,9 @@ typedef union _RX_STA_CNT0_STRUC {
UINT32 word;
} RX_STA_CNT0_STRUC, *PRX_STA_CNT0_STRUC;
//
// RX_STA_CNT1_STRUC: RX False CCA count & RX LONG frame count
//
/* */
/* RX_STA_CNT1_STRUC: RX False CCA count & RX LONG frame count */
/* */
typedef union _RX_STA_CNT1_STRUC {
struct {
USHORT FalseCca;
......@@ -806,9 +806,9 @@ typedef union _RX_STA_CNT1_STRUC {
UINT32 word;
} RX_STA_CNT1_STRUC, *PRX_STA_CNT1_STRUC;
//
// RX_STA_CNT2_STRUC:
//
/* */
/* RX_STA_CNT2_STRUC: */
/* */
typedef union _RX_STA_CNT2_STRUC {
struct {
USHORT RxDupliCount;
......@@ -816,10 +816,10 @@ typedef union _RX_STA_CNT2_STRUC {
} field;
UINT32 word;
} RX_STA_CNT2_STRUC, *PRX_STA_CNT2_STRUC;
#define TX_STA_CNT0 0x170C //
//
// STA_CSR3: TX Beacon count
//
#define TX_STA_CNT0 0x170C /* */
/* */
/* STA_CSR3: TX Beacon count */
/* */
typedef union _TX_STA_CNT0_STRUC {
struct {
USHORT TxFailCount;
......@@ -827,10 +827,10 @@ typedef union _TX_STA_CNT0_STRUC {
} field;
UINT32 word;
} TX_STA_CNT0_STRUC, *PTX_STA_CNT0_STRUC;
#define TX_STA_CNT1 0x1710 //
//
// TX_STA_CNT1: TX tx count
//
#define TX_STA_CNT1 0x1710 /* */
/* */
/* TX_STA_CNT1: TX tx count */
/* */
typedef union _TX_STA_CNT1_STRUC {
struct {
USHORT TxSuccess;
......@@ -838,10 +838,10 @@ typedef union _TX_STA_CNT1_STRUC {
} field;
UINT32 word;
} TX_STA_CNT1_STRUC, *PTX_STA_CNT1_STRUC;
#define TX_STA_CNT2 0x1714 //
//
// TX_STA_CNT2: TX tx count
//
#define TX_STA_CNT2 0x1714 /* */
/* */
/* TX_STA_CNT2: TX tx count */
/* */
typedef union _TX_STA_CNT2_STRUC {
struct {
USHORT TxZeroLenCount;
......@@ -849,26 +849,26 @@ typedef union _TX_STA_CNT2_STRUC {
} field;
UINT32 word;
} TX_STA_CNT2_STRUC, *PTX_STA_CNT2_STRUC;
#define TX_STA_FIFO 0x1718 //
//
// TX_STA_FIFO_STRUC: TX Result for specific PID status fifo register
//
#define TX_STA_FIFO 0x1718 /* */
/* */
/* TX_STA_FIFO_STRUC: TX Result for specific PID status fifo register */
/* */
typedef union PACKED _TX_STA_FIFO_STRUC {
struct {
UINT32 bValid:1; // 1:This register contains a valid TX result
UINT32 bValid:1; /* 1:This register contains a valid TX result */
UINT32 PidType:4;
UINT32 TxSuccess:1; // Tx No retry success
UINT32 TxAggre:1; // Tx Retry Success
UINT32 TxAckRequired:1; // Tx fail
UINT32 wcid:8; //wireless client index
// UINT32 SuccessRate:16; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16.
UINT32 SuccessRate:13; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16.
UINT32 TxSuccess:1; /* Tx No retry success */
UINT32 TxAggre:1; /* Tx Retry Success */
UINT32 TxAckRequired:1; /* Tx fail */
UINT32 wcid:8; /*wireless client index */
/* UINT32 SuccessRate:16; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
UINT32 SuccessRate:13; /*include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
UINT32 TxBF:1;
UINT32 Reserve:2;
} field;
UINT32 word;
} TX_STA_FIFO_STRUC, *PTX_STA_FIFO_STRUC;
// Debug counter
/* Debug counter */
#define TX_AGG_CNT 0x171c
typedef union _TX_AGG_CNT_STRUC {
struct {
......@@ -877,7 +877,7 @@ typedef union _TX_AGG_CNT_STRUC {
} field;
UINT32 word;
} TX_AGG_CNT_STRUC, *PTX_AGG_CNT_STRUC;
// Debug counter
/* Debug counter */
#define TX_AGG_CNT0 0x1720
typedef union _TX_AGG_CNT0_STRUC {
struct {
......@@ -886,7 +886,7 @@ typedef union _TX_AGG_CNT0_STRUC {
} field;
UINT32 word;
} TX_AGG_CNT0_STRUC, *PTX_AGG_CNT0_STRUC;
// Debug counter
/* Debug counter */
#define TX_AGG_CNT1 0x1724
typedef union _TX_AGG_CNT1_STRUC {
struct {
......@@ -903,7 +903,7 @@ typedef union _TX_AGG_CNT2_STRUC {
} field;
UINT32 word;
} TX_AGG_CNT2_STRUC, *PTX_AGG_CNT2_STRUC;
// Debug counter
/* Debug counter */
#define TX_AGG_CNT3 0x172c
typedef union _TX_AGG_CNT3_STRUC {
struct {
......@@ -912,7 +912,7 @@ typedef union _TX_AGG_CNT3_STRUC {
} field;
UINT32 word;
} TX_AGG_CNT3_STRUC, *PTX_AGG_CNT3_STRUC;
// Debug counter
/* Debug counter */
#define TX_AGG_CNT4 0x1730
typedef union _TX_AGG_CNT4_STRUC {
struct {
......@@ -948,32 +948,32 @@ typedef union _TX_AGG_CNT7_STRUC {
#define MPDU_DENSITY_CNT 0x1740
typedef union _MPDU_DEN_CNT_STRUC {
struct {
USHORT TXZeroDelCount; //TX zero length delimiter count
USHORT RXZeroDelCount; //RX zero length delimiter count
USHORT TXZeroDelCount; /*TX zero length delimiter count */
USHORT RXZeroDelCount; /*RX zero length delimiter count */
} field;
UINT32 word;
} MPDU_DEN_CNT_STRUC, *PMPDU_DEN_CNT_STRUC;
//
// TXRX control registers - base address 0x3000
//
// rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
/* */
/* TXRX control registers - base address 0x3000 */
/* */
/* rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first.. */
#define TXRX_CSR1 0x77d0
//
// Security key table memory, base address = 0x1000
//
#define MAC_WCID_BASE 0x1800 //8-bytes(use only 6-bytes) * 256 entry =
/* */
/* Security key table memory, base address = 0x1000 */
/* */
#define MAC_WCID_BASE 0x1800 /*8-bytes(use only 6-bytes) * 256 entry = */
#define HW_WCID_ENTRY_SIZE 8
#define PAIRWISE_KEY_TABLE_BASE 0x4000 // 32-byte * 256-entry = -byte
#define PAIRWISE_KEY_TABLE_BASE 0x4000 /* 32-byte * 256-entry = -byte */
#define HW_KEY_ENTRY_SIZE 0x20
#define PAIRWISE_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte
#define MAC_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte
#define PAIRWISE_IVEIV_TABLE_BASE 0x6000 /* 8-byte * 256-entry = -byte */
#define MAC_IVEIV_TABLE_BASE 0x6000 /* 8-byte * 256-entry = -byte */
#define HW_IVEIV_ENTRY_SIZE 8
#define MAC_WCID_ATTRIBUTE_BASE 0x6800 // 4-byte * 256-entry = -byte
#define MAC_WCID_ATTRIBUTE_BASE 0x6800 /* 4-byte * 256-entry = -byte */
#define HW_WCID_ATTRI_SIZE 4
#define WCID_RESERVED 0x6bfc
#define SHARED_KEY_TABLE_BASE 0x6c00 // 32-byte * 16-entry = 512-byte
#define SHARED_KEY_MODE_BASE 0x7000 // 32-byte * 16-entry = 512-byte
#define SHARED_KEY_TABLE_BASE 0x6c00 /* 32-byte * 16-entry = 512-byte */
#define SHARED_KEY_MODE_BASE 0x7000 /* 32-byte * 16-entry = 512-byte */
#define HW_SHARED_KEY_MODE_SIZE 4
#define SHAREDKEYTABLE 0
#define PAIRWISEKEYTABLE 1
......@@ -999,48 +999,48 @@ typedef union _SHAREDKEY_MODE_STRUC {
} field;
UINT32 word;
} SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
// 64-entry for pairwise key table
typedef struct _HW_WCID_ENTRY { // 8-byte per entry
/* 64-entry for pairwise key table */
typedef struct _HW_WCID_ENTRY { /* 8-byte per entry */
UCHAR Address[6];
UCHAR Rsv[2];
} HW_WCID_ENTRY, PHW_WCID_ENTRY;
// =================================================================================
// WCID format
// =================================================================================
//7.1 WCID ENTRY format : 8bytes
/* ================================================================================= */
/* WCID format */
/* ================================================================================= */
/*7.1 WCID ENTRY format : 8bytes */
typedef struct _WCID_ENTRY_STRUC {
UCHAR RXBABitmap7; // bit0 for TID8, bit7 for TID 15
UCHAR RXBABitmap0; // bit0 for TID0, bit7 for TID 7
UCHAR MAC[6]; // 0 for shared key table. 1 for pairwise key table
UCHAR RXBABitmap7; /* bit0 for TID8, bit7 for TID 15 */
UCHAR RXBABitmap0; /* bit0 for TID0, bit7 for TID 7 */
UCHAR MAC[6]; /* 0 for shared key table. 1 for pairwise key table */
} WCID_ENTRY_STRUC, *PWCID_ENTRY_STRUC;
//8.1.1 SECURITY KEY format : 8DW
// 32-byte per entry, total 16-entry for shared key table, 64-entry for pairwise key table
typedef struct _HW_KEY_ENTRY { // 32-byte per entry
/*8.1.1 SECURITY KEY format : 8DW */
/* 32-byte per entry, total 16-entry for shared key table, 64-entry for pairwise key table */
typedef struct _HW_KEY_ENTRY { /* 32-byte per entry */
UCHAR Key[16];
UCHAR TxMic[8];
UCHAR RxMic[8];
} HW_KEY_ENTRY, *PHW_KEY_ENTRY;
//8.1.2 IV/EIV format : 2DW
/*8.1.2 IV/EIV format : 2DW */
//8.1.3 RX attribute entry format : 1DW
/*8.1.3 RX attribute entry format : 1DW */
typedef struct _MAC_ATTRIBUTE_STRUC {
UINT32 KeyTab:1; // 0 for shared key table. 1 for pairwise key table
UINT32 KeyTab:1; /* 0 for shared key table. 1 for pairwise key table */
UINT32 PairKeyMode:3;
UINT32 BSSIDIdx:3; //multipleBSS index for the WCID
UINT32 BSSIDIdx:3; /*multipleBSS index for the WCID */
UINT32 RXWIUDF:3;
UINT32 rsv:22;
} MAC_ATTRIBUTE_STRUC, *PMAC_ATTRIBUTE_STRUC;
// =================================================================================
// HOST-MCU communication data structure
// =================================================================================
/* ================================================================================= */
/* HOST-MCU communication data structure */
/* ================================================================================= */
//
// H2M_MAILBOX_CSR: Host-to-MCU Mailbox
//
/* */
/* H2M_MAILBOX_CSR: Host-to-MCU Mailbox */
/* */
typedef union _H2M_MAILBOX_STRUC {
struct {
UINT32 LowByte:8;
......@@ -1051,9 +1051,9 @@ typedef union _H2M_MAILBOX_STRUC {
UINT32 word;
} H2M_MAILBOX_STRUC, *PH2M_MAILBOX_STRUC;
//
// M2H_CMD_DONE_CSR: MCU-to-Host command complete indication
//
/* */
/* M2H_CMD_DONE_CSR: MCU-to-Host command complete indication */
/* */
typedef union _M2H_CMD_DONE_STRUC {
struct {
UINT32 CmdToken0;
......@@ -1064,42 +1064,42 @@ typedef union _M2H_CMD_DONE_STRUC {
UINT32 word;
} M2H_CMD_DONE_STRUC, *PM2H_CMD_DONE_STRUC;
//NAV_TIME_CFG :NAV
/*NAV_TIME_CFG :NAV */
typedef union _NAV_TIME_CFG_STRUC {
struct {
UCHAR Sifs; // in unit of 1-us
UCHAR SlotTime; // in unit of 1-us
USHORT Eifs:9; // in unit of 1-us
USHORT ZeroSifs:1; // Applied zero SIFS timer after OFDM RX 0: disable
UCHAR Sifs; /* in unit of 1-us */
UCHAR SlotTime; /* in unit of 1-us */
USHORT Eifs:9; /* in unit of 1-us */
USHORT ZeroSifs:1; /* Applied zero SIFS timer after OFDM RX 0: disable */
USHORT rsv:6;
} field;
UINT32 word;
} NAV_TIME_CFG_STRUC, *PNAV_TIME_CFG_STRUC;
//
// RX_FILTR_CFG: /RX configuration register
//
/* */
/* RX_FILTR_CFG: /RX configuration register */
/* */
typedef union _RX_FILTR_CFG_STRUC {
struct {
UINT32 DropCRCErr:1; // Drop CRC error
UINT32 DropPhyErr:1; // Drop physical error
UINT32 DropNotToMe:1; // Drop not to me unicast frame
UINT32 DropNotMyBSSID:1; // Drop fram ToDs bit is true
UINT32 DropVerErr:1; // Drop version error frame
UINT32 DropMcast:1; // Drop multicast frames
UINT32 DropBcast:1; // Drop broadcast frames
UINT32 DropDuplicate:1; // Drop duplicate frame
UINT32 DropCFEndAck:1; // Drop Ps-Poll
UINT32 DropCFEnd:1; // Drop Ps-Poll
UINT32 DropAck:1; // Drop Ps-Poll
UINT32 DropCts:1; // Drop Ps-Poll
UINT32 DropRts:1; // Drop Ps-Poll
UINT32 DropPsPoll:1; // Drop Ps-Poll
UINT32 DropBA:1; //
UINT32 DropBAR:1; //
UINT32 DropCRCErr:1; /* Drop CRC error */
UINT32 DropPhyErr:1; /* Drop physical error */
UINT32 DropNotToMe:1; /* Drop not to me unicast frame */
UINT32 DropNotMyBSSID:1; /* Drop fram ToDs bit is true */
UINT32 DropVerErr:1; /* Drop version error frame */
UINT32 DropMcast:1; /* Drop multicast frames */
UINT32 DropBcast:1; /* Drop broadcast frames */
UINT32 DropDuplicate:1; /* Drop duplicate frame */
UINT32 DropCFEndAck:1; /* Drop Ps-Poll */
UINT32 DropCFEnd:1; /* Drop Ps-Poll */
UINT32 DropAck:1; /* Drop Ps-Poll */
UINT32 DropCts:1; /* Drop Ps-Poll */
UINT32 DropRts:1; /* Drop Ps-Poll */
UINT32 DropPsPoll:1; /* Drop Ps-Poll */
UINT32 DropBA:1; /* */
UINT32 DropBAR:1; /* */
UINT32 DropRsvCntlType:1;
UINT32:15;
......@@ -1107,23 +1107,23 @@ typedef union _RX_FILTR_CFG_STRUC {
UINT32 word;
} RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
//
// PHY_CSR4: RF serial control register
//
/* */
/* PHY_CSR4: RF serial control register */
/* */
typedef union _PHY_CSR4_STRUC {
struct {
UINT32 RFRegValue:24; // Register value (include register id) serial out to RF/IF chip.
UINT32 NumberOfBits:5; // Number of bits used in RFRegValue (I:20, RFMD:22)
UINT32 IFSelect:1; // 1: select IF to program, 0: select RF to program
UINT32 PLL_LD:1; // RF PLL_LD status
UINT32 Busy:1; // 1: ASIC is busy execute RF programming.
UINT32 RFRegValue:24; /* Register value (include register id) serial out to RF/IF chip. */
UINT32 NumberOfBits:5; /* Number of bits used in RFRegValue (I:20, RFMD:22) */
UINT32 IFSelect:1; /* 1: select IF to program, 0: select RF to program */
UINT32 PLL_LD:1; /* RF PLL_LD status */
UINT32 Busy:1; /* 1: ASIC is busy execute RF programming. */
} field;
UINT32 word;
} PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
//
// SEC_CSR5: shared key table security mode register
//
/* */
/* SEC_CSR5: shared key table security mode register */
/* */
typedef union _SEC_CSR5_STRUC {
struct {
UINT32 Bss2Key0CipherAlg:3;
......@@ -1146,9 +1146,9 @@ typedef union _SEC_CSR5_STRUC {
UINT32 word;
} SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
//
// HOST_CMD_CSR: For HOST to interrupt embedded processor
//
/* */
/* HOST_CMD_CSR: For HOST to interrupt embedded processor */
/* */
typedef union _HOST_CMD_CSR_STRUC {
struct {
UINT32 HostCommand:8;
......@@ -1157,47 +1157,47 @@ typedef union _HOST_CMD_CSR_STRUC {
UINT32 word;
} HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
//
// AIFSN_CSR: AIFSN for each EDCA AC
//
/* */
/* AIFSN_CSR: AIFSN for each EDCA AC */
/* */
//
// E2PROM_CSR: EEPROM control register
//
/* */
/* E2PROM_CSR: EEPROM control register */
/* */
typedef union _E2PROM_CSR_STRUC {
struct {
UINT32 Reload:1; // Reload EEPROM content, write one to reload, self-cleared.
UINT32 Reload:1; /* Reload EEPROM content, write one to reload, self-cleared. */
UINT32 EepromSK:1;
UINT32 EepromCS:1;
UINT32 EepromDI:1;
UINT32 EepromDO:1;
UINT32 Type:1; // 1: 93C46, 0:93C66
UINT32 LoadStatus:1; // 1:loading, 0:done
UINT32 Type:1; /* 1: 93C46, 0:93C66 */
UINT32 LoadStatus:1; /* 1:loading, 0:done */
UINT32 Rsvd:25;
} field;
UINT32 word;
} E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
//
// QOS_CSR0: TXOP holder address0 register
//
/* */
/* QOS_CSR0: TXOP holder address0 register */
/* */
typedef union _QOS_CSR0_STRUC {
struct {
UCHAR Byte0; // MAC address byte 0
UCHAR Byte1; // MAC address byte 1
UCHAR Byte2; // MAC address byte 2
UCHAR Byte3; // MAC address byte 3
UCHAR Byte0; /* MAC address byte 0 */
UCHAR Byte1; /* MAC address byte 1 */
UCHAR Byte2; /* MAC address byte 2 */
UCHAR Byte3; /* MAC address byte 3 */
} field;
UINT32 word;
} QOS_CSR0_STRUC, *PQOS_CSR0_STRUC;
//
// QOS_CSR1: TXOP holder address1 register
//
/* */
/* QOS_CSR1: TXOP holder address1 register */
/* */
typedef union _QOS_CSR1_STRUC {
struct {
UCHAR Byte4; // MAC address byte 4
UCHAR Byte5; // MAC address byte 5
UCHAR Byte4; /* MAC address byte 4 */
UCHAR Byte5; /* MAC address byte 5 */
UCHAR Rsvd0;
UCHAR Rsvd1;
} field;
......@@ -1207,41 +1207,41 @@ typedef union _QOS_CSR1_STRUC {
#define RF_CSR_CFG 0x500
typedef union _RF_CSR_CFG_STRUC {
struct {
UINT RF_CSR_DATA:8; // DATA
UINT TESTCSR_RFACC_REGNUM:5; // RF register ID
UINT Rsvd2:3; // Reserved
UINT RF_CSR_WR:1; // 0: read 1: write
UINT RF_CSR_KICK:1; // kick RF register read/write
UINT Rsvd1:14; // Reserved
UINT RF_CSR_DATA:8; /* DATA */
UINT TESTCSR_RFACC_REGNUM:5; /* RF register ID */
UINT Rsvd2:3; /* Reserved */
UINT RF_CSR_WR:1; /* 0: read 1: write */
UINT RF_CSR_KICK:1; /* kick RF register read/write */
UINT Rsvd1:14; /* Reserved */
} field;
UINT word;
} RF_CSR_CFG_STRUC, *PRF_CSR_CFG_STRUC;
//
// Other on-chip shared memory space, base = 0x2000
//
/* */
/* Other on-chip shared memory space, base = 0x2000 */
/* */
// CIS space - base address = 0x2000
/* CIS space - base address = 0x2000 */
#define HW_CIS_BASE 0x2000
// Carrier-sense CTS frame base address. It's where mac stores carrier-sense frame for carrier-sense function.
/* Carrier-sense CTS frame base address. It's where mac stores carrier-sense frame for carrier-sense function. */
#define HW_CS_CTS_BASE 0x7700
// DFS CTS frame base address. It's where mac stores CTS frame for DFS.
/* DFS CTS frame base address. It's where mac stores CTS frame for DFS. */
#define HW_DFS_CTS_BASE 0x7780
#define HW_CTS_FRAME_SIZE 0x80
// 2004-11-08 john - since NULL frame won't be that long (256 byte). We steal 16 tail bytes
// to save debugging settings
#define HW_DEBUG_SETTING_BASE 0x77f0 // 0x77f0~0x77ff total 16 bytes
#define HW_DEBUG_SETTING_BASE2 0x7770 // 0x77f0~0x77ff total 16 bytes
// In order to support maximum 8 MBSS and its maximum length is 512 for each beacon
// Three section discontinue memory segments will be used.
// 1. The original region for BCN 0~3
// 2. Extract memory from FCE table for BCN 4~5
// 3. Extract memory from Pair-wise key table for BCN 6~7
// It occupied those memory of wcid 238~253 for BCN 6
// and wcid 222~237 for BCN 7
/* 2004-11-08 john - since NULL frame won't be that long (256 byte). We steal 16 tail bytes */
/* to save debugging settings */
#define HW_DEBUG_SETTING_BASE 0x77f0 /* 0x77f0~0x77ff total 16 bytes */
#define HW_DEBUG_SETTING_BASE2 0x7770 /* 0x77f0~0x77ff total 16 bytes */
/* In order to support maximum 8 MBSS and its maximum length is 512 for each beacon */
/* Three section discontinue memory segments will be used. */
/* 1. The original region for BCN 0~3 */
/* 2. Extract memory from FCE table for BCN 4~5 */
/* 3. Extract memory from Pair-wise key table for BCN 6~7 */
/* It occupied those memory of wcid 238~253 for BCN 6 */
/* and wcid 222~237 for BCN 7 */
#define HW_BEACON_MAX_SIZE 0x1000 /* unit: byte */
#define HW_BEACON_BASE0 0x7800
#define HW_BEACON_BASE1 0x7A00
......@@ -1256,7 +1256,7 @@ typedef union _RF_CSR_CFG_STRUC {
#define HW_BEACON_OFFSET 0x0200
#define HW_BEACON_CONTENT_LEN (HW_BEACON_OFFSET - TXWI_SIZE)
// HOST-MCU shared memory - base address = 0x2100
/* HOST-MCU shared memory - base address = 0x2100 */
#define HOST_CMD_CSR 0x404
#define H2M_MAILBOX_CSR 0x7010
#define H2M_MAILBOX_CID 0x7014
......@@ -1264,37 +1264,37 @@ typedef union _RF_CSR_CFG_STRUC {
#define H2M_INT_SRC 0x7024
#define H2M_BBP_AGENT 0x7028
#define M2H_CMD_DONE_CSR 0x000c
#define MCU_TXOP_ARRAY_BASE 0x000c // TODO: to be provided by Albert
#define MCU_TXOP_ENTRY_SIZE 32 // TODO: to be provided by Albert
#define MAX_NUM_OF_TXOP_ENTRY 16 // TODO: must be same with 8051 firmware
#define MCU_MBOX_VERSION 0x01 // TODO: to be confirmed by Albert
#define MCU_MBOX_VERSION_OFFSET 5 // TODO: to be provided by Albert
//
// Host DMA registers - base address 0x200 . TX0-3=EDCAQid0-3, TX4=HCCA, TX5=MGMT,
//
//
// DMA RING DESCRIPTOR
//
#define MCU_TXOP_ARRAY_BASE 0x000c /* TODO: to be provided by Albert */
#define MCU_TXOP_ENTRY_SIZE 32 /* TODO: to be provided by Albert */
#define MAX_NUM_OF_TXOP_ENTRY 16 /* TODO: must be same with 8051 firmware */
#define MCU_MBOX_VERSION 0x01 /* TODO: to be confirmed by Albert */
#define MCU_MBOX_VERSION_OFFSET 5 /* TODO: to be provided by Albert */
/* */
/* Host DMA registers - base address 0x200 . TX0-3=EDCAQid0-3, TX4=HCCA, TX5=MGMT, */
/* */
/* */
/* DMA RING DESCRIPTOR */
/* */
#define E2PROM_CSR 0x0004
#define IO_CNTL_CSR 0x77d0
// ================================================================
// Tx / Rx / Mgmt ring descriptor definition
// ================================================================
/* ================================================================ */
/* Tx / Rx / Mgmt ring descriptor definition */
/* ================================================================ */
// the following PID values are used to mark outgoing frame type in TXD->PID so that
// proper TX statistics can be collected based on these categories
// b3-2 of PID field -
/* the following PID values are used to mark outgoing frame type in TXD->PID so that */
/* proper TX statistics can be collected based on these categories */
/* b3-2 of PID field - */
#define PID_MGMT 0x05
#define PID_BEACON 0x0c
#define PID_DATA_NORMALUCAST 0x02
#define PID_DATA_AMPDU 0x04
#define PID_DATA_NO_ACK 0x08
#define PID_DATA_NOT_NORM_ACK 0x03
// value domain of pTxD->HostQId (4-bit: 0~15)
#define QID_AC_BK 1 // meet ACI definition in 802.11e
#define QID_AC_BE 0 // meet ACI definition in 802.11e
/* value domain of pTxD->HostQId (4-bit: 0~15) */
#define QID_AC_BK 1 /* meet ACI definition in 802.11e */
#define QID_AC_BE 0 /* meet ACI definition in 802.11e */
#define QID_AC_VI 2
#define QID_AC_VO 3
#define QID_HCCA 4
......@@ -1303,4 +1303,4 @@ typedef union _RF_CSR_CFG_STRUC {
#define QID_RX 14
#define QID_OTHER 15
#endif // __RTMP_MAC_H__ //
#endif /* __RTMP_MAC_H__ // */
drivers/staging/rt2860/chip/rtmp_phy.h
View file @ cc277069
......@@ -74,30 +74,30 @@
#define RF_R30 30
#define RF_R31 31
// value domain of pAd->RfIcType
#define RFIC_2820 1 // 2.4G 2T3R
#define RFIC_2850 2 // 2.4G/5G 2T3R
#define RFIC_2720 3 // 2.4G 1T2R
#define RFIC_2750 4 // 2.4G/5G 1T2R
#define RFIC_3020 5 // 2.4G 1T1R
#define RFIC_2020 6 // 2.4G B/G
#define RFIC_3021 7 // 2.4G 1T2R
#define RFIC_3022 8 // 2.4G 2T2R
#define RFIC_3052 9 // 2.4G/5G 2T2R
/* value domain of pAd->RfIcType */
#define RFIC_2820 1 /* 2.4G 2T3R */
#define RFIC_2850 2 /* 2.4G/5G 2T3R */
#define RFIC_2720 3 /* 2.4G 1T2R */
#define RFIC_2750 4 /* 2.4G/5G 1T2R */
#define RFIC_3020 5 /* 2.4G 1T1R */
#define RFIC_2020 6 /* 2.4G B/G */
#define RFIC_3021 7 /* 2.4G 1T2R */
#define RFIC_3022 8 /* 2.4G 2T2R */
#define RFIC_3052 9 /* 2.4G/5G 2T2R */
/*
BBP sections
*/
#define BBP_R0 0 // version
#define BBP_R1 1 // TSSI
#define BBP_R2 2 // TX configure
#define BBP_R0 0 /* version */
#define BBP_R1 1 /* TSSI */
#define BBP_R2 2 /* TX configure */
#define BBP_R3 3
#define BBP_R4 4
#define BBP_R5 5
#define BBP_R6 6
#define BBP_R14 14 // RX configure
#define BBP_R14 14 /* RX configure */
#define BBP_R16 16
#define BBP_R17 17 // RX sensibility
#define BBP_R17 17 /* RX sensibility */
#define BBP_R18 18
#define BBP_R21 21
#define BBP_R22 22
......@@ -106,12 +106,12 @@
#define BBP_R26 26
#define BBP_R27 27
#define BBP_R31 31
#define BBP_R49 49 //TSSI
#define BBP_R49 49 /*TSSI */
#define BBP_R50 50
#define BBP_R51 51
#define BBP_R52 52
#define BBP_R55 55
#define BBP_R62 62 // Rx SQ0 Threshold HIGH
#define BBP_R62 62 /* Rx SQ0 Threshold HIGH */
#define BBP_R63 63
#define BBP_R64 64
#define BBP_R65 65
......@@ -119,7 +119,7 @@
#define BBP_R67 67
#define BBP_R68 68
#define BBP_R69 69
#define BBP_R70 70 // Rx AGC SQ CCK Xcorr threshold
#define BBP_R70 70 /* Rx AGC SQ CCK Xcorr threshold */
#define BBP_R73 73
#define BBP_R75 75
#define BBP_R77 77
......@@ -133,7 +133,7 @@
#define BBP_R86 86
#define BBP_R91 91
#define BBP_R92 92
#define BBP_R94 94 // Tx Gain Control
#define BBP_R94 94 /* Tx Gain Control */
#define BBP_R103 103
#define BBP_R105 105
#define BBP_R106 106
......@@ -149,22 +149,22 @@
#define BBP_R122 122
#define BBP_R123 123
#ifdef RT30xx
#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control
#endif // RT30xx //
#define BBP_R138 138 /* add by johnli, RF power sequence setup, ADC dynamic on/off control */
#endif /* RT30xx // */
#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db
#define BBPR94_DEFAULT 0x06 /* Add 1 value will gain 1db */
//
// BBP & RF are using indirect access. Before write any value into it.
// We have to make sure there is no outstanding command pending via checking busy bit.
//
#define MAX_BUSY_COUNT 100 // Number of retry before failing access BBP & RF indirect register
/* */
/* BBP & RF are using indirect access. Before write any value into it. */
/* We have to make sure there is no outstanding command pending via checking busy bit. */
/* */
#define MAX_BUSY_COUNT 100 /* Number of retry before failing access BBP & RF indirect register */
//#define PHY_TR_SWITCH_TIME 5 // usec
/*#define PHY_TR_SWITCH_TIME 5 // usec */
//#define BBP_R17_LOW_SENSIBILITY 0x50
//#define BBP_R17_MID_SENSIBILITY 0x41
//#define BBP_R17_DYNAMIC_UP_BOUND 0x40
/*#define BBP_R17_LOW_SENSIBILITY 0x50 */
/*#define BBP_R17_MID_SENSIBILITY 0x41 */
/*#define BBP_R17_DYNAMIC_UP_BOUND 0x40 */
#define RSSI_FOR_VERY_LOW_SENSIBILITY -35
#define RSSI_FOR_LOW_SENSIBILITY -58
......@@ -194,15 +194,15 @@
} \
} \
}
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
#define RTMP_RF_IO_WRITE32(_A, _V) RTUSBWriteRFRegister(_A, _V)
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
#ifdef RT30xx
#define RTMP_RF_IO_READ8_BY_REG_ID(_A, _I, _pV) RT30xxReadRFRegister(_A, _I, _pV)
#define RTMP_RF_IO_WRITE8_BY_REG_ID(_A, _I, _V) RT30xxWriteRFRegister(_A, _I, _V)
#endif // RT30xx //
#endif /* RT30xx // */
/*****************************************************************************
BBP register Read/Write marco definitions.
......@@ -276,7 +276,7 @@
But for some chipset which didn't have mcu (e.g., RBUS based chipset), we
will use this function too and didn't access the bbp register via the MCU.
*/
// Read BBP register by register's ID. Generate PER to test BA
/* Read BBP register by register's ID. Generate PER to test BA */
#define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV) \
{ \
BBP_CSR_CFG_STRUC BbpCsr; \
......@@ -425,7 +425,7 @@
But for some chipset which didn't have mcu (e.g., RBUS based chipset), we
will use this function too and didn't access the bbp register via the MCU.
*/
// Write BBP register by register's ID & value
/* Write BBP register by register's ID & value */
#define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V) \
{ \
BBP_CSR_CFG_STRUC BbpCsr; \
......@@ -510,7 +510,7 @@
DBGPRINT_ERR(("****** BBP_Write_Latch Buffer exceeds max boundry ****** \n")); \
} \
}
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
#define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV) RTUSBReadBBPRegister(_A, _I, _pV)
......@@ -518,7 +518,7 @@
#define BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V) RTUSBWriteBBPRegister(_A, _I, _V)
#define BBP_IO_READ8_BY_REG_ID(_A, _I, _pV) RTUSBReadBBPRegister(_A, _I, _pV)
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
#ifdef RT30xx
#define RTMP_ASIC_MMPS_DISABLE(_pAd) \
......@@ -551,6 +551,6 @@
RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \
}while(0)
#endif // RT30xx //
#endif /* RT30xx // */
#endif // __RTMP_PHY_H__ //
#endif /* __RTMP_PHY_H__ // */
drivers/staging/rt2860/chlist.h
View file @ cc277069
......@@ -52,14 +52,14 @@
typedef struct _CH_DESP {
UCHAR FirstChannel;
UCHAR NumOfCh;
CHAR MaxTxPwr; // dBm
UCHAR Geography; // 0:out door, 1:in door, 2:both
BOOLEAN DfsReq; // Dfs require, 0: No, 1: yes.
CHAR MaxTxPwr; /* dBm */
UCHAR Geography; /* 0:out door, 1:in door, 2:both */
BOOLEAN DfsReq; /* Dfs require, 0: No, 1: yes. */
} CH_DESP, *PCH_DESP;
typedef struct _CH_REGION {
UCHAR CountReg[3];
UCHAR DfsType; // 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56
UCHAR DfsType; /* 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56 */
CH_DESP ChDesp[10];
} CH_REGION, *PCH_REGION;
......@@ -114,4 +114,4 @@ VOID N_SetCenCh(IN PRTMP_ADAPTER pAd);
UINT8 GetCuntryMaxTxPwr(IN PRTMP_ADAPTER pAd, IN UINT8 channel);
#endif // __CHLIST_H__
#endif /* __CHLIST_H__ */
drivers/staging/rt2860/eeprom.h
View file @ cc277069
......@@ -43,25 +43,25 @@
************************************************************************/
int rtmp_ee_prom_read16(IN PRTMP_ADAPTER pAd,
IN USHORT Offset, OUT USHORT * pValue);
#endif // RTMP_PCI_SUPPORT //
#endif /* RTMP_PCI_SUPPORT // */
#ifdef RTMP_USB_SUPPORT
/*************************************************************************
* Public function declarations for usb-based prom chipset
************************************************************************/
NTSTATUS RTUSBReadEEPROM16(IN PRTMP_ADAPTER pAd,
IN USHORT offset, OUT PUSHORT pData);
#endif // RTMP_USB_SUPPORT //
#endif /* RTMP_USB_SUPPORT // */
#ifdef RT30xx
#ifdef RTMP_EFUSE_SUPPORT
int rtmp_ee_efuse_read16(IN RTMP_ADAPTER * pAd,
IN USHORT Offset, OUT USHORT * pValue);
#endif // RTMP_EFUSE_SUPPORT //
#endif // RT30xx //
#endif /* RTMP_EFUSE_SUPPORT // */
#endif /* RT30xx // */
/*************************************************************************
* Public function declarations for prom operation callback functions setting
************************************************************************/
INT RtmpChipOpsEepromHook(IN RTMP_ADAPTER * pAd, IN INT infType);
#endif // __EEPROM_H__ //
#endif /* __EEPROM_H__ // */
drivers/staging/rt2860/mlme.h
View file @ cc277069
......@@ -41,18 +41,18 @@
#include "rtmp_dot11.h"
// maximum supported capability information -
// ESS, IBSS, Privacy, Short Preamble, Spectrum mgmt, Short Slot
/* maximum supported capability information - */
/* ESS, IBSS, Privacy, Short Preamble, Spectrum mgmt, Short Slot */
#define SUPPORTED_CAPABILITY_INFO 0x0533
#define END_OF_ARGS -1
#define LFSR_MASK 0x80000057
#define MLME_TASK_EXEC_INTV 100/*200*/ //
#define MLME_TASK_EXEC_INTV 100/*200*/ /* */
#define LEAD_TIME 5
#define MLME_TASK_EXEC_MULTIPLE 10 /*5*/ // MLME_TASK_EXEC_MULTIPLE * MLME_TASK_EXEC_INTV = 1 sec
#define REORDER_EXEC_INTV 100 // 0.1 sec
#define MLME_TASK_EXEC_MULTIPLE 10 /*5*/ /* MLME_TASK_EXEC_MULTIPLE * MLME_TASK_EXEC_INTV = 1 sec */
#define REORDER_EXEC_INTV 100 /* 0.1 sec */
// The definition of Radar detection duration region
/* The definition of Radar detection duration region */
#define CE 0
#define FCC 1
#define JAP 2
......@@ -60,61 +60,61 @@
#define JAP_W56 4
#define MAX_RD_REGION 5
#define BEACON_LOST_TIME 4 * OS_HZ // 2048 msec = 2 sec
#define DLS_TIMEOUT 1200 // unit: msec
#define AUTH_TIMEOUT 300 // unit: msec
#define ASSOC_TIMEOUT 300 // unit: msec
#define JOIN_TIMEOUT 2000 // unit: msec
#define SHORT_CHANNEL_TIME 90 // unit: msec
#define MIN_CHANNEL_TIME 110 // unit: msec, for dual band scan
#define MAX_CHANNEL_TIME 140 // unit: msec, for single band scan
#define FAST_ACTIVE_SCAN_TIME 30 // Active scan waiting for probe response time
#define CW_MIN_IN_BITS 4 // actual CwMin = 2^CW_MIN_IN_BITS - 1
#define LINK_DOWN_TIMEOUT 20000 // unit: msec
#define AUTO_WAKEUP_TIMEOUT 70 //unit: msec
#define CW_MAX_IN_BITS 10 // actual CwMax = 2^CW_MAX_IN_BITS - 1
// Note: RSSI_TO_DBM_OFFSET has been changed to variable for new RF (2004-0720).
// SHould not refer to this constant anymore
//#define RSSI_TO_DBM_OFFSET 120 // for RT2530 RSSI-115 = dBm
#define RSSI_FOR_MID_TX_POWER -55 // -55 db is considered mid-distance
#define RSSI_FOR_LOW_TX_POWER -45 // -45 db is considered very short distance and
// eligible to use a lower TX power
#define BEACON_LOST_TIME 4 * OS_HZ /* 2048 msec = 2 sec */
#define DLS_TIMEOUT 1200 /* unit: msec */
#define AUTH_TIMEOUT 300 /* unit: msec */
#define ASSOC_TIMEOUT 300 /* unit: msec */
#define JOIN_TIMEOUT 2000 /* unit: msec */
#define SHORT_CHANNEL_TIME 90 /* unit: msec */
#define MIN_CHANNEL_TIME 110 /* unit: msec, for dual band scan */
#define MAX_CHANNEL_TIME 140 /* unit: msec, for single band scan */
#define FAST_ACTIVE_SCAN_TIME 30 /* Active scan waiting for probe response time */
#define CW_MIN_IN_BITS 4 /* actual CwMin = 2^CW_MIN_IN_BITS - 1 */
#define LINK_DOWN_TIMEOUT 20000 /* unit: msec */
#define AUTO_WAKEUP_TIMEOUT 70 /*unit: msec */
#define CW_MAX_IN_BITS 10 /* actual CwMax = 2^CW_MAX_IN_BITS - 1 */
/* Note: RSSI_TO_DBM_OFFSET has been changed to variable for new RF (2004-0720). */
/* SHould not refer to this constant anymore */
/*#define RSSI_TO_DBM_OFFSET 120 // for RT2530 RSSI-115 = dBm */
#define RSSI_FOR_MID_TX_POWER -55 /* -55 db is considered mid-distance */
#define RSSI_FOR_LOW_TX_POWER -45 /* -45 db is considered very short distance and */
/* eligible to use a lower TX power */
#define RSSI_FOR_LOWEST_TX_POWER -30
//#define MID_TX_POWER_DELTA 0 // 0 db from full TX power upon mid-distance to AP
#define LOW_TX_POWER_DELTA 6 // -3 db from full TX power upon very short distance. 1 grade is 0.5 db
#define LOWEST_TX_POWER_DELTA 16 // -8 db from full TX power upon shortest distance. 1 grade is 0.5 db
/*#define MID_TX_POWER_DELTA 0 // 0 db from full TX power upon mid-distance to AP */
#define LOW_TX_POWER_DELTA 6 /* -3 db from full TX power upon very short distance. 1 grade is 0.5 db */
#define LOWEST_TX_POWER_DELTA 16 /* -8 db from full TX power upon shortest distance. 1 grade is 0.5 db */
#define RSSI_TRIGGERED_UPON_BELOW_THRESHOLD 0
#define RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD 1
#define RSSI_THRESHOLD_FOR_ROAMING 25
#define RSSI_DELTA 5
// Channel Quality Indication
/* Channel Quality Indication */
#define CQI_IS_GOOD(cqi) ((cqi) >= 50)
//#define CQI_IS_FAIR(cqi) (((cqi) >= 20) && ((cqi) < 50))
#define CQI_IS_POOR(cqi) (cqi < 50) //(((cqi) >= 5) && ((cqi) < 20))
/*#define CQI_IS_FAIR(cqi) (((cqi) >= 20) && ((cqi) < 50)) */
#define CQI_IS_POOR(cqi) (cqi < 50) /*(((cqi) >= 5) && ((cqi) < 20)) */
#define CQI_IS_BAD(cqi) (cqi < 5)
#define CQI_IS_DEAD(cqi) (cqi == 0)
// weighting factor to calculate Channel quality, total should be 100%
/* weighting factor to calculate Channel quality, total should be 100% */
#define RSSI_WEIGHTING 50
#define TX_WEIGHTING 30
#define RX_WEIGHTING 20
#define BSS_NOT_FOUND 0xFFFFFFFF
#define MAX_LEN_OF_MLME_QUEUE 40 //10
#define MAX_LEN_OF_MLME_QUEUE 40 /*10 */
#define SCAN_PASSIVE 18 // scan with no probe request, only wait beacon and probe response
#define SCAN_ACTIVE 19 // scan with probe request, and wait beacon and probe response
#define SCAN_CISCO_PASSIVE 20 // Single channel passive scan
#define SCAN_CISCO_ACTIVE 21 // Single channel active scan
#define SCAN_CISCO_NOISE 22 // Single channel passive scan for noise histogram collection
#define SCAN_CISCO_CHANNEL_LOAD 23 // Single channel passive scan for channel load collection
#define FAST_SCAN_ACTIVE 24 // scan with probe request, and wait beacon and probe response
#define SCAN_PASSIVE 18 /* scan with no probe request, only wait beacon and probe response */
#define SCAN_ACTIVE 19 /* scan with probe request, and wait beacon and probe response */
#define SCAN_CISCO_PASSIVE 20 /* Single channel passive scan */
#define SCAN_CISCO_ACTIVE 21 /* Single channel active scan */
#define SCAN_CISCO_NOISE 22 /* Single channel passive scan for noise histogram collection */
#define SCAN_CISCO_CHANNEL_LOAD 23 /* Single channel passive scan for channel load collection */
#define FAST_SCAN_ACTIVE 24 /* scan with probe request, and wait beacon and probe response */
#define MAC_ADDR_IS_GROUP(Addr) (((Addr[0]) & 0x01))
#define MAC_ADDR_HASH(Addr) (Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5])
......@@ -122,13 +122,13 @@
#define TID_MAC_HASH(Addr,TID) (TID^Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5])
#define TID_MAC_HASH_INDEX(Addr,TID) (TID_MAC_HASH(Addr,TID) % HASH_TABLE_SIZE)
// LED Control
// assoiation ON. one LED ON. another blinking when TX, OFF when idle
// no association, both LED off
/* LED Control */
/* assoiation ON. one LED ON. another blinking when TX, OFF when idle */
/* no association, both LED off */
#define ASIC_LED_ACT_ON(pAd) RTMP_IO_WRITE32(pAd, MAC_CSR14, 0x00031e46)
#define ASIC_LED_ACT_OFF(pAd) RTMP_IO_WRITE32(pAd, MAC_CSR14, 0x00001e46)
// bit definition of the 2-byte pBEACON->Capability field
/* bit definition of the 2-byte pBEACON->Capability field */
#define CAP_IS_ESS_ON(x) (((x) & 0x0001) != 0)
#define CAP_IS_IBSS_ON(x) (((x) & 0x0002) != 0)
#define CAP_IS_CF_POLLABLE_ON(x) (((x) & 0x0004) != 0)
......@@ -137,44 +137,44 @@
#define CAP_IS_SHORT_PREAMBLE_ON(x) (((x) & 0x0020) != 0)
#define CAP_IS_PBCC_ON(x) (((x) & 0x0040) != 0)
#define CAP_IS_AGILITY_ON(x) (((x) & 0x0080) != 0)
#define CAP_IS_SPECTRUM_MGMT(x) (((x) & 0x0100) != 0) // 802.11e d9
#define CAP_IS_QOS(x) (((x) & 0x0200) != 0) // 802.11e d9
#define CAP_IS_SPECTRUM_MGMT(x) (((x) & 0x0100) != 0) /* 802.11e d9 */
#define CAP_IS_QOS(x) (((x) & 0x0200) != 0) /* 802.11e d9 */
#define CAP_IS_SHORT_SLOT(x) (((x) & 0x0400) != 0)
#define CAP_IS_APSD(x) (((x) & 0x0800) != 0) // 802.11e d9
#define CAP_IS_IMMED_BA(x) (((x) & 0x1000) != 0) // 802.11e d9
#define CAP_IS_APSD(x) (((x) & 0x0800) != 0) /* 802.11e d9 */
#define CAP_IS_IMMED_BA(x) (((x) & 0x1000) != 0) /* 802.11e d9 */
#define CAP_IS_DSSS_OFDM(x) (((x) & 0x2000) != 0)
#define CAP_IS_DELAY_BA(x) (((x) & 0x4000) != 0) // 802.11e d9
#define CAP_IS_DELAY_BA(x) (((x) & 0x4000) != 0) /* 802.11e d9 */
#define CAP_GENERATE(ess,ibss,priv,s_pre,s_slot,spectrum) (((ess) ? 0x0001 : 0x0000) | ((ibss) ? 0x0002 : 0x0000) | ((priv) ? 0x0010 : 0x0000) | ((s_pre) ? 0x0020 : 0x0000) | ((s_slot) ? 0x0400 : 0x0000) | ((spectrum) ? 0x0100 : 0x0000))
#define ERP_IS_NON_ERP_PRESENT(x) (((x) & 0x01) != 0) // 802.11g
#define ERP_IS_USE_PROTECTION(x) (((x) & 0x02) != 0) // 802.11g
#define ERP_IS_USE_BARKER_PREAMBLE(x) (((x) & 0x04) != 0) // 802.11g
#define ERP_IS_NON_ERP_PRESENT(x) (((x) & 0x01) != 0) /* 802.11g */
#define ERP_IS_USE_PROTECTION(x) (((x) & 0x02) != 0) /* 802.11g */
#define ERP_IS_USE_BARKER_PREAMBLE(x) (((x) & 0x04) != 0) /* 802.11g */
#define DRS_TX_QUALITY_WORST_BOUND 8 // 3 // just test by gary
#define DRS_TX_QUALITY_WORST_BOUND 8 /* 3 // just test by gary */
#define DRS_PENALTY 8
#define BA_NOTUSE 2
//BA Policy subfiled value in ADDBA frame
/*BA Policy subfiled value in ADDBA frame */
#define IMMED_BA 1
#define DELAY_BA 0
// BA Initiator subfield in DELBA frame
/* BA Initiator subfield in DELBA frame */
#define ORIGINATOR 1
#define RECIPIENT 0
// ADDBA Status Code
/* ADDBA Status Code */
#define ADDBA_RESULTCODE_SUCCESS 0
#define ADDBA_RESULTCODE_REFUSED 37
#define ADDBA_RESULTCODE_INVALID_PARAMETERS 38
// DELBA Reason Code
/* DELBA Reason Code */
#define DELBA_REASONCODE_QSTA_LEAVING 36
#define DELBA_REASONCODE_END_BA 37
#define DELBA_REASONCODE_UNKNOWN_BA 38
#define DELBA_REASONCODE_TIMEOUT 39
// reset all OneSecTx counters
/* reset all OneSecTx counters */
#define RESET_ONE_SEC_TX_CNT(__pEntry) \
if (((__pEntry)) != NULL) \
{ \
......@@ -183,38 +183,38 @@ if (((__pEntry)) != NULL) \
(__pEntry)->OneSecTxNoRetryOkCount = 0; \
}
//
// 802.11 frame formats
//
// HT Capability INFO field in HT Cap IE .
/* */
/* 802.11 frame formats */
/* */
/* HT Capability INFO field in HT Cap IE . */
typedef struct PACKED {
USHORT AdvCoding:1;
USHORT ChannelWidth:1;
USHORT MimoPs:2; //momi power safe
USHORT GF:1; //green field
USHORT MimoPs:2; /*momi power safe */
USHORT GF:1; /*green field */
USHORT ShortGIfor20:1;
USHORT ShortGIfor40:1; //for40MHz
USHORT ShortGIfor40:1; /*for40MHz */
USHORT TxSTBC:1;
USHORT RxSTBC:2;
USHORT DelayedBA:1; //rt2860c not support
USHORT AMsduSize:1; // only support as zero
USHORT DelayedBA:1; /*rt2860c not support */
USHORT AMsduSize:1; /* only support as zero */
USHORT CCKmodein40:1;
USHORT PSMP:1;
USHORT Forty_Mhz_Intolerant:1;
USHORT LSIGTxopProSup:1;
} HT_CAP_INFO, *PHT_CAP_INFO;
// HT Capability INFO field in HT Cap IE .
/* HT Capability INFO field in HT Cap IE . */
typedef struct PACKED {
UCHAR MaxRAmpduFactor:2;
UCHAR MpduDensity:3;
UCHAR rsv:3; //momi power safe
UCHAR rsv:3; /*momi power safe */
} HT_CAP_PARM, *PHT_CAP_PARM;
// HT Capability INFO field in HT Cap IE .
/* HT Capability INFO field in HT Cap IE . */
typedef struct PACKED {
UCHAR MCSSet[10];
UCHAR SupRate[2]; // unit : 1Mbps
UCHAR SupRate[2]; /* unit : 1Mbps */
UCHAR TxMCSSetDefined:1;
UCHAR TxRxNotEqual:1;
UCHAR TxStream:2;
......@@ -223,18 +223,18 @@ typedef struct PACKED {
UCHAR rsv3[3];
} HT_MCS_SET, *PHT_MCS_SET;
// HT Capability INFO field in HT Cap IE .
/* HT Capability INFO field in HT Cap IE . */
typedef struct PACKED {
USHORT Pco:1;
USHORT TranTime:2;
USHORT rsv:5; //momi power safe
USHORT MCSFeedback:2; //0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback, 1:rsv.
USHORT PlusHTC:1; //+HTC control field support
USHORT RDGSupport:1; //reverse Direction Grant support
USHORT rsv:5; /*momi power safe */
USHORT MCSFeedback:2; /*0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback, 1:rsv. */
USHORT PlusHTC:1; /*+HTC control field support */
USHORT RDGSupport:1; /*reverse Direction Grant support */
USHORT rsv2:4;
} EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO;
// HT Beamforming field in HT Cap IE .
/* HT Beamforming field in HT Cap IE . */
typedef struct PACKED _HT_BF_CAP {
ULONG TxBFRecCapable:1;
ULONG RxSoundCapable:1;
......@@ -258,7 +258,7 @@ typedef struct PACKED _HT_BF_CAP {
ULONG rsv:3;
} HT_BF_CAP, *PHT_BF_CAP;
// HT antenna selection field in HT Cap IE .
/* HT antenna selection field in HT Cap IE . */
typedef struct PACKED _HT_AS_CAP {
UCHAR AntSelect:1;
UCHAR ExpCSIFbkTxASEL:1;
......@@ -270,48 +270,48 @@ typedef struct PACKED _HT_AS_CAP {
UCHAR rsv:1;
} HT_AS_CAP, *PHT_AS_CAP;
// Draft 1.0 set IE length 26, but is extensible..
/* Draft 1.0 set IE length 26, but is extensible.. */
#define SIZE_HT_CAP_IE 26
// The structure for HT Capability IE.
/* The structure for HT Capability IE. */
typedef struct PACKED _HT_CAPABILITY_IE {
HT_CAP_INFO HtCapInfo;
HT_CAP_PARM HtCapParm;
// HT_MCS_SET HtMCSSet;
/* HT_MCS_SET HtMCSSet; */
UCHAR MCSSet[16];
EXT_HT_CAP_INFO ExtHtCapInfo;
HT_BF_CAP TxBFCap; // beamforming cap. rt2860c not support beamforming.
HT_AS_CAP ASCap; //antenna selection.
HT_BF_CAP TxBFCap; /* beamforming cap. rt2860c not support beamforming. */
HT_AS_CAP ASCap; /*antenna selection. */
} HT_CAPABILITY_IE, *PHT_CAPABILITY_IE;
// 802.11n draft3 related structure definitions.
// 7.3.2.60
#define dot11OBSSScanPassiveDwell 20 // in TU. min amount of time that the STA continously scans each channel when performing an active OBSS scan.
#define dot11OBSSScanActiveDwell 10 // in TU.min amount of time that the STA continously scans each channel when performing an passive OBSS scan.
#define dot11BSSWidthTriggerScanInterval 300 // in sec. max interval between scan operations to be performed to detect BSS channel width trigger events.
#define dot11OBSSScanPassiveTotalPerChannel 200 // in TU. min total amount of time that the STA scans each channel when performing a passive OBSS scan.
#define dot11OBSSScanActiveTotalPerChannel 20 //in TU. min total amount of time that the STA scans each channel when performing a active OBSS scan
#define dot11BSSWidthChannelTransactionDelayFactor 5 // min ratio between the delay time in performing a switch from 20MHz BSS to 20/40 BSS operation and the maximum
// interval between overlapping BSS scan operations.
#define dot11BSSScanActivityThreshold 25 // in %%, max total time that a STA may be active on the medium during a period of
// (dot11BSSWidthChannelTransactionDelayFactor * dot11BSSWidthTriggerScanInterval) seconds without
// being obligated to perform OBSS Scan operations. default is 25(== 0.25%)
/* 802.11n draft3 related structure definitions. */
/* 7.3.2.60 */
#define dot11OBSSScanPassiveDwell 20 /* in TU. min amount of time that the STA continously scans each channel when performing an active OBSS scan. */
#define dot11OBSSScanActiveDwell 10 /* in TU.min amount of time that the STA continously scans each channel when performing an passive OBSS scan. */
#define dot11BSSWidthTriggerScanInterval 300 /* in sec. max interval between scan operations to be performed to detect BSS channel width trigger events. */
#define dot11OBSSScanPassiveTotalPerChannel 200 /* in TU. min total amount of time that the STA scans each channel when performing a passive OBSS scan. */
#define dot11OBSSScanActiveTotalPerChannel 20 /*in TU. min total amount of time that the STA scans each channel when performing a active OBSS scan */
#define dot11BSSWidthChannelTransactionDelayFactor 5 /* min ratio between the delay time in performing a switch from 20MHz BSS to 20/40 BSS operation and the maximum */
/* interval between overlapping BSS scan operations. */
#define dot11BSSScanActivityThreshold 25 /* in %%, max total time that a STA may be active on the medium during a period of */
/* (dot11BSSWidthChannelTransactionDelayFactor * dot11BSSWidthTriggerScanInterval) seconds without */
/* being obligated to perform OBSS Scan operations. default is 25(== 0.25%) */
typedef struct PACKED _OVERLAP_BSS_SCAN_IE {
USHORT ScanPassiveDwell;
USHORT ScanActiveDwell;
USHORT TriggerScanInt; // Trigger scan interval
USHORT PassiveTalPerChannel; // passive total per channel
USHORT ActiveTalPerChannel; // active total per channel
USHORT DelayFactor; // BSS width channel transition delay factor
USHORT ScanActThre; // Scan Activity threshold
USHORT TriggerScanInt; /* Trigger scan interval */
USHORT PassiveTalPerChannel; /* passive total per channel */
USHORT ActiveTalPerChannel; /* active total per channel */
USHORT DelayFactor; /* BSS width channel transition delay factor */
USHORT ScanActThre; /* Scan Activity threshold */
} OVERLAP_BSS_SCAN_IE, *POVERLAP_BSS_SCAN_IE;
// 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST
/* 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST */
typedef union PACKED _BSS_2040_COEXIST_IE {
struct PACKED {
UCHAR InfoReq:1;
UCHAR Intolerant40:1; // Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS.
UCHAR BSS20WidthReq:1; // Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS.
UCHAR Intolerant40:1; /* Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS. */
UCHAR BSS20WidthReq:1; /* Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS. */
UCHAR rsv:5;
} field;
UCHAR word;
......@@ -320,22 +320,22 @@ typedef union PACKED _BSS_2040_COEXIST_IE {
typedef struct _TRIGGER_EVENTA {
BOOLEAN bValid;
UCHAR BSSID[6];
UCHAR RegClass; // Regulatory Class
UCHAR RegClass; /* Regulatory Class */
USHORT Channel;
ULONG CDCounter; // Maintain a seperate count down counter for each Event A.
ULONG CDCounter; /* Maintain a seperate count down counter for each Event A. */
} TRIGGER_EVENTA, *PTRIGGER_EVENTA;
// 20/40 trigger event table
// If one Event A delete or created, or if Event B is detected or not detected, STA should send 2040BSSCoexistence to AP.
/* 20/40 trigger event table */
/* If one Event A delete or created, or if Event B is detected or not detected, STA should send 2040BSSCoexistence to AP. */
#define MAX_TRIGGER_EVENT 64
typedef struct _TRIGGER_EVENT_TAB {
UCHAR EventANo;
TRIGGER_EVENTA EventA[MAX_TRIGGER_EVENT];
ULONG EventBCountDown; // Count down counter for Event B.
ULONG EventBCountDown; /* Count down counter for Event B. */
} TRIGGER_EVENT_TAB, *PTRIGGER_EVENT_TAB;
// 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY).
// This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0
/* 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY). */
/* This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0 */
typedef struct PACKED _EXT_CAP_INFO_ELEMENT {
UCHAR BssCoexistMgmtSupport:1;
UCHAR rsv:1;
......@@ -343,59 +343,59 @@ typedef struct PACKED _EXT_CAP_INFO_ELEMENT {
UCHAR rsv2:5;
} EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT;
// 802.11n 7.3.2.61
/* 802.11n 7.3.2.61 */
typedef struct PACKED _BSS_2040_COEXIST_ELEMENT {
UCHAR ElementID; // ID = IE_2040_BSS_COEXIST = 72
UCHAR ElementID; /* ID = IE_2040_BSS_COEXIST = 72 */
UCHAR Len;
BSS_2040_COEXIST_IE BssCoexistIe;
} BSS_2040_COEXIST_ELEMENT, *PBSS_2040_COEXIST_ELEMENT;
//802.11n 7.3.2.59
/*802.11n 7.3.2.59 */
typedef struct PACKED _BSS_2040_INTOLERANT_CH_REPORT {
UCHAR ElementID; // ID = IE_2040_BSS_INTOLERANT_REPORT = 73
UCHAR ElementID; /* ID = IE_2040_BSS_INTOLERANT_REPORT = 73 */
UCHAR Len;
UCHAR RegulatoryClass;
UCHAR ChList[0];
} BSS_2040_INTOLERANT_CH_REPORT, *PBSS_2040_INTOLERANT_CH_REPORT;
// The structure for channel switch annoucement IE. This is in 802.11n D3.03
/* The structure for channel switch annoucement IE. This is in 802.11n D3.03 */
typedef struct PACKED _CHA_SWITCH_ANNOUNCE_IE {
UCHAR SwitchMode; //channel switch mode
UCHAR NewChannel; //
UCHAR SwitchCount; //
UCHAR SwitchMode; /*channel switch mode */
UCHAR NewChannel; /* */
UCHAR SwitchCount; /* */
} CHA_SWITCH_ANNOUNCE_IE, *PCHA_SWITCH_ANNOUNCE_IE;
// The structure for channel switch annoucement IE. This is in 802.11n D3.03
/* The structure for channel switch annoucement IE. This is in 802.11n D3.03 */
typedef struct PACKED _SEC_CHA_OFFSET_IE {
UCHAR SecondaryChannelOffset; // 1: Secondary above, 3: Secondary below, 0: no Secondary
UCHAR SecondaryChannelOffset; /* 1: Secondary above, 3: Secondary below, 0: no Secondary */
} SEC_CHA_OFFSET_IE, *PSEC_CHA_OFFSET_IE;
// This structure is extracted from struct RT_HT_CAPABILITY
/* This structure is extracted from struct RT_HT_CAPABILITY */
typedef struct {
BOOLEAN bHtEnable; // If we should use ht rate.
BOOLEAN bPreNHt; // If we should use ht rate.
//Substract from HT Capability IE
BOOLEAN bHtEnable; /* If we should use ht rate. */
BOOLEAN bPreNHt; /* If we should use ht rate. */
/*Substract from HT Capability IE */
UCHAR MCSSet[16];
} RT_HT_PHY_INFO, *PRT_HT_PHY_INFO;
//This structure substracts ralink supports from all 802.11n-related features.
//Features not listed here but contained in 802.11n spec are not supported in rt2860.
/*This structure substracts ralink supports from all 802.11n-related features. */
/*Features not listed here but contained in 802.11n spec are not supported in rt2860. */
typedef struct {
USHORT ChannelWidth:1;
USHORT MimoPs:2; //mimo power safe MMPS_
USHORT GF:1; //green field
USHORT MimoPs:2; /*mimo power safe MMPS_ */
USHORT GF:1; /*green field */
USHORT ShortGIfor20:1;
USHORT ShortGIfor40:1; //for40MHz
USHORT ShortGIfor40:1; /*for40MHz */
USHORT TxSTBC:1;
USHORT RxSTBC:2; // 2 bits
USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n
USHORT AmsduSize:1; // Max receiving A-MSDU size
USHORT RxSTBC:2; /* 2 bits */
USHORT AmsduEnable:1; /* Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n */
USHORT AmsduSize:1; /* Max receiving A-MSDU size */
USHORT rsv:5;
//Substract from Addiont HT INFO IE
/*Substract from Addiont HT INFO IE */
UCHAR MaxRAmpduFactor:2;
UCHAR MpduDensity:3;
UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n
UCHAR ExtChanOffset:2; /* Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n */
UCHAR RecomWidth:1;
USHORT OperaionMode:2;
......@@ -404,19 +404,19 @@ typedef struct {
USHORT OBSS_NonHTExist:1;
USHORT rsv2:11;
// New Extension Channel Offset IE
/* New Extension Channel Offset IE */
UCHAR NewExtChannelOffset;
// Extension Capability IE = 127
/* Extension Capability IE = 127 */
UCHAR BSSCoexist2040;
} RT_HT_CAPABILITY, *PRT_HT_CAPABILITY;
// field in Addtional HT Information IE .
/* field in Addtional HT Information IE . */
typedef struct PACKED {
UCHAR ExtChanOffset:2;
UCHAR RecomWidth:1;
UCHAR RifsMode:1;
UCHAR S_PSMPSup:1; //Indicate support for scheduled PSMP
UCHAR SerInterGranu:3; //service interval granularity
UCHAR S_PSMPSup:1; /*Indicate support for scheduled PSMP */
UCHAR SerInterGranu:3; /*service interval granularity */
} ADD_HTINFO, *PADD_HTINFO;
typedef struct PACKED {
......@@ -427,13 +427,13 @@ typedef struct PACKED {
USHORT rsv2:11;
} ADD_HTINFO2, *PADD_HTINFO2;
// TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved.
/* TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved. */
typedef struct PACKED {
USHORT StbcMcs:6;
USHORT DualBeacon:1;
USHORT DualCTSProtect:1;
USHORT STBCBeacon:1;
USHORT LsigTxopProt:1; // L-SIG TXOP protection full support
USHORT LsigTxopProt:1; /* L-SIG TXOP protection full support */
USHORT PcoActive:1;
USHORT PcoPhase:1;
USHORT rsv:4;
......@@ -445,7 +445,7 @@ typedef struct PACKED {
ADD_HTINFO AddHtInfo;
ADD_HTINFO2 AddHtInfo2;
ADD_HTINFO3 AddHtInfo3;
UCHAR MCSSet[16]; // Basic MCS set
UCHAR MCSSet[16]; /* Basic MCS set */
} ADD_HT_INFO_IE, *PADD_HT_INFO_IE;
typedef struct PACKED {
......@@ -457,7 +457,7 @@ typedef struct PACKED _FRAME_802_11 {
UCHAR Octet[1];
} FRAME_802_11, *PFRAME_802_11;
// QoSNull embedding of management action. When HT Control MA field set to 1.
/* QoSNull embedding of management action. When HT Control MA field set to 1. */
typedef struct PACKED _MA_BODY {
UCHAR Category;
UCHAR Action;
......@@ -469,51 +469,51 @@ typedef struct PACKED _HEADER_802_3 {
UCHAR SAAddr2[MAC_ADDR_LEN];
UCHAR Octet[2];
} HEADER_802_3, *PHEADER_802_3;
////Block ACK related format
// 2-byte BA Parameter field in DELBA frames to terminate an already set up bA
/*//Block ACK related format */
/* 2-byte BA Parameter field in DELBA frames to terminate an already set up bA */
typedef struct PACKED {
USHORT Rsv:11; // always set to 0
USHORT Initiator:1; // 1: originator 0:recipient
USHORT TID:4; // value of TC os TS
USHORT Rsv:11; /* always set to 0 */
USHORT Initiator:1; /* 1: originator 0:recipient */
USHORT TID:4; /* value of TC os TS */
} DELBA_PARM, *PDELBA_PARM;
// 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA
/* 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA */
typedef struct PACKED {
USHORT AMSDUSupported:1; // 0: not permitted 1: permitted
USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA
USHORT TID:4; // value of TC os TS
USHORT BufSize:10; // number of buffe of size 2304 octetsr
USHORT AMSDUSupported:1; /* 0: not permitted 1: permitted */
USHORT BAPolicy:1; /* 1: immediately BA 0:delayed BA */
USHORT TID:4; /* value of TC os TS */
USHORT BufSize:10; /* number of buffe of size 2304 octetsr */
} BA_PARM, *PBA_PARM;
// 2-byte BA Starting Seq CONTROL field
/* 2-byte BA Starting Seq CONTROL field */
typedef union PACKED {
struct PACKED {
USHORT FragNum:4; // always set to 0
USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent
USHORT FragNum:4; /* always set to 0 */
USHORT StartSeq:12; /* sequence number of the 1st MSDU for which this BAR is sent */
} field;
USHORT word;
} BASEQ_CONTROL, *PBASEQ_CONTROL;
//BAControl and BARControl are the same
// 2-byte BA CONTROL field in BA frame
/*BAControl and BARControl are the same */
/* 2-byte BA CONTROL field in BA frame */
typedef struct PACKED {
USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK
USHORT MTID:1; //EWC V1.24
USHORT ACKPolicy:1; /* only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK */
USHORT MTID:1; /*EWC V1.24 */
USHORT Compressed:1;
USHORT Rsv:9;
USHORT TID:4;
} BA_CONTROL, *PBA_CONTROL;
// 2-byte BAR CONTROL field in BAR frame
/* 2-byte BAR CONTROL field in BAR frame */
typedef struct PACKED {
USHORT ACKPolicy:1; // 0:normal ack, 1:no ack.
USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ
USHORT ACKPolicy:1; /* 0:normal ack, 1:no ack. */
USHORT MTID:1; /*if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ */
USHORT Compressed:1;
USHORT Rsv1:9;
USHORT TID:4;
} BAR_CONTROL, *PBAR_CONTROL;
// BARControl in MTBAR frame
/* BARControl in MTBAR frame */
typedef struct PACKED {
USHORT ACKPolicy:1;
USHORT MTID:1;
......@@ -532,7 +532,7 @@ typedef struct {
BASEQ_CONTROL BAStartingSeq;
} EACH_TID, *PEACH_TID;
// BAREQ AND MTBAREQ have the same subtype BAR, 802.11n BAR use compressed bitmap.
/* BAREQ AND MTBAREQ have the same subtype BAR, 802.11n BAR use compressed bitmap. */
typedef struct PACKED _FRAME_BA_REQ {
FRAME_CONTROL FC;
USHORT Duration;
......@@ -552,7 +552,7 @@ typedef struct PACKED _FRAME_MTBA_REQ {
BASEQ_CONTROL BAStartingSeq;
} FRAME_MTBA_REQ, *PFRAME_MTBA_REQ;
// Compressed format is mandantory in HT STA
/* Compressed format is mandantory in HT STA */
typedef struct PACKED _FRAME_MTBA {
FRAME_CONTROL FC;
USHORT Duration;
......@@ -567,7 +567,7 @@ typedef struct PACKED _FRAME_PSMP_ACTION {
HEADER_802_11 Hdr;
UCHAR Category;
UCHAR Action;
UCHAR Psmp; // 7.3.1.25
UCHAR Psmp; /* 7.3.1.25 */
} FRAME_PSMP_ACTION, *PFRAME_PSMP_ACTION;
typedef struct PACKED _FRAME_ACTION_HDR {
......@@ -576,17 +576,17 @@ typedef struct PACKED _FRAME_ACTION_HDR {
UCHAR Action;
} FRAME_ACTION_HDR, *PFRAME_ACTION_HDR;
//Action Frame
//Action Frame Category:Spectrum, Action:Channel Switch. 7.3.2.20
/*Action Frame */
/*Action Frame Category:Spectrum, Action:Channel Switch. 7.3.2.20 */
typedef struct PACKED _CHAN_SWITCH_ANNOUNCE {
UCHAR ElementID; // ID = IE_CHANNEL_SWITCH_ANNOUNCEMENT = 37
UCHAR ElementID; /* ID = IE_CHANNEL_SWITCH_ANNOUNCEMENT = 37 */
UCHAR Len;
CHA_SWITCH_ANNOUNCE_IE CSAnnounceIe;
} CHAN_SWITCH_ANNOUNCE, *PCHAN_SWITCH_ANNOUNCE;
//802.11n : 7.3.2.20a
/*802.11n : 7.3.2.20a */
typedef struct PACKED _SECOND_CHAN_OFFSET {
UCHAR ElementID; // ID = IE_SECONDARY_CH_OFFSET = 62
UCHAR ElementID; /* ID = IE_SECONDARY_CH_OFFSET = 62 */
UCHAR Len;
SEC_CHA_OFFSET_IE SecChOffsetIe;
} SECOND_CHAN_OFFSET, *PSECOND_CHAN_OFFSET;
......@@ -603,10 +603,10 @@ typedef struct PACKED _FRAME_ADDBA_REQ {
HEADER_802_11 Hdr;
UCHAR Category;
UCHAR Action;
UCHAR Token; // 1
BA_PARM BaParm; // 2 - 10
USHORT TimeOutValue; // 0 - 0
BASEQ_CONTROL BaStartSeq; // 0-0
UCHAR Token; /* 1 */
BA_PARM BaParm; /* 2 - 10 */
USHORT TimeOutValue; /* 0 - 0 */
BASEQ_CONTROL BaStartSeq; /* 0-0 */
} FRAME_ADDBA_REQ, *PFRAME_ADDBA_REQ;
typedef struct PACKED _FRAME_ADDBA_RSP {
......@@ -615,7 +615,7 @@ typedef struct PACKED _FRAME_ADDBA_RSP {
UCHAR Action;
UCHAR Token;
USHORT StatusCode;
BA_PARM BaParm; //0 - 2
BA_PARM BaParm; /*0 - 2 */
USHORT TimeOutValue;
} FRAME_ADDBA_RSP, *PFRAME_ADDBA_RSP;
......@@ -627,7 +627,7 @@ typedef struct PACKED _FRAME_DELBA_REQ {
USHORT ReasonCode;
} FRAME_DELBA_REQ, *PFRAME_DELBA_REQ;
//7.2.1.7
/*7.2.1.7 */
typedef struct PACKED _FRAME_BAR {
FRAME_CONTROL FC;
USHORT Duration;
......@@ -637,7 +637,7 @@ typedef struct PACKED _FRAME_BAR {
BASEQ_CONTROL StartingSeq;
} FRAME_BAR, *PFRAME_BAR;
//7.2.1.7
/*7.2.1.7 */
typedef struct PACKED _FRAME_BA {
FRAME_CONTROL FC;
USHORT Duration;
......@@ -648,7 +648,7 @@ typedef struct PACKED _FRAME_BA {
UCHAR bitmask[8];
} FRAME_BA, *PFRAME_BA;
// Radio Measuement Request Frame Format
/* Radio Measuement Request Frame Format */
typedef struct PACKED _FRAME_RM_REQ_ACTION {
HEADER_802_11 Hdr;
UCHAR Category;
......@@ -668,21 +668,21 @@ typedef struct PACKED {
} HT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE,
*PHT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE;
//
// _Limit must be the 2**n - 1
// _SEQ1 , _SEQ2 must be within 0 ~ _Limit
//
/* */
/* _Limit must be the 2**n - 1 */
/* _SEQ1 , _SEQ2 must be within 0 ~ _Limit */
/* */
#define SEQ_STEPONE(_SEQ1, _SEQ2, _Limit) ((_SEQ1 == ((_SEQ2+1) & _Limit)))
#define SEQ_SMALLER(_SEQ1, _SEQ2, _Limit) (((_SEQ1-_SEQ2) & ((_Limit+1)>>1)))
#define SEQ_LARGER(_SEQ1, _SEQ2, _Limit) ((_SEQ1 != _SEQ2) && !(((_SEQ1-_SEQ2) & ((_Limit+1)>>1))))
#define SEQ_WITHIN_WIN(_SEQ1, _SEQ2, _WIN, _Limit) (SEQ_LARGER(_SEQ1, _SEQ2, _Limit) && \
SEQ_SMALLER(_SEQ1, ((_SEQ2+_WIN+1)&_Limit), _Limit))
//
// Contention-free parameter (without ID and Length)
//
/* */
/* Contention-free parameter (without ID and Length) */
/* */
typedef struct PACKED {
BOOLEAN bValid; // 1: variable contains valid value
BOOLEAN bValid; /* 1: variable contains valid value */
UCHAR CfpCount;
UCHAR CfpPeriod;
USHORT CfpMaxDuration;
......@@ -690,39 +690,39 @@ typedef struct PACKED {
} CF_PARM, *PCF_PARM;
typedef struct _CIPHER_SUITE {
NDIS_802_11_ENCRYPTION_STATUS PairCipher; // Unicast cipher 1, this one has more secured cipher suite
NDIS_802_11_ENCRYPTION_STATUS PairCipherAux; // Unicast cipher 2 if AP announce two unicast cipher suite
NDIS_802_11_ENCRYPTION_STATUS GroupCipher; // Group cipher
USHORT RsnCapability; // RSN capability from beacon
BOOLEAN bMixMode; // Indicate Pair & Group cipher might be different
NDIS_802_11_ENCRYPTION_STATUS PairCipher; /* Unicast cipher 1, this one has more secured cipher suite */
NDIS_802_11_ENCRYPTION_STATUS PairCipherAux; /* Unicast cipher 2 if AP announce two unicast cipher suite */
NDIS_802_11_ENCRYPTION_STATUS GroupCipher; /* Group cipher */
USHORT RsnCapability; /* RSN capability from beacon */
BOOLEAN bMixMode; /* Indicate Pair & Group cipher might be different */
} CIPHER_SUITE, *PCIPHER_SUITE;
// EDCA configuration from AP's BEACON/ProbeRsp
/* EDCA configuration from AP's BEACON/ProbeRsp */
typedef struct {
BOOLEAN bValid; // 1: variable contains valid value
BOOLEAN bAdd; // 1: variable contains valid value
BOOLEAN bValid; /* 1: variable contains valid value */
BOOLEAN bAdd; /* 1: variable contains valid value */
BOOLEAN bQAck;
BOOLEAN bQueueRequest;
BOOLEAN bTxopRequest;
BOOLEAN bAPSDCapable;
// BOOLEAN bMoreDataAck;
/* BOOLEAN bMoreDataAck; */
UCHAR EdcaUpdateCount;
UCHAR Aifsn[4]; // 0:AC_BK, 1:AC_BE, 2:AC_VI, 3:AC_VO
UCHAR Aifsn[4]; /* 0:AC_BK, 1:AC_BE, 2:AC_VI, 3:AC_VO */
UCHAR Cwmin[4];
UCHAR Cwmax[4];
USHORT Txop[4]; // in unit of 32-us
BOOLEAN bACM[4]; // 1: Admission Control of AC_BK is mandattory
USHORT Txop[4]; /* in unit of 32-us */
BOOLEAN bACM[4]; /* 1: Admission Control of AC_BK is mandattory */
} EDCA_PARM, *PEDCA_PARM;
// QBSS LOAD information from QAP's BEACON/ProbeRsp
/* QBSS LOAD information from QAP's BEACON/ProbeRsp */
typedef struct {
BOOLEAN bValid; // 1: variable contains valid value
BOOLEAN bValid; /* 1: variable contains valid value */
USHORT StaNum;
UCHAR ChannelUtilization;
USHORT RemainingAdmissionControl; // in unit of 32-us
USHORT RemainingAdmissionControl; /* in unit of 32-us */
} QBSS_LOAD_PARM, *PQBSS_LOAD_PARM;
// QBSS Info field in QSTA's assoc req
/* QBSS Info field in QSTA's assoc req */
typedef struct PACKED {
UCHAR UAPSD_AC_VO:1;
UCHAR UAPSD_AC_VI:1;
......@@ -733,21 +733,21 @@ typedef struct PACKED {
UCHAR Rsv2:1;
} QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM;
// QBSS Info field in QAP's Beacon/ProbeRsp
/* QBSS Info field in QAP's Beacon/ProbeRsp */
typedef struct PACKED {
UCHAR ParamSetCount:4;
UCHAR Rsv:3;
UCHAR UAPSD:1;
} QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM;
// QOS Capability reported in QAP's BEACON/ProbeRsp
// QOS Capability sent out in QSTA's AssociateReq/ReAssociateReq
/* QOS Capability reported in QAP's BEACON/ProbeRsp */
/* QOS Capability sent out in QSTA's AssociateReq/ReAssociateReq */
typedef struct {
BOOLEAN bValid; // 1: variable contains valid value
BOOLEAN bValid; /* 1: variable contains valid value */
BOOLEAN bQAck;
BOOLEAN bQueueRequest;
BOOLEAN bTxopRequest;
// BOOLEAN bMoreDataAck;
/* BOOLEAN bMoreDataAck; */
UCHAR EdcaUpdateCount;
} QOS_CAPABILITY_PARM, *PQOS_CAPABILITY_PARM;
......@@ -759,7 +759,7 @@ typedef struct {
typedef struct {
UCHAR Bssid[MAC_ADDR_LEN];
UCHAR Channel;
UCHAR CentralChannel; //Store the wide-band central channel for 40MHz. .used in 40MHz AP. Or this is the same as Channel.
UCHAR CentralChannel; /*Store the wide-band central channel for 40MHz. .used in 40MHz AP. Or this is the same as Channel. */
UCHAR BssType;
USHORT AtimWin;
USHORT BeaconPeriod;
......@@ -770,11 +770,11 @@ typedef struct {
UCHAR ExtRateLen;
HT_CAPABILITY_IE HtCapability;
UCHAR HtCapabilityLen;
ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE
ADD_HT_INFO_IE AddHtInfo; /* AP might use this additional ht info IE */
UCHAR AddHtInfoLen;
UCHAR NewExtChanOffset;
CHAR Rssi;
UCHAR Privacy; // Indicate security function ON/OFF. Don't mess up with auth mode.
UCHAR Privacy; /* Indicate security function ON/OFF. Don't mess up with auth mode. */
UCHAR Hidden;
USHORT DtimPeriod;
......@@ -787,30 +787,30 @@ typedef struct {
UCHAR SsidLen;
CHAR Ssid[MAX_LEN_OF_SSID];
ULONG LastBeaconRxTime; // OS's timestamp
ULONG LastBeaconRxTime; /* OS's timestamp */
BOOLEAN bSES;
// New for WPA2
CIPHER_SUITE WPA; // AP announced WPA cipher suite
CIPHER_SUITE WPA2; // AP announced WPA2 cipher suite
/* New for WPA2 */
CIPHER_SUITE WPA; /* AP announced WPA cipher suite */
CIPHER_SUITE WPA2; /* AP announced WPA2 cipher suite */
// New for microsoft WPA support
/* New for microsoft WPA support */
NDIS_802_11_FIXED_IEs FixIEs;
NDIS_802_11_AUTHENTICATION_MODE AuthModeAux; // Addition mode for WPA2 / WPA capable AP
NDIS_802_11_AUTHENTICATION_MODE AuthModeAux; /* Addition mode for WPA2 / WPA capable AP */
NDIS_802_11_AUTHENTICATION_MODE AuthMode;
NDIS_802_11_WEP_STATUS WepStatus; // Unicast Encryption Algorithm extract from VAR_IE
USHORT VarIELen; // Length of next VIE include EID & Length
NDIS_802_11_WEP_STATUS WepStatus; /* Unicast Encryption Algorithm extract from VAR_IE */
USHORT VarIELen; /* Length of next VIE include EID & Length */
UCHAR VarIEs[MAX_VIE_LEN];
// CCX Ckip information
/* CCX Ckip information */
UCHAR CkipFlag;
// CCX 2 TSF
UCHAR PTSF[4]; // Parent TSF
UCHAR TTSF[8]; // Target TSF
/* CCX 2 TSF */
UCHAR PTSF[4]; /* Parent TSF */
UCHAR TTSF[8]; /* Target TSF */
// 802.11e d9, and WMM
/* 802.11e d9, and WMM */
EDCA_PARM EdcaParm;
QOS_CAPABILITY_PARM QosCapability;
QBSS_LOAD_PARM QbssLoad;
......@@ -857,12 +857,12 @@ typedef struct _STATE_MACHINE {
STATE_MACHINE_FUNC *TransFunc;
} STATE_MACHINE, *PSTATE_MACHINE;
// MLME AUX data structure that hold temporarliy settings during a connection attempt.
// Once this attemp succeeds, all settings will be copy to pAd->StaActive.
// A connection attempt (user set OID, roaming, CCX fast roaming,..) consists of
// several steps (JOIN, AUTH, ASSOC or REASSOC) and may fail at any step. We purposely
// separate this under-trial settings away from pAd->StaActive so that once
// this new attempt failed, driver can auto-recover back to the active settings.
/* MLME AUX data structure that hold temporarliy settings during a connection attempt. */
/* Once this attemp succeeds, all settings will be copy to pAd->StaActive. */
/* A connection attempt (user set OID, roaming, CCX fast roaming,..) consists of */
/* several steps (JOIN, AUTH, ASSOC or REASSOC) and may fail at any step. We purposely */
/* separate this under-trial settings away from pAd->StaActive so that once */
/* this new attempt failed, driver can auto-recover back to the active settings. */
typedef struct _MLME_AUX {
UCHAR BssType;
UCHAR Ssid[MAX_LEN_OF_SSID];
......@@ -881,28 +881,28 @@ typedef struct _MLME_AUX {
USHORT CfpPeriod;
USHORT AtimWin;
// Copy supported rate from desired AP's beacon. We are trying to match
// AP's supported and extended rate settings.
/* Copy supported rate from desired AP's beacon. We are trying to match */
/* AP's supported and extended rate settings. */
UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
UCHAR SupRateLen;
UCHAR ExtRateLen;
HT_CAPABILITY_IE HtCapability;
UCHAR HtCapabilityLen;
ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE
ADD_HT_INFO_IE AddHtInfo; /* AP might use this additional ht info IE */
UCHAR NewExtChannelOffset;
//RT_HT_CAPABILITY SupportedHtPhy;
/*RT_HT_CAPABILITY SupportedHtPhy; */
// new for QOS
QOS_CAPABILITY_PARM APQosCapability; // QOS capability of the current associated AP
EDCA_PARM APEdcaParm; // EDCA parameters of the current associated AP
QBSS_LOAD_PARM APQbssLoad; // QBSS load of the current associated AP
/* new for QOS */
QOS_CAPABILITY_PARM APQosCapability; /* QOS capability of the current associated AP */
EDCA_PARM APEdcaParm; /* EDCA parameters of the current associated AP */
QBSS_LOAD_PARM APQbssLoad; /* QBSS load of the current associated AP */
// new to keep Ralink specific feature
/* new to keep Ralink specific feature */
ULONG APRalinkIe;
BSS_TABLE SsidBssTab; // AP list for the same SSID
BSS_TABLE RoamTab; // AP list eligible for roaming
BSS_TABLE SsidBssTab; /* AP list for the same SSID */
BSS_TABLE RoamTab; /* AP list eligible for roaming */
ULONG BssIdx;
ULONG RoamIdx;
......@@ -914,7 +914,7 @@ typedef struct _MLME_AUX {
} MLME_AUX, *PMLME_AUX;
typedef struct _MLME_ADDBA_REQ_STRUCT {
UCHAR Wcid; //
UCHAR Wcid; /* */
UCHAR pAddr[MAC_ADDR_LEN];
UCHAR BaBufSize;
USHORT TimeOutValue;
......@@ -924,13 +924,13 @@ typedef struct _MLME_ADDBA_REQ_STRUCT {
} MLME_ADDBA_REQ_STRUCT, *PMLME_ADDBA_REQ_STRUCT;
typedef struct _MLME_DELBA_REQ_STRUCT {
UCHAR Wcid; //
UCHAR Wcid; /* */
UCHAR Addr[MAC_ADDR_LEN];
UCHAR TID;
UCHAR Initiator;
} MLME_DELBA_REQ_STRUCT, *PMLME_DELBA_REQ_STRUCT;
// assoc struct is equal to reassoc
/* assoc struct is equal to reassoc */
typedef struct _MLME_ASSOC_REQ_STRUCT {
UCHAR Addr[MAC_ADDR_LEN];
USHORT CapabilityInfo;
......@@ -991,62 +991,62 @@ typedef struct PACKED _RTMP_TX_RATE_SWITCH {
UCHAR TrainDown;
} RRTMP_TX_RATE_SWITCH, *PRTMP_TX_RATE_SWITCH;
// ========================== AP mlme.h ===============================
#define TBTT_PRELOAD_TIME 384 // usec. LomgPreamble + 24-byte at 1Mbps
/* ========================== AP mlme.h =============================== */
#define TBTT_PRELOAD_TIME 384 /* usec. LomgPreamble + 24-byte at 1Mbps */
#define DEFAULT_DTIM_PERIOD 1
#define MAC_TABLE_AGEOUT_TIME 300 // unit: sec
#define MAC_TABLE_ASSOC_TIMEOUT 5 // unit: sec
#define MAC_TABLE_AGEOUT_TIME 300 /* unit: sec */
#define MAC_TABLE_ASSOC_TIMEOUT 5 /* unit: sec */
#define MAC_TABLE_FULL(Tab) ((Tab).size == MAX_LEN_OF_MAC_TABLE)
// AP shall drop the sta if contine Tx fail count reach it.
#define MAC_ENTRY_LIFE_CHECK_CNT 20 // packet cnt.
/* AP shall drop the sta if contine Tx fail count reach it. */
#define MAC_ENTRY_LIFE_CHECK_CNT 20 /* packet cnt. */
// Value domain of pMacEntry->Sst
/* Value domain of pMacEntry->Sst */
typedef enum _Sst {
SST_NOT_AUTH, // 0: equivalent to IEEE 802.11/1999 state 1
SST_AUTH, // 1: equivalent to IEEE 802.11/1999 state 2
SST_ASSOC // 2: equivalent to IEEE 802.11/1999 state 3
SST_NOT_AUTH, /* 0: equivalent to IEEE 802.11/1999 state 1 */
SST_AUTH, /* 1: equivalent to IEEE 802.11/1999 state 2 */
SST_ASSOC /* 2: equivalent to IEEE 802.11/1999 state 3 */
} SST;
// value domain of pMacEntry->AuthState
/* value domain of pMacEntry->AuthState */
typedef enum _AuthState {
AS_NOT_AUTH,
AS_AUTH_OPEN, // STA has been authenticated using OPEN SYSTEM
AS_AUTH_KEY, // STA has been authenticated using SHARED KEY
AS_AUTHENTICATING // STA is waiting for AUTH seq#3 using SHARED KEY
AS_AUTH_OPEN, /* STA has been authenticated using OPEN SYSTEM */
AS_AUTH_KEY, /* STA has been authenticated using SHARED KEY */
AS_AUTHENTICATING /* STA is waiting for AUTH seq#3 using SHARED KEY */
} AUTH_STATE;
//for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
/*for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 */
typedef enum _ApWpaState {
AS_NOTUSE, // 0
AS_DISCONNECT, // 1
AS_DISCONNECTED, // 2
AS_INITIALIZE, // 3
AS_AUTHENTICATION, // 4
AS_AUTHENTICATION2, // 5
AS_INITPMK, // 6
AS_INITPSK, // 7
AS_PTKSTART, // 8
AS_PTKINIT_NEGOTIATING, // 9
AS_PTKINITDONE, // 10
AS_UPDATEKEYS, // 11
AS_INTEGRITY_FAILURE, // 12
AS_KEYUPDATE, // 13
AS_NOTUSE, /* 0 */
AS_DISCONNECT, /* 1 */
AS_DISCONNECTED, /* 2 */
AS_INITIALIZE, /* 3 */
AS_AUTHENTICATION, /* 4 */
AS_AUTHENTICATION2, /* 5 */
AS_INITPMK, /* 6 */
AS_INITPSK, /* 7 */
AS_PTKSTART, /* 8 */
AS_PTKINIT_NEGOTIATING, /* 9 */
AS_PTKINITDONE, /* 10 */
AS_UPDATEKEYS, /* 11 */
AS_INTEGRITY_FAILURE, /* 12 */
AS_KEYUPDATE, /* 13 */
} AP_WPA_STATE;
// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
/* for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 */
typedef enum _GTKState {
REKEY_NEGOTIATING,
REKEY_ESTABLISHED,
KEYERROR,
} GTK_STATE;
// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
/* for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 */
typedef enum _WpaGTKState {
SETKEYS,
SETKEYS_DONE,
} WPA_GTK_STATE;
// ====================== end of AP mlme.h ============================
/* ====================== end of AP mlme.h ============================ */
#endif // MLME_H__
#endif /* MLME_H__ */
drivers/staging/rt2860/oid.h
View file @ cc277069
......@@ -37,7 +37,7 @@
#ifndef _OID_H_
#define _OID_H_
//#include <linux/wireless.h>
/*#include <linux/wireless.h> */
#ifndef TRUE
#define TRUE 1
......@@ -45,9 +45,9 @@
#ifndef FALSE
#define FALSE 0
#endif
//
// IEEE 802.11 Structures and definitions
//
/* */
/* IEEE 802.11 Structures and definitions */
/* */
#define MAX_TX_POWER_LEVEL 100 /* mW */
#define MAX_RSSI_TRIGGER -10 /* dBm */
#define MIN_RSSI_TRIGGER -200 /* dBm */
......@@ -55,19 +55,19 @@
#define MIN_FRAG_THRESHOLD 256 /* byte count */
#define MAX_RTS_THRESHOLD 2347 /* byte count */
// new types for Media Specific Indications
// Extension channel offset
/* new types for Media Specific Indications */
/* Extension channel offset */
#define EXTCHA_NONE 0
#define EXTCHA_ABOVE 0x1
#define EXTCHA_BELOW 0x3
// BW
/* BW */
#define BAND_WIDTH_20 0
#define BAND_WIDTH_40 1
#define BAND_WIDTH_BOTH 2
#define BAND_WIDTH_10 3 // 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field.
// SHORTGI
#define GAP_INTERVAL_400 1 // only support in HT mode
#define BAND_WIDTH_10 3 /* 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field. */
/* SHORTGI */
#define GAP_INTERVAL_400 1 /* only support in HT mode */
#define GAP_INTERVAL_800 0
#define GAP_INTERVAL_BOTH 2
......@@ -78,12 +78,12 @@
#define NDIS_802_11_LENGTH_RATES 8
#define NDIS_802_11_LENGTH_RATES_EX 16
#define MAC_ADDR_LENGTH 6
//#define MAX_NUM_OF_CHS 49 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL terminationc
#define MAX_NUM_OF_CHS 54 // 14 channels @2.4G + 12@UNII(lower/middle) + 16@HiperLAN2 + 11@UNII(upper) + 0 @Japan + 1 as NULL termination
#define MAX_NUMBER_OF_EVENT 10 // entry # in EVENT table
#define MAX_NUMBER_OF_MAC 32 // if MAX_MBSSID_NUM is 8, this value can't be larger than 211
/*#define MAX_NUM_OF_CHS 49 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL terminationc */
#define MAX_NUM_OF_CHS 54 /* 14 channels @2.4G + 12@UNII(lower/middle) + 16@HiperLAN2 + 11@UNII(upper) + 0 @Japan + 1 as NULL termination */
#define MAX_NUMBER_OF_EVENT 10 /* entry # in EVENT table */
#define MAX_NUMBER_OF_MAC 32 /* if MAX_MBSSID_NUM is 8, this value can't be larger than 211 */
#define MAX_NUMBER_OF_ACL 64
#define MAX_LENGTH_OF_SUPPORT_RATES 12 // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54
#define MAX_LENGTH_OF_SUPPORT_RATES 12 /* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
#define MAX_NUMBER_OF_DLS_ENTRY 4
#define RT_QUERY_SIGNAL_CONTEXT 0x0402
......@@ -91,9 +91,9 @@
#define RT_SET_APD_PID 0x0405
#define RT_SET_DEL_MAC_ENTRY 0x0406
#define RT_QUERY_EVENT_TABLE 0x0407
//
// IEEE 802.11 OIDs
//
/* */
/* IEEE 802.11 OIDs */
/* */
#define OID_GET_SET_TOGGLE 0x8000
#define OID_GET_SET_FROM_UI 0x4000
......@@ -119,7 +119,7 @@
#define RT_OID_802_11_QUERY_LAST_RX_RATE 0x0613
#define RT_OID_802_11_TX_POWER_LEVEL_1 0x0614
#define RT_OID_802_11_QUERY_PIDVID 0x0615
//for WPA_SUPPLICANT_SUPPORT
/*for WPA_SUPPLICANT_SUPPORT */
#define OID_SET_COUNTERMEASURES 0x0616
#define RT_OID_WPA_SUPPLICANT_SUPPORT 0x0621
#define RT_OID_WE_VERSION_COMPILED 0x0622
......@@ -132,7 +132,7 @@ typedef enum _NDIS_802_11_STATUS_TYPE {
Ndis802_11StatusType_Authentication,
Ndis802_11StatusType_MediaStreamMode,
Ndis802_11StatusType_PMKID_CandidateList,
Ndis802_11StatusTypeMax // not a real type, defined as an upper bound
Ndis802_11StatusTypeMax /* not a real type, defined as an upper bound */
} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
typedef UCHAR NDIS_802_11_MAC_ADDRESS[6];
......@@ -141,7 +141,7 @@ typedef struct _NDIS_802_11_STATUS_INDICATION {
NDIS_802_11_STATUS_TYPE StatusType;
} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION;
// mask for authentication/integrity fields
/* mask for authentication/integrity fields */
#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f
#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01
......@@ -150,27 +150,27 @@ typedef struct _NDIS_802_11_STATUS_INDICATION {
#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E
typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST {
ULONG Length; // Length of structure
ULONG Length; /* Length of structure */
NDIS_802_11_MAC_ADDRESS Bssid;
ULONG Flags;
} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST;
//Added new types for PMKID Candidate lists.
/*Added new types for PMKID Candidate lists. */
typedef struct _PMKID_CANDIDATE {
NDIS_802_11_MAC_ADDRESS BSSID;
ULONG Flags;
} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST {
ULONG Version; // Version of the structure
ULONG NumCandidates; // No. of pmkid candidates
ULONG Version; /* Version of the structure */
ULONG NumCandidates; /* No. of pmkid candidates */
PMKID_CANDIDATE CandidateList[1];
} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST;
//Flags for PMKID Candidate list structure
/*Flags for PMKID Candidate list structure */
#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01
// Added new types for OFDM 5G and 2.4G
/* Added new types for OFDM 5G and 2.4G */
typedef enum _NDIS_802_11_NETWORK_TYPE {
Ndis802_11FH,
Ndis802_11DS,
......@@ -179,11 +179,11 @@ typedef enum _NDIS_802_11_NETWORK_TYPE {
Ndis802_11Automode,
Ndis802_11OFDM5_N,
Ndis802_11OFDM24_N,
Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound
Ndis802_11NetworkTypeMax /* not a real type, defined as an upper bound */
} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE;
typedef struct _NDIS_802_11_NETWORK_TYPE_LIST {
UINT NumberOfItems; // in list below, at least 1
UINT NumberOfItems; /* in list below, at least 1 */
NDIS_802_11_NETWORK_TYPE NetworkType[1];
} NDIS_802_11_NETWORK_TYPE_LIST, *PNDIS_802_11_NETWORK_TYPE_LIST;
......@@ -192,33 +192,33 @@ typedef enum _NDIS_802_11_POWER_MODE {
Ndis802_11PowerModeMAX_PSP,
Ndis802_11PowerModeFast_PSP,
Ndis802_11PowerModeLegacy_PSP,
Ndis802_11PowerModeMax // not a real mode, defined as an upper bound
Ndis802_11PowerModeMax /* not a real mode, defined as an upper bound */
} NDIS_802_11_POWER_MODE, *PNDIS_802_11_POWER_MODE;
typedef ULONG NDIS_802_11_TX_POWER_LEVEL; // in milliwatts
typedef ULONG NDIS_802_11_TX_POWER_LEVEL; /* in milliwatts */
//
// Received Signal Strength Indication
//
typedef LONG NDIS_802_11_RSSI; // in dBm
/* */
/* Received Signal Strength Indication */
/* */
typedef LONG NDIS_802_11_RSSI; /* in dBm */
typedef struct _NDIS_802_11_CONFIGURATION_FH {
ULONG Length; // Length of structure
ULONG HopPattern; // As defined by 802.11, MSB set
ULONG HopSet; // to one if non-802.11
ULONG DwellTime; // units are Kusec
ULONG Length; /* Length of structure */
ULONG HopPattern; /* As defined by 802.11, MSB set */
ULONG HopSet; /* to one if non-802.11 */
ULONG DwellTime; /* units are Kusec */
} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH;
typedef struct _NDIS_802_11_CONFIGURATION {
ULONG Length; // Length of structure
ULONG BeaconPeriod; // units are Kusec
ULONG ATIMWindow; // units are Kusec
ULONG DSConfig; // Frequency, units are kHz
ULONG Length; /* Length of structure */
ULONG BeaconPeriod; /* units are Kusec */
ULONG ATIMWindow; /* units are Kusec */
ULONG DSConfig; /* Frequency, units are kHz */
NDIS_802_11_CONFIGURATION_FH FHConfig;
} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
typedef struct _NDIS_802_11_STATISTICS {
ULONG Length; // Length of structure
ULONG Length; /* Length of structure */
LARGE_INTEGER TransmittedFragmentCount;
LARGE_INTEGER MulticastTransmittedFrameCount;
LARGE_INTEGER FailedCount;
......@@ -245,7 +245,7 @@ typedef struct _NDIS_802_11_STATISTICS {
typedef ULONG NDIS_802_11_KEY_INDEX;
typedef ULONGLONG NDIS_802_11_KEY_RSC;
#define MAX_RADIUS_SRV_NUM 2 // 802.1x failover number
#define MAX_RADIUS_SRV_NUM 2 /* 802.1x failover number */
typedef struct PACKED _RADIUS_SRV_INFO {
UINT32 radius_ip;
......@@ -257,16 +257,16 @@ typedef struct PACKED _RADIUS_SRV_INFO {
typedef struct PACKED _RADIUS_KEY_INFO {
UCHAR radius_srv_num;
RADIUS_SRV_INFO radius_srv_info[MAX_RADIUS_SRV_NUM];
UCHAR ieee8021xWEP; // dynamic WEP
UCHAR ieee8021xWEP; /* dynamic WEP */
UCHAR key_index;
UCHAR key_length; // length of key in bytes
UCHAR key_length; /* length of key in bytes */
UCHAR key_material[13];
} RADIUS_KEY_INFO, *PRADIUS_KEY_INFO;
// It's used by 802.1x daemon to require relative configuration
/* It's used by 802.1x daemon to require relative configuration */
typedef struct PACKED _RADIUS_CONF {
UINT32 Length; // Length of this structure
UCHAR mbss_num; // indicate multiple BSS number
UINT32 Length; /* Length of this structure */
UCHAR mbss_num; /* indicate multiple BSS number */
UINT32 own_ip_addr;
UINT32 retry_interval;
UINT32 session_timeout_interval;
......@@ -277,34 +277,34 @@ typedef struct PACKED _RADIUS_CONF {
RADIUS_KEY_INFO RadiusInfo[8];
} RADIUS_CONF, *PRADIUS_CONF;
// Key mapping keys require a BSSID
/* Key mapping keys require a BSSID */
typedef struct _NDIS_802_11_KEY {
UINT Length; // Length of this structure
UINT Length; /* Length of this structure */
UINT KeyIndex;
UINT KeyLength; // length of key in bytes
UINT KeyLength; /* length of key in bytes */
NDIS_802_11_MAC_ADDRESS BSSID;
NDIS_802_11_KEY_RSC KeyRSC;
UCHAR KeyMaterial[1]; // variable length depending on above field
UCHAR KeyMaterial[1]; /* variable length depending on above field */
} NDIS_802_11_KEY, *PNDIS_802_11_KEY;
typedef struct _NDIS_802_11_PASSPHRASE {
UINT KeyLength; // length of key in bytes
UINT KeyLength; /* length of key in bytes */
NDIS_802_11_MAC_ADDRESS BSSID;
UCHAR KeyMaterial[1]; // variable length depending on above field
UCHAR KeyMaterial[1]; /* variable length depending on above field */
} NDIS_802_11_PASSPHRASE, *PNDIS_802_11_PASSPHRASE;
typedef struct _NDIS_802_11_REMOVE_KEY {
UINT Length; // Length of this structure
UINT Length; /* Length of this structure */
UINT KeyIndex;
NDIS_802_11_MAC_ADDRESS BSSID;
} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY;
typedef struct _NDIS_802_11_WEP {
UINT Length; // Length of this structure
UINT KeyIndex; // 0 is the per-client key, 1-N are the
// global keys
UINT KeyLength; // length of key in bytes
UCHAR KeyMaterial[1]; // variable length depending on above field
UINT Length; /* Length of this structure */
UINT KeyIndex; /* 0 is the per-client key, 1-N are the */
/* global keys */
UINT KeyLength; /* length of key in bytes */
UCHAR KeyMaterial[1]; /* variable length depending on above field */
} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
......@@ -312,10 +312,10 @@ typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
Ndis802_11Infrastructure,
Ndis802_11AutoUnknown,
Ndis802_11Monitor,
Ndis802_11InfrastructureMax // Not a real value, defined as upper bound
Ndis802_11InfrastructureMax /* Not a real value, defined as upper bound */
} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
// Add new authentication modes
/* Add new authentication modes */
typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
Ndis802_11AuthModeOpen,
Ndis802_11AuthModeShared,
......@@ -327,25 +327,25 @@ typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
Ndis802_11AuthModeWPA2PSK,
Ndis802_11AuthModeWPA1WPA2,
Ndis802_11AuthModeWPA1PSKWPA2PSK,
Ndis802_11AuthModeMax // Not a real mode, defined as upper bound
Ndis802_11AuthModeMax /* Not a real mode, defined as upper bound */
} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
typedef UCHAR NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates
typedef UCHAR NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates
typedef UCHAR NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */
typedef UCHAR NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */
typedef struct PACKED _NDIS_802_11_SSID {
UINT SsidLength; // length of SSID field below, in bytes;
// this can be zero.
UCHAR Ssid[NDIS_802_11_LENGTH_SSID]; // SSID information field
UINT SsidLength; /* length of SSID field below, in bytes; */
/* this can be zero. */
UCHAR Ssid[NDIS_802_11_LENGTH_SSID]; /* SSID information field */
} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
typedef struct PACKED _NDIS_WLAN_BSSID {
ULONG Length; // Length of this structure
NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID
ULONG Length; /* Length of this structure */
NDIS_802_11_MAC_ADDRESS MacAddress; /* BSSID */
UCHAR Reserved[2];
NDIS_802_11_SSID Ssid; // SSID
ULONG Privacy; // WEP encryption requirement
NDIS_802_11_RSSI Rssi; // receive signal strength in dBm
NDIS_802_11_SSID Ssid; /* SSID */
ULONG Privacy; /* WEP encryption requirement */
NDIS_802_11_RSSI Rssi; /* receive signal strength in dBm */
NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
NDIS_802_11_CONFIGURATION Configuration;
NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
......@@ -353,19 +353,19 @@ typedef struct PACKED _NDIS_WLAN_BSSID {
} NDIS_WLAN_BSSID, *PNDIS_WLAN_BSSID;
typedef struct PACKED _NDIS_802_11_BSSID_LIST {
UINT NumberOfItems; // in list below, at least 1
UINT NumberOfItems; /* in list below, at least 1 */
NDIS_WLAN_BSSID Bssid[1];
} NDIS_802_11_BSSID_LIST, *PNDIS_802_11_BSSID_LIST;
// Added Capabilities, IELength and IEs for each BSSID
/* Added Capabilities, IELength and IEs for each BSSID */
typedef struct PACKED _NDIS_WLAN_BSSID_EX {
ULONG Length; // Length of this structure
NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID
ULONG Length; /* Length of this structure */
NDIS_802_11_MAC_ADDRESS MacAddress; /* BSSID */
UCHAR Reserved[2];
NDIS_802_11_SSID Ssid; // SSID
UINT Privacy; // WEP encryption requirement
NDIS_802_11_RSSI Rssi; // receive signal
// strength in dBm
NDIS_802_11_SSID Ssid; /* SSID */
UINT Privacy; /* WEP encryption requirement */
NDIS_802_11_RSSI Rssi; /* receive signal */
/* strength in dBm */
NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
NDIS_802_11_CONFIGURATION Configuration;
NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
......@@ -375,7 +375,7 @@ typedef struct PACKED _NDIS_WLAN_BSSID_EX {
} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
typedef struct PACKED _NDIS_802_11_BSSID_LIST_EX {
UINT NumberOfItems; // in list below, at least 1
UINT NumberOfItems; /* in list below, at least 1 */
NDIS_WLAN_BSSID_EX Bssid[1];
} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
......@@ -387,7 +387,7 @@ typedef struct PACKED _NDIS_802_11_FIXED_IEs {
typedef struct _NDIS_802_11_VARIABLE_IEs {
UCHAR ElementID;
UCHAR Length; // Number of bytes in data field
UCHAR Length; /* Number of bytes in data field */
UCHAR data[1];
} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
......@@ -402,8 +402,8 @@ typedef enum _NDIS_802_11_PRIVACY_FILTER {
Ndis802_11PrivFilter8021xWEP
} NDIS_802_11_PRIVACY_FILTER, *PNDIS_802_11_PRIVACY_FILTER;
// Added new encryption types
// Also aliased typedef to new name
/* Added new encryption types */
/* Also aliased typedef to new name */
typedef enum _NDIS_802_11_WEP_STATUS {
Ndis802_11WEPEnabled,
Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
......@@ -417,7 +417,7 @@ typedef enum _NDIS_802_11_WEP_STATUS {
Ndis802_11Encryption2KeyAbsent,
Ndis802_11Encryption3Enabled,
Ndis802_11Encryption3KeyAbsent,
Ndis802_11Encryption4Enabled, // TKIP or AES mix
Ndis802_11Encryption4Enabled, /* TKIP or AES mix */
Ndis802_11Encryption4KeyAbsent,
Ndis802_11GroupWEP40Enabled,
Ndis802_11GroupWEP104Enabled,
......@@ -465,13 +465,13 @@ typedef struct _NDIS_802_11_AUTHENTICATION_EVENT {
NDIS_802_11_AUTHENTICATION_REQUEST Request[1];
} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT;
// 802.11 Media stream constraints, associated with OID_802_11_MEDIA_STREAM_MODE
/* 802.11 Media stream constraints, associated with OID_802_11_MEDIA_STREAM_MODE */
typedef enum _NDIS_802_11_MEDIA_STREAM_MODE {
Ndis802_11MediaStreamOff,
Ndis802_11MediaStreamOn,
} NDIS_802_11_MEDIA_STREAM_MODE, *PNDIS_802_11_MEDIA_STREAM_MODE;
// PMKID Structures
/* PMKID Structures */
typedef UCHAR NDIS_802_11_PMKID_VALUE[16];
typedef struct _BSSID_INFO {
......@@ -500,14 +500,14 @@ typedef struct _NDIS_802_11_CAPABILITY {
AuthenticationEncryptionSupported[1];
} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
#define RT_PRIV_IOCTL (SIOCIWFIRSTPRIV + 0x01) // Sync. with AP for wsc upnp daemon
#define RT_PRIV_IOCTL (SIOCIWFIRSTPRIV + 0x01) /* Sync. with AP for wsc upnp daemon */
#define RTPRIV_IOCTL_SET (SIOCIWFIRSTPRIV + 0x02)
#define RTPRIV_IOCTL_STATISTICS (SIOCIWFIRSTPRIV + 0x09)
#define RTPRIV_IOCTL_ADD_PMKID_CACHE (SIOCIWFIRSTPRIV + 0x0A)
#define RTPRIV_IOCTL_RADIUS_DATA (SIOCIWFIRSTPRIV + 0x0C)
#define RTPRIV_IOCTL_GSITESURVEY (SIOCIWFIRSTPRIV + 0x0D)
#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x0E) // Sync. with RT61 (for wpa_supplicant)
#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x0E) /* Sync. with RT61 (for wpa_supplicant) */
#define RTPRIV_IOCTL_GET_MAC_TABLE (SIOCIWFIRSTPRIV + 0x0F)
#define RTPRIV_IOCTL_SHOW (SIOCIWFIRSTPRIV + 0x11)
......@@ -519,7 +519,7 @@ enum {
#ifdef RTMP_MAC_USB
SHOW_RXBULK_INFO = 8,
SHOW_TXBULK_INFO = 9,
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
RAIO_OFF = 10,
RAIO_ON = 11,
SHOW_CFG_VALUE = 20,
......@@ -531,19 +531,19 @@ enum {
#define OID_802_11_GET_COUNTRY_CODE 0x0716
#define OID_802_11_GET_CHANNEL_GEOGRAPHY 0x0717
#define RT_OID_WSC_SET_PASSPHRASE 0x0740 // passphrase for wpa(2)-psk
#define RT_OID_WSC_SET_PASSPHRASE 0x0740 /* passphrase for wpa(2)-psk */
#define RT_OID_WSC_DRIVER_AUTO_CONNECT 0x0741
#define RT_OID_WSC_QUERY_DEFAULT_PROFILE 0x0742
#define RT_OID_WSC_SET_CONN_BY_PROFILE_INDEX 0x0743
#define RT_OID_WSC_SET_ACTION 0x0744
#define RT_OID_WSC_SET_SSID 0x0745
#define RT_OID_WSC_SET_PIN_CODE 0x0746
#define RT_OID_WSC_SET_MODE 0x0747 // PIN or PBC
#define RT_OID_WSC_SET_CONF_MODE 0x0748 // Enrollee or Registrar
#define RT_OID_WSC_SET_MODE 0x0747 /* PIN or PBC */
#define RT_OID_WSC_SET_CONF_MODE 0x0748 /* Enrollee or Registrar */
#define RT_OID_WSC_SET_PROFILE 0x0749
#define RT_OID_WSC_CONFIG_STATUS 0x074F
#define RT_OID_802_11_WSC_QUERY_PROFILE 0x0750
// for consistency with RT61
/* for consistency with RT61 */
#define RT_OID_WSC_QUERY_STATUS 0x0751
#define RT_OID_WSC_PIN_CODE 0x0752
#define RT_OID_WSC_UUID 0x0753
......@@ -555,20 +555,20 @@ enum {
#define RT_OID_WSC_SERIAL_NO 0x0759
#define RT_OID_WSC_MAC_ADDRESS 0x0760
// New for MeetingHouse Api support
/* New for MeetingHouse Api support */
#define OID_MH_802_1X_SUPPORTED 0xFFEDC100
// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
/* MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! */
typedef union _HTTRANSMIT_SETTING {
struct {
USHORT MCS:7; // MCS
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
USHORT MCS:7; /* MCS */
USHORT BW:1; /*channel bandwidth 20MHz or 40 MHz */
USHORT ShortGI:1;
USHORT STBC:2; //SPACE
// USHORT rsv:3;
USHORT STBC:2; /*SPACE */
/* USHORT rsv:3; */
USHORT rsv:2;
USHORT TxBF:1;
USHORT MODE:2; // Use definition MODE_xxx.
USHORT MODE:2; /* Use definition MODE_xxx. */
} field;
USHORT word;
} HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING;
......@@ -585,45 +585,45 @@ typedef enum _RT_802_11_PHY_MODE {
PHY_11A,
PHY_11ABG_MIXED,
PHY_11G,
PHY_11ABGN_MIXED, // both band 5
PHY_11N_2_4G, // 11n-only with 2.4G band 6
PHY_11GN_MIXED, // 2.4G band 7
PHY_11AN_MIXED, // 5G band 8
PHY_11BGN_MIXED, // if check 802.11b. 9
PHY_11AGN_MIXED, // if check 802.11b. 10
PHY_11N_5G, // 11n-only with 5G band 11
PHY_11ABGN_MIXED, /* both band 5 */
PHY_11N_2_4G, /* 11n-only with 2.4G band 6 */
PHY_11GN_MIXED, /* 2.4G band 7 */
PHY_11AN_MIXED, /* 5G band 8 */
PHY_11BGN_MIXED, /* if check 802.11b. 9 */
PHY_11AGN_MIXED, /* if check 802.11b. 10 */
PHY_11N_5G, /* 11n-only with 5G band 11 */
} RT_802_11_PHY_MODE;
// put all proprietery for-query objects here to reduce # of Query_OID
/* put all proprietery for-query objects here to reduce # of Query_OID */
typedef struct _RT_802_11_LINK_STATUS {
ULONG CurrTxRate; // in units of 0.5Mbps
ULONG ChannelQuality; // 0..100 %
ULONG TxByteCount; // both ok and fail
ULONG RxByteCount; // both ok and fail
ULONG CentralChannel; // 40MHz central channel number
ULONG CurrTxRate; /* in units of 0.5Mbps */
ULONG ChannelQuality; /* 0..100 % */
ULONG TxByteCount; /* both ok and fail */
ULONG RxByteCount; /* both ok and fail */
ULONG CentralChannel; /* 40MHz central channel number */
} RT_802_11_LINK_STATUS, *PRT_802_11_LINK_STATUS;
typedef struct _RT_802_11_EVENT_LOG {
LARGE_INTEGER SystemTime; // timestammp via NdisGetCurrentSystemTime()
LARGE_INTEGER SystemTime; /* timestammp via NdisGetCurrentSystemTime() */
UCHAR Addr[MAC_ADDR_LENGTH];
USHORT Event; // EVENT_xxx
USHORT Event; /* EVENT_xxx */
} RT_802_11_EVENT_LOG, *PRT_802_11_EVENT_LOG;
typedef struct _RT_802_11_EVENT_TABLE {
ULONG Num;
ULONG Rsv; // to align Log[] at LARGE_INEGER boundary
ULONG Rsv; /* to align Log[] at LARGE_INEGER boundary */
RT_802_11_EVENT_LOG Log[MAX_NUMBER_OF_EVENT];
} RT_802_11_EVENT_TABLE, PRT_802_11_EVENT_TABLE;
// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
/* MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! */
typedef union _MACHTTRANSMIT_SETTING {
struct {
USHORT MCS:7; // MCS
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
USHORT MCS:7; /* MCS */
USHORT BW:1; /*channel bandwidth 20MHz or 40 MHz */
USHORT ShortGI:1;
USHORT STBC:2; //SPACE
USHORT STBC:2; /*SPACE */
USHORT rsv:3;
USHORT MODE:2; // Use definition MODE_xxx.
USHORT MODE:2; /* Use definition MODE_xxx. */
} field;
USHORT word;
} MACHTTRANSMIT_SETTING, *PMACHTTRANSMIT_SETTING;
......@@ -631,8 +631,8 @@ typedef union _MACHTTRANSMIT_SETTING {
typedef struct _RT_802_11_MAC_ENTRY {
UCHAR Addr[MAC_ADDR_LENGTH];
UCHAR Aid;
UCHAR Psm; // 0:PWR_ACTIVE, 1:PWR_SAVE
UCHAR MimoPs; // 0:MMPS_STATIC, 1:MMPS_DYNAMIC, 3:MMPS_Enabled
UCHAR Psm; /* 0:PWR_ACTIVE, 1:PWR_SAVE */
UCHAR MimoPs; /* 0:MMPS_STATIC, 1:MMPS_DYNAMIC, 3:MMPS_Enabled */
CHAR AvgRssi0;
CHAR AvgRssi1;
CHAR AvgRssi2;
......@@ -645,48 +645,48 @@ typedef struct _RT_802_11_MAC_TABLE {
RT_802_11_MAC_ENTRY Entry[MAX_NUMBER_OF_MAC];
} RT_802_11_MAC_TABLE, *PRT_802_11_MAC_TABLE;
// structure for query/set hardware register - MAC, BBP, RF register
/* structure for query/set hardware register - MAC, BBP, RF register */
typedef struct _RT_802_11_HARDWARE_REGISTER {
ULONG HardwareType; // 0:MAC, 1:BBP, 2:RF register, 3:EEPROM
ULONG Offset; // Q/S register offset addr
ULONG Data; // R/W data buffer
ULONG HardwareType; /* 0:MAC, 1:BBP, 2:RF register, 3:EEPROM */
ULONG Offset; /* Q/S register offset addr */
ULONG Data; /* R/W data buffer */
} RT_802_11_HARDWARE_REGISTER, *PRT_802_11_HARDWARE_REGISTER;
typedef struct _RT_802_11_AP_CONFIG {
ULONG EnableTxBurst; // 0-disable, 1-enable
ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate
ULONG IsolateInterStaTraffic; // 0-disable, 1-enable isolation
ULONG HideSsid; // 0-disable, 1-enable hiding
ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF
ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time
ULONG Rsv1; // must be 0
ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY
ULONG EnableTxBurst; /* 0-disable, 1-enable */
ULONG EnableTurboRate; /* 0-disable, 1-enable 72/100mbps turbo rate */
ULONG IsolateInterStaTraffic; /* 0-disable, 1-enable isolation */
ULONG HideSsid; /* 0-disable, 1-enable hiding */
ULONG UseBGProtection; /* 0-AUTO, 1-always ON, 2-always OFF */
ULONG UseShortSlotTime; /* 0-no use, 1-use 9-us short slot time */
ULONG Rsv1; /* must be 0 */
ULONG SystemErrorBitmap; /* ignore upon SET, return system error upon QUERY */
} RT_802_11_AP_CONFIG, *PRT_802_11_AP_CONFIG;
// structure to query/set STA_CONFIG
/* structure to query/set STA_CONFIG */
typedef struct _RT_802_11_STA_CONFIG {
ULONG EnableTxBurst; // 0-disable, 1-enable
ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate
ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF
ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time when applicable
ULONG AdhocMode; // 0-11b rates only (WIFI spec), 1 - b/g mixed, 2 - g only
ULONG HwRadioStatus; // 0-OFF, 1-ON, default is 1, Read-Only
ULONG Rsv1; // must be 0
ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY
ULONG EnableTxBurst; /* 0-disable, 1-enable */
ULONG EnableTurboRate; /* 0-disable, 1-enable 72/100mbps turbo rate */
ULONG UseBGProtection; /* 0-AUTO, 1-always ON, 2-always OFF */
ULONG UseShortSlotTime; /* 0-no use, 1-use 9-us short slot time when applicable */
ULONG AdhocMode; /* 0-11b rates only (WIFI spec), 1 - b/g mixed, 2 - g only */
ULONG HwRadioStatus; /* 0-OFF, 1-ON, default is 1, Read-Only */
ULONG Rsv1; /* must be 0 */
ULONG SystemErrorBitmap; /* ignore upon SET, return system error upon QUERY */
} RT_802_11_STA_CONFIG, *PRT_802_11_STA_CONFIG;
//
// For OID Query or Set about BA structure
//
/* */
/* For OID Query or Set about BA structure */
/* */
typedef struct _OID_BACAP_STRUC {
UCHAR RxBAWinLimit;
UCHAR TxBAWinLimit;
UCHAR Policy; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid
UCHAR MpduDensity; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid
UCHAR AmsduEnable; //Enable AMSDU transmisstion
UCHAR AmsduSize; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935};
UCHAR MMPSmode; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable
BOOLEAN AutoBA; // Auto BA will automatically
UCHAR Policy; /* 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid */
UCHAR MpduDensity; /* 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid */
UCHAR AmsduEnable; /*Enable AMSDU transmisstion */
UCHAR AmsduSize; /* 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935}; */
UCHAR MMPSmode; /* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */
BOOLEAN AutoBA; /* Auto BA will automatically */
} OID_BACAP_STRUC, *POID_BACAP_STRUC;
typedef struct _RT_802_11_ACL_ENTRY {
......@@ -695,7 +695,7 @@ typedef struct _RT_802_11_ACL_ENTRY {
} RT_802_11_ACL_ENTRY, *PRT_802_11_ACL_ENTRY;
typedef struct PACKED _RT_802_11_ACL {
ULONG Policy; // 0-disable, 1-positive list, 2-negative list
ULONG Policy; /* 0-disable, 1-positive list, 2-negative list */
ULONG Num;
RT_802_11_ACL_ENTRY Entry[MAX_NUMBER_OF_ACL];
} RT_802_11_ACL, *PRT_802_11_ACL;
......@@ -714,29 +714,29 @@ typedef struct _RT_802_11_TX_RATES_ {
UCHAR ExtRate[MAX_LENGTH_OF_SUPPORT_RATES];
} RT_802_11_TX_RATES, *PRT_802_11_TX_RATES;
// Definition of extra information code
#define GENERAL_LINK_UP 0x0 // Link is Up
#define GENERAL_LINK_DOWN 0x1 // Link is Down
#define HW_RADIO_OFF 0x2 // Hardware radio off
#define SW_RADIO_OFF 0x3 // Software radio off
#define AUTH_FAIL 0x4 // Open authentication fail
#define AUTH_FAIL_KEYS 0x5 // Shared authentication fail
#define ASSOC_FAIL 0x6 // Association failed
#define EAP_MIC_FAILURE 0x7 // Deauthencation because MIC failure
#define EAP_4WAY_TIMEOUT 0x8 // Deauthencation on 4-way handshake timeout
#define EAP_GROUP_KEY_TIMEOUT 0x9 // Deauthencation on group key handshake timeout
#define EAP_SUCCESS 0xa // EAP succeed
#define DETECT_RADAR_SIGNAL 0xb // Radar signal occur in current channel
#define EXTRA_INFO_MAX 0xb // Indicate Last OID
/* Definition of extra information code */
#define GENERAL_LINK_UP 0x0 /* Link is Up */
#define GENERAL_LINK_DOWN 0x1 /* Link is Down */
#define HW_RADIO_OFF 0x2 /* Hardware radio off */
#define SW_RADIO_OFF 0x3 /* Software radio off */
#define AUTH_FAIL 0x4 /* Open authentication fail */
#define AUTH_FAIL_KEYS 0x5 /* Shared authentication fail */
#define ASSOC_FAIL 0x6 /* Association failed */
#define EAP_MIC_FAILURE 0x7 /* Deauthencation because MIC failure */
#define EAP_4WAY_TIMEOUT 0x8 /* Deauthencation on 4-way handshake timeout */
#define EAP_GROUP_KEY_TIMEOUT 0x9 /* Deauthencation on group key handshake timeout */
#define EAP_SUCCESS 0xa /* EAP succeed */
#define DETECT_RADAR_SIGNAL 0xb /* Radar signal occur in current channel */
#define EXTRA_INFO_MAX 0xb /* Indicate Last OID */
#define EXTRA_INFO_CLEAR 0xffffffff
// This is OID setting structure. So only GF or MM as Mode. This is valid when our wirelss mode has 802.11n in use.
/* This is OID setting structure. So only GF or MM as Mode. This is valid when our wirelss mode has 802.11n in use. */
typedef struct {
RT_802_11_PHY_MODE PhyMode; //
RT_802_11_PHY_MODE PhyMode; /* */
UCHAR TransmitNo;
UCHAR HtMode; //HTMODE_GF or HTMODE_MM
UCHAR ExtOffset; //extension channel above or below
UCHAR HtMode; /*HTMODE_GF or HTMODE_MM */
UCHAR ExtOffset; /*extension channel above or below */
UCHAR MCS;
UCHAR BW;
UCHAR STBC;
......@@ -753,27 +753,27 @@ typedef enum _RT_802_11_D_CLIENT_MODE {
} RT_802_11_D_CLIENT_MODE, *PRT_802_11_D_CLIENT_MODE;
typedef struct _RT_CHANNEL_LIST_INFO {
UCHAR ChannelList[MAX_NUM_OF_CHS]; // list all supported channels for site survey
UCHAR ChannelListNum; // number of channel in ChannelList[]
UCHAR ChannelList[MAX_NUM_OF_CHS]; /* list all supported channels for site survey */
UCHAR ChannelListNum; /* number of channel in ChannelList[] */
} RT_CHANNEL_LIST_INFO, *PRT_CHANNEL_LIST_INFO;
// WSC configured credential
/* WSC configured credential */
typedef struct _WSC_CREDENTIAL {
NDIS_802_11_SSID SSID; // mandatory
USHORT AuthType; // mandatory, 1: open, 2: wpa-psk, 4: shared, 8:wpa, 0x10: wpa2, 0x20: wpa2-psk
USHORT EncrType; // mandatory, 1: none, 2: wep, 4: tkip, 8: aes
UCHAR Key[64]; // mandatory, Maximum 64 byte
NDIS_802_11_SSID SSID; /* mandatory */
USHORT AuthType; /* mandatory, 1: open, 2: wpa-psk, 4: shared, 8:wpa, 0x10: wpa2, 0x20: wpa2-psk */
USHORT EncrType; /* mandatory, 1: none, 2: wep, 4: tkip, 8: aes */
UCHAR Key[64]; /* mandatory, Maximum 64 byte */
USHORT KeyLength;
UCHAR MacAddr[6]; // mandatory, AP MAC address
UCHAR KeyIndex; // optional, default is 1
UCHAR Rsvd[3]; // Make alignment
UCHAR MacAddr[6]; /* mandatory, AP MAC address */
UCHAR KeyIndex; /* optional, default is 1 */
UCHAR Rsvd[3]; /* Make alignment */
} WSC_CREDENTIAL, *PWSC_CREDENTIAL;
// WSC configured profiles
/* WSC configured profiles */
typedef struct _WSC_PROFILE {
UINT ProfileCnt;
UINT ApplyProfileIdx; // add by johnli, fix WPS test plan 5.1.1
WSC_CREDENTIAL Profile[8]; // Support up to 8 profiles
UINT ApplyProfileIdx; /* add by johnli, fix WPS test plan 5.1.1 */
WSC_CREDENTIAL Profile[8]; /* Support up to 8 profiles */
} WSC_PROFILE, *PWSC_PROFILE;
#endif // _OID_H_
#endif /* _OID_H_ */
drivers/staging/rt2860/rt_config.h
View file @ cc277069
......@@ -66,6 +66,6 @@
#ifdef IGMP_SNOOP_SUPPORT
#include "igmp_snoop.h"
#endif // IGMP_SNOOP_SUPPORT //
#endif /* IGMP_SNOOP_SUPPORT // */
#endif // __RT_CONFIG_H__
#endif /* __RT_CONFIG_H__ */
drivers/staging/rt2860/rt_linux.h
View file @ cc277069
......@@ -60,20 +60,20 @@
#include <net/iw_handler.h>
// load firmware
/* load firmware */
#define __KERNEL_SYSCALLS__
#include <linux/unistd.h>
#include <asm/uaccess.h>
#include <asm/types.h>
#include <asm/unaligned.h> // for get_unaligned()
#include <asm/unaligned.h> /* for get_unaligned() */
#define KTHREAD_SUPPORT 1
// RT2870 2.1.0.0 has it disabled
/* RT2870 2.1.0.0 has it disabled */
#ifdef KTHREAD_SUPPORT
#include <linux/err.h>
#include <linux/kthread.h>
#endif // KTHREAD_SUPPORT //
#endif /* KTHREAD_SUPPORT // */
/***********************************************************************************
* Profile related sections
......@@ -82,12 +82,12 @@
#ifdef RTMP_MAC_PCI
#define STA_PROFILE_PATH "/etc/Wireless/RT2860STA/RT2860STA.dat"
#define STA_DRIVER_VERSION "2.1.0.0"
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
#define STA_PROFILE_PATH "/etc/Wireless/RT2870STA/RT2870STA.dat"
#define STA_DRIVER_VERSION "2.1.0.0"
// RT3070 version: 2.1.1.0
#endif // RTMP_MAC_USB //
/* RT3070 version: 2.1.1.0 */
#endif /* RTMP_MAC_USB // */
extern const struct iw_handler_def rt28xx_iw_handler_def;
......@@ -124,8 +124,8 @@ typedef int (*HARD_START_XMIT_FUNC) (struct sk_buff * skb,
#define PCI_DEVICE(vend,dev) \
.vendor = (vend), .device = (dev), \
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
#endif // PCI_DEVICE //
#endif // RTMP_MAC_PCI //
#endif /* PCI_DEVICE // */
#endif /* RTMP_MAC_PCI // */
#define RT_MOD_INC_USE_COUNT() \
if (!try_module_get(THIS_MODULE)) \
......@@ -140,7 +140,7 @@ typedef int (*HARD_START_XMIT_FUNC) (struct sk_buff * skb,
#define RTMP_DEC_REF(_A) 0
#define RTMP_GET_REF(_A) 0
// This function will be called when query /proc
/* This function will be called when query /proc */
struct iw_statistics *rt28xx_get_wireless_stats(IN struct net_device *net_dev);
/***********************************************************************************
......@@ -176,13 +176,13 @@ struct iw_statistics *rt28xx_get_wireless_stats(IN struct net_device *net_dev);
/***********************************************************************************
* Ralink Specific network related constant definitions
***********************************************************************************/
#define MIN_NET_DEVICE_FOR_AID 0x00 //0x00~0x3f
#define MIN_NET_DEVICE_FOR_MBSSID 0x00 //0x00,0x10,0x20,0x30
#define MIN_NET_DEVICE_FOR_WDS 0x10 //0x40,0x50,0x60,0x70
#define MIN_NET_DEVICE_FOR_AID 0x00 /*0x00~0x3f */
#define MIN_NET_DEVICE_FOR_MBSSID 0x00 /*0x00,0x10,0x20,0x30 */
#define MIN_NET_DEVICE_FOR_WDS 0x10 /*0x40,0x50,0x60,0x70 */
#define MIN_NET_DEVICE_FOR_APCLI 0x20
#define MIN_NET_DEVICE_FOR_MESH 0x30
#define MIN_NET_DEVICE_FOR_DLS 0x40
#define NET_DEVICE_REAL_IDX_MASK 0x0f // for each operation mode, we maximum support 15 entities.
#define NET_DEVICE_REAL_IDX_MASK 0x0f /* for each operation mode, we maximum support 15 entities. */
#define NDIS_PACKET_TYPE_DIRECTED 0
#define NDIS_PACKET_TYPE_MULTICAST 1
......@@ -217,9 +217,9 @@ struct os_lock {
typedef spinlock_t NDIS_SPIN_LOCK;
//
// spin_lock enhanced for Nested spin lock
//
/* */
/* spin_lock enhanced for Nested spin lock */
/* */
#define NdisAllocateSpinLock(__lock) \
{ \
spin_lock_init((spinlock_t *)(__lock)); \
......@@ -238,7 +238,7 @@ typedef spinlock_t NDIS_SPIN_LOCK;
spin_unlock_bh((spinlock_t *)(__lock)); \
}
// sample, use semaphore lock to replace IRQ lock, 2007/11/15
/* sample, use semaphore lock to replace IRQ lock, 2007/11/15 */
#define RTMP_IRQ_LOCK(__lock, __irqflags) \
{ \
__irqflags = 0; \
......@@ -330,7 +330,7 @@ do { \
/***********************************************************************************
* OS Memory Access related data structure and definitions
***********************************************************************************/
#define MEM_ALLOC_FLAG (GFP_ATOMIC) //(GFP_DMA | GFP_ATOMIC)
#define MEM_ALLOC_FLAG (GFP_ATOMIC) /*(GFP_DMA | GFP_ATOMIC) */
#define NdisMoveMemory(Destination, Source, Length) memmove(Destination, Source, Length)
#define NdisCopyMemory(Destination, Source, Length) memcpy(Destination, Source, Length)
......@@ -405,10 +405,10 @@ struct os_cookie {
struct pci_dev *parent_pci_dev;
USHORT DeviceID;
dma_addr_t pAd_pa;
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
struct usb_device *pUsb_Dev;
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
RTMP_NET_TASK_STRUCT rx_done_task;
RTMP_NET_TASK_STRUCT mgmt_dma_done_task;
......@@ -419,14 +419,14 @@ struct os_cookie {
RTMP_NET_TASK_STRUCT tbtt_task;
#ifdef RTMP_MAC_PCI
RTMP_NET_TASK_STRUCT fifo_statistic_full_task;
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
RTMP_NET_TASK_STRUCT null_frame_complete_task;
RTMP_NET_TASK_STRUCT rts_frame_complete_task;
RTMP_NET_TASK_STRUCT pspoll_frame_complete_task;
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
unsigned long apd_pid; //802.1x daemon pid
unsigned long apd_pid; /*802.1x daemon pid */
INT ioctl_if_type;
INT ioctl_if;
};
......@@ -501,12 +501,12 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define DEV_ALLOC_SKB(_length) \
dev_alloc_skb(_length)
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
#define PCI_MAP_SINGLE(_handle, _ptr, _size, _dir) (ULONG)0
#define PCI_UNMAP_SINGLE(_handle, _ptr, _size, _dir)
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
/*
* ULONG
......@@ -545,7 +545,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
* Device Register I/O Access related definitions and data structures.
**********************************************************************************/
#ifdef RTMP_MAC_PCI
//Patch for ASIC turst read/write bug, needs to remove after metel fix
/*Patch for ASIC turst read/write bug, needs to remove after metel fix */
#define RTMP_IO_READ32(_A, _R, _pV) \
{ \
if ((_A)->bPCIclkOff == FALSE) \
......@@ -603,7 +603,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
Val = readl((void *)((_A)->CSRBaseAddress + MAC_CSR0)); \
writeb((_V), (PUCHAR)((_A)->CSRBaseAddress + (_R))); \
}
#endif // #if defined(BRCM_6358) || defined(RALINK_2880) //
#endif /* #if defined(BRCM_6358) || defined(RALINK_2880) // */
#define RTMP_IO_WRITE16(_A, _R, _V) \
{ \
......@@ -611,9 +611,9 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
Val = readl((void *)((_A)->CSRBaseAddress + MAC_CSR0)); \
writew((_V), (PUSHORT)((_A)->CSRBaseAddress + (_R))); \
}
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#ifdef RTMP_MAC_USB
//Patch for ASIC turst read/write bug, needs to remove after metel fix
/*Patch for ASIC turst read/write bug, needs to remove after metel fix */
#define RTMP_IO_READ32(_A, _R, _pV) \
RTUSBReadMACRegister((_A), (_R), (PUINT32) (_pV))
......@@ -634,7 +634,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
{ \
RTUSBSingleWrite((_A), (_R), (USHORT) (_V)); \
}
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
/***********************************************************************************
* Network Related data structure and marco definitions
......@@ -719,34 +719,34 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define CB_OFF 10
// User Priority
/* User Priority */
#define RTMP_SET_PACKET_UP(_p, _prio) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+0] = _prio)
#define RTMP_GET_PACKET_UP(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+0])
// Fragment #
/* Fragment # */
#define RTMP_SET_PACKET_FRAGMENTS(_p, _num) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+1] = _num)
#define RTMP_GET_PACKET_FRAGMENTS(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+1])
// 0x0 ~0x7f: TX to AP's own BSS which has the specified AID. if AID>127, set bit 7 in RTMP_SET_PACKET_EMACTAB too.
//(this value also as MAC(on-chip WCID) table index)
// 0x80~0xff: TX to a WDS link. b0~6: WDS index
/* 0x0 ~0x7f: TX to AP's own BSS which has the specified AID. if AID>127, set bit 7 in RTMP_SET_PACKET_EMACTAB too. */
/*(this value also as MAC(on-chip WCID) table index) */
/* 0x80~0xff: TX to a WDS link. b0~6: WDS index */
#define RTMP_SET_PACKET_WCID(_p, _wdsidx) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+2] = _wdsidx)
#define RTMP_GET_PACKET_WCID(_p) ((UCHAR)(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+2]))
// 0xff: PKTSRC_NDIS, others: local TX buffer index. This value affects how to a packet
/* 0xff: PKTSRC_NDIS, others: local TX buffer index. This value affects how to a packet */
#define RTMP_SET_PACKET_SOURCE(_p, _pktsrc) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+3] = _pktsrc)
#define RTMP_GET_PACKET_SOURCE(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+3])
// RTS/CTS-to-self protection method
/* RTS/CTS-to-self protection method */
#define RTMP_SET_PACKET_RTS(_p, _num) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+4] = _num)
#define RTMP_GET_PACKET_RTS(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+4])
// see RTMP_S(G)ET_PACKET_EMACTAB
/* see RTMP_S(G)ET_PACKET_EMACTAB */
// TX rate index
/* TX rate index */
#define RTMP_SET_PACKET_TXRATE(_p, _rate) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+5] = _rate)
#define RTMP_GET_PACKET_TXRATE(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+5])
// From which Interface
/* From which Interface */
#define RTMP_SET_PACKET_IF(_p, _ifdx) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+6] = _ifdx)
#define RTMP_GET_PACKET_IF(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+6])
#define RTMP_SET_PACKET_NET_DEVICE_MBSSID(_p, _bss) RTMP_SET_PACKET_IF((_p), (_bss))
......@@ -759,9 +759,9 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define RTMP_SET_PACKET_MOREDATA(_p, _morebit) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7] = _morebit)
#define RTMP_GET_PACKET_MOREDATA(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7])
//
// Sepcific Pakcet Type definition
//
/* */
/* Sepcific Pakcet Type definition */
/* */
#define RTMP_PACKET_SPECIFIC_CB_OFFSET 11
#define RTMP_PACKET_SPECIFIC_DHCP 0x01
......@@ -771,10 +771,10 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define RTMP_PACKET_SPECIFIC_VLAN 0x10
#define RTMP_PACKET_SPECIFIC_LLCSNAP 0x20
//Specific
/*Specific */
#define RTMP_SET_PACKET_SPECIFIC(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] = _flg)
//DHCP
/*DHCP */
#define RTMP_SET_PACKET_DHCP(_p, _flg) \
do{ \
if (_flg) \
......@@ -784,7 +784,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
}while(0)
#define RTMP_GET_PACKET_DHCP(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_DHCP)
//EAPOL
/*EAPOL */
#define RTMP_SET_PACKET_EAPOL(_p, _flg) \
do{ \
if (_flg) \
......@@ -794,7 +794,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
}while(0)
#define RTMP_GET_PACKET_EAPOL(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_EAPOL)
//WAI
/*WAI */
#define RTMP_SET_PACKET_WAI(_p, _flg) \
do{ \
if (_flg) \
......@@ -806,7 +806,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define RTMP_GET_PACKET_LOWRATE(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & (RTMP_PACKET_SPECIFIC_EAPOL | RTMP_PACKET_SPECIFIC_DHCP | RTMP_PACKET_SPECIFIC_WAI))
//VLAN
/*VLAN */
#define RTMP_SET_PACKET_VLAN(_p, _flg) \
do{ \
if (_flg) \
......@@ -816,7 +816,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
}while(0)
#define RTMP_GET_PACKET_VLAN(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_VLAN)
//LLC/SNAP
/*LLC/SNAP */
#define RTMP_SET_PACKET_LLCSNAP(_p, _flg) \
do{ \
if (_flg) \
......@@ -827,7 +827,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define RTMP_GET_PACKET_LLCSNAP(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_LLCSNAP)
// IP
/* IP */
#define RTMP_SET_PACKET_IPV4(_p, _flg) \
do{ \
if (_flg) \
......@@ -838,7 +838,7 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
#define RTMP_GET_PACKET_IPV4(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_IPV4)
// If this flag is set, it indicates that this EAPoL frame MUST be clear.
/* If this flag is set, it indicates that this EAPoL frame MUST be clear. */
#define RTMP_SET_PACKET_CLEAR_EAP_FRAME(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12] = _flg)
#define RTMP_GET_PACKET_CLEAR_EAP_FRAME(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12])
......@@ -860,7 +860,7 @@ int rt28xx_packet_xmit(struct sk_buff *skb);
#define IRQ_HANDLE_TYPE irqreturn_t
IRQ_HANDLE_TYPE rt2860_interrupt(int irq, void *dev_instance);
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
INT rt28xx_sta_ioctl(IN PNET_DEV net_dev, IN OUT struct ifreq *rq, IN INT cmd);
......@@ -869,4 +869,4 @@ extern int ra_mtd_read(int num, loff_t from, size_t len, u_char * buf);
#define GET_PAD_FROM_NET_DEV(_pAd, _net_dev) (_pAd) = (PRTMP_ADAPTER)(_net_dev)->ml_priv;
#endif // __RT_LINUX_H__ //
#endif /* __RT_LINUX_H__ // */
drivers/staging/rt2860/rtmp.h
View file @ cc277069
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/staging/rt2860/rtmp_chip.h
View file @ cc277069
......@@ -42,30 +42,30 @@
#ifdef RT2860
#include "chip/rt2860.h"
#endif // RT2860 //
#endif /* RT2860 // */
#ifdef RT2870
#include "chip/rt2870.h"
#endif // RT2870 //
#endif /* RT2870 // */
#ifdef RT3070
#include "chip/rt3070.h"
#endif // RT3070 //
#endif /* RT3070 // */
#ifdef RT3090
#include "chip/rt3090.h"
#endif // RT3090 //
#endif /* RT3090 // */
// We will have a cost down version which mac version is 0x3090xxxx
//
// RT3090A facts
//
// a) 2.4 GHz
// b) Replacement for RT3090
// c) Internal LNA
// d) Interference over channel #14
// e) New BBP features (e.g., SIG re-modulation)
//
/* We will have a cost down version which mac version is 0x3090xxxx */
/* */
/* RT3090A facts */
/* */
/* a) 2.4 GHz */
/* b) Replacement for RT3090 */
/* c) Internal LNA */
/* d) Interference over channel #14 */
/* e) New BBP features (e.g., SIG re-modulation) */
/* */
#define IS_RT3090A(_pAd) ((((_pAd)->MACVersion & 0xffff0000) == 0x30900000))
// We will have a cost down version which mac version is 0x3090xxxx
/* We will have a cost down version which mac version is 0x3090xxxx */
#define IS_RT3090(_pAd) ((((_pAd)->MACVersion & 0xffff0000) == 0x30710000) || (IS_RT3090A(_pAd)))
#define IS_RT3070(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x30700000)
......@@ -73,28 +73,28 @@
#define IS_RT2070(_pAd) (((_pAd)->RfIcType == RFIC_2020) || ((_pAd)->EFuseTag == 0x27))
#define IS_RT30xx(_pAd) (((_pAd)->MACVersion & 0xfff00000) == 0x30700000||IS_RT3090A(_pAd))
//#define IS_RT305X(_pAd) ((_pAd)->MACVersion == 0x28720200)
/*#define IS_RT305X(_pAd) ((_pAd)->MACVersion == 0x28720200) */
/* RT3572, 3592, 3562, 3062 share the same MAC version */
#define IS_RT3572(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x35720000)
#define IS_VERSION_BEFORE_F(_pAd) (((_pAd)->MACVersion&0xffff) <= 0x0211)
// F version is 0x0212, E version is 0x0211. 309x can save more power after F version.
/* F version is 0x0212, E version is 0x0211. 309x can save more power after F version. */
#define IS_VERSION_AFTER_F(_pAd) ((((_pAd)->MACVersion&0xffff) >= 0x0212) || (((_pAd)->b3090ESpecialChip == TRUE)))
//
// RT3390 facts
//
// a) Base on RT3090 (RF IC: RT3020)
// b) 2.4 GHz
// c) 1x1
// d) Single chip
// e) Internal components: PA and LNA
//
//RT3390,RT3370
/* */
/* RT3390 facts */
/* */
/* a) Base on RT3090 (RF IC: RT3020) */
/* b) 2.4 GHz */
/* c) 1x1 */
/* d) Single chip */
/* e) Internal components: PA and LNA */
/* */
/*RT3390,RT3370 */
#define IS_RT3390(_pAd) (((_pAd)->MACVersion & 0xFFFF0000) == 0x33900000)
// ------------------------------------------------------
// PCI registers - base address 0x0000
// ------------------------------------------------------
/* ------------------------------------------------------ */
/* PCI registers - base address 0x0000 */
/* ------------------------------------------------------ */
#define CHIP_PCI_CFG 0x0000
#define CHIP_PCI_EECTRL 0x0004
#define CHIP_PCI_MCUCTRL 0x0008
......@@ -103,15 +103,15 @@
#define RETRY_LIMIT 10
// ------------------------------------------------------
// BBP & RF definition
// ------------------------------------------------------
/* ------------------------------------------------------ */
/* BBP & RF definition */
/* ------------------------------------------------------ */
#define BUSY 1
#define IDLE 0
//-------------------------------------------------------------------------
// EEPROM definition
//-------------------------------------------------------------------------
/*------------------------------------------------------------------------- */
/* EEPROM definition */
/*------------------------------------------------------------------------- */
#define EEDO 0x08
#define EEDI 0x04
#define EECS 0x02
......@@ -123,11 +123,11 @@
#define EEPROM_EWDS_OPCODE 0x10
#define EEPROM_EWEN_OPCODE 0x13
#define NUM_EEPROM_BBP_PARMS 19 // Include NIC Config 0, 1, CR, TX ALC step, BBPs
#define NUM_EEPROM_BBP_PARMS 19 /* Include NIC Config 0, 1, CR, TX ALC step, BBPs */
#define NUM_EEPROM_TX_G_PARMS 7
#define EEPROM_NIC1_OFFSET 0x34 // The address is from NIC config 0, not BBP register ID
#define EEPROM_NIC2_OFFSET 0x36 // The address is from NIC config 0, not BBP register ID
#define EEPROM_BBP_BASE_OFFSET 0xf0 // The address is from NIC config 0, not BBP register ID
#define EEPROM_NIC1_OFFSET 0x34 /* The address is from NIC config 0, not BBP register ID */
#define EEPROM_NIC2_OFFSET 0x36 /* The address is from NIC config 0, not BBP register ID */
#define EEPROM_BBP_BASE_OFFSET 0xf0 /* The address is from NIC config 0, not BBP register ID */
#define EEPROM_G_TX_PWR_OFFSET 0x52
#define EEPROM_G_TX2_PWR_OFFSET 0x60
#define EEPROM_LED1_OFFSET 0x3c
......@@ -139,22 +139,22 @@
#define EEPROM_RSSI_A_OFFSET 0x4a
#define EEPROM_TXMIXER_GAIN_5G 0x4c
#define EEPROM_DEFINE_MAX_TXPWR 0x4e
#define EEPROM_TXPOWER_BYRATE_20MHZ_2_4G 0xde // 20MHZ 2.4G tx power.
#define EEPROM_TXPOWER_BYRATE_40MHZ_2_4G 0xee // 40MHZ 2.4G tx power.
#define EEPROM_TXPOWER_BYRATE_20MHZ_5G 0xfa // 20MHZ 5G tx power.
#define EEPROM_TXPOWER_BYRATE_40MHZ_5G 0x10a // 40MHZ 5G tx power.
#define EEPROM_TXPOWER_BYRATE_20MHZ_2_4G 0xde /* 20MHZ 2.4G tx power. */
#define EEPROM_TXPOWER_BYRATE_40MHZ_2_4G 0xee /* 40MHZ 2.4G tx power. */
#define EEPROM_TXPOWER_BYRATE_20MHZ_5G 0xfa /* 20MHZ 5G tx power. */
#define EEPROM_TXPOWER_BYRATE_40MHZ_5G 0x10a /* 40MHZ 5G tx power. */
#define EEPROM_A_TX_PWR_OFFSET 0x78
#define EEPROM_A_TX2_PWR_OFFSET 0xa6
//#define EEPROM_Japan_TX_PWR_OFFSET 0x90 // 802.11j
//#define EEPROM_Japan_TX2_PWR_OFFSET 0xbe
//#define EEPROM_TSSI_REF_OFFSET 0x54
//#define EEPROM_TSSI_DELTA_OFFSET 0x24
//#define EEPROM_CCK_TX_PWR_OFFSET 0x62
//#define EEPROM_CALIBRATE_OFFSET 0x7c
/*#define EEPROM_Japan_TX_PWR_OFFSET 0x90 // 802.11j */
/*#define EEPROM_Japan_TX2_PWR_OFFSET 0xbe */
/*#define EEPROM_TSSI_REF_OFFSET 0x54 */
/*#define EEPROM_TSSI_DELTA_OFFSET 0x24 */
/*#define EEPROM_CCK_TX_PWR_OFFSET 0x62 */
/*#define EEPROM_CALIBRATE_OFFSET 0x7c */
#define EEPROM_VERSION_OFFSET 0x02
#define EEPROM_FREQ_OFFSET 0x3a
#define EEPROM_TXPOWER_BYRATE 0xde // 20MHZ power.
#define EEPROM_TXPOWER_DELTA 0x50 // 20MHZ AND 40 MHZ use different power. This is delta in 40MHZ.
#define EEPROM_TXPOWER_BYRATE 0xde /* 20MHZ power. */
#define EEPROM_TXPOWER_DELTA 0x50 /* 20MHZ AND 40 MHZ use different power. This is delta in 40MHZ. */
#define VALID_EEPROM_VERSION 1
/*
......@@ -163,13 +163,13 @@
#define RT28xx_EEPROM_READ16(_pAd, _offset, _value) \
(_pAd)->chipOps.eeread((RTMP_ADAPTER *)(_pAd), (USHORT)(_offset), (PUSHORT)&(_value))
// -------------------------------------------------------------------
// E2PROM data layout
// -------------------------------------------------------------------
/* ------------------------------------------------------------------- */
/* E2PROM data layout */
/* ------------------------------------------------------------------- */
//
// MCU_LEDCS: MCU LED Control Setting.
//
/* */
/* MCU_LEDCS: MCU LED Control Setting. */
/* */
typedef union _MCU_LEDCS_STRUC {
struct {
UCHAR LedMode:7;
......@@ -178,14 +178,14 @@ typedef union _MCU_LEDCS_STRUC {
UCHAR word;
} MCU_LEDCS_STRUC, *PMCU_LEDCS_STRUC;
//
// EEPROM antenna select format
//
/* */
/* EEPROM antenna select format */
/* */
typedef union _EEPROM_ANTENNA_STRUC {
struct {
USHORT RxPath:4; // 1: 1R, 2: 2R, 3: 3R
USHORT TxPath:4; // 1: 1T, 2: 2T
USHORT RfIcType:4; // see E2PROM document
USHORT RxPath:4; /* 1: 1R, 2: 2R, 3: 3R */
USHORT TxPath:4; /* 1: 1T, 2: 2T */
USHORT RfIcType:4; /* see E2PROM document */
USHORT Rsv:4;
} field;
USHORT word;
......@@ -193,66 +193,66 @@ typedef union _EEPROM_ANTENNA_STRUC {
typedef union _EEPROM_NIC_CINFIG2_STRUC {
struct {
USHORT HardwareRadioControl:1; // 1:enable, 0:disable
USHORT DynamicTxAgcControl:1; //
USHORT ExternalLNAForG:1; //
USHORT ExternalLNAForA:1; // external LNA enable for 2.4G
USHORT CardbusAcceleration:1; // !!! NOTE: 0 - enable, 1 - disable
USHORT HardwareRadioControl:1; /* 1:enable, 0:disable */
USHORT DynamicTxAgcControl:1; /* */
USHORT ExternalLNAForG:1; /* */
USHORT ExternalLNAForA:1; /* external LNA enable for 2.4G */
USHORT CardbusAcceleration:1; /* !!! NOTE: 0 - enable, 1 - disable */
USHORT BW40MSidebandForG:1;
USHORT BW40MSidebandForA:1;
USHORT EnableWPSPBC:1; // WPS PBC Control bit
USHORT BW40MAvailForG:1; // 0:enable, 1:disable
USHORT BW40MAvailForA:1; // 0:enable, 1:disable
USHORT Rsv1:1; // must be 0
USHORT AntDiversity:1; // Antenna diversity
USHORT Rsv2:3; // must be 0
USHORT DACTestBit:1; // control if driver should patch the DAC issue
USHORT EnableWPSPBC:1; /* WPS PBC Control bit */
USHORT BW40MAvailForG:1; /* 0:enable, 1:disable */
USHORT BW40MAvailForA:1; /* 0:enable, 1:disable */
USHORT Rsv1:1; /* must be 0 */
USHORT AntDiversity:1; /* Antenna diversity */
USHORT Rsv2:3; /* must be 0 */
USHORT DACTestBit:1; /* control if driver should patch the DAC issue */
} field;
USHORT word;
} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
//
// TX_PWR Value valid range 0xFA(-6) ~ 0x24(36)
//
/* */
/* TX_PWR Value valid range 0xFA(-6) ~ 0x24(36) */
/* */
typedef union _EEPROM_TX_PWR_STRUC {
struct {
CHAR Byte0; // Low Byte
CHAR Byte1; // High Byte
CHAR Byte0; /* Low Byte */
CHAR Byte1; /* High Byte */
} field;
USHORT word;
} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
typedef union _EEPROM_VERSION_STRUC {
struct {
UCHAR FaeReleaseNumber; // Low Byte
UCHAR Version; // High Byte
UCHAR FaeReleaseNumber; /* Low Byte */
UCHAR Version; /* High Byte */
} field;
USHORT word;
} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
typedef union _EEPROM_LED_STRUC {
struct {
USHORT PolarityRDY_G:1; // Polarity RDY_G setting.
USHORT PolarityRDY_A:1; // Polarity RDY_A setting.
USHORT PolarityACT:1; // Polarity ACT setting.
USHORT PolarityGPIO_0:1; // Polarity GPIO#0 setting.
USHORT PolarityGPIO_1:1; // Polarity GPIO#1 setting.
USHORT PolarityGPIO_2:1; // Polarity GPIO#2 setting.
USHORT PolarityGPIO_3:1; // Polarity GPIO#3 setting.
USHORT PolarityGPIO_4:1; // Polarity GPIO#4 setting.
USHORT LedMode:5; // Led mode.
USHORT Rsvd:3; // Reserved
USHORT PolarityRDY_G:1; /* Polarity RDY_G setting. */
USHORT PolarityRDY_A:1; /* Polarity RDY_A setting. */
USHORT PolarityACT:1; /* Polarity ACT setting. */
USHORT PolarityGPIO_0:1; /* Polarity GPIO#0 setting. */
USHORT PolarityGPIO_1:1; /* Polarity GPIO#1 setting. */
USHORT PolarityGPIO_2:1; /* Polarity GPIO#2 setting. */
USHORT PolarityGPIO_3:1; /* Polarity GPIO#3 setting. */
USHORT PolarityGPIO_4:1; /* Polarity GPIO#4 setting. */
USHORT LedMode:5; /* Led mode. */
USHORT Rsvd:3; /* Reserved */
} field;
USHORT word;
} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
typedef union _EEPROM_TXPOWER_DELTA_STRUC {
struct {
UCHAR DeltaValue:6; // Tx Power dalta value (MAX=4)
UCHAR Type:1; // 1: plus the delta value, 0: minus the delta value
UCHAR TxPowerEnable:1; // Enable
UCHAR DeltaValue:6; /* Tx Power dalta value (MAX=4) */
UCHAR Type:1; /* 1: plus the delta value, 0: minus the delta value */
UCHAR TxPowerEnable:1; /* Enable */
} field;
UCHAR value;
} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
#endif // __RTMP_CHIP_H__ //
#endif /* __RTMP_CHIP_H__ // */
drivers/staging/rt2860/rtmp_ckipmic.h
View file @ cc277069
......@@ -60,4 +60,4 @@ VOID shift_row(IN PUCHAR in, OUT PUCHAR out);
VOID mix_column(IN PUCHAR in, OUT PUCHAR out);
#endif //__RTMP_CKIPMIC_H__
#endif /*__RTMP_CKIPMIC_H__ */
drivers/staging/rt2860/rtmp_def.h
View file @ cc277069
......@@ -41,9 +41,9 @@
#include "oid.h"
//
// Debug information verbosity: lower values indicate higher urgency
//
/* */
/* Debug information verbosity: lower values indicate higher urgency */
/* */
#define RT_DEBUG_OFF 0
#define RT_DEBUG_ERROR 1
#define RT_DEBUG_WARN 2
......@@ -55,15 +55,15 @@
#define NIC_DBG_STRING ("**RT28xx**")
#ifdef RTMP_MAC_USB
#define TX_RING_SIZE 8 // 1
#define TX_RING_SIZE 8 /* 1 */
#define PRIO_RING_SIZE 8
#define MGMT_RING_SIZE 32 // PRIO_RING_SIZE
#define MGMT_RING_SIZE 32 /* PRIO_RING_SIZE */
#define RX_RING_SIZE 8
#define MAX_TX_PROCESS 4
#define LOCAL_TXBUF_SIZE 2048
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
//#define PACKED
/*#define PACKED */
#define RALINK_2883_VERSION ((UINT32)0x28830300)
#define RALINK_2880E_VERSION ((UINT32)0x28720200)
......@@ -71,38 +71,38 @@
#define MAX_RX_PKT_LEN 1520
//
// Entry number for each DMA descriptor ring
//
/* */
/* Entry number for each DMA descriptor ring */
/* */
#ifdef RTMP_MAC_PCI
#define TX_RING_SIZE 64 //64
#define TX_RING_SIZE 64 /*64 */
#define MGMT_RING_SIZE 128
#define RX_RING_SIZE 128 //64
#define MAX_TX_PROCESS TX_RING_SIZE //8
#define RX_RING_SIZE 128 /*64 */
#define MAX_TX_PROCESS TX_RING_SIZE /*8 */
#define MAX_DMA_DONE_PROCESS TX_RING_SIZE
#define MAX_TX_DONE_PROCESS TX_RING_SIZE //8
#define MAX_TX_DONE_PROCESS TX_RING_SIZE /*8 */
#define LOCAL_TXBUF_SIZE 2
#endif // RTMP_MAC_PCI //
#endif /* RTMP_MAC_PCI // */
#define MAX_RX_PROCESS 128 //64 //32
#define MAX_RX_PROCESS 128 /*64 //32 */
#define NUM_OF_LOCAL_TXBUF 2
#define TXD_SIZE 16
#define TXWI_SIZE 16
#define RXD_SIZE 16
#define RXWI_SIZE 16
// TXINFO_SIZE + TXWI_SIZE + 802.11 Header Size + AMSDU sub frame header
#define TX_DMA_1ST_BUFFER_SIZE 96 // only the 1st physical buffer is pre-allocated
#define MGMT_DMA_BUFFER_SIZE 1536 //2048
#define RX_BUFFER_AGGRESIZE 3840 //3904 //3968 //4096 //2048 //4096
#define RX_BUFFER_NORMSIZE 3840 //3904 //3968 //4096 //2048 //4096
/* TXINFO_SIZE + TXWI_SIZE + 802.11 Header Size + AMSDU sub frame header */
#define TX_DMA_1ST_BUFFER_SIZE 96 /* only the 1st physical buffer is pre-allocated */
#define MGMT_DMA_BUFFER_SIZE 1536 /*2048 */
#define RX_BUFFER_AGGRESIZE 3840 /*3904 //3968 //4096 //2048 //4096 */
#define RX_BUFFER_NORMSIZE 3840 /*3904 //3968 //4096 //2048 //4096 */
#define TX_BUFFER_NORMSIZE RX_BUFFER_NORMSIZE
#define MAX_FRAME_SIZE 2346 // Maximum 802.11 frame size
#define MAX_AGGREGATION_SIZE 3840 //3904 //3968 //4096
#define MAX_FRAME_SIZE 2346 /* Maximum 802.11 frame size */
#define MAX_AGGREGATION_SIZE 3840 /*3904 //3968 //4096 */
#define MAX_NUM_OF_TUPLE_CACHE 2
#define MAX_MCAST_LIST_SIZE 32
#define MAX_LEN_OF_VENDOR_DESC 64
//#define MAX_SIZE_OF_MCAST_PSQ (NUM_OF_LOCAL_TXBUF >> 2) // AP won't spend more than 1/4 of total buffers on M/BCAST PSQ
/*#define MAX_SIZE_OF_MCAST_PSQ (NUM_OF_LOCAL_TXBUF >> 2) // AP won't spend more than 1/4 of total buffers on M/BCAST PSQ */
#define MAX_SIZE_OF_MCAST_PSQ 32
#define MAX_RX_PROCESS_CNT (RX_RING_SIZE)
......@@ -125,27 +125,27 @@
And in rt_main_end.c, clConfig.clNum = RX_RING_SIZE * 3; is changed to
clConfig.clNum = RX_RING_SIZE * 4;
*/
// TODO: For VxWorks the size is 256. Shall we cahnge the value as 256 for all OS?????
#define MAX_PACKETS_IN_QUEUE (512) //(512) // to pass WMM A5-WPAPSK
/* TODO: For VxWorks the size is 256. Shall we cahnge the value as 256 for all OS????? */
#define MAX_PACKETS_IN_QUEUE (512) /*(512) // to pass WMM A5-WPAPSK */
#define MAX_PACKETS_IN_MCAST_PS_QUEUE 32
#define MAX_PACKETS_IN_PS_QUEUE 128 //32
#define MAX_PACKETS_IN_PS_QUEUE 128 /*32 */
#define WMM_NUM_OF_AC 4 /* AC0, AC1, AC2, and AC3 */
#ifdef RTMP_EFUSE_SUPPORT
//2008/09/11:KH add to support efuse<--
/*2008/09/11:KH add to support efuse<-- */
#define MAX_EEPROM_BIN_FILE_SIZE 1024
#define EFUSE_BUFFER_PATH "/tmp/RT30xxEEPROM.bin"
//2008/09/11:KH add to support efuse-->
#endif // RTMP_EFUSE_SUPPORT //
/*2008/09/11:KH add to support efuse--> */
#endif /* RTMP_EFUSE_SUPPORT // */
// RxFilter
/* RxFilter */
#define STANORMAL 0x17f97
#define APNORMAL 0x15f97
#define PSPXLINK 0x17f93
//
// RTMP_ADAPTER flags
//
/* */
/* RTMP_ADAPTER flags */
/* */
#define fRTMP_ADAPTER_MAP_REGISTER 0x00000001
#define fRTMP_ADAPTER_INTERRUPT_IN_USE 0x00000002
#define fRTMP_ADAPTER_HARDWARE_ERROR 0x00000004
......@@ -171,13 +171,13 @@
#define fRTMP_ADAPTER_SCAN_2040 0x04000000
#define fRTMP_ADAPTER_RADIO_MEASUREMENT 0x08000000
#define fRTMP_ADAPTER_START_UP 0x10000000 //Devive already initialized and enabled Tx/Rx.
#define fRTMP_ADAPTER_START_UP 0x10000000 /*Devive already initialized and enabled Tx/Rx. */
#define fRTMP_ADAPTER_MEDIA_STATE_CHANGE 0x20000000
#define fRTMP_ADAPTER_IDLE_RADIO_OFF 0x40000000
//
// STA operation status flags
//
/* */
/* STA operation status flags */
/* */
#define fOP_STATUS_INFRA_ON 0x00000001
#define fOP_STATUS_ADHOC_ON 0x00000002
#define fOP_STATUS_BG_PROTECTION_INUSED 0x00000004
......@@ -187,8 +187,8 @@
#define fOP_STATUS_MEDIA_STATE_CONNECTED 0x00000080
#define fOP_STATUS_WMM_INUSED 0x00000100
#define fOP_STATUS_AGGREGATION_INUSED 0x00000200
#define fOP_STATUS_DOZE 0x00000400 // debug purpose
#define fOP_STATUS_PIGGYBACK_INUSED 0x00000800 // piggy-back, and aggregation
#define fOP_STATUS_DOZE 0x00000400 /* debug purpose */
#define fOP_STATUS_PIGGYBACK_INUSED 0x00000800 /* piggy-back, and aggregation */
#define fOP_STATUS_APSD_INUSED 0x00001000
#define fOP_STATUS_TX_AMSDU_INUSED 0x00002000
#define fOP_STATUS_MAX_RETRY_ENABLED 0x00004000
......@@ -196,25 +196,25 @@
#define fOP_STATUS_PCIE_DEVICE 0x00020000
#define fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE fOP_STATUS_PCIE_DEVICE
//
// RTMP_ADAPTER PSFlags : related to advanced power save.
//
// Indicate whether driver can go to sleep mode from now. This flag is useful AFTER link up
/* */
/* RTMP_ADAPTER PSFlags : related to advanced power save. */
/* */
/* Indicate whether driver can go to sleep mode from now. This flag is useful AFTER link up */
#define fRTMP_PS_CAN_GO_SLEEP 0x00000001
// Indicate whether driver has issue a LinkControl command to PCIe L1
/* Indicate whether driver has issue a LinkControl command to PCIe L1 */
#define fRTMP_PS_SET_PCI_CLK_OFF_COMMAND 0x00000002
// Indicate driver should disable kick off hardware to send packets from now.
/* Indicate driver should disable kick off hardware to send packets from now. */
#define fRTMP_PS_DISABLE_TX 0x00000004
// Indicate driver should IMMEDIATELY fo to sleep after receiving AP's beacon in which doesn't indicate unicate nor multicast packets for me
//. This flag is used ONLY in RTMPHandleRxDoneInterrupt routine.
/* Indicate driver should IMMEDIATELY fo to sleep after receiving AP's beacon in which doesn't indicate unicate nor multicast packets for me */
/*. This flag is used ONLY in RTMPHandleRxDoneInterrupt routine. */
#define fRTMP_PS_GO_TO_SLEEP_NOW 0x00000008
#define fRTMP_PS_TOGGLE_L1 0x00000010 // Use Toggle L1 mechanism for rt28xx PCIe
#define fRTMP_PS_TOGGLE_L1 0x00000010 /* Use Toggle L1 mechanism for rt28xx PCIe */
#ifdef RT3090
#define WAKE_MCU_CMD 0x31
#define SLEEP_MCU_CMD 0x30
#define RFOFF_MCU_CMD 0x35
#endif // RT3090 //
#endif /* RT3090 // */
#define CCKSETPROTECT 0x1
#define OFDMSETPROTECT 0x2
......@@ -224,12 +224,12 @@
#define GR40SETPROTECT 0x20
#define ALLN_SETPROTECT (GR40SETPROTECT | GF20SETPROTECT | MM40SETPROTECT | MM20SETPROTECT)
//
// AP's client table operation status flags
//
#define fCLIENT_STATUS_WMM_CAPABLE 0x00000001 // CLIENT can parse QOS DATA frame
#define fCLIENT_STATUS_AGGREGATION_CAPABLE 0x00000002 // CLIENT can receive Ralink's proprietary TX aggregation frame
#define fCLIENT_STATUS_PIGGYBACK_CAPABLE 0x00000004 // CLIENT support piggy-back
/* */
/* AP's client table operation status flags */
/* */
#define fCLIENT_STATUS_WMM_CAPABLE 0x00000001 /* CLIENT can parse QOS DATA frame */
#define fCLIENT_STATUS_AGGREGATION_CAPABLE 0x00000002 /* CLIENT can receive Ralink's proprietary TX aggregation frame */
#define fCLIENT_STATUS_PIGGYBACK_CAPABLE 0x00000004 /* CLIENT support piggy-back */
#define fCLIENT_STATUS_AMSDU_INUSED 0x00000008
#define fCLIENT_STATUS_SGI20_CAPABLE 0x00000010
#define fCLIENT_STATUS_SGI40_CAPABLE 0x00000020
......@@ -241,45 +241,45 @@
#define fCLIENT_STATUS_APSD_CAPABLE 0x00000800 /* UAPSD STATION */
#define fCLIENT_STATUS_RALINK_CHIPSET 0x00100000
//
// STA configuration flags
//
/* */
/* STA configuration flags */
/* */
// 802.11n Operating Mode Definition. 0-3 also used in ASICUPdateProtect switch case
/* 802.11n Operating Mode Definition. 0-3 also used in ASICUPdateProtect switch case */
#define HT_NO_PROTECT 0
#define HT_LEGACY_PROTECT 1
#define HT_40_PROTECT 2
#define HT_2040_PROTECT 3
#define HT_RTSCTS_6M 7
//following is our own definition in order to turn on our ASIC protection register in INFRASTRUCTURE.
#define HT_ATHEROS 8 // rt2860c has problem with atheros chip. we need to turn on RTS/CTS .
#define HT_FORCERTSCTS 9 // Force turn on RTS/CTS first. then go to evaluate if this force RTS is necessary.
/*following is our own definition in order to turn on our ASIC protection register in INFRASTRUCTURE. */
#define HT_ATHEROS 8 /* rt2860c has problem with atheros chip. we need to turn on RTS/CTS . */
#define HT_FORCERTSCTS 9 /* Force turn on RTS/CTS first. then go to evaluate if this force RTS is necessary. */
//
// RX Packet Filter control flags. Apply on pAd->PacketFilter
//
/* */
/* RX Packet Filter control flags. Apply on pAd->PacketFilter */
/* */
#define fRX_FILTER_ACCEPT_DIRECT NDIS_PACKET_TYPE_DIRECTED
#define fRX_FILTER_ACCEPT_MULTICAST NDIS_PACKET_TYPE_MULTICAST
#define fRX_FILTER_ACCEPT_BROADCAST NDIS_PACKET_TYPE_BROADCAST
#define fRX_FILTER_ACCEPT_ALL_MULTICAST NDIS_PACKET_TYPE_ALL_MULTICAST
#define fRX_FILTER_ACCEPT_PROMISCUOUS NDIS_PACKET_TYPE_PROMISCUOUS
//
// Error code section
//
// NDIS_ERROR_CODE_ADAPTER_NOT_FOUND
/* */
/* Error code section */
/* */
/* NDIS_ERROR_CODE_ADAPTER_NOT_FOUND */
#define ERRLOG_READ_PCI_SLOT_FAILED 0x00000101L
#define ERRLOG_WRITE_PCI_SLOT_FAILED 0x00000102L
#define ERRLOG_VENDOR_DEVICE_NOMATCH 0x00000103L
// NDIS_ERROR_CODE_ADAPTER_DISABLED
/* NDIS_ERROR_CODE_ADAPTER_DISABLED */
#define ERRLOG_BUS_MASTER_DISABLED 0x00000201L
// NDIS_ERROR_CODE_UNSUPPORTED_CONFIGURATION
/* NDIS_ERROR_CODE_UNSUPPORTED_CONFIGURATION */
#define ERRLOG_INVALID_SPEED_DUPLEX 0x00000301L
#define ERRLOG_SET_SECONDARY_FAILED 0x00000302L
// NDIS_ERROR_CODE_OUT_OF_RESOURCES
/* NDIS_ERROR_CODE_OUT_OF_RESOURCES */
#define ERRLOG_OUT_OF_MEMORY 0x00000401L
#define ERRLOG_OUT_OF_SHARED_MEMORY 0x00000402L
#define ERRLOG_OUT_OF_MAP_REGISTERS 0x00000403L
......@@ -289,21 +289,21 @@
#define ERRLOG_OUT_OF_NDIS_PACKET 0x00000407L
#define ERRLOG_OUT_OF_LOOKASIDE_MEMORY 0x00000408L
// NDIS_ERROR_CODE_HARDWARE_FAILURE
/* NDIS_ERROR_CODE_HARDWARE_FAILURE */
#define ERRLOG_SELFTEST_FAILED 0x00000501L
#define ERRLOG_INITIALIZE_ADAPTER 0x00000502L
#define ERRLOG_REMOVE_MINIPORT 0x00000503L
// NDIS_ERROR_CODE_RESOURCE_CONFLICT
/* NDIS_ERROR_CODE_RESOURCE_CONFLICT */
#define ERRLOG_MAP_IO_SPACE 0x00000601L
#define ERRLOG_QUERY_ADAPTER_RESOURCES 0x00000602L
#define ERRLOG_NO_IO_RESOURCE 0x00000603L
#define ERRLOG_NO_INTERRUPT_RESOURCE 0x00000604L
#define ERRLOG_NO_MEMORY_RESOURCE 0x00000605L
// WDS definition
/* WDS definition */
#define MAX_WDS_ENTRY 4
#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table
#define WDS_PAIRWISE_KEY_OFFSET 60 /* WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table */
#define WDS_DISABLE_MODE 0
#define WDS_RESTRICT_MODE 1
......@@ -319,7 +319,7 @@
#ifdef MBSS_SUPPORT
#undef MAX_MBSSID_NUM
#define MAX_MBSSID_NUM (8 - MAX_MESH_NUM - MAX_APCLI_NUM)
#endif // MBSS_SUPPORT //
#endif /* MBSS_SUPPORT // */
/* sanity check for apidx */
#define MBSS_MR_APIDX_SANITY_CHECK(apidx) \
......@@ -333,10 +333,10 @@
#define FIRST_MBSSID 1
#define MAX_BEACON_SIZE 512
// If the MAX_MBSSID_NUM is larger than 6,
// it shall reserve some WCID space(wcid 222~253) for beacon frames.
// - these wcid 238~253 are reserved for beacon#6(ra6).
// - these wcid 222~237 are reserved for beacon#7(ra7).
/* If the MAX_MBSSID_NUM is larger than 6, */
/* it shall reserve some WCID space(wcid 222~253) for beacon frames. */
/* - these wcid 238~253 are reserved for beacon#6(ra6). */
/* - these wcid 222~237 are reserved for beacon#7(ra7). */
#if defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 8)
#define HW_RESERVED_WCID 222
#elif defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 7)
......@@ -345,17 +345,17 @@
#define HW_RESERVED_WCID 255
#endif
// Then dedicate wcid of DFS and Carrier-Sense.
/* Then dedicate wcid of DFS and Carrier-Sense. */
#define DFS_CTS_WCID (HW_RESERVED_WCID - 1)
#define CS_CTS_WCID (HW_RESERVED_WCID - 2)
#define LAST_SPECIFIC_WCID (HW_RESERVED_WCID - 2)
// If MAX_MBSSID_NUM is 8, the maximum available wcid for the associated STA is 211.
// If MAX_MBSSID_NUM is 7, the maximum available wcid for the associated STA is 228.
/* If MAX_MBSSID_NUM is 8, the maximum available wcid for the associated STA is 211. */
/* If MAX_MBSSID_NUM is 7, the maximum available wcid for the associated STA is 228. */
#define MAX_AVAILABLE_CLIENT_WCID (LAST_SPECIFIC_WCID - MAX_MBSSID_NUM - 1)
// TX need WCID to find Cipher Key
// these wcid 212 ~ 219 are reserved for bc/mc packets if MAX_MBSSID_NUM is 8.
/* TX need WCID to find Cipher Key */
/* these wcid 212 ~ 219 are reserved for bc/mc packets if MAX_MBSSID_NUM is 8. */
#define GET_GroupKey_WCID(__wcid, __bssidx) \
{ \
__wcid = LAST_SPECIFIC_WCID - (MAX_MBSSID_NUM) + __bssidx; \
......@@ -363,7 +363,7 @@
#define IsGroupKeyWCID(__wcid) (((__wcid) < LAST_SPECIFIC_WCID) && ((__wcid) >= (LAST_SPECIFIC_WCID - (MAX_MBSSID_NUM))))
// definition to support multiple BSSID
/* definition to support multiple BSSID */
#define BSS0 0
#define BSS1 1
#define BSS2 2
......@@ -373,26 +373,26 @@
#define BSS6 6
#define BSS7 7
//============================================================
// Length definitions
/*============================================================ */
/* Length definitions */
#define PEER_KEY_NO 2
#define MAC_ADDR_LEN 6
#define TIMESTAMP_LEN 8
#define MAX_LEN_OF_SUPPORTED_RATES MAX_LENGTH_OF_SUPPORT_RATES // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54
#define MAX_LEN_OF_KEY 32 // 32 octets == 256 bits, Redefine for WPA
#define MAX_NUM_OF_CHANNELS MAX_NUM_OF_CHS // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination
#define MAX_NUM_OF_11JCHANNELS 20 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination
#define MAX_LEN_OF_SUPPORTED_RATES MAX_LENGTH_OF_SUPPORT_RATES /* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
#define MAX_LEN_OF_KEY 32 /* 32 octets == 256 bits, Redefine for WPA */
#define MAX_NUM_OF_CHANNELS MAX_NUM_OF_CHS /* 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination */
#define MAX_NUM_OF_11JCHANNELS 20 /* 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination */
#define MAX_LEN_OF_SSID 32
#define CIPHER_TEXT_LEN 128
#define HASH_TABLE_SIZE 256
#define MAX_VIE_LEN 1024 // New for WPA cipher suite variable IE sizes.
#define MAX_VIE_LEN 1024 /* New for WPA cipher suite variable IE sizes. */
#define MAX_SUPPORT_MCS 32
#define MAX_NUM_OF_BBP_LATCH 140
//============================================================
// ASIC WCID Table definition.
//============================================================
#define BSSID_WCID 1 // in infra mode, always put bssid with this WCID
/*============================================================ */
/* ASIC WCID Table definition. */
/*============================================================ */
#define BSSID_WCID 1 /* in infra mode, always put bssid with this WCID */
#define MCAST_WCID 0x0
#define BSS0Mcast_WCID 0x0
#define BSS1Mcast_WCID 0xf8
......@@ -406,7 +406,7 @@
#define MAX_NUM_OF_ACL_LIST MAX_NUMBER_OF_ACL
#define MAX_LEN_OF_MAC_TABLE MAX_NUMBER_OF_MAC // if MAX_MBSSID_NUM is 8, this value can't be larger than 211
#define MAX_LEN_OF_MAC_TABLE MAX_NUMBER_OF_MAC /* if MAX_MBSSID_NUM is 8, this value can't be larger than 211 */
#if MAX_LEN_OF_MAC_TABLE>MAX_AVAILABLE_CLIENT_WCID
#error MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!
......@@ -419,38 +419,38 @@
#define NUM_OF_TID 8
#define MAX_AID_BA 4
#define MAX_LEN_OF_BA_REC_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) // (NUM_OF_TID*MAX_AID_BA + 32) //Block ACK recipient
#define MAX_LEN_OF_BA_ORI_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) // (NUM_OF_TID*MAX_AID_BA + 32) // Block ACK originator
#define MAX_LEN_OF_BA_REC_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) /* (NUM_OF_TID*MAX_AID_BA + 32) //Block ACK recipient */
#define MAX_LEN_OF_BA_ORI_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) /* (NUM_OF_TID*MAX_AID_BA + 32) // Block ACK originator */
#define MAX_LEN_OF_BSS_TABLE 64
#define MAX_REORDERING_MPDU_NUM 512
// key related definitions
/* key related definitions */
#define SHARE_KEY_NUM 4
#define MAX_LEN_OF_SHARE_KEY 16 // byte count
#define MAX_LEN_OF_PEER_KEY 16 // byte count
#define PAIRWISE_KEY_NUM 64 // in MAC ASIC pairwise key table
#define MAX_LEN_OF_SHARE_KEY 16 /* byte count */
#define MAX_LEN_OF_PEER_KEY 16 /* byte count */
#define PAIRWISE_KEY_NUM 64 /* in MAC ASIC pairwise key table */
#define GROUP_KEY_NUM 4
#define PMK_LEN 32
#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table
#define PMKID_NO 4 // Number of PMKID saved supported
#define WDS_PAIRWISE_KEY_OFFSET 60 /* WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table */
#define PMKID_NO 4 /* Number of PMKID saved supported */
#define MAX_LEN_OF_MLME_BUFFER 2048
// power status related definitions
/* power status related definitions */
#define PWR_ACTIVE 0
#define PWR_SAVE 1
#define PWR_MMPS 2 //MIMO power save
#define PWR_MMPS 2 /*MIMO power save */
// Auth and Assoc mode related definitions
/* Auth and Assoc mode related definitions */
#define AUTH_MODE_OPEN 0x00
#define AUTH_MODE_KEY 0x01
// BSS Type definitions
#define BSS_ADHOC 0 // = Ndis802_11IBSS
#define BSS_INFRA 1 // = Ndis802_11Infrastructure
#define BSS_ANY 2 // = Ndis802_11AutoUnknown
#define BSS_MONITOR 3 // = Ndis802_11Monitor
/* BSS Type definitions */
#define BSS_ADHOC 0 /* = Ndis802_11IBSS */
#define BSS_INFRA 1 /* = Ndis802_11Infrastructure */
#define BSS_ANY 2 /* = Ndis802_11AutoUnknown */
#define BSS_MONITOR 3 /* = Ndis802_11Monitor */
// Reason code definitions
/* Reason code definitions */
#define REASON_RESERVED 0
#define REASON_UNSPECIFY 1
#define REASON_NO_LONGER_VALID 2
......@@ -485,7 +485,7 @@
#define REASON_QOS_REQUEST_TIMEOUT 39
#define REASON_QOS_CIPHER_NOT_SUPPORT 45
// Status code definitions
/* Status code definitions */
#define MLME_SUCCESS 0
#define MLME_UNSPECIFY_FAIL 1
#define MLME_CANNOT_SUPPORT_CAP 10
......@@ -517,7 +517,7 @@
#define MLME_STATE_MACHINE_REJECT 0x53
#define MLME_MAC_TABLE_FAIL 0x54
// IE code
/* IE code */
#define IE_SSID 0
#define IE_SUPP_RATES 1
#define IE_FH_PARM 2
......@@ -525,83 +525,83 @@
#define IE_CF_PARM 4
#define IE_TIM 5
#define IE_IBSS_PARM 6
#define IE_COUNTRY 7 // 802.11d
#define IE_802_11D_REQUEST 10 // 802.11d
#define IE_QBSS_LOAD 11 // 802.11e d9
#define IE_EDCA_PARAMETER 12 // 802.11e d9
#define IE_TSPEC 13 // 802.11e d9
#define IE_TCLAS 14 // 802.11e d9
#define IE_SCHEDULE 15 // 802.11e d9
#define IE_COUNTRY 7 /* 802.11d */
#define IE_802_11D_REQUEST 10 /* 802.11d */
#define IE_QBSS_LOAD 11 /* 802.11e d9 */
#define IE_EDCA_PARAMETER 12 /* 802.11e d9 */
#define IE_TSPEC 13 /* 802.11e d9 */
#define IE_TCLAS 14 /* 802.11e d9 */
#define IE_SCHEDULE 15 /* 802.11e d9 */
#define IE_CHALLENGE_TEXT 16
#define IE_POWER_CONSTRAINT 32 // 802.11h d3.3
#define IE_POWER_CAPABILITY 33 // 802.11h d3.3
#define IE_TPC_REQUEST 34 // 802.11h d3.3
#define IE_TPC_REPORT 35 // 802.11h d3.3
#define IE_SUPP_CHANNELS 36 // 802.11h d3.3
#define IE_CHANNEL_SWITCH_ANNOUNCEMENT 37 // 802.11h d3.3
#define IE_MEASUREMENT_REQUEST 38 // 802.11h d3.3
#define IE_MEASUREMENT_REPORT 39 // 802.11h d3.3
#define IE_QUIET 40 // 802.11h d3.3
#define IE_IBSS_DFS 41 // 802.11h d3.3
#define IE_ERP 42 // 802.11g
#define IE_TS_DELAY 43 // 802.11e d9
#define IE_TCLAS_PROCESSING 44 // 802.11e d9
#define IE_QOS_CAPABILITY 46 // 802.11e d6
#define IE_HT_CAP 45 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD
#define IE_AP_CHANNEL_REPORT 51 // 802.11k d6
#define IE_HT_CAP2 52 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD
#define IE_RSN 48 // 802.11i d3.0
#define IE_WPA2 48 // WPA2
#define IE_EXT_SUPP_RATES 50 // 802.11g
#define IE_SUPP_REG_CLASS 59 // 802.11y. Supported regulatory classes.
#define IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT 60 // 802.11n
#define IE_ADD_HT 61 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD
#define IE_ADD_HT2 53 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD
// For 802.11n D3.03
//#define IE_NEW_EXT_CHA_OFFSET 62 // 802.11n d1. New extension channel offset elemet
#define IE_SECONDARY_CH_OFFSET 62 // 802.11n D3.03 Secondary Channel Offset element
#define IE_WAPI 68 // WAPI information element
#define IE_2040_BSS_COEXIST 72 // 802.11n D3.0.3
#define IE_2040_BSS_INTOLERANT_REPORT 73 // 802.11n D3.03
#define IE_OVERLAPBSS_SCAN_PARM 74 // 802.11n D3.03
#define IE_EXT_CAPABILITY 127 // 802.11n D3.03
#define IE_WPA 221 // WPA
#define IE_VENDOR_SPECIFIC 221 // Wifi WMM (WME)
#define OUI_BROADCOM_HT 51 //
#define OUI_BROADCOM_HTADD 52 //
#define OUI_PREN_HT_CAP 51 //
#define OUI_PREN_ADD_HT 52 //
// CCX information
#define IE_AIRONET_CKIP 133 // CCX1.0 ID 85H for CKIP
#define IE_AP_TX_POWER 150 // CCX 2.0 for AP transmit power
#define IE_MEASUREMENT_CAPABILITY 221 // CCX 2.0
#define IE_POWER_CONSTRAINT 32 /* 802.11h d3.3 */
#define IE_POWER_CAPABILITY 33 /* 802.11h d3.3 */
#define IE_TPC_REQUEST 34 /* 802.11h d3.3 */
#define IE_TPC_REPORT 35 /* 802.11h d3.3 */
#define IE_SUPP_CHANNELS 36 /* 802.11h d3.3 */
#define IE_CHANNEL_SWITCH_ANNOUNCEMENT 37 /* 802.11h d3.3 */
#define IE_MEASUREMENT_REQUEST 38 /* 802.11h d3.3 */
#define IE_MEASUREMENT_REPORT 39 /* 802.11h d3.3 */
#define IE_QUIET 40 /* 802.11h d3.3 */
#define IE_IBSS_DFS 41 /* 802.11h d3.3 */
#define IE_ERP 42 /* 802.11g */
#define IE_TS_DELAY 43 /* 802.11e d9 */
#define IE_TCLAS_PROCESSING 44 /* 802.11e d9 */
#define IE_QOS_CAPABILITY 46 /* 802.11e d6 */
#define IE_HT_CAP 45 /* 802.11n d1. HT CAPABILITY. ELEMENT ID TBD */
#define IE_AP_CHANNEL_REPORT 51 /* 802.11k d6 */
#define IE_HT_CAP2 52 /* 802.11n d1. HT CAPABILITY. ELEMENT ID TBD */
#define IE_RSN 48 /* 802.11i d3.0 */
#define IE_WPA2 48 /* WPA2 */
#define IE_EXT_SUPP_RATES 50 /* 802.11g */
#define IE_SUPP_REG_CLASS 59 /* 802.11y. Supported regulatory classes. */
#define IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT 60 /* 802.11n */
#define IE_ADD_HT 61 /* 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD */
#define IE_ADD_HT2 53 /* 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD */
/* For 802.11n D3.03 */
/*#define IE_NEW_EXT_CHA_OFFSET 62 // 802.11n d1. New extension channel offset elemet */
#define IE_SECONDARY_CH_OFFSET 62 /* 802.11n D3.03 Secondary Channel Offset element */
#define IE_WAPI 68 /* WAPI information element */
#define IE_2040_BSS_COEXIST 72 /* 802.11n D3.0.3 */
#define IE_2040_BSS_INTOLERANT_REPORT 73 /* 802.11n D3.03 */
#define IE_OVERLAPBSS_SCAN_PARM 74 /* 802.11n D3.03 */
#define IE_EXT_CAPABILITY 127 /* 802.11n D3.03 */
#define IE_WPA 221 /* WPA */
#define IE_VENDOR_SPECIFIC 221 /* Wifi WMM (WME) */
#define OUI_BROADCOM_HT 51 /* */
#define OUI_BROADCOM_HTADD 52 /* */
#define OUI_PREN_HT_CAP 51 /* */
#define OUI_PREN_ADD_HT 52 /* */
/* CCX information */
#define IE_AIRONET_CKIP 133 /* CCX1.0 ID 85H for CKIP */
#define IE_AP_TX_POWER 150 /* CCX 2.0 for AP transmit power */
#define IE_MEASUREMENT_CAPABILITY 221 /* CCX 2.0 */
#define IE_CCX_V2 221
#define IE_AIRONET_IPADDRESS 149 // CCX ID 95H for IP Address
#define IE_AIRONET_CCKMREASSOC 156 // CCX ID 9CH for CCKM Reassociation Request element
#define IE_AIRONET_IPADDRESS 149 /* CCX ID 95H for IP Address */
#define IE_AIRONET_CCKMREASSOC 156 /* CCX ID 9CH for CCKM Reassociation Request element */
#define CKIP_NEGOTIATION_LENGTH 30
#define AIRONET_IPADDRESS_LENGTH 10
#define AIRONET_CCKMREASSOC_LENGTH 24
// ========================================================
// MLME state machine definition
// ========================================================
/* ======================================================== */
/* MLME state machine definition */
/* ======================================================== */
// STA MLME state mahcines
/* STA MLME state mahcines */
#define ASSOC_STATE_MACHINE 1
#define AUTH_STATE_MACHINE 2
#define AUTH_RSP_STATE_MACHINE 3
#define SYNC_STATE_MACHINE 4
#define MLME_CNTL_STATE_MACHINE 5
#define WPA_PSK_STATE_MACHINE 6
//#define LEAP_STATE_MACHINE 7
/*#define LEAP_STATE_MACHINE 7 */
#define AIRONET_STATE_MACHINE 8
#define ACTION_STATE_MACHINE 9
// AP MLME state machines
/* AP MLME state machines */
#define AP_ASSOC_STATE_MACHINE 11
#define AP_AUTH_STATE_MACHINE 12
#define AP_SYNC_STATE_MACHINE 14
......@@ -611,9 +611,9 @@
#define WPA_STATE_MACHINE 23
//
// STA's CONTROL/CONNECT state machine: states, events, total function #
//
/* */
/* STA's CONTROL/CONNECT state machine: states, events, total function # */
/* */
#define CNTL_IDLE 0
#define CNTL_WAIT_DISASSOC 1
#define CNTL_WAIT_JOIN 2
......@@ -626,7 +626,7 @@
#define CNTL_WAIT_OID_DISASSOC 9
#ifdef RTMP_MAC_USB
#define CNTL_WAIT_SCAN_FOR_CONNECT 10
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
#define MT2_ASSOC_CONF 34
#define MT2_AUTH_CONF 35
......@@ -645,9 +645,9 @@
#define CNTL_FUNC_SIZE 1
//
// STA's ASSOC state machine: states, events, total function #
//
/* */
/* STA's ASSOC state machine: states, events, total function # */
/* */
#define ASSOC_IDLE 0
#define ASSOC_WAIT_RSP 1
#define REASSOC_WAIT_RSP 2
......@@ -670,16 +670,16 @@
#define ASSOC_FUNC_SIZE (MAX_ASSOC_STATE * MAX_ASSOC_MSG)
//
// ACT state machine: states, events, total function #
//
/* */
/* ACT state machine: states, events, total function # */
/* */
#define ACT_IDLE 0
#define MAX_ACT_STATE 1
#define ACT_MACHINE_BASE 0
//Those PEER_xx_CATE number is based on real Categary value in IEEE spec. Please don'es modify it by your self.
//Category
/*Those PEER_xx_CATE number is based on real Categary value in IEEE spec. Please don'es modify it by your self. */
/*Category */
#define MT2_PEER_SPECTRUM_CATE 0
#define MT2_PEER_QOS_CATE 1
#define MT2_PEER_DLS_CATE 2
......@@ -687,7 +687,7 @@
#define MT2_PEER_PUBLIC_CATE 4
#define MT2_PEER_RM_CATE 5
/* "FT_CATEGORY_BSS_TRANSITION equal to 6" is defined file of "dot11r_ft.h" */
#define MT2_PEER_HT_CATE 7 // 7.4.7
#define MT2_PEER_HT_CATE 7 /* 7.4.7 */
#define MAX_PEER_CATE_MSG 7
#define MT2_MLME_ADD_BA_CATE 8
......@@ -698,7 +698,7 @@
#define MT2_ACT_INVALID 13
#define MAX_ACT_MSG 14
//Category field
/*Category field */
#define CATEGORY_SPECTRUM 0
#define CATEGORY_QOS 1
#define CATEGORY_DLS 2
......@@ -707,35 +707,35 @@
#define CATEGORY_RM 5
#define CATEGORY_HT 7
// DLS Action frame definition
/* DLS Action frame definition */
#define ACTION_DLS_REQUEST 0
#define ACTION_DLS_RESPONSE 1
#define ACTION_DLS_TEARDOWN 2
//Spectrum Action field value 802.11h 7.4.1
#define SPEC_MRQ 0 // Request
#define SPEC_MRP 1 //Report
/*Spectrum Action field value 802.11h 7.4.1 */
#define SPEC_MRQ 0 /* Request */
#define SPEC_MRP 1 /*Report */
#define SPEC_TPCRQ 2
#define SPEC_TPCRP 3
#define SPEC_CHANNEL_SWITCH 4
//BA Action field value
/*BA Action field value */
#define ADDBA_REQ 0
#define ADDBA_RESP 1
#define DELBA 2
//Public's Action field value in Public Category. Some in 802.11y and some in 11n
#define ACTION_BSS_2040_COEXIST 0 // 11n
#define ACTION_DSE_ENABLEMENT 1 // 11y D9.0
#define ACTION_DSE_DEENABLEMENT 2 // 11y D9.0
#define ACTION_DSE_REG_LOCATION_ANNOUNCE 3 // 11y D9.0
#define ACTION_EXT_CH_SWITCH_ANNOUNCE 4 // 11y D9.0
#define ACTION_DSE_MEASUREMENT_REQ 5 // 11y D9.0
#define ACTION_DSE_MEASUREMENT_REPORT 6 // 11y D9.0
#define ACTION_MEASUREMENT_PILOT_ACTION 7 // 11y D9.0
#define ACTION_DSE_POWER_CONSTRAINT 8 // 11y D9.0
//HT Action field value
/*Public's Action field value in Public Category. Some in 802.11y and some in 11n */
#define ACTION_BSS_2040_COEXIST 0 /* 11n */
#define ACTION_DSE_ENABLEMENT 1 /* 11y D9.0 */
#define ACTION_DSE_DEENABLEMENT 2 /* 11y D9.0 */
#define ACTION_DSE_REG_LOCATION_ANNOUNCE 3 /* 11y D9.0 */
#define ACTION_EXT_CH_SWITCH_ANNOUNCE 4 /* 11y D9.0 */
#define ACTION_DSE_MEASUREMENT_REQ 5 /* 11y D9.0 */
#define ACTION_DSE_MEASUREMENT_REPORT 6 /* 11y D9.0 */
#define ACTION_MEASUREMENT_PILOT_ACTION 7 /* 11y D9.0 */
#define ACTION_DSE_POWER_CONSTRAINT 8 /* 11y D9.0 */
/*HT Action field value */
#define NOTIFY_BW_ACTION 0
#define SMPS_ACTION 1
#define PSMP_ACTION 2
......@@ -747,9 +747,9 @@
#define HT_INFO_EXCHANGE 8
#define ACT_FUNC_SIZE (MAX_ACT_STATE * MAX_ACT_MSG)
//
// STA's AUTHENTICATION state machine: states, evvents, total function #
//
/* */
/* STA's AUTHENTICATION state machine: states, evvents, total function # */
/* */
#define AUTH_REQ_IDLE 0
#define AUTH_WAIT_SEQ2 1
#define AUTH_WAIT_SEQ4 2
......@@ -763,9 +763,9 @@
#define AUTH_FUNC_SIZE (MAX_AUTH_STATE * MAX_AUTH_MSG)
//
// STA's AUTH_RSP state machine: states, events, total function #
//
/* */
/* STA's AUTH_RSP state machine: states, events, total function # */
/* */
#define AUTH_RSP_IDLE 0
#define AUTH_RSP_WAIT_CHAL 1
#define MAX_AUTH_RSP_STATE 2
......@@ -778,10 +778,10 @@
#define AUTH_RSP_FUNC_SIZE (MAX_AUTH_RSP_STATE * MAX_AUTH_RSP_MSG)
//
// STA's SYNC state machine: states, events, total function #
//
#define SYNC_IDLE 0 // merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state
/* */
/* STA's SYNC state machine: states, events, total function # */
/* */
#define SYNC_IDLE 0 /* merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state */
#define JOIN_WAIT_BEACON 1
#define SCAN_LISTEN 2
#define MAX_SYNC_STATE 3
......@@ -801,7 +801,7 @@
#define SYNC_FUNC_SIZE (MAX_SYNC_STATE * MAX_SYNC_MSG)
//Messages for the DLS state machine
/*Messages for the DLS state machine */
#define DLS_IDLE 0
#define MAX_DLS_STATE 1
......@@ -815,18 +815,18 @@
#define DLS_FUNC_SIZE (MAX_DLS_STATE * MAX_DLS_MSG)
//
// WSC State machine: states, events, total function #
//
/* */
/* WSC State machine: states, events, total function # */
/* */
//
// AP's CONTROL/CONNECT state machine: states, events, total function #
//
/* */
/* AP's CONTROL/CONNECT state machine: states, events, total function # */
/* */
#define AP_CNTL_FUNC_SIZE 1
//
// AP's ASSOC state machine: states, events, total function #
//
/* */
/* AP's ASSOC state machine: states, events, total function # */
/* */
#define AP_ASSOC_IDLE 0
#define AP_MAX_ASSOC_STATE 1
......@@ -840,9 +840,9 @@
#define AP_ASSOC_FUNC_SIZE (AP_MAX_ASSOC_STATE * AP_MAX_ASSOC_MSG)
//
// AP's AUTHENTICATION state machine: states, events, total function #
//
/* */
/* AP's AUTHENTICATION state machine: states, events, total function # */
/* */
#define AP_AUTH_REQ_IDLE 0
#define AP_MAX_AUTH_STATE 1
......@@ -856,9 +856,9 @@
#define AP_AUTH_FUNC_SIZE (AP_MAX_AUTH_STATE * AP_MAX_AUTH_MSG)
//
// AP's SYNC state machine: states, events, total function #
//
/* */
/* AP's SYNC state machine: states, events, total function # */
/* */
#define AP_SYNC_IDLE 0
#define AP_SCAN_LISTEN 1
#define AP_MAX_SYNC_STATE 2
......@@ -874,9 +874,9 @@
#define AP_SYNC_FUNC_SIZE (AP_MAX_SYNC_STATE * AP_MAX_SYNC_MSG)
//
// Common WPA state machine: states, events, total function #
//
/* */
/* Common WPA state machine: states, events, total function # */
/* */
#define WPA_PTK 0
#define MAX_WPA_PTK_STATE 1
......@@ -890,14 +890,14 @@
#define WPA_FUNC_SIZE (MAX_WPA_PTK_STATE * MAX_WPA_MSG)
// =============================================================================
/* ============================================================================= */
// value domain of 802.11 header FC.Tyte, which is b3..b2 of the 1st-byte of MAC header
/* value domain of 802.11 header FC.Tyte, which is b3..b2 of the 1st-byte of MAC header */
#define BTYPE_MGMT 0
#define BTYPE_CNTL 1
#define BTYPE_DATA 2
// value domain of 802.11 MGMT frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header
/* value domain of 802.11 MGMT frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
#define SUBTYPE_ASSOC_REQ 0
#define SUBTYPE_ASSOC_RSP 1
#define SUBTYPE_REASSOC_REQ 2
......@@ -912,7 +912,7 @@
#define SUBTYPE_ACTION 13
#define SUBTYPE_ACTION_NO_ACK 14
// value domain of 802.11 CNTL frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header
/* value domain of 802.11 CNTL frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
#define SUBTYPE_WRAPPER 7
#define SUBTYPE_BLOCK_ACK_REQ 8
#define SUBTYPE_BLOCK_ACK 9
......@@ -923,7 +923,7 @@
#define SUBTYPE_CFEND 14
#define SUBTYPE_CFEND_CFACK 15
// value domain of 802.11 DATA frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header
/* value domain of 802.11 DATA frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
#define SUBTYPE_DATA 0
#define SUBTYPE_DATA_CFACK 1
#define SUBTYPE_DATA_CFPOLL 2
......@@ -941,15 +941,15 @@
#define SUBTYPE_QOS_CFPOLL 14
#define SUBTYPE_QOS_CFACK_CFPOLL 15
// ACK policy of QOS Control field bit 6:5
#define NORMAL_ACK 0x00 // b6:5 = 00
#define NO_ACK 0x20 // b6:5 = 01
#define NO_EXPLICIT_ACK 0x40 // b6:5 = 10
#define BLOCK_ACK 0x60 // b6:5 = 11
/* ACK policy of QOS Control field bit 6:5 */
#define NORMAL_ACK 0x00 /* b6:5 = 00 */
#define NO_ACK 0x20 /* b6:5 = 01 */
#define NO_EXPLICIT_ACK 0x40 /* b6:5 = 10 */
#define BLOCK_ACK 0x60 /* b6:5 = 11 */
//
// rtmp_data.c use these definition
//
/* */
/* rtmp_data.c use these definition */
/* */
#define LENGTH_802_11 24
#define LENGTH_802_11_AND_H 30
#define LENGTH_802_11_CRC_H 34
......@@ -965,40 +965,40 @@
#define LENGTH_802_3_NO_TYPE 12
#define LENGTH_802_1Q 4 /* VLAN related */
// STA_CSR4.field.TxResult
/* STA_CSR4.field.TxResult */
#define TX_RESULT_SUCCESS 0
#define TX_RESULT_ZERO_LENGTH 1
#define TX_RESULT_UNDER_RUN 2
#define TX_RESULT_OHY_ERROR 4
#define TX_RESULT_RETRY_FAIL 6
// All PHY rate summary in TXD
// Preamble MODE in TxD
/* All PHY rate summary in TXD */
/* Preamble MODE in TxD */
#define MODE_CCK 0
#define MODE_OFDM 1
#define MODE_HTMIX 2
#define MODE_HTGREENFIELD 3
// MCS for CCK. BW.SGI.STBC are reserved
#define MCS_LONGP_RATE_1 0 // long preamble CCK 1Mbps
#define MCS_LONGP_RATE_2 1 // long preamble CCK 1Mbps
/* MCS for CCK. BW.SGI.STBC are reserved */
#define MCS_LONGP_RATE_1 0 /* long preamble CCK 1Mbps */
#define MCS_LONGP_RATE_2 1 /* long preamble CCK 1Mbps */
#define MCS_LONGP_RATE_5_5 2
#define MCS_LONGP_RATE_11 3
#define MCS_SHORTP_RATE_1 4 // long preamble CCK 1Mbps. short is forbidden in 1Mbps
#define MCS_SHORTP_RATE_2 5 // short preamble CCK 2Mbps
#define MCS_SHORTP_RATE_1 4 /* long preamble CCK 1Mbps. short is forbidden in 1Mbps */
#define MCS_SHORTP_RATE_2 5 /* short preamble CCK 2Mbps */
#define MCS_SHORTP_RATE_5_5 6
#define MCS_SHORTP_RATE_11 7
// To send duplicate legacy OFDM. set BW=BW_40. SGI.STBC are reserved
#define MCS_RATE_6 0 // legacy OFDM
#define MCS_RATE_9 1 // OFDM
#define MCS_RATE_12 2 // OFDM
#define MCS_RATE_18 3 // OFDM
#define MCS_RATE_24 4 // OFDM
#define MCS_RATE_36 5 // OFDM
#define MCS_RATE_48 6 // OFDM
#define MCS_RATE_54 7 // OFDM
// HT
#define MCS_0 0 // 1S
/* To send duplicate legacy OFDM. set BW=BW_40. SGI.STBC are reserved */
#define MCS_RATE_6 0 /* legacy OFDM */
#define MCS_RATE_9 1 /* OFDM */
#define MCS_RATE_12 2 /* OFDM */
#define MCS_RATE_18 3 /* OFDM */
#define MCS_RATE_24 4 /* OFDM */
#define MCS_RATE_36 5 /* OFDM */
#define MCS_RATE_48 6 /* OFDM */
#define MCS_RATE_54 7 /* OFDM */
/* HT */
#define MCS_0 0 /* 1S */
#define MCS_1 1
#define MCS_2 2
#define MCS_3 3
......@@ -1006,7 +1006,7 @@
#define MCS_5 5
#define MCS_6 6
#define MCS_7 7
#define MCS_8 8 // 2S
#define MCS_8 8 /* 2S */
#define MCS_9 9
#define MCS_10 10
#define MCS_11 11
......@@ -1014,7 +1014,7 @@
#define MCS_13 13
#define MCS_14 14
#define MCS_15 15
#define MCS_16 16 // 3*3
#define MCS_16 16 /* 3*3 */
#define MCS_17 17
#define MCS_18 18
#define MCS_19 19
......@@ -1025,48 +1025,48 @@
#define MCS_32 32
#define MCS_AUTO 33
// OID_HTPHYMODE
// MODE
/* OID_HTPHYMODE */
/* MODE */
#define HTMODE_MM 0
#define HTMODE_GF 1
// Fixed Tx MODE - HT, CCK or OFDM
/* Fixed Tx MODE - HT, CCK or OFDM */
#define FIXED_TXMODE_HT 0
#define FIXED_TXMODE_CCK 1
#define FIXED_TXMODE_OFDM 2
// BW
/* BW */
#define BW_20 BAND_WIDTH_20
#define BW_40 BAND_WIDTH_40
#define BW_BOTH BAND_WIDTH_BOTH
#define BW_10 BAND_WIDTH_10 // 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field.
#define BW_10 BAND_WIDTH_10 /* 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field. */
// SHORTGI
#define GI_400 GAP_INTERVAL_400 // only support in HT mode
/* SHORTGI */
#define GI_400 GAP_INTERVAL_400 /* only support in HT mode */
#define GI_BOTH GAP_INTERVAL_BOTH
#define GI_800 GAP_INTERVAL_800
// STBC
/* STBC */
#define STBC_NONE 0
#define STBC_USE 1 // limited use in rt2860b phy
#define RXSTBC_ONE 1 // rx support of one spatial stream
#define RXSTBC_TWO 2 // rx support of 1 and 2 spatial stream
#define RXSTBC_THR 3 // rx support of 1~3 spatial stream
// MCS FEEDBACK
#define MCSFBK_NONE 0 // not support mcs feedback /
#define MCSFBK_RSV 1 // reserved
#define MCSFBK_UNSOLICIT 2 // only support unsolict mcs feedback
#define MCSFBK_MRQ 3 // response to both MRQ and unsolict mcs feedback
// MIMO power safe
#define STBC_USE 1 /* limited use in rt2860b phy */
#define RXSTBC_ONE 1 /* rx support of one spatial stream */
#define RXSTBC_TWO 2 /* rx support of 1 and 2 spatial stream */
#define RXSTBC_THR 3 /* rx support of 1~3 spatial stream */
/* MCS FEEDBACK */
#define MCSFBK_NONE 0 /* not support mcs feedback / */
#define MCSFBK_RSV 1 /* reserved */
#define MCSFBK_UNSOLICIT 2 /* only support unsolict mcs feedback */
#define MCSFBK_MRQ 3 /* response to both MRQ and unsolict mcs feedback */
/* MIMO power safe */
#define MMPS_STATIC 0
#define MMPS_DYNAMIC 1
#define MMPS_RSV 2
#define MMPS_ENABLE 3
// A-MSDU size
/* A-MSDU size */
#define AMSDU_0 0
#define AMSDU_1 1
// MCS use 7 bits
/* MCS use 7 bits */
#define TXRATEMIMO 0x80
#define TXRATEMCS 0x7F
#define TXRATEOFDM 0x7F
......@@ -1074,77 +1074,77 @@
#define RATE_2 1
#define RATE_5_5 2
#define RATE_11 3
#define RATE_6 4 // OFDM
#define RATE_9 5 // OFDM
#define RATE_12 6 // OFDM
#define RATE_18 7 // OFDM
#define RATE_24 8 // OFDM
#define RATE_36 9 // OFDM
#define RATE_48 10 // OFDM
#define RATE_54 11 // OFDM
#define RATE_6 4 /* OFDM */
#define RATE_9 5 /* OFDM */
#define RATE_12 6 /* OFDM */
#define RATE_18 7 /* OFDM */
#define RATE_24 8 /* OFDM */
#define RATE_36 9 /* OFDM */
#define RATE_48 10 /* OFDM */
#define RATE_54 11 /* OFDM */
#define RATE_FIRST_OFDM_RATE RATE_6
#define RATE_LAST_OFDM_RATE RATE_54
#define RATE_6_5 12 // HT mix
#define RATE_13 13 // HT mix
#define RATE_19_5 14 // HT mix
#define RATE_26 15 // HT mix
#define RATE_39 16 // HT mix
#define RATE_52 17 // HT mix
#define RATE_58_5 18 // HT mix
#define RATE_65 19 // HT mix
#define RATE_78 20 // HT mix
#define RATE_104 21 // HT mix
#define RATE_117 22 // HT mix
#define RATE_130 23 // HT mix
//#define RATE_AUTO_SWITCH 255 // for StaCfg.FixedTxRate only
#define RATE_6_5 12 /* HT mix */
#define RATE_13 13 /* HT mix */
#define RATE_19_5 14 /* HT mix */
#define RATE_26 15 /* HT mix */
#define RATE_39 16 /* HT mix */
#define RATE_52 17 /* HT mix */
#define RATE_58_5 18 /* HT mix */
#define RATE_65 19 /* HT mix */
#define RATE_78 20 /* HT mix */
#define RATE_104 21 /* HT mix */
#define RATE_117 22 /* HT mix */
#define RATE_130 23 /* HT mix */
/*#define RATE_AUTO_SWITCH 255 // for StaCfg.FixedTxRate only */
#define HTRATE_0 12
#define RATE_FIRST_MM_RATE HTRATE_0
#define RATE_FIRST_HT_RATE HTRATE_0
#define RATE_LAST_HT_RATE HTRATE_0
// pTxWI->txop
#define IFS_HTTXOP 0 // The txop will be handles by ASIC.
/* pTxWI->txop */
#define IFS_HTTXOP 0 /* The txop will be handles by ASIC. */
#define IFS_PIFS 1
#define IFS_SIFS 2
#define IFS_BACKOFF 3
// pTxD->RetryMode
/* pTxD->RetryMode */
#define LONG_RETRY 1
#define SHORT_RETRY 0
// Country Region definition
/* Country Region definition */
#define REGION_MINIMUM_BG_BAND 0
#define REGION_0_BG_BAND 0 // 1-11
#define REGION_1_BG_BAND 1 // 1-13
#define REGION_2_BG_BAND 2 // 10-11
#define REGION_3_BG_BAND 3 // 10-13
#define REGION_4_BG_BAND 4 // 14
#define REGION_5_BG_BAND 5 // 1-14
#define REGION_6_BG_BAND 6 // 3-9
#define REGION_7_BG_BAND 7 // 5-13
#define REGION_31_BG_BAND 31 // 5-13
#define REGION_0_BG_BAND 0 /* 1-11 */
#define REGION_1_BG_BAND 1 /* 1-13 */
#define REGION_2_BG_BAND 2 /* 10-11 */
#define REGION_3_BG_BAND 3 /* 10-13 */
#define REGION_4_BG_BAND 4 /* 14 */
#define REGION_5_BG_BAND 5 /* 1-14 */
#define REGION_6_BG_BAND 6 /* 3-9 */
#define REGION_7_BG_BAND 7 /* 5-13 */
#define REGION_31_BG_BAND 31 /* 5-13 */
#define REGION_MAXIMUM_BG_BAND 7
#define REGION_MINIMUM_A_BAND 0
#define REGION_0_A_BAND 0 // 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165
#define REGION_1_A_BAND 1 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
#define REGION_2_A_BAND 2 // 36, 40, 44, 48, 52, 56, 60, 64
#define REGION_3_A_BAND 3 // 52, 56, 60, 64, 149, 153, 157, 161
#define REGION_4_A_BAND 4 // 149, 153, 157, 161, 165
#define REGION_5_A_BAND 5 // 149, 153, 157, 161
#define REGION_6_A_BAND 6 // 36, 40, 44, 48
#define REGION_7_A_BAND 7 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, 169, 173
#define REGION_8_A_BAND 8 // 52, 56, 60, 64
#define REGION_9_A_BAND 9 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165
#define REGION_10_A_BAND 10 // 36, 40, 44, 48, 149, 153, 157, 161, 165
#define REGION_11_A_BAND 11 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161
#define REGION_12_A_BAND 12 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
#define REGION_13_A_BAND 13 // 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161
#define REGION_14_A_BAND 14 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165
#define REGION_15_A_BAND 15 // 149, 153, 157, 161, 165, 169, 173
#define REGION_0_A_BAND 0 /* 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165 */
#define REGION_1_A_BAND 1 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 */
#define REGION_2_A_BAND 2 /* 36, 40, 44, 48, 52, 56, 60, 64 */
#define REGION_3_A_BAND 3 /* 52, 56, 60, 64, 149, 153, 157, 161 */
#define REGION_4_A_BAND 4 /* 149, 153, 157, 161, 165 */
#define REGION_5_A_BAND 5 /* 149, 153, 157, 161 */
#define REGION_6_A_BAND 6 /* 36, 40, 44, 48 */
#define REGION_7_A_BAND 7 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, 169, 173 */
#define REGION_8_A_BAND 8 /* 52, 56, 60, 64 */
#define REGION_9_A_BAND 9 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165 */
#define REGION_10_A_BAND 10 /* 36, 40, 44, 48, 149, 153, 157, 161, 165 */
#define REGION_11_A_BAND 11 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161 */
#define REGION_12_A_BAND 12 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 */
#define REGION_13_A_BAND 13 /* 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161 */
#define REGION_14_A_BAND 14 /* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165 */
#define REGION_15_A_BAND 15 /* 149, 153, 157, 161, 165, 169, 173 */
#define REGION_MAXIMUM_A_BAND 15
// pTxD->CipherAlg
/* pTxD->CipherAlg */
#define CIPHER_NONE 0
#define CIPHER_WEP64 1
#define CIPHER_WEP128 2
......@@ -1152,10 +1152,10 @@
#define CIPHER_AES 4
#define CIPHER_CKIP64 5
#define CIPHER_CKIP128 6
#define CIPHER_TKIP_NO_MIC 7 // MIC appended by driver: not a valid value in hardware key table
#define CIPHER_TKIP_NO_MIC 7 /* MIC appended by driver: not a valid value in hardware key table */
#define CIPHER_SMS4 8
// LED Status.
/* LED Status. */
#define LED_LINK_DOWN 0
#define LED_LINK_UP 1
#define LED_RADIO_OFF 2
......@@ -1165,35 +1165,35 @@
#define LED_ON_SITE_SURVEY 6
#define LED_POWER_UP 7
// value domain of pAd->LedCntl.LedMode and E2PROM
/* value domain of pAd->LedCntl.LedMode and E2PROM */
#define LED_MODE_DEFAULT 0
#define LED_MODE_TWO_LED 1
//#define LED_MODE_SIGNAL_STREGTH 8 // EEPROM define =8
#define LED_MODE_SIGNAL_STREGTH 0x40 // EEPROM define = 64
/*#define LED_MODE_SIGNAL_STREGTH 8 // EEPROM define =8 */
#define LED_MODE_SIGNAL_STREGTH 0x40 /* EEPROM define = 64 */
// RC4 init value, used fro WEP & TKIP
/* RC4 init value, used fro WEP & TKIP */
#define PPPINITFCS32 0xffffffff /* Initial FCS value */
// value domain of pAd->StaCfg.PortSecured. 802.1X controlled port definition
/* value domain of pAd->StaCfg.PortSecured. 802.1X controlled port definition */
#define WPA_802_1X_PORT_SECURED 1
#define WPA_802_1X_PORT_NOT_SECURED 2
#define PAIRWISE_KEY 1
#define GROUP_KEY 2
//definition of DRS
/*definition of DRS */
#define MAX_STEP_OF_TX_RATE_SWITCH 32
// pre-allocated free NDIS PACKET/BUFFER poll for internal usage
/* pre-allocated free NDIS PACKET/BUFFER poll for internal usage */
#define MAX_NUM_OF_FREE_NDIS_PACKET 128
//Block ACK
/*Block ACK */
#define MAX_TX_REORDERBUF 64
#define MAX_RX_REORDERBUF 64
#define DEFAULT_TX_TIMEOUT 30
#define DEFAULT_RX_TIMEOUT 30
// definition of Recipient or Originator
/* definition of Recipient or Originator */
#define I_RECIPIENT TRUE
#define I_ORIGINATOR FALSE
......@@ -1201,43 +1201,43 @@
#define DEFAULT_RF_TX_POWER 5
#define MAX_INI_BUFFER_SIZE 4096
#define MAX_PARAM_BUFFER_SIZE (2048) // enough for ACL (18*64)
//18 : the length of Mac address acceptable format "01:02:03:04:05:06;")
//64 : MAX_NUM_OF_ACL_LIST
// definition of pAd->OpMode
#define MAX_PARAM_BUFFER_SIZE (2048) /* enough for ACL (18*64) */
/*18 : the length of Mac address acceptable format "01:02:03:04:05:06;") */
/*64 : MAX_NUM_OF_ACL_LIST */
/* definition of pAd->OpMode */
#define OPMODE_STA 0
#define OPMODE_AP 1
//#define OPMODE_L3_BRG 2 // as AP and STA at the same time
// ========================= AP rtmp_def.h ===========================
// value domain for pAd->EventTab.Log[].Event
#define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point"
#define EVENT_ASSOCIATED 1 // Log = "hh:mm:ss STA 00:01:02:03:04:05 associated"
#define EVENT_DISASSOCIATED 2 // Log = "hh:mm:ss STA 00:01:02:03:04:05 left this BSS"
#define EVENT_AGED_OUT 3 // Log = "hh:mm:ss STA 00:01:02:03:04:05 was aged-out and removed from this BSS"
/*#define OPMODE_L3_BRG 2 // as AP and STA at the same time */
/* ========================= AP rtmp_def.h =========================== */
/* value domain for pAd->EventTab.Log[].Event */
#define EVENT_RESET_ACCESS_POINT 0 /* Log = "hh:mm:ss Restart Access Point" */
#define EVENT_ASSOCIATED 1 /* Log = "hh:mm:ss STA 00:01:02:03:04:05 associated" */
#define EVENT_DISASSOCIATED 2 /* Log = "hh:mm:ss STA 00:01:02:03:04:05 left this BSS" */
#define EVENT_AGED_OUT 3 /* Log = "hh:mm:ss STA 00:01:02:03:04:05 was aged-out and removed from this BSS" */
#define EVENT_COUNTER_M 4
#define EVENT_INVALID_PSK 5
#define EVENT_MAX_EVENT_TYPE 6
// ==== end of AP rtmp_def.h ============
/* ==== end of AP rtmp_def.h ============ */
// definition RSSI Number
/* definition RSSI Number */
#define RSSI_0 0
#define RSSI_1 1
#define RSSI_2 2
// definition of radar detection
#define RD_NORMAL_MODE 0 // Not found radar signal
#define RD_SWITCHING_MODE 1 // Found radar signal, and doing channel switch
#define RD_SILENCE_MODE 2 // After channel switch, need to be silence a while to ensure radar not found
/* definition of radar detection */
#define RD_NORMAL_MODE 0 /* Not found radar signal */
#define RD_SWITCHING_MODE 1 /* Found radar signal, and doing channel switch */
#define RD_SILENCE_MODE 2 /* After channel switch, need to be silence a while to ensure radar not found */
//Driver defined cid for mapping status and command.
/*Driver defined cid for mapping status and command. */
#define SLEEPCID 0x11
#define WAKECID 0x22
#define QUERYPOWERCID 0x33
#define OWNERMCU 0x1
#define OWNERCPU 0x0
// MBSSID definition
/* MBSSID definition */
#define ENTRY_NOT_FOUND 0xFF
/* After Linux 2.6.9,
......@@ -1259,15 +1259,15 @@
#define INF_APCLI_DEV_NAME "apcli"
#define INF_MESH_DEV_NAME "mesh"
// WEP Key TYPE
/* WEP Key TYPE */
#define WEP_HEXADECIMAL_TYPE 0
#define WEP_ASCII_TYPE 1
// WIRELESS EVENTS definition
/* WIRELESS EVENTS definition */
/* Max number of char in custom event, refer to wireless_tools.28/wireless.20.h */
#define IW_CUSTOM_MAX_LEN 255 /* In bytes */
// For system event - start
/* For system event - start */
#define IW_SYS_EVENT_FLAG_START 0x0200
#define IW_ASSOC_EVENT_FLAG 0x0200
#define IW_DISASSOC_EVENT_FLAG 0x0201
......@@ -1288,12 +1288,12 @@
#define IW_STA_LINKDOWN_EVENT_FLAG 0x0210
#define IW_SCAN_COMPLETED_EVENT_FLAG 0x0211
#define IW_SCAN_ENQUEUE_FAIL_EVENT_FLAG 0x0212
// if add new system event flag, please upadte the IW_SYS_EVENT_FLAG_END
/* if add new system event flag, please upadte the IW_SYS_EVENT_FLAG_END */
#define IW_SYS_EVENT_FLAG_END 0x0212
#define IW_SYS_EVENT_TYPE_NUM (IW_SYS_EVENT_FLAG_END - IW_SYS_EVENT_FLAG_START + 1)
// For system event - end
/* For system event - end */
// For spoof attack event - start
/* For spoof attack event - start */
#define IW_SPOOF_EVENT_FLAG_START 0x0300
#define IW_CONFLICT_SSID_EVENT_FLAG 0x0300
#define IW_SPOOF_ASSOC_RESP_EVENT_FLAG 0x0301
......@@ -1305,12 +1305,12 @@
#define IW_SPOOF_DEAUTH_EVENT_FLAG 0x0307
#define IW_SPOOF_UNKNOWN_MGMT_EVENT_FLAG 0x0308
#define IW_REPLAY_ATTACK_EVENT_FLAG 0x0309
// if add new spoof attack event flag, please upadte the IW_SPOOF_EVENT_FLAG_END
/* if add new spoof attack event flag, please upadte the IW_SPOOF_EVENT_FLAG_END */
#define IW_SPOOF_EVENT_FLAG_END 0x0309
#define IW_SPOOF_EVENT_TYPE_NUM (IW_SPOOF_EVENT_FLAG_END - IW_SPOOF_EVENT_FLAG_START + 1)
// For spoof attack event - end
/* For spoof attack event - end */
// For flooding attack event - start
/* For flooding attack event - start */
#define IW_FLOOD_EVENT_FLAG_START 0x0400
#define IW_FLOOD_AUTH_EVENT_FLAG 0x0400
#define IW_FLOOD_ASSOC_REQ_EVENT_FLAG 0x0401
......@@ -1319,18 +1319,18 @@
#define IW_FLOOD_DISASSOC_EVENT_FLAG 0x0404
#define IW_FLOOD_DEAUTH_EVENT_FLAG 0x0405
#define IW_FLOOD_EAP_REQ_EVENT_FLAG 0x0406
// if add new flooding attack event flag, please upadte the IW_FLOOD_EVENT_FLAG_END
/* if add new flooding attack event flag, please upadte the IW_FLOOD_EVENT_FLAG_END */
#define IW_FLOOD_EVENT_FLAG_END 0x0406
#define IW_FLOOD_EVENT_TYPE_NUM (IW_FLOOD_EVENT_FLAG_END - IW_FLOOD_EVENT_FLAG_START + 1)
// For flooding attack - end
/* For flooding attack - end */
// End - WIRELESS EVENTS definition
/* End - WIRELESS EVENTS definition */
// definition for DLS, kathy
/* definition for DLS, kathy */
#define MAX_NUM_OF_INIT_DLS_ENTRY 1
#define MAX_NUM_OF_DLS_ENTRY MAX_NUMBER_OF_DLS_ENTRY
//Block ACK, kathy
/*Block ACK, kathy */
#define MAX_TX_REORDERBUF 64
#define MAX_RX_REORDERBUF 64
#define DEFAULT_TX_TIMEOUT 30
......@@ -1342,19 +1342,19 @@
#define IW_ESSID_MAX_SIZE 32
#endif
// For AsicRadioOff/AsicRadioOn function
/* For AsicRadioOff/AsicRadioOn function */
#define DOT11POWERSAVE 0
#define GUIRADIO_OFF 1
#define RTMP_HALT 2
#define GUI_IDLE_POWER_SAVE 3
// --
/* -- */
// definition for WpaSupport flag
/* definition for WpaSupport flag */
#define WPA_SUPPLICANT_DISABLE 0
#define WPA_SUPPLICANT_ENABLE 1
#define WPA_SUPPLICANT_ENABLE_WITH_WEB_UI 2
// Endian byte swapping codes
/* Endian byte swapping codes */
#define SWAP16(x) \
((UINT16)( \
(((UINT16)(x) & (UINT16) 0x00ffU) << 8) | \
......@@ -1423,4 +1423,4 @@ do{ \
} \
}while(0)
#endif // __RTMP_DEF_H__
#endif /* __RTMP_DEF_H__ */
drivers/staging/rt2860/rtmp_dot11.h
View file @ cc277069
......@@ -30,46 +30,46 @@
#include "rtmp_type.h"
// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1.
/* 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. */
typedef struct PACKED {
UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
UINT32 TRQ:1; //sounding request
UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
UINT32 CalPos:2; // calibration position
UINT32 CalSeq:2; //calibration sequence
UINT32 FBKReq:2; //feedback request
UINT32 CSISTEERING:2; //CSI/ STEERING
UINT32 ZLFAnnouce:1; // ZLF announcement
UINT32 rsv:5; //calibration sequence
UINT32 ACConstraint:1; //feedback request
UINT32 RDG:1; //RDG / More PPDU
UINT32 MA:1; /*management action payload exist in (QoS Null+HTC) */
UINT32 TRQ:1; /*sounding request */
UINT32 MRQ:1; /*MCS feedback. Request for a MCS feedback */
UINT32 MRSorASI:3; /* MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110. */
UINT32 MFS:3; /*SET to the received value of MRS. 0x111 for unsolicited MFB. */
UINT32 MFBorASC:7; /*Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available */
UINT32 CalPos:2; /* calibration position */
UINT32 CalSeq:2; /*calibration sequence */
UINT32 FBKReq:2; /*feedback request */
UINT32 CSISTEERING:2; /*CSI/ STEERING */
UINT32 ZLFAnnouce:1; /* ZLF announcement */
UINT32 rsv:5; /*calibration sequence */
UINT32 ACConstraint:1; /*feedback request */
UINT32 RDG:1; /*RDG / More PPDU */
} HT_CONTROL, *PHT_CONTROL;
// 2-byte QOS CONTROL field
/* 2-byte QOS CONTROL field */
typedef struct PACKED {
USHORT TID:4;
USHORT EOSP:1;
USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
USHORT AckPolicy:2; /*0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA */
USHORT AMsduPresent:1;
USHORT Txop_QueueSize:8;
} QOS_CONTROL, *PQOS_CONTROL;
// 2-byte Frame control field
/* 2-byte Frame control field */
typedef struct PACKED {
USHORT Ver:2; // Protocol version
USHORT Type:2; // MSDU type
USHORT SubType:4; // MSDU subtype
USHORT ToDs:1; // To DS indication
USHORT FrDs:1; // From DS indication
USHORT MoreFrag:1; // More fragment bit
USHORT Retry:1; // Retry status bit
USHORT PwrMgmt:1; // Power management bit
USHORT MoreData:1; // More data bit
USHORT Wep:1; // Wep data
USHORT Order:1; // Strict order expected
USHORT Ver:2; /* Protocol version */
USHORT Type:2; /* MSDU type */
USHORT SubType:4; /* MSDU subtype */
USHORT ToDs:1; /* To DS indication */
USHORT FrDs:1; /* From DS indication */
USHORT MoreFrag:1; /* More fragment bit */
USHORT Retry:1; /* Retry status bit */
USHORT PwrMgmt:1; /* Power management bit */
USHORT MoreData:1; /* More data bit */
USHORT Wep:1; /* Wep data */
USHORT Order:1; /* Strict order expected */
} FRAME_CONTROL, *PFRAME_CONTROL;
typedef struct PACKED _HEADER_802_11 {
......@@ -97,4 +97,4 @@ typedef struct PACKED _RTS_FRAME {
UCHAR Addr2[MAC_ADDR_LEN];
} RTS_FRAME, *PRTS_FRAME;
#endif // __DOT11_BASE_H__ //
#endif /* __DOT11_BASE_H__ // */
drivers/staging/rt2860/rtmp_iface.h
View file @ cc277069
......@@ -39,19 +39,19 @@
#ifdef RTMP_PCI_SUPPORT
#include "iface/rtmp_pci.h"
#endif // RTMP_PCI_SUPPORT //
#endif /* RTMP_PCI_SUPPORT // */
#ifdef RTMP_USB_SUPPORT
#include "iface/rtmp_usb.h"
#endif // RTMP_USB_SUPPORT //
#endif /* RTMP_USB_SUPPORT // */
typedef struct _INF_PCI_CONFIG_ {
unsigned long CSRBaseAddress; // PCI MMIO Base Address, all access will use
unsigned long CSRBaseAddress; /* PCI MMIO Base Address, all access will use */
unsigned int irq_num;
} INF_PCI_CONFIG;
typedef struct _INF_USB_CONFIG_ {
UINT8 BulkInEpAddr; // bulk-in endpoint address
UINT8 BulkOutEpAddr[6]; // bulk-out endpoint address
UINT8 BulkInEpAddr; /* bulk-in endpoint address */
UINT8 BulkOutEpAddr[6]; /* bulk-out endpoint address */
} INF_USB_CONFIG;
typedef struct _INF_RBUS_CONFIG_ {
......@@ -72,4 +72,4 @@ typedef union _RTMP_INF_CONFIG_ {
struct _INF_RBUS_CONFIG_ rbusConfig;
} RTMP_INF_CONFIG;
#endif // __RTMP_IFACE_H__ //
#endif /* __RTMP_IFACE_H__ // */
drivers/staging/rt2860/rtmp_mcu.h
View file @ cc277069
......@@ -46,4 +46,4 @@ INT RtmpAsicSendCommandToMcu(IN PRTMP_ADAPTER pAd,
IN UCHAR Command,
IN UCHAR Token, IN UCHAR Arg0, IN UCHAR Arg1);
#endif // __RTMP_MCU_H__ //
#endif /* __RTMP_MCU_H__ // */
drivers/staging/rt2860/rtmp_os.h
View file @ cc277069
......@@ -39,7 +39,7 @@
#ifdef LINUX
#include "rt_linux.h"
#endif // LINUX //
#endif /* LINUX // */
/*
This data structure mainly strip some callback function defined in
......@@ -69,7 +69,7 @@ typedef enum _RTMP_TASK_STATUS_ {
typedef struct _RTMP_OS_TASK_ {
char taskName[RTMP_OS_TASK_NAME_LEN];
void *priv;
//unsigned long taskFlags;
/*unsigned long taskFlags; */
RTMP_TASK_STATUS taskStatus;
#ifndef KTHREAD_SUPPORT
RTMP_OS_SEM taskSema;
......@@ -87,4 +87,4 @@ typedef struct _RTMP_OS_TASK_ {
int RtmpOSIRQRequest(IN PNET_DEV pNetDev);
int RtmpOSIRQRelease(IN PNET_DEV pNetDev);
#endif // __RMTP_OS_H__ //
#endif /* __RMTP_OS_H__ // */
drivers/staging/rt2860/rtmp_timer.h
View file @ cc277069
......@@ -50,29 +50,29 @@
rtmp_timer_##_func
/* ----------------- Timer Related MARCO ---------------*/
// In some os or chipset, we have a lot of timer functions and will read/write register,
// it's not allowed in Linux USB sub-system to do it ( because of sleep issue when
// submit to ctrl pipe). So we need a wrapper function to take care it.
/* In some os or chipset, we have a lot of timer functions and will read/write register, */
/* it's not allowed in Linux USB sub-system to do it ( because of sleep issue when */
/* submit to ctrl pipe). So we need a wrapper function to take care it. */
#ifdef RTMP_TIMER_TASK_SUPPORT
typedef VOID(*RTMP_TIMER_TASK_HANDLE) (IN PVOID SystemSpecific1,
IN PVOID FunctionContext,
IN PVOID SystemSpecific2,
IN PVOID SystemSpecific3);
#endif // RTMP_TIMER_TASK_SUPPORT //
#endif /* RTMP_TIMER_TASK_SUPPORT // */
typedef struct _RALINK_TIMER_STRUCT {
RTMP_OS_TIMER TimerObj; // Ndis Timer object
BOOLEAN Valid; // Set to True when call RTMPInitTimer
BOOLEAN State; // True if timer cancelled
BOOLEAN PeriodicType; // True if timer is periodic timer
BOOLEAN Repeat; // True if periodic timer
ULONG TimerValue; // Timer value in milliseconds
ULONG cookie; // os specific object
RTMP_OS_TIMER TimerObj; /* Ndis Timer object */
BOOLEAN Valid; /* Set to True when call RTMPInitTimer */
BOOLEAN State; /* True if timer cancelled */
BOOLEAN PeriodicType; /* True if timer is periodic timer */
BOOLEAN Repeat; /* True if periodic timer */
ULONG TimerValue; /* Timer value in milliseconds */
ULONG cookie; /* os specific object */
#ifdef RTMP_TIMER_TASK_SUPPORT
RTMP_TIMER_TASK_HANDLE handle;
void *pAd;
#endif // RTMP_TIMER_TASK_SUPPORT //
#endif /* RTMP_TIMER_TASK_SUPPORT // */
} RALINK_TIMER_STRUCT, *PRALINK_TIMER_STRUCT;
#ifdef RTMP_TIMER_TASK_SUPPORT
......@@ -113,7 +113,7 @@ void rtmp_timer_##_func(unsigned long data) \
if (pTimer->Repeat) \
RTMP_OS_Add_Timer(&pTimer->TimerObj, pTimer->TimerValue); \
}
#endif // RTMP_TIMER_TASK_SUPPORT //
#endif /* RTMP_TIMER_TASK_SUPPORT // */
DECLARE_TIMER_FUNCTION(MlmePeriodicExec);
DECLARE_TIMER_FUNCTION(MlmeRssiReportExec);
......@@ -122,7 +122,7 @@ DECLARE_TIMER_FUNCTION(APSDPeriodicExec);
DECLARE_TIMER_FUNCTION(AsicRfTuningExec);
#ifdef RTMP_MAC_USB
DECLARE_TIMER_FUNCTION(BeaconUpdateExec);
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
DECLARE_TIMER_FUNCTION(BeaconTimeout);
DECLARE_TIMER_FUNCTION(ScanTimeout);
......@@ -138,10 +138,10 @@ DECLARE_TIMER_FUNCTION(RadioOnExec);
#ifdef RTMP_MAC_USB
DECLARE_TIMER_FUNCTION(RtmpUsbStaAsicForceWakeupTimeout);
#endif // RTMP_MAC_USB //
#endif /* RTMP_MAC_USB // */
#if defined(AP_LED) || defined(STA_LED)
DECLARE_TIMER_FUNCTION(LedCtrlMain);
#endif
#endif // __RTMP_TIMER_H__ //
#endif /* __RTMP_TIMER_H__ // */
drivers/staging/rt2860/rtmp_type.h
View file @ cc277069
......@@ -41,15 +41,15 @@
#define PACKED __attribute__ ((packed))
#ifdef LINUX
// Put platform dependent declaration here
// For example, linux type definition
/* Put platform dependent declaration here */
/* For example, linux type definition */
typedef unsigned char UINT8;
typedef unsigned short UINT16;
typedef unsigned int UINT32;
typedef unsigned long long UINT64;
typedef int INT32;
typedef long long INT64;
#endif // LINUX //
#endif /* LINUX // */
typedef unsigned char *PUINT8;
typedef unsigned short *PUINT16;
......@@ -58,7 +58,7 @@ typedef unsigned long long *PUINT64;
typedef int *PINT32;
typedef long long *PINT64;
// modified for fixing compile warning on Sigma 8634 platform
/* modified for fixing compile warning on Sigma 8634 platform */
typedef char STRING;
typedef signed char CHAR;
......@@ -72,13 +72,13 @@ typedef unsigned char UCHAR;
typedef unsigned short USHORT;
typedef unsigned int UINT;
typedef unsigned long ULONG;
#endif // LINUX //
#endif /* LINUX // */
typedef unsigned long long ULONGLONG;
typedef unsigned char BOOLEAN;
#ifdef LINUX
typedef void VOID;
#endif // LINUX //
#endif /* LINUX // */
typedef char *PSTRING;
typedef VOID *PVOID;
......@@ -99,9 +99,9 @@ typedef union _LARGE_INTEGER {
INT64 QuadPart;
} LARGE_INTEGER;
//
// Register set pair for initialzation register set definition
//
/* */
/* Register set pair for initialzation register set definition */
/* */
typedef struct _RTMP_REG_PAIR {
ULONG Register;
ULONG Value;
......@@ -112,9 +112,9 @@ typedef struct _REG_PAIR {
UCHAR Value;
} REG_PAIR, *PREG_PAIR;
//
// Register set pair for initialzation register set definition
//
/* */
/* Register set pair for initialzation register set definition */
/* */
typedef struct _RTMP_RF_REGS {
UCHAR Channel;
ULONG R1;
......@@ -135,4 +135,4 @@ typedef int NTSTATUS;
#define STATUS_SUCCESS 0x00
#define STATUS_UNSUCCESSFUL 0x01
#endif // __RTMP_TYPE_H__ //
#endif /* __RTMP_TYPE_H__ // */
drivers/staging/rt2860/rtusb_io.h
View file @ cc277069
......@@ -30,54 +30,54 @@
#include "rtmp_type.h"
// New for MeetingHouse Api support
#define CMDTHREAD_VENDOR_RESET 0x0D730101 // cmd
#define CMDTHREAD_VENDOR_UNPLUG 0x0D730102 // cmd
#define CMDTHREAD_VENDOR_SWITCH_FUNCTION 0x0D730103 // cmd
#define CMDTHREAD_MULTI_WRITE_MAC 0x0D730107 // cmd
#define CMDTHREAD_MULTI_READ_MAC 0x0D730108 // cmd
#define CMDTHREAD_VENDOR_EEPROM_WRITE 0x0D73010A // cmd
#define CMDTHREAD_VENDOR_EEPROM_READ 0x0D73010B // cmd
#define CMDTHREAD_VENDOR_ENTER_TESTMODE 0x0D73010C // cmd
#define CMDTHREAD_VENDOR_EXIT_TESTMODE 0x0D73010D // cmd
#define CMDTHREAD_VENDOR_WRITE_BBP 0x0D730119 // cmd
#define CMDTHREAD_VENDOR_READ_BBP 0x0D730118 // cmd
#define CMDTHREAD_VENDOR_WRITE_RF 0x0D73011A // cmd
#define CMDTHREAD_VENDOR_FLIP_IQ 0x0D73011D // cmd
#define CMDTHREAD_RESET_BULK_OUT 0x0D730210 // cmd
#define CMDTHREAD_RESET_BULK_IN 0x0D730211 // cmd
#define CMDTHREAD_SET_PSM_BIT 0x0D730212 // cmd
#define CMDTHREAD_SET_RADIO 0x0D730214 // cmd
#define CMDTHREAD_UPDATE_TX_RATE 0x0D730216 // cmd
#define CMDTHREAD_802_11_ADD_KEY_WEP 0x0D730218 // cmd
#define CMDTHREAD_RESET_FROM_ERROR 0x0D73021A // cmd
#define CMDTHREAD_LINK_DOWN 0x0D73021B // cmd
#define CMDTHREAD_RESET_FROM_NDIS 0x0D73021C // cmd
#define CMDTHREAD_CHECK_GPIO 0x0D730215 // cmd
#define CMDTHREAD_FORCE_WAKE_UP 0x0D730222 // cmd
#define CMDTHREAD_SET_BW 0x0D730225 // cmd
#define CMDTHREAD_SET_ASIC_WCID 0x0D730226 // cmd
#define CMDTHREAD_SET_ASIC_WCID_CIPHER 0x0D730227 // cmd
#define CMDTHREAD_QKERIODIC_EXECUT 0x0D73023D // cmd
#define RT_CMD_SET_KEY_TABLE 0x0D730228 // cmd
#define RT_CMD_SET_RX_WCID_TABLE 0x0D730229 // cmd
#define CMDTHREAD_SET_CLIENT_MAC_ENTRY 0x0D73023E // cmd
#define CMDTHREAD_SET_GROUP_KEY 0x0D73023F // cmd
#define CMDTHREAD_SET_PAIRWISE_KEY 0x0D730240 // cmd
#define CMDTHREAD_802_11_QUERY_HARDWARE_REGISTER 0x0D710105 // cmd
#define CMDTHREAD_802_11_SET_PHY_MODE 0x0D79010C // cmd
#define CMDTHREAD_802_11_SET_STA_CONFIG 0x0D790111 // cmd
#define CMDTHREAD_802_11_SET_PREAMBLE 0x0D790101 // cmd
#define CMDTHREAD_802_11_COUNTER_MEASURE 0x0D790102 // cmd
// add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 // cmd
// end johnli
//CMDTHREAD_MULTI_READ_MAC
//CMDTHREAD_MULTI_WRITE_MAC
//CMDTHREAD_VENDOR_EEPROM_READ
//CMDTHREAD_VENDOR_EEPROM_WRITE
/* New for MeetingHouse Api support */
#define CMDTHREAD_VENDOR_RESET 0x0D730101 /* cmd */
#define CMDTHREAD_VENDOR_UNPLUG 0x0D730102 /* cmd */
#define CMDTHREAD_VENDOR_SWITCH_FUNCTION 0x0D730103 /* cmd */
#define CMDTHREAD_MULTI_WRITE_MAC 0x0D730107 /* cmd */
#define CMDTHREAD_MULTI_READ_MAC 0x0D730108 /* cmd */
#define CMDTHREAD_VENDOR_EEPROM_WRITE 0x0D73010A /* cmd */
#define CMDTHREAD_VENDOR_EEPROM_READ 0x0D73010B /* cmd */
#define CMDTHREAD_VENDOR_ENTER_TESTMODE 0x0D73010C /* cmd */
#define CMDTHREAD_VENDOR_EXIT_TESTMODE 0x0D73010D /* cmd */
#define CMDTHREAD_VENDOR_WRITE_BBP 0x0D730119 /* cmd */
#define CMDTHREAD_VENDOR_READ_BBP 0x0D730118 /* cmd */
#define CMDTHREAD_VENDOR_WRITE_RF 0x0D73011A /* cmd */
#define CMDTHREAD_VENDOR_FLIP_IQ 0x0D73011D /* cmd */
#define CMDTHREAD_RESET_BULK_OUT 0x0D730210 /* cmd */
#define CMDTHREAD_RESET_BULK_IN 0x0D730211 /* cmd */
#define CMDTHREAD_SET_PSM_BIT 0x0D730212 /* cmd */
#define CMDTHREAD_SET_RADIO 0x0D730214 /* cmd */
#define CMDTHREAD_UPDATE_TX_RATE 0x0D730216 /* cmd */
#define CMDTHREAD_802_11_ADD_KEY_WEP 0x0D730218 /* cmd */
#define CMDTHREAD_RESET_FROM_ERROR 0x0D73021A /* cmd */
#define CMDTHREAD_LINK_DOWN 0x0D73021B /* cmd */
#define CMDTHREAD_RESET_FROM_NDIS 0x0D73021C /* cmd */
#define CMDTHREAD_CHECK_GPIO 0x0D730215 /* cmd */
#define CMDTHREAD_FORCE_WAKE_UP 0x0D730222 /* cmd */
#define CMDTHREAD_SET_BW 0x0D730225 /* cmd */
#define CMDTHREAD_SET_ASIC_WCID 0x0D730226 /* cmd */
#define CMDTHREAD_SET_ASIC_WCID_CIPHER 0x0D730227 /* cmd */
#define CMDTHREAD_QKERIODIC_EXECUT 0x0D73023D /* cmd */
#define RT_CMD_SET_KEY_TABLE 0x0D730228 /* cmd */
#define RT_CMD_SET_RX_WCID_TABLE 0x0D730229 /* cmd */
#define CMDTHREAD_SET_CLIENT_MAC_ENTRY 0x0D73023E /* cmd */
#define CMDTHREAD_SET_GROUP_KEY 0x0D73023F /* cmd */
#define CMDTHREAD_SET_PAIRWISE_KEY 0x0D730240 /* cmd */
#define CMDTHREAD_802_11_QUERY_HARDWARE_REGISTER 0x0D710105 /* cmd */
#define CMDTHREAD_802_11_SET_PHY_MODE 0x0D79010C /* cmd */
#define CMDTHREAD_802_11_SET_STA_CONFIG 0x0D790111 /* cmd */
#define CMDTHREAD_802_11_SET_PREAMBLE 0x0D790101 /* cmd */
#define CMDTHREAD_802_11_COUNTER_MEASURE 0x0D790102 /* cmd */
/* add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet */
#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 /* cmd */
/* end johnli */
/*CMDTHREAD_MULTI_READ_MAC */
/*CMDTHREAD_MULTI_WRITE_MAC */
/*CMDTHREAD_VENDOR_EEPROM_READ */
/*CMDTHREAD_VENDOR_EEPROM_WRITE */
typedef struct _CMDHandler_TLV {
USHORT Offset;
USHORT Length;
......@@ -116,7 +116,7 @@ typedef struct _CmdQ {
USB Cmd to ASIC Related MACRO
******************************************************************************/
// reset MAC of a station entry to 0xFFFFFFFFFFFF
/* reset MAC of a station entry to 0xFFFFFFFFFFFF */
#define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \
{ RT_SET_ASIC_WCID SetAsicWcid; \
SetAsicWcid.WCID = Wcid; \
......@@ -125,22 +125,22 @@ typedef struct _CmdQ {
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_ASIC_WCID, \
&SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); }
// add this entry into ASIC RX WCID search table
/* add this entry into ASIC RX WCID search table */
#define RTMP_STA_ENTRY_ADD(pAd, pEntry) \
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_CLIENT_MAC_ENTRY, \
pEntry, sizeof(MAC_TABLE_ENTRY));
// add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
// Set MAC register value according operation mode
/* add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet */
/* Set MAC register value according operation mode */
#define RTMP_UPDATE_PROTECT(pAd) \
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_UPDATE_PROTECT, NULL, 0);
// end johnli
/* end johnli */
// remove Pair-wise key material from ASIC
// yet implement
/* remove Pair-wise key material from ASIC */
/* yet implement */
#define RTMP_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid)
// add Client security information into ASIC WCID table and IVEIV table
/* add Client security information into ASIC WCID table and IVEIV table */
#define RTMP_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry) \
{ RTMP_STA_ENTRY_MAC_RESET(pAd, pEntry->Aid); \
if (pEntry->Aid >= 1) { \
......@@ -160,7 +160,7 @@ typedef struct _CmdQ {
RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_ASIC_WCID_CIPHER, \
&SetAsicWcidAttri, sizeof(RT_SET_ASIC_WCID_ATTRI)); } }
// Insert the BA bitmap to ASIC for the Wcid entry
/* Insert the BA bitmap to ASIC for the Wcid entry */
#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
do{ \
RT_SET_ASIC_WCID SetAsicWcid; \
......@@ -170,7 +170,7 @@ typedef struct _CmdQ {
RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \
}while(0)
// Remove the BA bitmap from ASIC for the Wcid entry
/* Remove the BA bitmap from ASIC for the Wcid entry */
#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
do{ \
RT_SET_ASIC_WCID SetAsicWcid; \
......@@ -180,4 +180,4 @@ typedef struct _CmdQ {
RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \
}while(0)
#endif // __RTUSB_IO_H__ //
#endif /* __RTUSB_IO_H__ // */
drivers/staging/rt2860/spectrum.h
View file @ cc277069
......@@ -186,4 +186,4 @@ VOID NotifyChSwAnnToPeerAPs(IN PRTMP_ADAPTER pAd,
VOID RguClass_BuildBcnChList(IN PRTMP_ADAPTER pAd,
OUT PUCHAR pBuf, OUT PULONG pBufLen);
#endif // __SPECTRUM_H__ //
#endif /* __SPECTRUM_H__ // */
drivers/staging/rt2860/spectrum_def.h
View file @ cc277069
......@@ -58,7 +58,7 @@ typedef struct _MEASURE_REQ_ENTRY {
ULONG lastTime;
BOOLEAN Valid;
UINT8 DialogToken;
UINT8 MeasureDialogToken[3]; // 0:basic measure, 1: CCA measure, 2: RPI_Histogram measure.
UINT8 MeasureDialogToken[3]; /* 0:basic measure, 1: CCA measure, 2: RPI_Histogram measure. */
} MEASURE_REQ_ENTRY, *PMEASURE_REQ_ENTRY;
typedef struct _MEASURE_REQ_TAB {
......@@ -195,4 +195,4 @@ typedef struct PACKED _QUIET_INFO {
UINT16 QuietOffset;
} QUIET_INFO, *PQUIET_INFO;
#endif // __SPECTRUM_DEF_H__ //
#endif /* __SPECTRUM_DEF_H__ // */
drivers/staging/rt2860/wpa.h
View file @ cc277069
......@@ -38,7 +38,7 @@
#ifndef __WPA_H__
#define __WPA_H__
// EAPOL Key descripter frame format related length
/* EAPOL Key descripter frame format related length */
#define LEN_KEY_DESC_NONCE 32
#define LEN_KEY_DESC_IV 16
#define LEN_KEY_DESC_RSC 8
......@@ -46,25 +46,25 @@
#define LEN_KEY_DESC_REPLAY 8
#define LEN_KEY_DESC_MIC 16
// The length is the EAPoL-Key frame except key data field.
// Please refer to 802.11i-2004 ,Figure 43u in p.78
/* The length is the EAPoL-Key frame except key data field. */
/* Please refer to 802.11i-2004 ,Figure 43u in p.78 */
#define LEN_EAPOL_KEY_MSG (sizeof(KEY_DESCRIPTER) - MAX_LEN_OF_RSNIE)
// EAP Code Type.
/* EAP Code Type. */
#define EAP_CODE_REQUEST 1
#define EAP_CODE_RESPONSE 2
#define EAP_CODE_SUCCESS 3
#define EAP_CODE_FAILURE 4
// EAPOL frame Protocol Version
/* EAPOL frame Protocol Version */
#define EAPOL_VER 1
#define EAPOL_VER2 2
// EAPOL-KEY Descriptor Type
/* EAPOL-KEY Descriptor Type */
#define WPA1_KEY_DESC 0xfe
#define WPA2_KEY_DESC 0x02
// Key Descriptor Version of Key Information
/* Key Descriptor Version of Key Information */
#define DESC_TYPE_TKIP 1
#define DESC_TYPE_AES 2
......@@ -73,11 +73,11 @@
#define LEN_MASTER_KEY 32
// EAPOL EK, MK
/* EAPOL EK, MK */
#define LEN_EAP_EK 16
#define LEN_EAP_MICK 16
#define LEN_EAP_KEY ((LEN_EAP_EK)+(LEN_EAP_MICK))
// TKIP key related
/* TKIP key related */
#define LEN_PMKID 16
#define LEN_TKIP_EK 16
#define LEN_TKIP_RXMICK 8
......@@ -94,13 +94,13 @@
#define LEN_PMK_NAME 16
#define LEN_NONCE 32
// RSN IE Length definition
/* RSN IE Length definition */
#define MAX_LEN_OF_RSNIE 255
#define MIN_LEN_OF_RSNIE 8
#define KEY_LIFETIME 3600
//EAP Packet Type
/*EAP Packet Type */
#define EAPPacket 0
#define EAPOLStart 1
#define EAPOLLogoff 2
......@@ -119,28 +119,28 @@
#define PAIRWISEKEY 1
#define GROUPKEY 0
// Retry timer counter initial value
/* Retry timer counter initial value */
#define PEER_MSG1_RETRY_TIMER_CTR 0
#define PEER_MSG3_RETRY_TIMER_CTR 10
#define GROUP_MSG1_RETRY_TIMER_CTR 20
//#ifdef CONFIG_AP_SUPPORT
// WPA mechanism retry timer interval
#define PEER_MSG1_RETRY_EXEC_INTV 1000 // 1 sec
#define PEER_MSG3_RETRY_EXEC_INTV 3000 // 3 sec
#define GROUP_KEY_UPDATE_EXEC_INTV 1000 // 1 sec
#define PEER_GROUP_KEY_UPDATE_INIV 2000 // 2 sec
/*#ifdef CONFIG_AP_SUPPORT */
/* WPA mechanism retry timer interval */
#define PEER_MSG1_RETRY_EXEC_INTV 1000 /* 1 sec */
#define PEER_MSG3_RETRY_EXEC_INTV 3000 /* 3 sec */
#define GROUP_KEY_UPDATE_EXEC_INTV 1000 /* 1 sec */
#define PEER_GROUP_KEY_UPDATE_INIV 2000 /* 2 sec */
#define ENQUEUE_EAPOL_START_TIMER 200 // 200 ms
#define ENQUEUE_EAPOL_START_TIMER 200 /* 200 ms */
// group rekey interval
/* group rekey interval */
#define TIME_REKEY 0
#define PKT_REKEY 1
#define DISABLE_REKEY 2
#define MAX_REKEY 2
#define MAX_REKEY_INTER 0x3ffffff
//#endif // CONFIG_AP_SUPPORT //
/*#endif // CONFIG_AP_SUPPORT // */
#define GROUP_SUITE 0
#define PAIRWISE_SUITE 1
......@@ -194,13 +194,13 @@
#define IS_WPA_CAPABILITY(a) (((a) >= Ndis802_11AuthModeWPA) && ((a) <= Ndis802_11AuthModeWPA1PSKWPA2PSK))
// EAPOL Key Information definition within Key descriptor format
/* EAPOL Key Information definition within Key descriptor format */
typedef struct PACKED _KEY_INFO {
UCHAR KeyMic:1;
UCHAR Secure:1;
UCHAR Error:1;
UCHAR Request:1;
UCHAR EKD_DL:1; // EKD for AP; DL for STA
UCHAR EKD_DL:1; /* EKD for AP; DL for STA */
UCHAR Rsvd:3;
UCHAR KeyDescVer:3;
UCHAR KeyType:1;
......@@ -209,7 +209,7 @@ typedef struct PACKED _KEY_INFO {
UCHAR KeyAck:1;
} KEY_INFO, *PKEY_INFO;
// EAPOL Key descriptor format
/* EAPOL Key descriptor format */
typedef struct PACKED _KEY_DESCRIPTER {
UCHAR Type;
KEY_INFO KeyInfo;
......@@ -231,7 +231,7 @@ typedef struct PACKED _EAPOL_PACKET {
KEY_DESCRIPTER KeyDesc;
} EAPOL_PACKET, *PEAPOL_PACKET;
//802.11i D10 page 83
/*802.11i D10 page 83 */
typedef struct PACKED _GTK_ENCAP {
UCHAR Kid:2;
UCHAR tx:1;
......@@ -248,7 +248,7 @@ typedef struct PACKED _KDE_ENCAP {
GTK_ENCAP GTKEncap;
} KDE_ENCAP, *PKDE_ENCAP;
// For WPA1
/* For WPA1 */
typedef struct PACKED _RSNIE {
UCHAR oui[4];
USHORT version;
......@@ -259,7 +259,7 @@ typedef struct PACKED _RSNIE {
} ucast[1];
} RSNIE, *PRSNIE;
// For WPA2
/* For WPA2 */
typedef struct PACKED _RSNIE2 {
USHORT version;
UCHAR mcast[4];
......@@ -269,7 +269,7 @@ typedef struct PACKED _RSNIE2 {
} ucast[1];
} RSNIE2, *PRSNIE2;
// AKM Suite
/* AKM Suite */
typedef struct PACKED _RSNIE_AUTH {
USHORT acount;
struct PACKED {
......@@ -294,45 +294,45 @@ typedef struct PACKED _EAP_HDR {
UCHAR Body_Len[2];
UCHAR code;
UCHAR identifier;
UCHAR length[2]; // including code and identifier, followed by length-2 octets of data
UCHAR length[2]; /* including code and identifier, followed by length-2 octets of data */
} EAP_HDR, *PEAP_HDR;
// For supplicant state machine states. 802.11i Draft 4.1, p. 97
// We simplified it
/* For supplicant state machine states. 802.11i Draft 4.1, p. 97 */
/* We simplified it */
typedef enum _WpaState {
SS_NOTUSE, // 0
SS_START, // 1
SS_WAIT_MSG_3, // 2
SS_WAIT_GROUP, // 3
SS_FINISH, // 4
SS_KEYUPDATE, // 5
SS_NOTUSE, /* 0 */
SS_START, /* 1 */
SS_WAIT_MSG_3, /* 2 */
SS_WAIT_GROUP, /* 3 */
SS_FINISH, /* 4 */
SS_KEYUPDATE, /* 5 */
} WPA_STATE;
//
// The definition of the cipher combination
//
// bit3 bit2 bit1 bit0
// +------------+------------+
// | WPA | WPA2 |
// +------+-----+------+-----+
// | TKIP | AES | TKIP | AES |
// | 0 | 1 | 1 | 0 | -> 0x06
// | 0 | 1 | 1 | 1 | -> 0x07
// | 1 | 0 | 0 | 1 | -> 0x09
// | 1 | 0 | 1 | 1 | -> 0x0B
// | 1 | 1 | 0 | 1 | -> 0x0D
// | 1 | 1 | 1 | 0 | -> 0x0E
// | 1 | 1 | 1 | 1 | -> 0x0F
// +------+-----+------+-----+
//
/* */
/* The definition of the cipher combination */
/* */
/* bit3 bit2 bit1 bit0 */
/* +------------+------------+ */
/* | WPA | WPA2 | */
/* +------+-----+------+-----+ */
/* | TKIP | AES | TKIP | AES | */
/* | 0 | 1 | 1 | 0 | -> 0x06 */
/* | 0 | 1 | 1 | 1 | -> 0x07 */
/* | 1 | 0 | 0 | 1 | -> 0x09 */
/* | 1 | 0 | 1 | 1 | -> 0x0B */
/* | 1 | 1 | 0 | 1 | -> 0x0D */
/* | 1 | 1 | 1 | 0 | -> 0x0E */
/* | 1 | 1 | 1 | 1 | -> 0x0F */
/* +------+-----+------+-----+ */
/* */
typedef enum _WpaMixPairCipher {
MIX_CIPHER_NOTUSE = 0x00,
WPA_NONE_WPA2_TKIPAES = 0x03, // WPA2-TKIPAES
WPA_NONE_WPA2_TKIPAES = 0x03, /* WPA2-TKIPAES */
WPA_AES_WPA2_TKIP = 0x06,
WPA_AES_WPA2_TKIPAES = 0x07,
WPA_TKIP_WPA2_AES = 0x09,
WPA_TKIP_WPA2_TKIPAES = 0x0B,
WPA_TKIPAES_WPA2_NONE = 0x0C, // WPA-TKIPAES
WPA_TKIPAES_WPA2_NONE = 0x0C, /* WPA-TKIPAES */
WPA_TKIPAES_WPA2_AES = 0x0D,
WPA_TKIPAES_WPA2_TKIP = 0x0E,
WPA_TKIPAES_WPA2_TKIPAES = 0x0F,
......@@ -341,22 +341,22 @@ typedef enum _WpaMixPairCipher {
typedef struct PACKED _RSN_IE_HEADER_STRUCT {
UCHAR Eid;
UCHAR Length;
USHORT Version; // Little endian format
USHORT Version; /* Little endian format */
} RSN_IE_HEADER_STRUCT, *PRSN_IE_HEADER_STRUCT;
// Cipher suite selector types
/* Cipher suite selector types */
typedef struct PACKED _CIPHER_SUITE_STRUCT {
UCHAR Oui[3];
UCHAR Type;
} CIPHER_SUITE_STRUCT, *PCIPHER_SUITE_STRUCT;
// Authentication and Key Management suite selector
/* Authentication and Key Management suite selector */
typedef struct PACKED _AKM_SUITE_STRUCT {
UCHAR Oui[3];
UCHAR Type;
} AKM_SUITE_STRUCT, *PAKM_SUITE_STRUCT;
// RSN capability
/* RSN capability */
typedef struct PACKED _RSN_CAPABILITY {
USHORT Rsv:10;
USHORT GTKSAReplayCnt:2;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7