drm/nouveau/fuse: cosmetic changes

This is purely preparation for upcoming commits, there should be no
code changes here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/subdev/fuse.h

@@ -4,7 +4,7 @@
 #include <core/device.h>
 
 struct nvkm_fuse {
-	struct nvkm_subdev base;
+	struct nvkm_subdev subdev;
 };
 
 static inline struct nvkm_fuse *

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/base.c

@@ -27,25 +27,20 @@ int
 _nvkm_fuse_init(struct nvkm_object *object)
 {
 	struct nvkm_fuse *fuse = (void *)object;
-	return nvkm_subdev_init(&fuse->base);
+	return nvkm_subdev_init(&fuse->subdev);
 }
 
 void
 _nvkm_fuse_dtor(struct nvkm_object *object)
 {
 	struct nvkm_fuse *fuse = (void *)object;
-	nvkm_subdev_destroy(&fuse->base);
+	nvkm_subdev_destroy(&fuse->subdev);
 }
 
 int
 nvkm_fuse_create_(struct nvkm_object *parent, struct nvkm_object *engine,
 		  struct nvkm_oclass *oclass, int length, void **pobject)
 {
-	struct nvkm_fuse *fuse;
-	int ret;
-
-	ret = nvkm_subdev_create_(parent, engine, oclass, 0, "FUSE",
+	return nvkm_subdev_create_(parent, engine, oclass, 0, "FUSE",
 				   "fuse", length, pobject);
-	fuse = *pobject;
-	return ret;
 }

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c

@@ -23,7 +23,7 @@
  */
 #include "priv.h"
 
-struct gf100_fuse_priv {
+struct gf100_fuse {
 	struct nvkm_fuse base;
 
 	spinlock_t fuse_enable_lock;
@@ -32,18 +32,18 @@ struct gf100_fuse_priv {
 static u32
 gf100_fuse_rd32(struct nvkm_object *object, u64 addr)
 {
-	struct gf100_fuse_priv *priv = (void *)object;
+	struct gf100_fuse *fuse = (void *)object;
 	unsigned long flags;
 	u32 fuse_enable, unk, val;
 
 	/* racy if another part of nvkm start writing to these regs */
-	spin_lock_irqsave(&priv->fuse_enable_lock, flags);
-	fuse_enable = nv_mask(priv, 0x22400, 0x800, 0x800);
-	unk = nv_mask(priv, 0x21000, 0x1, 0x1);
-	val = nv_rd32(priv, 0x21100 + addr);
-	nv_wr32(priv, 0x21000, unk);
-	nv_wr32(priv, 0x22400, fuse_enable);
-	spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
+	spin_lock_irqsave(&fuse->fuse_enable_lock, flags);
+	fuse_enable = nv_mask(fuse, 0x22400, 0x800, 0x800);
+	unk = nv_mask(fuse, 0x21000, 0x1, 0x1);
+	val = nv_rd32(fuse, 0x21100 + addr);
+	nv_wr32(fuse, 0x21000, unk);
+	nv_wr32(fuse, 0x22400, fuse_enable);
+	spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags);
 	return val;
 }
 
@@ -53,15 +53,15 @@ gf100_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 		struct nvkm_oclass *oclass, void *data, u32 size,
 		struct nvkm_object **pobject)
 {
-	struct gf100_fuse_priv *priv;
+	struct gf100_fuse *fuse;
 	int ret;
 
-	ret = nvkm_fuse_create(parent, engine, oclass, &priv);
-	*pobject = nv_object(priv);
+	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
+	*pobject = nv_object(fuse);
 	if (ret)
 		return ret;
 
-	spin_lock_init(&priv->fuse_enable_lock);
+	spin_lock_init(&fuse->fuse_enable_lock);
 	return 0;
 }
 

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c

@@ -23,15 +23,11 @@
  */
 #include "priv.h"
 
-struct gm107_fuse_priv {
-	struct nvkm_fuse base;
-};
-
 static u32
 gm107_fuse_rd32(struct nvkm_object *object, u64 addr)
 {
-	struct gf100_fuse_priv *priv = (void *)object;
-	return nv_rd32(priv, 0x21100 + addr);
+	struct nvkm_fuse *fuse = (void *)object;
+	return nv_rd32(fuse, 0x21100 + addr);
 }
 
 
@@ -40,11 +36,11 @@ gm107_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 		struct nvkm_oclass *oclass, void *data, u32 size,
 		struct nvkm_object **pobject)
 {
-	struct gm107_fuse_priv *priv;
+	struct nvkm_fuse *fuse;
 	int ret;
 
-	ret = nvkm_fuse_create(parent, engine, oclass, &priv);
-	*pobject = nv_object(priv);
+	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
+	*pobject = nv_object(fuse);
 
 	return ret;
 }

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c

@@ -23,7 +23,7 @@
  */
 #include "priv.h"
 
-struct nv50_fuse_priv {
+struct nv50_fuse {
 	struct nvkm_fuse base;
 
 	spinlock_t fuse_enable_lock;
@@ -32,16 +32,16 @@ struct nv50_fuse_priv {
 static u32
 nv50_fuse_rd32(struct nvkm_object *object, u64 addr)
 {
-	struct nv50_fuse_priv *priv = (void *)object;
+	struct nv50_fuse *fuse = (void *)object;
 	unsigned long flags;
 	u32 fuse_enable, val;
 
 	/* racy if another part of nvkm start writing to this reg */
-	spin_lock_irqsave(&priv->fuse_enable_lock, flags);
-	fuse_enable = nv_mask(priv, 0x1084, 0x800, 0x800);
-	val = nv_rd32(priv, 0x21000 + addr);
-	nv_wr32(priv, 0x1084, fuse_enable);
-	spin_unlock_irqrestore(&priv->fuse_enable_lock, flags);
+	spin_lock_irqsave(&fuse->fuse_enable_lock, flags);
+	fuse_enable = nv_mask(fuse, 0x1084, 0x800, 0x800);
+	val = nv_rd32(fuse, 0x21000 + addr);
+	nv_wr32(fuse, 0x1084, fuse_enable);
+	spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags);
 	return val;
 }
 
@@ -51,15 +51,15 @@ nv50_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 	       struct nvkm_oclass *oclass, void *data, u32 size,
 	       struct nvkm_object **pobject)
 {
-	struct nv50_fuse_priv *priv;
+	struct nv50_fuse *fuse;
 	int ret;
 
-	ret = nvkm_fuse_create(parent, engine, oclass, &priv);
-	*pobject = nv_object(priv);
+	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
+	*pobject = nv_object(fuse);
 	if (ret)
 		return ret;
 
-	spin_lock_init(&priv->fuse_enable_lock);
+	spin_lock_init(&fuse->fuse_enable_lock);
 	return 0;
 }