Commit d0ce9946 authored by Clemens Ladisch's avatar Clemens Ladisch Committed by Jaroslav Kysela

[ALSA] add CMI8788 driver

Add the snd-oxygen driver for the C-Media CMI8788 (Oxygen) chip, used on
the Asound A-8788, AuzenTech X-Meridian, Bgears b-Enspirer,
Club3D Theatron DTS, HT-Omega Claro, Razer Barracuda AC-1,
Sondigo Inferno, and TempoTec HIFIER sound cards.
Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
Signed-off-by: default avatarJaroslav Kysela <perex@perex.cz>
parent a9b3aa8a
...@@ -183,6 +183,31 @@ config SND_CMIPCI ...@@ -183,6 +183,31 @@ config SND_CMIPCI
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
will be called snd-cmipci. will be called snd-cmipci.
config SND_OXYGEN_LIB
tristate
depends on SND
select SND_PCM
select SND_MPU401_UART
config SND_OXYGEN
tristate "C-Media 8788 (Oxygen)"
depends on SND
select SND_OXYGEN_LIB
help
Say Y here to include support for sound cards based on the
C-Media CMI8788 (Oxygen HD Audio) chip:
* Asound A-8788
* AuzenTech X-Meridian
* Bgears b-Enspirer
* Club3D Theatron DTS
* HT-Omega Claro
* Razer Barracuda AC-1
* Sondigo Inferno
* TempoTec HIFIER
To compile this driver as a module, choose M here: the module
will be called snd-oxygen.
config SND_CS4281 config SND_CS4281
tristate "Cirrus Logic (Sound Fusion) CS4281" tristate "Cirrus Logic (Sound Fusion) CS4281"
depends on SND depends on SND
......
...@@ -68,6 +68,7 @@ obj-$(CONFIG_SND) += \ ...@@ -68,6 +68,7 @@ obj-$(CONFIG_SND) += \
korg1212/ \ korg1212/ \
mixart/ \ mixart/ \
nm256/ \ nm256/ \
oxygen/ \
pcxhr/ \ pcxhr/ \
riptide/ \ riptide/ \
rme9652/ \ rme9652/ \
......
snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o
snd-oxygen-objs := oxygen.o
obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o
obj-$(CONFIG_SND_OXYGEN) += snd-oxygen.o
/*
* C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
*
* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
*
*
* This driver is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2.
*
* This driver is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this driver; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* SPI 0 -> 1st AK4396 (front)
* SPI 1 -> 2nd AK4396 (side)
* SPI 2 -> 3rd AK4396 (center/LFE)
* SPI 3 -> WM8785
* SPI 4 -> 4th AK4396 (rear)
*
* GPIO 0 -> DFS0 of AK5385
* GPIO 1 -> DFS1 of AK5385
*/
#include <sound/driver.h>
#include <linux/pci.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/tlv.h>
#include "oxygen.h"
MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
MODULE_DESCRIPTION("C-Media CMI8788 driver");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "card index");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "enable card");
static struct pci_device_id oxygen_ids[] __devinitdata = {
{ OXYGEN_PCI_SUBID(0x10b0, 0x0216) },
{ OXYGEN_PCI_SUBID(0x10b0, 0x0218) },
{ OXYGEN_PCI_SUBID(0x10b0, 0x0219) },
{ OXYGEN_PCI_SUBID(0x13f6, 0x0001) },
{ OXYGEN_PCI_SUBID(0x13f6, 0x0010) },
{ OXYGEN_PCI_SUBID(0x13f6, 0x8788) },
{ OXYGEN_PCI_SUBID(0x147a, 0xa017) },
{ OXYGEN_PCI_SUBID(0x14c3, 0x1710) },
{ OXYGEN_PCI_SUBID(0x14c3, 0x1711) },
{ OXYGEN_PCI_SUBID(0x1a58, 0x0910) },
{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 },
{ OXYGEN_PCI_SUBID(0x7284, 0x9761) },
{ }
};
MODULE_DEVICE_TABLE(pci, oxygen_ids);
#define AK4396_WRITE 0x2000
/* register 0 */
#define AK4396_RSTN 0x01
#define AK4396_DIF_24_MSB 0x04
/* register 1 */
#define AK4396_SMUTE 0x01
#define AK4396_DEM_OFF 0x02
#define AK4396_DFS_MASK 0x18
#define AK4396_DFS_NORMAL 0x00
#define AK4396_DFS_DOUBLE 0x08
#define AK4396_DFS_QUAD 0x10
/* register 0 */
#define WM8785_OSR_SINGLE 0x000
#define WM8785_OSR_DOUBLE 0x008
#define WM8785_OSR_QUAD 0x010
#define WM8785_FORMAT_LJUST 0x020
#define WM8785_FORMAT_I2S 0x040
/* register 1 */
#define WM8785_WL_16 0x000
#define WM8785_WL_20 0x001
#define WM8785_WL_24 0x002
#define WM8785_WL_32 0x003
static void ak4396_write(struct oxygen *chip, unsigned int codec,
u8 reg, u8 value)
{
/* maps ALSA channel pair number to SPI output */
static const u8 codec_spi_map[4] = {
0, 4, 2, 1
};
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER_WRITE |
OXYGEN_SPI_DATA_LENGTH_2 |
(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
OXYGEN_SPI_MAGIC,
AK4396_WRITE | (reg << 8) | value);
}
static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
{
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER_WRITE |
OXYGEN_SPI_DATA_LENGTH_2 |
(3 << OXYGEN_SPI_CODEC_SHIFT),
(reg << 9) | value);
}
static void ak4396_init(struct oxygen *chip)
{
unsigned int i;
chip->ak4396_reg1 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write(chip, i, 1, chip->ak4396_reg1);
ak4396_write(chip, i, 2, 0);
ak4396_write(chip, i, 3, 0xff);
ak4396_write(chip, i, 4, 0xff);
}
snd_component_add(chip->card, "AK4396");
}
static void ak5385_init(struct oxygen *chip)
{
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 0x0003);
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, 0x0003);
snd_component_add(chip->card, "AK5385");
}
static void wm8785_init(struct oxygen *chip)
{
wm8785_write(chip, 7, 0);
wm8785_write(chip, 0, WM8785_FORMAT_LJUST | WM8785_OSR_SINGLE);
wm8785_write(chip, 1, WM8785_WL_24);
snd_component_add(chip->card, "WM8785");
}
static void generic_init(struct oxygen *chip)
{
ak4396_init(chip);
wm8785_init(chip);
}
static void meridian_init(struct oxygen *chip)
{
ak4396_init(chip);
ak5385_init(chip);
}
static void generic_cleanup(struct oxygen *chip)
{
}
static void set_ak4396_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
unsigned int i;
u8 value;
value = chip->ak4396_reg1 & ~AK4396_DFS_MASK;
if (params_rate(params) <= 54000)
value |= AK4396_DFS_NORMAL;
else if (params_rate(params) < 120000)
value |= AK4396_DFS_DOUBLE;
else
value |= AK4396_DFS_QUAD;
chip->ak4396_reg1 = value;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i, 0, AK4396_DIF_24_MSB);
ak4396_write(chip, i, 1, value);
ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
}
}
static void update_ak4396_volume(struct oxygen *chip)
{
unsigned int i;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i, 3, chip->dac_volume[i * 2]);
ak4396_write(chip, i, 4, chip->dac_volume[i * 2 + 1]);
}
}
static void update_ak4396_mute(struct oxygen *chip)
{
unsigned int i;
u8 value;
value = chip->ak4396_reg1 & ~AK4396_SMUTE;
if (chip->dac_mute)
value |= AK4396_SMUTE;
for (i = 0; i < 4; ++i)
ak4396_write(chip, i, 1, value);
}
static void set_wm8785_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
unsigned int value;
wm8785_write(chip, 7, 0);
value = WM8785_FORMAT_LJUST;
if (params_rate(params) == 96000)
value |= WM8785_OSR_DOUBLE;
else if (params_rate(params) == 192000)
value |= WM8785_OSR_QUAD;
else
value |= WM8785_OSR_SINGLE;
wm8785_write(chip, 0, value);
if (snd_pcm_format_width(params_format(params)) <= 16)
value = WM8785_WL_16;
else
value = WM8785_WL_24;
wm8785_write(chip, 1, value);
}
static void set_ak5385_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
unsigned int value;
if (params_rate(params) <= 54000)
value = 0;
else if (params_rate(params) <= 108000)
value = 1;
else
value = 2;
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, value, 0x0003);
}
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
static const struct oxygen_model model_generic = {
.shortname = "C-Media CMI8788",
.longname = "C-Media Oxygen HD Audio",
.chip = "CMI8788",
.owner = THIS_MODULE,
.init = generic_init,
.cleanup = generic_cleanup,
.set_dac_params = set_ak4396_params,
.set_adc_params = set_wm8785_params,
.update_dac_volume = update_ak4396_volume,
.update_dac_mute = update_ak4396_mute,
.dac_tlv = ak4396_db_scale,
};
static const struct oxygen_model model_meridian = {
.shortname = "C-Media CMI8788",
.longname = "C-Media Oxygen HD Audio",
.chip = "CMI8788",
.owner = THIS_MODULE,
.init = meridian_init,
.cleanup = generic_cleanup,
.set_dac_params = set_ak4396_params,
.set_adc_params = set_ak5385_params,
.update_dac_volume = update_ak4396_volume,
.update_dac_mute = update_ak4396_mute,
.dac_tlv = ak4396_db_scale,
.record_from_dma_b = 1,
};
static int __devinit generic_oxygen_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
const struct oxygen_model *model;
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
++dev;
return -ENOENT;
}
model = pci_id->driver_data ? &model_meridian : &model_generic;
err = oxygen_pci_probe(pci, index[dev], id[dev], model);
if (err >= 0)
++dev;
return err;
}
static struct pci_driver oxygen_driver = {
.name = "CMI8788",
.id_table = oxygen_ids,
.probe = generic_oxygen_probe,
.remove = __devexit_p(oxygen_pci_remove),
};
static int __init alsa_card_oxygen_init(void)
{
return pci_register_driver(&oxygen_driver);
}
static void __exit alsa_card_oxygen_exit(void)
{
pci_unregister_driver(&oxygen_driver);
}
module_init(alsa_card_oxygen_init)
module_exit(alsa_card_oxygen_exit)
#ifndef OXYGEN_H_INCLUDED
#define OXYGEN_H_INCLUDED
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include "oxygen_regs.h"
/* 1 << PCM_x == OXYGEN_CHANNEL_x */
#define PCM_A 0
#define PCM_B 1
#define PCM_C 2
#define PCM_SPDIF 3
#define PCM_MULTICH 4
#define PCM_AC97 5
#define PCM_COUNT 6
#define OXYGEN_PCI_SUBID(sv, sd) \
.vendor = PCI_VENDOR_ID_CMEDIA, \
.device = 0x8788, \
.subvendor = sv, \
.subdevice = sd
struct pci_dev;
struct snd_card;
struct snd_pcm_substream;
struct snd_pcm_hw_params;
struct snd_rawmidi;
struct oxygen_model;
struct oxygen {
unsigned long addr;
spinlock_t reg_lock;
struct mutex mutex;
struct snd_card *card;
struct pci_dev *pci;
struct snd_rawmidi *midi;
int irq;
const struct oxygen_model *model;
unsigned int interrupt_mask;
u8 dac_volume[8];
u8 dac_mute;
u8 pcm_active;
u8 pcm_running;
u8 dac_routing;
u8 spdif_playback_enable;
u8 ak4396_reg1;
u8 revision;
u8 has_2nd_ac97_codec;
u32 spdif_bits;
u32 spdif_pcm_bits;
struct snd_pcm_substream *streams[PCM_COUNT];
struct snd_kcontrol *spdif_pcm_ctl;
struct snd_kcontrol *spdif_input_bits_ctl;
struct work_struct spdif_input_bits_work;
};
struct oxygen_model {
const char *shortname;
const char *longname;
const char *chip;
struct module *owner;
void (*init)(struct oxygen *chip);
int (*mixer_init)(struct oxygen *chip);
void (*cleanup)(struct oxygen *chip);
void (*set_dac_params)(struct oxygen *chip,
struct snd_pcm_hw_params *params);
void (*set_adc_params)(struct oxygen *chip,
struct snd_pcm_hw_params *params);
void (*update_dac_volume)(struct oxygen *chip);
void (*update_dac_mute)(struct oxygen *chip);
const unsigned int *dac_tlv;
u8 record_from_dma_b;
u8 cd_in_from_video_in;
u8 dac_minimum_volume;
};
/* oxygen_lib.c */
int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
const struct oxygen_model *model);
void oxygen_pci_remove(struct pci_dev *pci);
/* oxygen_mixer.c */
int oxygen_mixer_init(struct oxygen *chip);
void oxygen_update_dac_routing(struct oxygen *chip);
void oxygen_update_spdif_source(struct oxygen *chip);
/* oxygen_pcm.c */
int oxygen_pcm_init(struct oxygen *chip);
/* oxygen_io.c */
u8 oxygen_read8(struct oxygen *chip, unsigned int reg);
u16 oxygen_read16(struct oxygen *chip, unsigned int reg);
u32 oxygen_read32(struct oxygen *chip, unsigned int reg);
void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value);
void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value);
void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value);
void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
u8 value, u8 mask);
void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
u16 value, u16 mask);
void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
u32 value, u32 mask);
u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
unsigned int index);
void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
unsigned int index, u16 data);
void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
unsigned int index, u16 data, u16 mask);
void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data);
static inline void oxygen_set_bits8(struct oxygen *chip,
unsigned int reg, u8 value)
{
oxygen_write8_masked(chip, reg, value, value);
}
static inline void oxygen_set_bits16(struct oxygen *chip,
unsigned int reg, u16 value)
{
oxygen_write16_masked(chip, reg, value, value);
}
static inline void oxygen_set_bits32(struct oxygen *chip,
unsigned int reg, u32 value)
{
oxygen_write32_masked(chip, reg, value, value);
}
static inline void oxygen_clear_bits8(struct oxygen *chip,
unsigned int reg, u8 value)
{
oxygen_write8_masked(chip, reg, 0, value);
}
static inline void oxygen_clear_bits16(struct oxygen *chip,
unsigned int reg, u16 value)
{
oxygen_write16_masked(chip, reg, 0, value);
}
static inline void oxygen_clear_bits32(struct oxygen *chip,
unsigned int reg, u32 value)
{
oxygen_write32_masked(chip, reg, 0, value);
}
static inline void oxygen_ac97_set_bits(struct oxygen *chip, unsigned int codec,
unsigned int index, u16 value)
{
oxygen_write_ac97_masked(chip, codec, index, value, value);
}
static inline void oxygen_ac97_clear_bits(struct oxygen *chip,
unsigned int codec,
unsigned int index, u16 value)
{
oxygen_write_ac97_masked(chip, codec, index, 0, value);
}
#endif
/*
* C-Media CMI8788 driver - helper functions
*
* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
*
*
* This driver is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2.
*
* This driver is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this driver; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <sound/driver.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <sound/core.h>
#include <asm/io.h>
#include "oxygen.h"
u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
{
return inb(chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_read8);
u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
{
return inw(chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_read16);
u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
{
return inl(chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_read32);
void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
{
outb(value, chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write8);
void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
{
outw(value, chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write16);
void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
{
outl(value, chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write32);
void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
u8 value, u8 mask)
{
u8 tmp = inb(chip->addr + reg);
outb((tmp & ~mask) | (value & mask), chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write8_masked);
void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
u16 value, u16 mask)
{
u16 tmp = inw(chip->addr + reg);
outw((tmp & ~mask) | (value & mask), chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write16_masked);
void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
u32 value, u32 mask)
{
u32 tmp = inl(chip->addr + reg);
outl((tmp & ~mask) | (value & mask), chip->addr + reg);
}
EXPORT_SYMBOL(oxygen_write32_masked);
static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
{
unsigned long timeout = jiffies + msecs_to_jiffies(1);
do {
udelay(5);
cond_resched();
if (oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS) & mask)
return 0;
} while (time_after_eq(timeout, jiffies));
return -EIO;
}
/*
* About 10% of AC'97 register reads or writes fail to complete, but even those
* where the controller indicates completion aren't guaranteed to have actually
* happened.
*
* It's hard to assign blame to either the controller or the codec because both
* were made by C-Media ...
*/
void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
unsigned int index, u16 data)
{
unsigned int count, succeeded;
u32 reg;
reg = data;
reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
reg |= OXYGEN_AC97_REG_DIR_WRITE;
reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
succeeded = 0;
for (count = 5; count > 0; --count) {
udelay(5);
oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
/* require two "completed" writes, just to be sure */
if (oxygen_ac97_wait(chip, OXYGEN_AC97_WRITE_COMPLETE) >= 0 &&
++succeeded >= 2)
return;
}
snd_printk(KERN_ERR "AC'97 write timeout\n");
}
EXPORT_SYMBOL(oxygen_write_ac97);
u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
unsigned int index)
{
unsigned int count;
unsigned int last_read = UINT_MAX;
u32 reg;
reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
reg |= OXYGEN_AC97_REG_DIR_READ;
reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
for (count = 5; count > 0; --count) {
udelay(5);
oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
udelay(10);
if (oxygen_ac97_wait(chip, OXYGEN_AC97_READ_COMPLETE) >= 0) {
u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
/* we require two consecutive reads of the same value */
if (value == last_read)
return value;
last_read = value;
/*
* Invert the register value bits to make sure that two
* consecutive unsuccessful reads do not return the same
* value.
*/
reg ^= 0xffff;
}
}
snd_printk(KERN_ERR "AC'97 read timeout on codec %u\n", codec);
return 0;
}
EXPORT_SYMBOL(oxygen_read_ac97);
void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
unsigned int index, u16 data, u16 mask)
{
u16 value = oxygen_read_ac97(chip, codec, index);
value &= ~mask;
value |= data & mask;
oxygen_write_ac97(chip, codec, index, value);
}
EXPORT_SYMBOL(oxygen_write_ac97_masked);
void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
{
unsigned int count;
/* should not need more than 3.84 us (24 * 160 ns) */
count = 10;
while ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & OXYGEN_SPI_BUSY)
&& count > 0) {
udelay(1);
--count;
}
spin_lock_irq(&chip->reg_lock);
oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
if (control & OXYGEN_SPI_DATA_LENGTH_3)
oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
spin_unlock_irq(&chip->reg_lock);
}
EXPORT_SYMBOL(oxygen_write_spi);
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#ifndef OXYGEN_REGS_H_INCLUDED
#define OXYGEN_REGS_H_INCLUDED
/* recording channel A */
#define OXYGEN_DMA_A_ADDRESS 0x00 /* 32-bit base address */
#define OXYGEN_DMA_A_COUNT 0x04 /* buffer counter (dwords) */
#define OXYGEN_DMA_A_TCOUNT 0x06 /* interrupt counter (dwords) */
/* recording channel B */
#define OXYGEN_DMA_B_ADDRESS 0x08
#define OXYGEN_DMA_B_COUNT 0x0c
#define OXYGEN_DMA_B_TCOUNT 0x0e
/* recording channel C */
#define OXYGEN_DMA_C_ADDRESS 0x10
#define OXYGEN_DMA_C_COUNT 0x14
#define OXYGEN_DMA_C_TCOUNT 0x16
/* SPDIF playback channel */
#define OXYGEN_DMA_SPDIF_ADDRESS 0x18
#define OXYGEN_DMA_SPDIF_COUNT 0x1c
#define OXYGEN_DMA_SPDIF_TCOUNT 0x1e
/* multichannel playback channel */
#define OXYGEN_DMA_MULTICH_ADDRESS 0x20
#define OXYGEN_DMA_MULTICH_COUNT 0x24 /* 32 bits */
#define OXYGEN_DMA_MULTICH_TCOUNT 0x28 /* 32 bits */
/* AC'97 (front panel) playback channel */
#define OXYGEN_DMA_AC97_ADDRESS 0x30
#define OXYGEN_DMA_AC97_COUNT 0x34
#define OXYGEN_DMA_AC97_TCOUNT 0x36
/* all registers 0x00..0x36 return current position on read */
#define OXYGEN_DMA_STATUS 0x40 /* 1 = running, 0 = stop */
#define OXYGEN_CHANNEL_A 0x01
#define OXYGEN_CHANNEL_B 0x02
#define OXYGEN_CHANNEL_C 0x04
#define OXYGEN_CHANNEL_SPDIF 0x08
#define OXYGEN_CHANNEL_MULTICH 0x10
#define OXYGEN_CHANNEL_AC97 0x20
#define OXYGEN_DMA_RESET 0x42
/* OXYGEN_CHANNEL_* */
#define OXYGEN_PLAY_CHANNELS 0x43
#define OXYGEN_PLAY_CHANNELS_MASK 0x03
#define OXYGEN_PLAY_CHANNELS_2 0x00
#define OXYGEN_PLAY_CHANNELS_4 0x01
#define OXYGEN_PLAY_CHANNELS_6 0x02
#define OXYGEN_PLAY_CHANNELS_8 0x03
#define OXYGEN_INTERRUPT_MASK 0x44
/* OXYGEN_CHANNEL_* */
#define OXYGEN_INT_SPDIF_IN_CHANGE 0x0100
#define OXYGEN_INT_GPIO 0x0800
#define OXYGEN_INTERRUPT_STATUS 0x46
/* OXYGEN_CHANNEL_* amd OXYGEN_INT_* */
#define OXYGEN_INT_MIDI 0x1000
#define OXYGEN_MISC 0x48
#define OXYGEN_MISC_MAGIC 0x20
#define OXYGEN_MISC_MIDI 0x40
#define OXYGEN_REC_FORMAT 0x4a
#define OXYGEN_REC_FORMAT_A_MASK 0x03
#define OXYGEN_REC_FORMAT_A_SHIFT 0
#define OXYGEN_REC_FORMAT_B_MASK 0x0c
#define OXYGEN_REC_FORMAT_B_SHIFT 2
#define OXYGEN_REC_FORMAT_C_MASK 0x30
#define OXYGEN_REC_FORMAT_C_SHIFT 4
#define OXYGEN_FORMAT_16 0x00
#define OXYGEN_FORMAT_24 0x01
#define OXYGEN_FORMAT_32 0x02
#define OXYGEN_PLAY_FORMAT 0x4b
#define OXYGEN_SPDIF_FORMAT_MASK 0x03
#define OXYGEN_SPDIF_FORMAT_SHIFT 0
#define OXYGEN_MULTICH_FORMAT_MASK 0x0c
#define OXYGEN_MULTICH_FORMAT_SHIFT 2
#define OXYGEN_AC97_FORMAT_MASK 0x30
#define OXYGEN_AC97_FORMAT_SHIFT 4
/* OXYGEN_FORMAT_* */
#define OXYGEN_REC_CHANNELS 0x4c
#define OXYGEN_REC_A_CHANNELS_MASK 0x07
#define OXYGEN_REC_CHANNELS_2 0x00
#define OXYGEN_REC_CHANNELS_4 0x01
#define OXYGEN_REC_CHANNELS_6 0x03 /* or 0x02 */
#define OXYGEN_REC_CHANNELS_8 0x04
#define OXYGEN_FUNCTION 0x50
#define OXYGEN_FUNCTION_RESET_CODEC 0x02
#define OXYGEN_FUNCTION_ENABLE_SPI_4_5 0x80
#define OXYGEN_I2S_MULTICH_FORMAT 0x60
#define OXYGEN_I2S_RATE_MASK 0x0007
#define OXYGEN_RATE_32000 0x0000
#define OXYGEN_RATE_44100 0x0001
#define OXYGEN_RATE_48000 0x0002
#define OXYGEN_RATE_64000 0x0003
#define OXYGEN_RATE_88200 0x0004
#define OXYGEN_RATE_96000 0x0005
#define OXYGEN_RATE_176400 0x0006
#define OXYGEN_RATE_192000 0x0007
#define OXYGEN_I2S_MAGIC1_MASK 0x0008
#define OXYGEN_I2S_MAGIC2_MASK 0x0030
#define OXYGEN_I2S_FORMAT_MASK 0x00c0
#define OXYGEN_I2S_FORMAT_16 0x0000
#define OXYGEN_I2S_FORMAT_20 0x0040
#define OXYGEN_I2S_FORMAT_24 0x0080
#define OXYGEN_I2S_FORMAT_32 0x00c0
#define OXYGEN_I2S_A_FORMAT 0x62
#define OXYGEN_I2S_B_FORMAT 0x64
#define OXYGEN_I2S_C_FORMAT 0x66
/* OXYGEN_I2S_RATE_* and OXYGEN_I2S_FORMAT_* */
#define OXYGEN_SPDIF_CONTROL 0x70
#define OXYGEN_SPDIF_OUT_ENABLE 0x00000002
#define OXYGEN_SPDIF_LOOPBACK 0x00000004
#define OXYGEN_SPDIF_MAGIC2 0x00000020
#define OXYGEN_SPDIF_MAGIC3 0x00000040
#define OXYGEN_SPDIF_IN_VALID 0x00001000
#define OXYGEN_SPDIF_IN_CHANGE 0x00008000 /* r/wc */
#define OXYGEN_SPDIF_IN_INVERT 0x00010000 /* ? */
#define OXYGEN_SPDIF_OUT_RATE_MASK 0x07000000
#define OXYGEN_SPDIF_OUT_RATE_SHIFT 24
/* OXYGEN_RATE_* << OXYGEN_SPDIF_OUT_RATE_SHIFT */
#define OXYGEN_SPDIF_OUTPUT_BITS 0x74
#define OXYGEN_SPDIF_NONAUDIO 0x00000002
#define OXYGEN_SPDIF_C 0x00000004
#define OXYGEN_SPDIF_PREEMPHASIS 0x00000008
#define OXYGEN_SPDIF_CATEGORY_MASK 0x000007f0
#define OXYGEN_SPDIF_CATEGORY_SHIFT 4
#define OXYGEN_SPDIF_ORIGINAL 0x00000800
#define OXYGEN_SPDIF_CS_RATE_MASK 0x0000f000
#define OXYGEN_SPDIF_CS_RATE_SHIFT 12
#define OXYGEN_SPDIF_V 0x00010000 /* 0 = valid */
#define OXYGEN_SPDIF_INPUT_BITS 0x78
/* 32 bits, IEC958_AES_* */
#define OXYGEN_2WIRE_CONTROL 0x90
#define OXYGEN_2WIRE_DIR_MASK 0x01
#define OXYGEN_2WIRE_DIR_WRITE 0x00 /* ? */
#define OXYGEN_2WIRE_DIR_READ 0x01 /* ? */
#define OXYGEN_2WIRE_ADDRESS_MASK 0xfe /* slave device address */
#define OXYGEN_2WIRE_ADDRESS_SHIFT 1
#define OXYGEN_2WIRE_MAP 0x91 /* address, 8 bits */
#define OXYGEN_2WIRE_DATA 0x92 /* data, 16 bits */
#define OXYGEN_2WIRE_BUS_STATUS 0x94
#define OXYGEN_2WIRE_BUSY 0x01
#define OXYGEN_SPI_CONTROL 0x98
#define OXYGEN_SPI_BUSY 0x01 /* read */
#define OXYGEN_SPI_TRIGGER_WRITE 0x01 /* write */
#define OXYGEN_SPI_DATA_LENGTH_MASK 0x02
#define OXYGEN_SPI_DATA_LENGTH_2 0x00
#define OXYGEN_SPI_DATA_LENGTH_3 0x02
#define OXYGEN_SPI_CODEC_MASK 0x70 /* 0..5 */
#define OXYGEN_SPI_CODEC_SHIFT 4
#define OXYGEN_SPI_MAGIC 0x80
#define OXYGEN_SPI_DATA1 0x99
#define OXYGEN_SPI_DATA2 0x9a
#define OXYGEN_SPI_DATA3 0x9b
#define OXYGEN_MPU401 0xa0
#define OXYGEN_GPI_DATA 0xa4
#define OXYGEN_GPI_INTERRUPT_MASK 0xa5
#define OXYGEN_GPIO_DATA 0xa6
#define OXYGEN_GPIO_CONTROL 0xa8
/* 0: input, 1: output */
#define OXYGEN_GPIO_INTERRUPT_MASK 0xaa
#define OXYGEN_DEVICE_SENSE 0xac /* ? */
#define OXYGEN_PLAY_ROUTING 0xc0
#define OXYGEN_PLAY_DAC0_SOURCE_MASK 0x0300
#define OXYGEN_PLAY_DAC1_SOURCE_MASK 0x0700
#define OXYGEN_PLAY_DAC2_SOURCE_MASK 0x3000
#define OXYGEN_PLAY_DAC3_SOURCE_MASK 0x7000
#define OXYGEN_REC_ROUTING 0xc2
#define OXYGEN_ADC_MONITOR 0xc3
#define OXYGEN_ADC_MONITOR_MULTICH 0x01
#define OXYGEN_ADC_MONITOR_AC97 0x04
#define OXYGEN_ADC_MONITOR_SPDIF 0x10
#define OXYGEN_A_MONITOR_ROUTING 0xc4
#define OXYGEN_AC97_CONTROL 0xd0
#define OXYGEN_AC97_RESET1 0x0001
#define OXYGEN_AC97_RESET1_BUSY 0x0002
#define OXYGEN_AC97_RESET2 0x0008
#define OXYGEN_AC97_CODEC_0 0x0010
#define OXYGEN_AC97_CODEC_1 0x0020
#define OXYGEN_AC97_INTERRUPT_MASK 0xd2
#define OXYGEN_AC97_INTERRUPT_STATUS 0xd3
#define OXYGEN_AC97_READ_COMPLETE 0x01
#define OXYGEN_AC97_WRITE_COMPLETE 0x02
#define OXYGEN_AC97_OUT_CONFIG 0xd4
#define OXYGEN_AC97_OUT_MAGIC1 0x00000011
#define OXYGEN_AC97_OUT_MAGIC2 0x00000033
#define OXYGEN_AC97_OUT_MAGIC3 0x0000ff00
#define OXYGEN_AC97_IN_CONFIG 0xd8
#define OXYGEN_AC97_IN_MAGIC1 0x00000011
#define OXYGEN_AC97_IN_MAGIC2 0x00000033
#define OXYGEN_AC97_IN_MAGIC3 0x00000300
#define OXYGEN_AC97_REGS 0xdc
#define OXYGEN_AC97_REG_DATA_MASK 0x0000ffff
#define OXYGEN_AC97_REG_ADDR_MASK 0x007f0000
#define OXYGEN_AC97_REG_ADDR_SHIFT 16
#define OXYGEN_AC97_REG_DIR_MASK 0x00800000
#define OXYGEN_AC97_REG_DIR_WRITE 0x00000000
#define OXYGEN_AC97_REG_DIR_READ 0x00800000
#define OXYGEN_AC97_REG_CODEC_MASK 0x01000000
#define OXYGEN_AC97_REG_CODEC_SHIFT 24
#define OXYGEN_DMA_FLUSH 0xe1
/* OXYGEN_CHANNEL_* */
#define OXYGEN_CODEC_VERSION 0xe4
#define OXYGEN_REVISION 0xe6
#define OXYGEN_REVISION_2 0x08 /* bit flag */
#define OXYGEN_REVISION_8787 0x14 /* all 8 bits */
#endif
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