Commit d2b9775d authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Greg Kroah-Hartman

serial: sh-sci: Correct pin initialization on (H)SCIF

Correct pin initialization on (H)SCIF:
  - RTS must be deasserted (it's active low),
  - SCK must be an input, as it may be used as the optional external
    clock input.

Initial pin configuration must always be done:
  - Regardless of the presence of dedicated RTS and CTS pins: if the
    register exists, the RTS/CTS bits exist, too,
  - Regardless of hardware flow control being enabled or not: RTS must
    be deasserted.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4780c09f
...@@ -712,21 +712,14 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag) ...@@ -712,21 +712,14 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
return; return;
} }
/* if (sci_getreg(port, SCSPTR)->size) {
* For the generic path SCSPTR is necessary. Bail out if that's u16 status = serial_port_in(port, SCSPTR);
* unavailable, too.
*/ /* RTS# is output, driven 1 */
if (!sci_getreg(port, SCSPTR)->size) status |= SCSPTR_RTSIO | SCSPTR_RTSDT;
return; /* CTS# and SCK are inputs */
status &= ~(SCSPTR_CTSIO | SCSPTR_SCKIO);
if ((s->cfg->capabilities & SCIx_HAVE_RTSCTS) && serial_port_out(port, SCSPTR, status);
((!(cflag & CRTSCTS)))) {
unsigned short status;
status = serial_port_in(port, SCSPTR);
status &= ~SCSPTR_CTSIO;
status |= SCSPTR_RTSIO;
serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
} }
} }
......
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