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Commit d2d4c6c2 authored by Stephen Hemminger's avatar Stephen Hemminger Committed by David S. Miller
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[IRDA]: Make more symbols static, to avoid namespace pollution.

parent 4749b37c
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Showing with 37 additions and 220 deletions
drivers/net/irda/via-ircc.c
View file @ d2d4c6c2
...@@ -103,14 +103,14 @@ static struct net_device_stats *via_ircc_net_get_stats(struct net_device ...@@ -103,14 +103,14 @@ static struct net_device_stats *via_ircc_net_get_stats(struct net_device
static void via_ircc_change_dongle_speed(int iobase, int speed, static void via_ircc_change_dongle_speed(int iobase, int speed,
int dongle_id); int dongle_id);
static int RxTimerHandler(struct via_ircc_cb *self, int iobase); static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
void hwreset(struct via_ircc_cb *self); static void hwreset(struct via_ircc_cb *self);
static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase); static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
static int upload_rxdata(struct via_ircc_cb *self, int iobase); static int upload_rxdata(struct via_ircc_cb *self, int iobase);
static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id); static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
static void __exit via_remove_one (struct pci_dev *pdev); static void __exit via_remove_one (struct pci_dev *pdev);
/* Should use udelay() instead, even if we are x86 only - Jean II */ /* Should use udelay() instead, even if we are x86 only - Jean II */
void iodelay(int udelay) static void iodelay(int udelay)
{ {
u8 data; u8 data;
int i; int i;
...@@ -1397,7 +1397,7 @@ static irqreturn_t via_ircc_interrupt(int irq, void *dev_id, ...@@ -1397,7 +1397,7 @@ static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
return IRQ_RETVAL(iHostIntType); return IRQ_RETVAL(iHostIntType);
} }
void hwreset(struct via_ircc_cb *self) static void hwreset(struct via_ircc_cb *self)
{ {
int iobase; int iobase;
iobase = self->io.fir_base; iobase = self->io.fir_base;
......
drivers/net/irda/via-ircc.h
View file @ d2d4c6c2
...@@ -194,14 +194,7 @@ struct via_ircc_cb { ...@@ -194,14 +194,7 @@ struct via_ircc_cb {
#define Rd_Valid 0x08 #define Rd_Valid 0x08
#define RxBit 0x08 #define RxBit 0x08
__u8 ReadPCIByte(__u8, __u8, __u8, __u8); static void DisableDmaChannel(unsigned int channel)
__u32 ReadPCI(__u8, __u8, __u8, __u8);
void WritePCI(__u8, __u8, __u8, __u8, __u32);
void WritePCIByte(__u8, __u8, __u8, __u8, __u8);
int mySearchPCI(__u8 *, __u16, __u16);
void DisableDmaChannel(unsigned int channel)
{ {
switch (channel) { // 8 Bit DMA channels DMAC1 switch (channel) { // 8 Bit DMA channels DMAC1
case 0: case 0:
...@@ -230,7 +223,7 @@ void DisableDmaChannel(unsigned int channel) ...@@ -230,7 +223,7 @@ void DisableDmaChannel(unsigned int channel)
}; //Switch }; //Switch
} }
unsigned char ReadLPCReg(int iRegNum) static unsigned char ReadLPCReg(int iRegNum)
{ {
unsigned char iVal; unsigned char iVal;
...@@ -243,7 +236,7 @@ unsigned char ReadLPCReg(int iRegNum) ...@@ -243,7 +236,7 @@ unsigned char ReadLPCReg(int iRegNum)
return iVal; return iVal;
} }
void WriteLPCReg(int iRegNum, unsigned char iVal) static void WriteLPCReg(int iRegNum, unsigned char iVal)
{ {
outb(0x87, 0x2e); outb(0x87, 0x2e);
...@@ -253,17 +246,17 @@ void WriteLPCReg(int iRegNum, unsigned char iVal) ...@@ -253,17 +246,17 @@ void WriteLPCReg(int iRegNum, unsigned char iVal)
outb(0xAA, 0x2e); outb(0xAA, 0x2e);
} }
__u8 ReadReg(unsigned int BaseAddr, int iRegNum) static __u8 ReadReg(unsigned int BaseAddr, int iRegNum)
{ {
return ((__u8) inb(BaseAddr + iRegNum)); return ((__u8) inb(BaseAddr + iRegNum));
} }
void WriteReg(unsigned int BaseAddr, int iRegNum, unsigned char iVal) static void WriteReg(unsigned int BaseAddr, int iRegNum, unsigned char iVal)
{ {
outb(iVal, BaseAddr + iRegNum); outb(iVal, BaseAddr + iRegNum);
} }
int WriteRegBit(unsigned int BaseAddr, unsigned char RegNum, static int WriteRegBit(unsigned int BaseAddr, unsigned char RegNum,
unsigned char BitPos, unsigned char value) unsigned char BitPos, unsigned char value)
{ {
__u8 Rtemp, Wtemp; __u8 Rtemp, Wtemp;
...@@ -286,7 +279,7 @@ int WriteRegBit(unsigned int BaseAddr, unsigned char RegNum, ...@@ -286,7 +279,7 @@ int WriteRegBit(unsigned int BaseAddr, unsigned char RegNum,
return 0; return 0;
} }
__u8 CheckRegBit(unsigned int BaseAddr, unsigned char RegNum, static __u8 CheckRegBit(unsigned int BaseAddr, unsigned char RegNum,
unsigned char BitPos) unsigned char BitPos)
{ {
__u8 temp; __u8 temp;
...@@ -300,122 +293,7 @@ __u8 CheckRegBit(unsigned int BaseAddr, unsigned char RegNum, ...@@ -300,122 +293,7 @@ __u8 CheckRegBit(unsigned int BaseAddr, unsigned char RegNum,
return GetBit(temp, BitPos); return GetBit(temp, BitPos);
} }
__u8 ReadPCIByte(__u8 bus, __u8 device, __u8 fun, __u8 reg) static void SetMaxRxPacketSize(__u16 iobase, __u16 size)
{
__u32 dTmp;
__u8 bData, bTmp;
bTmp = reg & ~0x03;
dTmp = ReadPCI(bus, device, fun, bTmp);
bTmp = reg & 0x03;
bData = (__u8) (dTmp >> bTmp);
return bData;
}
__u32 ReadPCI(__u8 bus, __u8 device, __u8 fun, __u8 reg)
{
__u32 CONFIG_ADDR, temp, data;
if ((bus == 0xff) || (device == 0xff) || (fun == 0xff))
return 0xffffffff;
CONFIG_ADDR = 0x80000000;
temp = (__u32) reg << 2;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) fun << 8;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) device << 11;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) bus << 16;
CONFIG_ADDR = CONFIG_ADDR | temp;
outl(PCI_CONFIG_ADDRESS, CONFIG_ADDR);
data = inl(PCI_CONFIG_DATA);
return data;
}
void WritePCIByte(__u8 bus, __u8 device, __u8 fun, __u8 reg,
__u8 CONFIG_DATA)
{
__u32 dTmp, dTmp1 = 0;
__u8 bTmp;
bTmp = reg & ~0x03;
dTmp = ReadPCI(bus, device, fun, bTmp);
switch (reg & 0x03) {
case 0:
dTmp1 = (dTmp & ~0xff) | CONFIG_DATA;
break;
case 1:
dTmp = (dTmp & ~0x00ff00);
dTmp1 = CONFIG_DATA;
dTmp1 = dTmp1 << 8;
dTmp1 = dTmp1 | dTmp;
break;
case 2:
dTmp = (dTmp & ~0xff0000);
dTmp1 = CONFIG_DATA;
dTmp1 = dTmp1 << 16;
dTmp1 = dTmp1 | dTmp;
break;
case 3:
dTmp = (dTmp & ~0xff000000);
dTmp1 = CONFIG_DATA;
dTmp1 = dTmp1 << 24;
dTmp1 = dTmp1 | dTmp;
break;
}
WritePCI(bus, device, fun, bTmp, dTmp1);
}
//------------------
void WritePCI(__u8 bus, __u8 device, __u8 fun, __u8 reg, __u32 CONFIG_DATA)
{
__u32 CONFIG_ADDR, temp;
if ((bus == 0xff) || (device == 0xff) || (fun == 0xff))
return;
CONFIG_ADDR = 0x80000000;
temp = (__u32) reg << 2;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) fun << 8;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) device << 11;
CONFIG_ADDR = CONFIG_ADDR | temp;
temp = (__u32) bus << 16;
CONFIG_ADDR = CONFIG_ADDR | temp;
outl(PCI_CONFIG_ADDRESS, CONFIG_ADDR);
outl(PCI_CONFIG_DATA, CONFIG_DATA);
}
// find device with DeviceID and VenderID // if match return three byte buffer (bus,device,function) // no found, address={99,99,99}
int mySearchPCI(__u8 * SBridpos, __u16 VID, __u16 DID)
{
__u8 i, j, k;
__u16 FindDeviceID, FindVenderID;
for (k = 0; k < 8; k++) { //scan function
i = 0;
j = 0x11;
k = 0;
if (ReadPCI(i, j, k, 0) < 0xffffffff) { // not empty
FindDeviceID = (__u16) (ReadPCI(i, j, k, 0) >> 16);
FindVenderID =
(__u16) (ReadPCI(i, j, k, 0) & 0x0000ffff);
if ((VID == FindVenderID) && (DID == FindDeviceID)) {
SBridpos[0] = i; // bus
SBridpos[1] = j; //device
SBridpos[2] = k; //func
return 1;
}
}
}
return 0;
}
void SetMaxRxPacketSize(__u16 iobase, __u16 size)
{ {
__u16 low, high; __u16 low, high;
if ((size & 0xe000) == 0) { if ((size & 0xe000) == 0) {
...@@ -430,7 +308,7 @@ void SetMaxRxPacketSize(__u16 iobase, __u16 size) ...@@ -430,7 +308,7 @@ void SetMaxRxPacketSize(__u16 iobase, __u16 size)
//for both Rx and Tx //for both Rx and Tx
void SetFIFO(__u16 iobase, __u16 value) static void SetFIFO(__u16 iobase, __u16 value)
{ {
switch (value) { switch (value) {
case 128: case 128:
...@@ -541,7 +419,7 @@ void SetFIFO(__u16 iobase, __u16 value) ...@@ -541,7 +419,7 @@ void SetFIFO(__u16 iobase, __u16 value)
#define GetFIRVersion(BaseAddr) ReadReg(BaseAddr,VERSION) #define GetFIRVersion(BaseAddr) ReadReg(BaseAddr,VERSION)
void SetTimer(__u16 iobase, __u8 count) static void SetTimer(__u16 iobase, __u8 count)
{ {
EnTimerInt(iobase, OFF); EnTimerInt(iobase, OFF);
WriteReg(iobase, TIMER, count); WriteReg(iobase, TIMER, count);
...@@ -549,7 +427,7 @@ void SetTimer(__u16 iobase, __u8 count) ...@@ -549,7 +427,7 @@ void SetTimer(__u16 iobase, __u8 count)
} }
void SetSendByte(__u16 iobase, __u32 count) static void SetSendByte(__u16 iobase, __u32 count)
{ {
__u32 low, high; __u32 low, high;
...@@ -561,7 +439,7 @@ void SetSendByte(__u16 iobase, __u32 count) ...@@ -561,7 +439,7 @@ void SetSendByte(__u16 iobase, __u32 count)
} }
} }
void ResetChip(__u16 iobase, __u8 type) static void ResetChip(__u16 iobase, __u8 type)
{ {
__u8 value; __u8 value;
...@@ -569,16 +447,7 @@ void ResetChip(__u16 iobase, __u8 type) ...@@ -569,16 +447,7 @@ void ResetChip(__u16 iobase, __u8 type)
WriteReg(iobase, RESET, type); WriteReg(iobase, RESET, type);
} }
void SetAddrMode(__u16 iobase, __u8 mode) static int CkRxRecv(__u16 iobase, struct via_ircc_cb *self)
{
__u8 bTmp = 0;
if (mode < 3) {
bTmp = (ReadReg(iobase, RX_CT) & 0xcf) | (mode << 4);
WriteReg(iobase, RX_CT, bTmp);
}
}
int CkRxRecv(__u16 iobase, struct via_ircc_cb *self)
{ {
__u8 low, high; __u8 low, high;
__u16 wTmp = 0, wTmp1 = 0, wTmp_new = 0; __u16 wTmp = 0, wTmp1 = 0, wTmp_new = 0;
...@@ -599,7 +468,7 @@ int CkRxRecv(__u16 iobase, struct via_ircc_cb *self) ...@@ -599,7 +468,7 @@ int CkRxRecv(__u16 iobase, struct via_ircc_cb *self)
} }
__u16 RxCurCount(__u16 iobase, struct via_ircc_cb * self) static __u16 RxCurCount(__u16 iobase, struct via_ircc_cb * self)
{ {
__u8 low, high; __u8 low, high;
__u16 wTmp = 0, wTmp1 = 0; __u16 wTmp = 0, wTmp1 = 0;
...@@ -615,7 +484,7 @@ __u16 RxCurCount(__u16 iobase, struct via_ircc_cb * self) ...@@ -615,7 +484,7 @@ __u16 RxCurCount(__u16 iobase, struct via_ircc_cb * self)
* for it will update last count. * for it will update last count.
*/ */
__u16 GetRecvByte(__u16 iobase, struct via_ircc_cb * self) static __u16 GetRecvByte(__u16 iobase, struct via_ircc_cb * self)
{ {
__u8 low, high; __u8 low, high;
__u16 wTmp, wTmp1, ret; __u16 wTmp, wTmp1, ret;
...@@ -645,23 +514,7 @@ __u16 GetRecvByte(__u16 iobase, struct via_ircc_cb * self) ...@@ -645,23 +514,7 @@ __u16 GetRecvByte(__u16 iobase, struct via_ircc_cb * self)
return ret; return ret;
} }
static void Sdelay(__u16 scale)
__u16 GetRecvLen(__u16 iobase)
{
__u8 low, high;
__u16 temp;
low = ReadReg(iobase, RX_P_L);
high = ReadReg(iobase, RX_P_H);
if (!(high & 0xe000)) {
temp = (high << 8) + low;
return temp;
} else
return 0;
}
void Sdelay(__u16 scale)
{ {
__u8 bTmp; __u8 bTmp;
int i, j; int i, j;
...@@ -674,7 +527,7 @@ void Sdelay(__u16 scale) ...@@ -674,7 +527,7 @@ void Sdelay(__u16 scale)
} }
} }
void Tdelay(__u16 scale) static void Tdelay(__u16 scale)
{ {
__u8 bTmp; __u8 bTmp;
int i, j; int i, j;
...@@ -688,7 +541,7 @@ void Tdelay(__u16 scale) ...@@ -688,7 +541,7 @@ void Tdelay(__u16 scale)
} }
void ActClk(__u16 iobase, __u8 value) static void ActClk(__u16 iobase, __u8 value)
{ {
__u8 bTmp; __u8 bTmp;
bTmp = ReadReg(iobase, 0x34); bTmp = ReadReg(iobase, 0x34);
...@@ -698,18 +551,7 @@ void ActClk(__u16 iobase, __u8 value) ...@@ -698,18 +551,7 @@ void ActClk(__u16 iobase, __u8 value)
WriteReg(iobase, 0x34, bTmp & ~Clk_bit); WriteReg(iobase, 0x34, bTmp & ~Clk_bit);
} }
void ActTx(__u16 iobase, __u8 value) static void ClkTx(__u16 iobase, __u8 Clk, __u8 Tx)
{
__u8 bTmp;
bTmp = ReadReg(iobase, 0x34);
if (value)
WriteReg(iobase, 0x34, bTmp | Tx_bit);
else
WriteReg(iobase, 0x34, bTmp & ~Tx_bit);
}
void ClkTx(__u16 iobase, __u8 Clk, __u8 Tx)
{ {
__u8 bTmp; __u8 bTmp;
...@@ -731,7 +573,7 @@ void ClkTx(__u16 iobase, __u8 Clk, __u8 Tx) ...@@ -731,7 +573,7 @@ void ClkTx(__u16 iobase, __u8 Clk, __u8 Tx)
WriteReg(iobase, 0x34, bTmp); WriteReg(iobase, 0x34, bTmp);
} }
void Wr_Byte(__u16 iobase, __u8 data) static void Wr_Byte(__u16 iobase, __u8 data)
{ {
__u8 bData = data; __u8 bData = data;
// __u8 btmp; // __u8 btmp;
...@@ -757,7 +599,7 @@ void Wr_Byte(__u16 iobase, __u8 data) ...@@ -757,7 +599,7 @@ void Wr_Byte(__u16 iobase, __u8 data)
} }
} }
__u8 Rd_Indx(__u16 iobase, __u8 addr, __u8 index) static __u8 Rd_Indx(__u16 iobase, __u8 addr, __u8 index)
{ {
__u8 data = 0, bTmp, data_bit; __u8 data = 0, bTmp, data_bit;
int i; int i;
...@@ -821,7 +663,7 @@ __u8 Rd_Indx(__u16 iobase, __u8 addr, __u8 index) ...@@ -821,7 +663,7 @@ __u8 Rd_Indx(__u16 iobase, __u8 addr, __u8 index)
return data; return data;
} }
void Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data) static void Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data)
{ {
int i; int i;
__u8 bTmp; __u8 bTmp;
...@@ -842,7 +684,7 @@ void Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data) ...@@ -842,7 +684,7 @@ void Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data)
ActClk(iobase, 0); ActClk(iobase, 0);
} }
void ResetDongle(__u16 iobase) static void ResetDongle(__u16 iobase)
{ {
int i; int i;
ClkTx(iobase, 0, 0); ClkTx(iobase, 0, 0);
...@@ -856,7 +698,7 @@ void ResetDongle(__u16 iobase) ...@@ -856,7 +698,7 @@ void ResetDongle(__u16 iobase)
ActClk(iobase, 0); ActClk(iobase, 0);
} }
void SetSITmode(__u16 iobase) static void SetSITmode(__u16 iobase)
{ {
__u8 bTmp; __u8 bTmp;
...@@ -868,7 +710,7 @@ void SetSITmode(__u16 iobase) ...@@ -868,7 +710,7 @@ void SetSITmode(__u16 iobase)
WriteReg(iobase, 0x28, bTmp | 0x80); // enable All interrupt WriteReg(iobase, 0x28, bTmp | 0x80); // enable All interrupt
} }
void SI_SetMode(__u16 iobase, int mode) static void SI_SetMode(__u16 iobase, int mode)
{ {
//__u32 dTmp; //__u32 dTmp;
__u8 bTmp; __u8 bTmp;
...@@ -883,7 +725,7 @@ void SI_SetMode(__u16 iobase, int mode) ...@@ -883,7 +725,7 @@ void SI_SetMode(__u16 iobase, int mode)
bTmp = Rd_Indx(iobase, 0x40, 1); bTmp = Rd_Indx(iobase, 0x40, 1);
} }
void InitCard(__u16 iobase) static void InitCard(__u16 iobase)
{ {
ResetChip(iobase, 5); ResetChip(iobase, 5);
WriteReg(iobase, I_ST_CT_0, 0x00); // open CHIP on WriteReg(iobase, I_ST_CT_0, 0x00); // open CHIP on
...@@ -891,12 +733,7 @@ void InitCard(__u16 iobase) ...@@ -891,12 +733,7 @@ void InitCard(__u16 iobase)
SetSIREOF(iobase, 0xc1); SetSIREOF(iobase, 0xc1);
} }
void CommonShutDown(__u16 iobase, __u8 TxDMA) static void CommonInit(__u16 iobase)
{
DisableDmaChannel(TxDMA);
}
void CommonInit(__u16 iobase)
{ {
// EnTXCRC(iobase,0); // EnTXCRC(iobase,0);
SwapDMA(iobase, OFF); SwapDMA(iobase, OFF);
...@@ -921,7 +758,7 @@ void CommonInit(__u16 iobase) ...@@ -921,7 +758,7 @@ void CommonInit(__u16 iobase)
EnableDMA(iobase, ON); EnableDMA(iobase, ON);
} }
void SetBaudRate(__u16 iobase, __u32 rate) static void SetBaudRate(__u16 iobase, __u32 rate)
{ {
__u8 value = 11, temp; __u8 value = 11, temp;
...@@ -958,7 +795,7 @@ void SetBaudRate(__u16 iobase, __u32 rate) ...@@ -958,7 +795,7 @@ void SetBaudRate(__u16 iobase, __u32 rate)
WriteReg(iobase, I_CF_H_1, temp); WriteReg(iobase, I_CF_H_1, temp);
} }
void SetPulseWidth(__u16 iobase, __u8 width) static void SetPulseWidth(__u16 iobase, __u8 width)
{ {
__u8 temp, temp1, temp2; __u8 temp, temp1, temp2;
...@@ -972,7 +809,7 @@ void SetPulseWidth(__u16 iobase, __u8 width) ...@@ -972,7 +809,7 @@ void SetPulseWidth(__u16 iobase, __u8 width)
WriteReg(iobase, I_CF_H_1, temp1); WriteReg(iobase, I_CF_H_1, temp1);
} }
void SetSendPreambleCount(__u16 iobase, __u8 count) static void SetSendPreambleCount(__u16 iobase, __u8 count)
{ {
__u8 temp; __u8 temp;
...@@ -982,7 +819,7 @@ void SetSendPreambleCount(__u16 iobase, __u8 count) ...@@ -982,7 +819,7 @@ void SetSendPreambleCount(__u16 iobase, __u8 count)
} }
void SetVFIR(__u16 BaseAddr, __u8 val) static void SetVFIR(__u16 BaseAddr, __u8 val)
{ {
__u8 tmp; __u8 tmp;
...@@ -991,7 +828,7 @@ void SetVFIR(__u16 BaseAddr, __u8 val) ...@@ -991,7 +828,7 @@ void SetVFIR(__u16 BaseAddr, __u8 val)
WriteRegBit(BaseAddr, I_CF_H_0, 5, val); WriteRegBit(BaseAddr, I_CF_H_0, 5, val);
} }
void SetFIR(__u16 BaseAddr, __u8 val) static void SetFIR(__u16 BaseAddr, __u8 val)
{ {
__u8 tmp; __u8 tmp;
...@@ -1001,7 +838,7 @@ void SetFIR(__u16 BaseAddr, __u8 val) ...@@ -1001,7 +838,7 @@ void SetFIR(__u16 BaseAddr, __u8 val)
WriteRegBit(BaseAddr, I_CF_L_0, 6, val); WriteRegBit(BaseAddr, I_CF_L_0, 6, val);
} }
void SetMIR(__u16 BaseAddr, __u8 val) static void SetMIR(__u16 BaseAddr, __u8 val)
{ {
__u8 tmp; __u8 tmp;
...@@ -1011,7 +848,7 @@ void SetMIR(__u16 BaseAddr, __u8 val) ...@@ -1011,7 +848,7 @@ void SetMIR(__u16 BaseAddr, __u8 val)
WriteRegBit(BaseAddr, I_CF_L_0, 5, val); WriteRegBit(BaseAddr, I_CF_L_0, 5, val);
} }
void SetSIR(__u16 BaseAddr, __u8 val) static void SetSIR(__u16 BaseAddr, __u8 val)
{ {
__u8 tmp; __u8 tmp;
...@@ -1021,24 +858,4 @@ void SetSIR(__u16 BaseAddr, __u8 val) ...@@ -1021,24 +858,4 @@ void SetSIR(__u16 BaseAddr, __u8 val)
WriteRegBit(BaseAddr, I_CF_L_0, 4, val); WriteRegBit(BaseAddr, I_CF_L_0, 4, val);
} }
void ClrHBusy(__u16 iobase)
{
EnableDMA(iobase, OFF);
EnableDMA(iobase, ON);
RXStart(iobase, OFF);
RXStart(iobase, ON);
RXStart(iobase, OFF);
EnableDMA(iobase, OFF);
EnableDMA(iobase, ON);
}
void SetFifo64(__u16 iobase)
{
WriteRegBit(iobase, I_CF_H_0, 0, 0);
WriteRegBit(iobase, I_CF_H_0, 7, 0);
}
#endif /* via_IRCC_H */ #endif /* via_IRCC_H */
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