Commit d37f1a13 authored by Paul Walmsley's avatar Paul Walmsley Committed by Russell King

[ARM] OMAP2/3 clockdomains: add CM and PRM clkdms

Add clockdomains for the CM and PRM.  These will ultimately replace the
"wkup_clkdm", which appears to not actually exist on the hardware.
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 5b74c676
...@@ -14,6 +14,11 @@ ...@@ -14,6 +14,11 @@
/* /*
* OMAP2/3-common clockdomains * OMAP2/3-common clockdomains
*
* Even though the 2420 has a single PRCM module from the
* interconnect's perspective, internally it does appear to have
* separate PRM and CM clockdomains. The usual test case is
* sys_clkout/sys_clkout2.
*/ */
/* This is an implicit clockdomain - it is never defined as such in TRM */ /* This is an implicit clockdomain - it is never defined as such in TRM */
...@@ -23,6 +28,18 @@ static struct clockdomain wkup_clkdm = { ...@@ -23,6 +28,18 @@ static struct clockdomain wkup_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
}; };
static struct clockdomain prm_clkdm = {
.name = "prm_clkdm",
.pwrdm = { .name = "wkup_pwrdm" },
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
};
static struct clockdomain cm_clkdm = {
.name = "cm_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
};
/* /*
* 2420-only clockdomains * 2420-only clockdomains
*/ */
...@@ -266,6 +283,8 @@ static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { ...@@ -266,6 +283,8 @@ static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = {
static struct clockdomain *clockdomains_omap[] = { static struct clockdomain *clockdomains_omap[] = {
&wkup_clkdm, &wkup_clkdm,
&cm_clkdm,
&prm_clkdm,
#ifdef CONFIG_ARCH_OMAP2420 #ifdef CONFIG_ARCH_OMAP2420
&mpu_2420_clkdm, &mpu_2420_clkdm,
......
...@@ -50,9 +50,9 @@ ...@@ -50,9 +50,9 @@
/* /*
* Maximum number of clockdomains that can be associated with a powerdomain. * Maximum number of clockdomains that can be associated with a powerdomain.
* CORE powerdomain is probably the worst case. * CORE powerdomain on OMAP3 is the worst case
*/ */
#define PWRDM_MAX_CLKDMS 3 #define PWRDM_MAX_CLKDMS 4
/* XXX A completely arbitrary number. What is reasonable here? */ /* XXX A completely arbitrary number. What is reasonable here? */
#define PWRDM_TRANSITION_BAILOUT 100000 #define PWRDM_TRANSITION_BAILOUT 100000
......
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