Commit d4da6773 authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds

[PATCH] Baget update

This is an update for the Russian Baget industrial controller.  Suffers a
bit from bitrot, the authors have promised an update to me.
parent a16b2ff6
......@@ -4,10 +4,11 @@
#
obj-y := baget.o print.o setup.o time.o irq.o bagetIRQ.o \
reset.o wbflush.o
obj-$(CONFIG_SERIAL) += vacserial.o
reset.o
obj-$(CONFIG_VAC_RTC) += vacrtc.o
EXTRA_AFLAGS := $(CFLAGS)
bagetIRQ.o : bagetIRQ.S
$(CC) $(CFLAGS) -c -o $@ $<
......
/* $Id: baget.c,v 1.1 1999/01/17 03:49:37 ralf Exp $
*
/*
* baget.c: Baget low level stuff
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
......
/* $Id: bagetIRQ.S,v 1.1 1999/01/17 03:49:37 ralf Exp $
/*
* bagetIRQ.S: Interrupt exception dispatch code for Baget/MIPS
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
......
/* $Id$
*
/*
* balo.c: BAget LOader
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <linux/kernel.h>
#include <asm/system.h>
......@@ -42,27 +40,29 @@ static volatile enum balo_state_enum {
static __inline__ void reset_and_jump(int start, int mem_upper)
{
unsigned long tmp;
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
"mfc0\t$1,$12\n\t"
"mfc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"ori\t$1,$1,0xff00\n\t"
"xori\t$1,$1,0xff00\n\t"
"mtc0\t$1,$12\n\t"
"ori\t$1, $1, 0xff00\n\t"
"xori\t$1, $1, 0xff00\n\t"
"mtc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"move\t$4,%1\n\t"
"jr\t%0\n\t"
"move\t%0, %2\n\t"
"jr\t%1\n\t"
"nop\n\t"
".set\tat\n\t"
".set\treorder"
: /* no outputs */
:"Ir" (start), "Ir" (mem_upper)
:"$1", "$4", "memory");
: "=&r" (tmp)
: "Ir" (start), "Ir" (mem_upper)
: "memory");
}
static void start_kernel(void)
......
/* $Id: balo_supp.S,v 1.1 1999/01/17 03:49:38 ralf Exp $
/*
* balo_supp.S: BAget Loader supplement
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
......
......@@ -17,7 +17,6 @@
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
......@@ -28,7 +27,7 @@
#include <asm/baget/baget.h>
unsigned long spurious_count = 0;
volatile unsigned long irq_err_count;
/*
* This table is a correspondence between IRQ numbers and CPU PILs
......@@ -60,10 +59,10 @@ static inline int irq_to_pil(int irq_nr)
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
{
unsigned long status = read_32bit_cp0_register(CP0_STATUS);
unsigned long status = read_c0_status();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
write_32bit_cp0_register(CP0_STATUS, status);
write_c0_status(status);
}
/*
......@@ -97,10 +96,10 @@ void mask_irq_count(int irq_nr)
unsigned long flags;
int pil = irq_to_pil(irq_nr);
save_and_cli(flags);
local_irq_save(flags);
if (!--pil_in_use[pil])
mask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
void unmask_irq_count(int irq_nr)
......@@ -108,10 +107,10 @@ void unmask_irq_count(int irq_nr)
unsigned long flags;
int pil = irq_to_pil(irq_nr);
save_and_cli(flags);
local_irq_save(flags);
if (!pil_in_use[pil]++)
unmask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
/*
......@@ -122,18 +121,18 @@ void disable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
local_irq_save(flags);
mask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
void enable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
local_irq_save(flags);
unmask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
/*
......@@ -142,9 +141,9 @@ void enable_irq(unsigned int irq_nr)
*/
static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, };
int show_interrupts(struct seq_file *p, void *v)
int get_irq_list(char *buf)
{
int i;
int i, len = 0;
struct irqaction * action;
unsigned long flags;
......@@ -152,21 +151,21 @@ int show_interrupts(struct seq_file *p, void *v)
local_irq_save(flags);
action = irq_action[i];
if (!action)
goto skip;
seq_printf(p, "%2d: %8d %c %s",
gotos skip;
len += sprintf(buf+len, "%2d: %8d %c %s",
i, kstat_cpu(0).irqs[i],
(action->flags & SA_INTERRUPT) ? '+' : ' ',
action->name);
for (action=action->next; action; action = action->next) {
seq_printf(p, ",%s %s",
len += sprintf(buf+len, ",%s %s",
(action->flags & SA_INTERRUPT) ? " +" : "",
action->name);
}
seq_putc(p, '\n');
len += sprintf(buf+len, "\n");
skip:
local_irq_restore(flags);
}
return 0;
return len;
}
......@@ -183,8 +182,8 @@ static void do_IRQ(int irq, struct pt_regs * regs)
int do_random, cpu;
cpu = smp_processor_id();
irq_enter(cpu, irq);
kstat_cpu(cpu).irqs[irq]++;
irq_enter();
kstat_cpus(cpu)[irq]++;
mask_irq(irq);
action = *(irq + irq_action);
......@@ -205,7 +204,7 @@ static void do_IRQ(int irq, struct pt_regs * regs)
printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
}
unmask_irq(irq);
irq_exit(cpu, irq);
irq_exit();
/* unmasking and bottom half handling is done magically for us. */
}
......@@ -218,7 +217,7 @@ static void vic_reg_error(unsigned long address, unsigned char active_pils)
printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
"Current interrupt mask from CP0_CAUSE: %02x\n",
address, 0xff & active_pils,
0xff & (read_32bit_cp0_register(CP0_CAUSE)>>8));
0xff & (read_c0_cause()>>8));
{ int i; for (i=0; i<10000; i++) udelay(1000); }
}
......@@ -235,7 +234,7 @@ asmlinkage void baget_interrupt(struct pt_regs *regs)
BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
};
unsigned char active_pils;
while ((active_pils = read_32bit_cp0_register(CP0_CAUSE)>>8)) {
while ((active_pils = read_c0_cause()>>8)) {
int pil;
struct baget_int_reg* reg;
......@@ -291,9 +290,9 @@ int setup_baget_irq(int irq, struct irqaction * new)
if (new->flags & SA_SAMPLE_RANDOM)
rand_initialize_irq(irq);
save_and_cli(flags);
local_irq_save(flags);
*p = new;
restore_flags(flags);
local_irq_restore(flags);
if (!shared) {
unmask_irq_count(irq);
......@@ -351,11 +350,11 @@ void free_irq(unsigned int irq, void *dev_id)
continue;
/* Found it - now free it */
save_and_cli(flags);
local_irq_save(flags);
*p = action->next;
if (!irq[irq_action])
unmask_irq_count(irq);
restore_flags(flags);
local_irq_restore(flags);
kfree(action);
return;
}
......
OUTPUT_FORMAT("elf32-bigmips")
OUTPUT_FORMAT("elf32-tradbigmips")
OUTPUT_ARCH(mips)
ENTRY(balo_entry)
SECTIONS
......
/* $Id: print.c,v 1.1 1999/01/17 03:49:38 ralf Exp $
*
/*
* print.c: Simple print fascility
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <stdarg.h>
#include <linux/kernel.h>
......
......@@ -7,7 +7,13 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
char arcs_cmdline[COMMAND_LINE_SIZE];
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
/* Should probably return one of "BT23-201", "BT23-202" */
return "Baget";
}
void __init prom_init(unsigned int mem_upper)
{
......
/* $Id: setup.c,v 1.4 1999/10/09 00:00:57 ralf Exp $
*
/*
* setup.c: Baget/MIPS specific setup, including init of the feature struct.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
......
......@@ -82,17 +82,19 @@ void do_gettimeofday(struct timeval *tv)
do {
seq = read_seqbegin(&xtime_lock);
*tv = xtime;
tv->tv_sec = xtime.tv_sec;
tv->tv_usec = xtime.tv_nsec / 1000;
} while (read_seqretry(&xtime_lock, seq));
}
void do_settimeofday(struct timeval *tv)
{
write_seqlock_irq (&xtime_lock);
xtime = *tv;
write_seqlock_irq(&xtime_lock);
xtime.tv_usec = tv->tv_sec;
xtime.tv_nsec = tv->tv_usec;
time_adjust = 0; /* stop active adjtime() */
time_status |= STA_UNSYNC;
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
write_sequnlock_irq (&xtime_lock);
write_sequnlock_irq(&xtime_lock);
}
This diff is collapsed.
/*
* Setup the right wbflush routine for Baget/MIPS.
*
* Copyright (C) 1999 Gleb Raiko & Vladimir Roganov
*/
#include <linux/init.h>
#include <asm/bootinfo.h>
void (*__wbflush) (void);
static void wbflush_baget(void);
void __init wbflush_setup(void)
{
__wbflush = wbflush_baget;
}
/*
* Baget/MIPS doesn't need to write back the WB.
*/
static void wbflush_baget(void)
{
}
/* $Id$
/*
* baget.h: Definitions specific to Baget/MIPS machines.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
......
/* $Id$
*
/*
* vac.h: Various VIC controller defines. The VIC is a VME controller
* used in Baget/MIPS series.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#ifndef _MIPS_VAC_H
#define _MIPS_VAC_H
#ifndef _ASM_VAC_H
#define _ASM_VAC_H
#define VAC_SLSEL1_MASK 0x000
#define VAC_SLSEL1_BASE 0x100
......@@ -197,13 +196,13 @@
#define VAC_ID 0x2900
#ifndef __LANGUAGE_ASSEMBLY__
#ifndef __ASSEMBLY__
#define vac_inb(p) (*(volatile unsigned char *)(VAC_BASE + (p)))
#define vac_outb(v,p) (*((volatile unsigned char *)(VAC_BASE + (p))) = v)
#define vac_inw(p) (*(volatile unsigned short*)(VAC_BASE + (p)))
#define vac_outw(v,p) (*((volatile unsigned short*)(VAC_BASE + (p))) = v)
#endif /* __LANGUAGE_ASSEMBLY__ */
#endif /* !__ASSEMBLY__ */
#endif /* !(_MIPS_VAC_H) */
#endif /* _ASM_VAC_H */
/* $Id$
*
/*
* vic.h: Various VIC controller defines. The VIC is an interrupt controller
* used in Baget/MIPS series.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#ifndef _MIPS_VIC_H
#define _MIPS_VIC_H
#ifndef _ASM_BAGET_VIC_H
#define _ASM_BAGET_VIC_H
#define VIC_VME_II 0x3
#define VIC_VME_INT1 0x7
......@@ -183,11 +182,11 @@
#define VIC_BXFER_LEN_HI 0xDF
#define VIC_SYS_RESET 0xE3
#ifndef __LANGUAGE_ASSEMBLY__
#ifndef __ASSEMBLY__
#define vic_inb(p) (*(volatile unsigned char *)(VIC_BASE + (p)))
#define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
#endif /* __LANGUAGE_ASSEMBLY__ */
#endif /* !__ASSEMBLY__ */
#endif /* !(_MIPS_VIC_H) */
#endif /* _ASM_BAGET_VIC_H */
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