Commit d5cc0a1f authored by Pardha Saradhi K's avatar Pardha Saradhi K Committed by Mark Brown

ASoC: Intel: Skylake: Disable clock gating during firmware and library download

During firmware and library download, sometimes it is observed that
firmware and library download is timed-out resulting into probe failure.

This patch disables dynamic clock gating while firmware and library
download.
Signed-off-by: default avatarPardha Saradhi K <pardha.saradhi.kesapragada@intel.com>
Signed-off-by: default avatarSanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: default avatarGuneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 752c93aa
......@@ -417,7 +417,11 @@ int skl_resume_dsp(struct skl *skl)
if (skl->skl_sst->is_first_boot == true)
return 0;
/* disable dynamic clock gating during fw and lib download */
ctx->enable_miscbdcge(ctx->dev, false);
ret = skl_dsp_wake(ctx->dsp);
ctx->enable_miscbdcge(ctx->dev, true);
if (ret < 0)
return ret;
......
......@@ -1342,7 +1342,11 @@ static int skl_platform_soc_probe(struct snd_soc_platform *platform)
return -EIO;
}
/* disable dynamic clock gating during fw and lib download */
skl->skl_sst->enable_miscbdcge(platform->dev, false);
ret = ops->init_fw(platform->dev, skl->skl_sst);
skl->skl_sst->enable_miscbdcge(platform->dev, true);
if (ret < 0) {
dev_err(platform->dev, "Failed to boot first fw: %d\n", ret);
return ret;
......
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