hpt34x update

drivers/ide/pci/hpt34x.c

@@ -40,27 +40,20 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include "ide_modes.h"
 
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L)	((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
+#include "ide_modes.h"
+#include "hpt34x.h"
 
-#define HPT343_DEBUG_DRIVE_INFO		0
+#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
+#include <linux/stat.h>
+#include <linux/proc_fs.h>
 
-#undef DISPLAY_HPT34X_TIMINGS
+static u8 hpt34x_proc = 0;
 
 #define HPT34X_MAX_DEVS		8
 static struct pci_dev *hpt34x_devs[HPT34X_MAX_DEVS];
 static int n_hpt34x_devs;
 
-#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
-#include <linux/stat.h>
-#include <linux/proc_fs.h>
-
-static int hpt34x_get_info(char *, char **, off_t, int);
-extern int (*hpt34x_display_info)(char *, char **, off_t, int); /* ide-proc.c */
-
 static int hpt34x_get_info (char *buffer, char **addr, off_t offset, int count)
 {
 	char *p = buffer;
@@ -77,8 +70,8 @@ static int hpt34x_get_info (char *buffer, char **addr, off_t offset, int count)
 		 * at that point bibma+0x2 et bibma+0xa are byte registers
 		 * to investigate:
 		 */
-		c0 = inb_p((unsigned short)bibma + 0x02);
-		c1 = inb_p((unsigned short)bibma + 0x0a);
+		c0 = inb_p((u16)bibma + 0x02);
+		c1 = inb_p((u16)bibma + 0x0a);
 		p += sprintf(p, "\nController: %d\n", i);
 		p += sprintf(p, "--------------- Primary Channel "
 				"---------------- Secondary Channel "
@@ -106,51 +99,15 @@ static int hpt34x_get_info (char *buffer, char **addr, off_t offset, int count)
 }
 #endif  /* defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS) */
 
-byte hpt34x_proc = 0;
-
-static byte hpt34x_ratemask (ide_drive_t *drive)
+static u8 hpt34x_ratemask (ide_drive_t *drive)
 {
-	byte mode = 0x00;
-
-	mode |= 0x01;
-
-	if (!eighty_ninty_three(drive)) {
-		mode &= ~0xFE;
-		mode |= 0x01;
-	}
-	return (mode &= ~0xF8);
-}
-
-static byte hpt34x_ratefilter (ide_drive_t *drive, byte speed)
-{
-#ifdef CONFIG_BLK_DEV_IDEDMA
-# ifdef CONFIG_HPT34X_AUTODMA
-byte mode = hpt34x_ratemask(drive);
-
-	switch(mode) {
-		case 0x04:	// while (speed > XFER_UDMA_6) speed--; break;
-		case 0x03:	// while (speed > XFER_UDMA_5) speed--; break;
-		case 0x02:	// while (speed > XFER_UDMA_4) speed--; break;
-		case 0x01:	while (speed > XFER_UDMA_2) speed--; break;
-		case 0x00:
-		default:	while (speed > XFER_MW_DMA_2) speed--; break;
-			break;
-	}
-# else /* !CONFIG_HPT34X_AUTODMA */
-	while (speed > XFER_PIO_4) speed--;
-# endif /* CONFIG_HPT34X_AUTODMA */
-#else
-	while (speed > XFER_PIO_4) speed--;
-#endif /* CONFIG_BLK_DEV_IDEDMA */
-//	printk("%s: mode == %02x speed == %02x\n", drive->name, mode, speed);
-	return speed;
+	return 1;
 }
 
 static void hpt34x_clear_chipset (ide_drive_t *drive)
 {
 	struct pci_dev *dev	= HWIF(drive)->pci_dev;
-	unsigned int reg1	= 0, tmp1 = 0;
-	unsigned int reg2	= 0, tmp2 = 0;
+	u32 reg1 = 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
 
 	pci_read_config_dword(dev, 0x44, &reg1);
 	pci_read_config_dword(dev, 0x48, &reg2);
@@ -160,13 +117,12 @@ static void hpt34x_clear_chipset (ide_drive_t *drive)
 	pci_write_config_dword(dev, 0x48, tmp2);
 }
 
-static int hpt34x_tune_chipset (ide_drive_t *drive, byte xferspeed)
+static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
 {
 	struct pci_dev *dev	= HWIF(drive)->pci_dev;
-	byte speed		= hpt34x_ratefilter(drive, xferspeed);
-	unsigned int reg1	= 0, tmp1 = 0;
-	unsigned int reg2	= 0, tmp2 = 0;
-	byte			hi_speed, lo_speed;
+	u8 speed	= ide_rate_filter(hpt34x_ratemask(drive), xferspeed);
+	u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
+	u8			hi_speed, lo_speed;
 
 	SPLIT_BYTE(speed, hi_speed, lo_speed);
 
@@ -195,20 +151,11 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, byte xferspeed)
 	return(ide_config_drive_speed(drive, speed));
 }
 
-static void hpt34x_tune_drive (ide_drive_t *drive, byte pio)
+static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio)
 {
-	byte speed;
 	pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
-
-	switch(pio) {
-		case 4:		speed = XFER_PIO_4; break;
-		case 3:		speed = XFER_PIO_3; break;
-		case 2:		speed = XFER_PIO_2; break;
-		case 1:		speed = XFER_PIO_1; break;
-		default:	speed = XFER_PIO_0; break;
-	}
 	hpt34x_clear_chipset(drive);
-	(void) hpt34x_tune_chipset(drive, speed);
+	(void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio));
 }
 
 #ifdef CONFIG_BLK_DEV_IDEDMA
@@ -220,178 +167,61 @@ static void hpt34x_tune_drive (ide_drive_t *drive, byte pio)
  */
 static int config_chipset_for_dma (ide_drive_t *drive)
 {
-	struct hd_driveid *id	= drive->id;
-	byte mode		= hpt34x_ratemask(drive);
-	byte speed		= 0x00;
-
-	if (drive->media != ide_disk)
-		return ((int) ide_dma_off_quietly);
-
-	switch(mode) {
-		case 0x01:
-			if (id->dma_ultra & 0x0004)
-				{ speed = XFER_UDMA_2; break; }
-			if (id->dma_ultra & 0x0002)
-				{ speed = XFER_UDMA_1; break; }
-			if (id->dma_ultra & 0x0001)
-				{ speed = XFER_UDMA_0; break; }
-		case 0x00:
-			if (id->dma_mword & 0x0004)
-				{ speed = XFER_MW_DMA_2; break; }
-			if (id->dma_mword & 0x0002)
-				{ speed = XFER_MW_DMA_1; break; }
-			if (id->dma_mword & 0x0001)
-				{ speed = XFER_MW_DMA_0; break; }
-			if (id->dma_1word & 0x0004)
-				{ speed = XFER_SW_DMA_2; break; }
-			if (id->dma_1word & 0x0002)
-				{ speed = XFER_SW_DMA_1; break; }
-			if (id->dma_1word & 0x0001)
-				{ speed = XFER_SW_DMA_0; break; }
-		default:
-			return ((int) ide_dma_off_quietly);
-	}
+	u8 speed = ide_dma_speed(drive, hpt34x_ratemask(drive));
+
+	if (!(speed))
+		return 0;
 
 	hpt34x_clear_chipset(drive);
 	(void) hpt34x_tune_chipset(drive, speed);
-
-	return ((int)	((id->dma_ultra >> 11) & 3) ? ide_dma_off :
-			((id->dma_ultra >> 8) & 7) ? ide_dma_on :
-			((id->dma_mword >> 8) & 7) ? ide_dma_on :
-			((id->dma_1word >> 8) & 7) ? ide_dma_on :
-						     ide_dma_off_quietly);
+	return ide_dma_enable(drive);
 }
 
-static int config_drive_xfer_rate (ide_drive_t *drive)
+static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
 {
+	ide_hwif_t *hwif	= HWIF(drive);
 	struct hd_driveid *id	= drive->id;
-	ide_dma_action_t dma_func = ide_dma_on;
 
 	drive->init_speed = 0;
 
-	if (id && (id->capability & 1) && HWIF(drive)->autodma) {
+	if (id && (id->capability & 1) && drive->autodma) {
 		/* Consult the list of known "bad" drives */
-		if (ide_dmaproc(ide_dma_bad_drive, drive)) {
-			dma_func = ide_dma_off;
+		if (hwif->ide_dma_bad_drive(drive))
 			goto fast_ata_pio;
-		}
-		dma_func = ide_dma_off_quietly;
 		if (id->field_valid & 4) {
-			if (id->dma_ultra & 0x0007) {
+			if (id->dma_ultra & hwif->ultra_mask) {
 				/* Force if Capable UltraDMA */
-				dma_func = config_chipset_for_dma(drive);
-				if ((id->field_valid & 2) &&
-				    (dma_func != ide_dma_on))
+				int dma = config_chipset_for_dma(drive);
+				if ((id->field_valid & 2) && dma)
 					goto try_dma_modes;
 			}
 		} else if (id->field_valid & 2) {
 try_dma_modes:
-			if ((id->dma_mword & 0x0007) ||
-			    (id->dma_1word & 0x0007)) {
+			if ((id->dma_mword & hwif->mwdma_mask) ||
+			    (id->dma_1word & hwif->swdma_mask)) {
 				/* Force if Capable regular DMA modes */
-				dma_func = config_chipset_for_dma(drive);
-				if (dma_func != ide_dma_on)
-					goto no_dma_set;
-			}
-		} else if (ide_dmaproc(ide_dma_good_drive, drive)) {
-			if (id->eide_dma_time > 150) {
+				if (!config_chipset_for_dma(drive))
 					goto no_dma_set;
 			}
+		} else if (hwif->ide_dma_good_drive(drive) &&
+			   (id->eide_dma_time < 150)) {
 			/* Consult the list of known "good" drives */
-			dma_func = config_chipset_for_dma(drive);
-			if (dma_func != ide_dma_on)
+			if (!config_chipset_for_dma(drive))
 				goto no_dma_set;
 		} else {
 			goto fast_ata_pio;
 		}
 	} else if ((id->capability & 8) || (id->field_valid & 2)) {
 fast_ata_pio:
-		dma_func = ide_dma_off_quietly;
 no_dma_set:
 		hpt34x_tune_drive(drive, 255);
+		return hwif->ide_dma_off_quietly(drive);
 	}
 
 #ifndef CONFIG_HPT34X_AUTODMA
-	if (dma_func == ide_dma_on)
-		dma_func = ide_dma_off;
+	return hwif->ide_dma_off_quietly(drive);
 #endif /* CONFIG_HPT34X_AUTODMA */
-
-	return HWIF(drive)->dmaproc(dma_func, drive);
-}
-
-/*
- * hpt34x_dmaproc() initiates/aborts (U)DMA read/write operations on a drive.
- *
- * This is specific to the HPT343 UDMA bios-less chipset
- * and HPT345 UDMA bios chipset (stamped HPT363)
- * by HighPoint|Triones Technologies, Inc.
- */
-
-int hpt34x_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
-{
-	ide_hwif_t *hwif = HWIF(drive);
-//	ide_task_t *args = HWGROUP(drive)->rq->special;
-	unsigned long dma_base = hwif->dma_base;
-	unsigned int count, reading = 0;
-	byte dma_stat;
-
-	switch (func) {
-		case ide_dma_check:
-			return config_drive_xfer_rate(drive);
-		case ide_dma_read:
-			reading = 1 << 3;
-		case ide_dma_write:
-			if (!(count = ide_build_dmatable(drive, func)))
-				return 1;
-				/* try PIO instead of DMA */
-			outl(hwif->dmatable_dma, dma_base + 4);
-			/* PRD table */
-			reading |= 0x01;
-			OUT_BYTE(reading, dma_base);
-			/* specify r/w */
-			OUT_BYTE(IN_BYTE(dma_base+2)|6, dma_base+2);
-			/* clear INTR & ERROR flags */
-			drive->waiting_for_dma = 1;
-			if (drive->media != ide_disk)
-				return 0;
-			if (HWGROUP(drive)->handler != NULL)	/* paranoia check */
-				BUG();
-			ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL);
-			/* issue cmd to drive */
-			/*
-			 * FIX ME to use only ACB ide_task_t args Struct
-			 */
-#if 0
-		{
-			ide_task_t *args = HWGROUP(drive)->rq->special;
-			OUT_BYTE(args->tfRegister[IDE_COMMAND_OFFSET], IDE_COMMAND_REG);
-		{
-#else
-			if (HWGROUP(drive)->rq->flags == REQ_DRIVE_TASKFILE) {
-				ide_task_t *args = HWGROUP(drive)->rq->special;
-				OUT_BYTE(args->tfRegister[IDE_COMMAND_OFFSET], IDE_COMMAND_REG);
-			} else if (drive->addressing == 1)
-				OUT_BYTE((reading == 9) ? WIN_READDMA_EXT : WIN_WRITEDMA_EXT, IDE_COMMAND_REG);
-			else
-				OUT_BYTE((reading == 9) ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
-#endif
-			return HWIF(drive)->dmaproc(ide_dma_begin, drive);
-		case ide_dma_end:	/* returns 1 on error, 0 otherwise */
-			drive->waiting_for_dma = 0;
-			/* stop DMA */
-			OUT_BYTE(IN_BYTE(dma_base)&~1, dma_base);
-			/* get DMA status */
-			dma_stat = IN_BYTE(dma_base+2);
-			/* clear the INTR & ERROR bits */
-			OUT_BYTE(dma_stat|6, dma_base+2);
-			/* purge DMA mappings */
-			ide_destroy_dmatable(drive);
-			/* verify good DMA status */
-			return (dma_stat & 7) != 4;
-		default:
-			break;
-	}
-	return ide_dmaproc(func, drive);	/* use standard DMA stuff */
+	return hwif->ide_dma_on(drive);
 }
 #endif /* CONFIG_BLK_DEV_IDEDMA */
 
@@ -400,12 +230,13 @@ int hpt34x_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
  */
 #define	HPT34X_PCI_INIT_REG		0x80
 
-unsigned int __init pci_init_hpt34x (struct pci_dev *dev, const char *name)
+static unsigned int __init init_chipset_hpt34x (struct pci_dev *dev, const char *name)
 {
 	int i = 0;
 	unsigned long hpt34xIoBase = pci_resource_start(dev, 4);
 	unsigned long hpt_addr[4] = { 0x20, 0x34, 0x28, 0x3c };
-	unsigned short cmd;
+	unsigned long hpt_addr_len[4] = { 7, 3, 7, 3 };
+	u16 cmd;
 	unsigned long flags;
 
 	local_irq_save(flags);
@@ -415,7 +246,8 @@ unsigned int __init pci_init_hpt34x (struct pci_dev *dev, const char *name)
 
 	if (cmd & PCI_COMMAND_MEMORY) {
 		if (pci_resource_start(dev, PCI_ROM_RESOURCE)) {
-			pci_write_config_byte(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
+			pci_write_config_byte(dev, PCI_ROM_ADDRESS,
+				dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
 			printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
 				dev->resource[PCI_ROM_RESOURCE].start);
 		}
@@ -430,7 +262,8 @@ unsigned int __init pci_init_hpt34x (struct pci_dev *dev, const char *name)
 	pci_write_config_word(dev, PCI_COMMAND, cmd & ~PCI_COMMAND_IO);
 	for(i=0; i<4; i++) {
 		dev->resource[i].start = (hpt34xIoBase + hpt_addr[i]);
-		dev->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
+		dev->resource[i].end = dev->resource[i].start + hpt_addr_len[i];
+		dev->resource[i].flags = IORESOURCE_IO;
 		pci_write_config_dword(dev,
 				(PCI_BASE_ADDRESS_0 + (i * 4)),
 				dev->resource[i].start);
@@ -439,53 +272,83 @@ unsigned int __init pci_init_hpt34x (struct pci_dev *dev, const char *name)
 
 	local_irq_restore(flags);
 
+#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
 	hpt34x_devs[n_hpt34x_devs++] = dev;
 
-#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
 	if (!hpt34x_proc) {
 		hpt34x_proc = 1;
-		hpt34x_display_info = &hpt34x_get_info;
+		ide_pci_register_host_proc(&hpt34x_procs[0]);
 	}
 #endif /* DISPLAY_HPT34X_TIMINGS && CONFIG_PROC_FS */
 
 	return dev->irq;
 }
 
-void __init ide_init_hpt34x (ide_hwif_t *hwif)
+static void __init init_hwif_hpt34x (ide_hwif_t *hwif)
 {
-	unsigned short pcicmd = 0;
+	u16 pcicmd = 0;
+
+	hwif->autodma = 0;
+
 	hwif->tuneproc = &hpt34x_tune_drive;
 	hwif->speedproc = &hpt34x_tune_chipset;
+	hwif->no_dsc = 1;
 	hwif->drives[0].autotune = 1;
 	hwif->drives[1].autotune = 1;
-	hwif->autodma = 0;
 
 	pci_read_config_word(hwif->pci_dev, PCI_COMMAND, &pcicmd);
 
 	if (!hwif->dma_base)
 		return;
 
+	hwif->ultra_mask = 0x07;
+	hwif->mwdma_mask = 0x07;
+	hwif->swdma_mask = 0x07;
+
 #ifdef CONFIG_BLK_DEV_IDEDMA
-	hwif->dmaproc = &hpt34x_dmaproc;
-#ifdef CONFIG_IDEDMA_AUTO
+	hwif->ide_dma_check = &hpt34x_config_drive_xfer_rate;
 	if (!noautodma)
 		hwif->autodma = (pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0;
-#endif /* CONFIG_IDEDMA_AUTO */
+	hwif->drives[0].autodma = hwif->autodma;
+	hwif->drives[1].autodma = hwif->autodma;
 #endif /* CONFIG_BLK_DEV_IDEDMA */
 }
 
-extern void ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d);
+static void __init init_dma_hpt34x (ide_hwif_t *hwif, unsigned long dmabase)
+{
+	ide_setup_dma(hwif, dmabase, 8);
+}
+
+extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
 
-void __init fixup_device_hpt343 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __init init_setup_hpt34x (struct pci_dev *dev, ide_pci_device_t *d)
 {
 	char *chipset_names[] = {"HPT343", "HPT345"};
-	unsigned short pcicmd = 0;
+	u16 pcicmd = 0;
 
 	pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
 
 	strcpy(d->name, chipset_names[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]);
 	d->bootable = (pcicmd & PCI_COMMAND_MEMORY) ? OFF_BOARD : NEVER_BOARD;
-	printk("%s: IDE controller on PCI bus %02x dev %02x\n",
-		d->name, dev->bus->number, dev->devfn);
+
 	ide_setup_pci_device(dev, d);
 }
+
+int  __init hpt34x_scan_pcidev (struct pci_dev *dev)
+{
+	ide_pci_device_t *d;
+
+	if (dev->vendor != PCI_VENDOR_ID_TTI)
+		return 0;
+
+	for (d = hpt34x_chipsets; d && d->vendor && d->device; ++d) {
+		if (((d->vendor == dev->vendor) &&
+		     (d->device == dev->device)) &&
+		    (d->init_setup)) {
+			d->init_setup(dev, d);
+			return 1;
+		}
+	}
+	return 0;
+}
+

drivers/ide/pci/hpt34x.h

+#ifndef HPT34X_H
+#define HPT34X_H
+
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/ide.h>
+
+#define HPT343_DEBUG_DRIVE_INFO		0
+
+#ifndef SPLIT_BYTE
+#define SPLIT_BYTE(B,H,L)	((H)=(B>>4), (L)=(B-((B>>4)<<4)))
+#endif
+
+#undef DISPLAY_HPT34X_TIMINGS
+
+#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
+#include <linux/stat.h>
+#include <linux/proc_fs.h>
+
+static u8 hpt34x_proc;
+
+static int hpt34x_get_info(char *, char **, off_t, int);
+
+static ide_pci_host_proc_t hpt34x_procs[] __initdata = {
+	{
+		name:		"hpt34x",
+		set:		1,
+		get_info:	hpt34x_get_info,
+		parent:		NULL,
+	},
+};
+#endif  /* defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS) */
+
+static void init_setup_hpt34x(struct pci_dev *, ide_pci_device_t *);
+static unsigned int init_chipset_hpt34x(struct pci_dev *, const char *);
+static void init_hwif_hpt34x(ide_hwif_t *);
+static void init_dma_hpt34x(ide_hwif_t *, unsigned long);
+
+static ide_pci_device_t hpt34x_chipsets[] __initdata = {
+	{
+		vendor:		PCI_VENDOR_ID_TTI,
+		device:		PCI_DEVICE_ID_TTI_HPT343,
+		name:		"HPT34X",
+		init_setup:	init_setup_hpt34x,
+		init_chipset:	init_chipset_hpt34x,
+		init_iops:	NULL,
+		init_hwif:	init_hwif_hpt34x,
+		init_dma:	init_dma_hpt34x,
+		channels:	2,
+		autodma:	NOAUTODMA,
+		enablebits:	{{0x00,0x00,0x00}, {0x00,0x00,0x00}},
+		bootable:	NEVER_BOARD,
+		extra:		16
+	},{
+		vendor:		0,
+		device:		0,
+		channels:	0,
+		bootable:	EOL,
+	}
+};
+
+#endif /* HPT34X_H */