Commit d82420b5 authored by Roman Li's avatar Roman Li Committed by Alex Deucher

drm/amd: Add dce-12.1 gpio aux registers (v2)

Updating dce12 register headers by adding dc registers
required for potential DP LTTPR support.

v2: fix mode change
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c6034aa2
......@@ -2095,6 +2095,18 @@
#define mmDC_GPIO_AUX_CTRL_2_BASE_IDX 2
#define mmDC_GPIO_RXEN 0x212f
#define mmDC_GPIO_RXEN_BASE_IDX 2
#define mmDC_GPIO_AUX_CTRL_3 0x2130
#define mmDC_GPIO_AUX_CTRL_3_BASE_IDX 2
#define mmDC_GPIO_AUX_CTRL_4 0x2131
#define mmDC_GPIO_AUX_CTRL_4_BASE_IDX 2
#define mmDC_GPIO_AUX_CTRL_5 0x2132
#define mmDC_GPIO_AUX_CTRL_5_BASE_IDX 2
#define mmAUXI2C_PAD_ALL_PWR_OK 0x2133
#define mmAUXI2C_PAD_ALL_PWR_OK_BASE_IDX 2
#define mmDC_GPIO_PULLUPEN 0x2134
#define mmDC_GPIO_PULLUPEN_BASE_IDX 2
#define mmDC_GPIO_AUX_CTRL_6 0x2135
#define mmDC_GPIO_AUX_CTRL_6_BASE_IDX 2
#define mmBPHYC_DAC_MACRO_CNTL 0x2136
#define mmBPHYC_DAC_MACRO_CNTL_BASE_IDX 2
#define mmDAC_MACRO_CNTL_RESERVED0 0x2136
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