Commit da57b2aa authored by David S. Miller's avatar David S. Miller

Merge davem@nuts.davemloft.net:/disk1/BK/net-2.6

into kernel.bkbits.net:/home/davem/net-2.6
parents a2f98d57 6dc30fc2
......@@ -421,9 +421,9 @@ config PM
Power Management is most important for battery powered laptop
computers; if you have a laptop, check out the Linux Laptop home
page on the WWW at
<http://www.cs.utexas.edu/users/kharker/linux-laptop/> and the
Battery Powered Linux mini-HOWTO, available from
page on the WWW at <http://www.linux-on-laptops.com/> or
Tuxmobil - Linux on Mobile Computers at <http://www.tuxmobil.org/>
and the Battery Powered Linux mini-HOWTO, available from
<http://www.tldp.org/docs.html#howto>.
Note that, even if you say N here, Linux on the x86 architecture
......
......@@ -91,10 +91,28 @@ config CPU_ARM922T
Say Y if you want support for the ARM922T processor.
Otherwise, say N.
# ARM925T
config CPU_ARM925T
bool
depends on ARCH_OMAP1510
default y
select CPU_32v4
select CPU_ABRT_EV4T
select CPU_CACHE_V4WT
select CPU_COPY_V4WB
select CPU_TLB_V4WBI
help
The ARM925T is a mix between the ARM920T and ARM926T, but with
different instruction and data caches. It is used in TI's OMAP
device family.
Say Y if you want support for the ARM925T processor.
Otherwise, say N.
# ARM926T
config CPU_ARM926T
bool "Support ARM926T processor"
depends on ARCH_INTEGRATOR
depends on ARCH_INTEGRATOR || ARCH_OMAP1610
select CPU_32v5
select CPU_ABRT_EV5TJ
select CPU_COPY_V4WB
......@@ -288,7 +306,7 @@ comment "Processor Features"
config ARM_THUMB
bool "Support Thumb user binaries"
depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE
depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE
default y
help
Say Y if you want to include kernel support for running user space
......@@ -311,21 +329,21 @@ config CPU_BIG_ENDIAN
config CPU_ICACHE_DISABLE
bool "Disable I-Cache"
depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM926T || CPU_ARM1020
depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020
help
Say Y here to disable the processor instruction cache. Unless
you have a reason not to or are unsure, say N.
config CPU_DCACHE_DISABLE
bool "Disable D-Cache"
depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM926T || CPU_ARM1020
depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020
help
Say Y here to disable the processor data cache. Unless
you have a reason not to or are unsure, say N.
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE
depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE
help
Say Y here to use the data cache in writethough mode. Unless you
specifically require this or are unsure, say N.
......
......@@ -39,6 +39,7 @@ obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o
obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o
obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o
obj-$(CONFIG_CPU_ARM925T) += proc-arm925.o
obj-$(CONFIG_CPU_ARM926T) += proc-arm926.o
obj-$(CONFIG_CPU_ARM1020) += proc-arm1020.o
obj-$(CONFIG_CPU_ARM1020E) += proc-arm1020e.o
......
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......@@ -16,8 +16,6 @@
#undef DEBUG_CMDLINE
char arcs_cmdline[CL_SIZE];
char * __init prom_getcmdline(void)
{
return arcs_cmdline;
......
......@@ -63,7 +63,7 @@ static struct smatch mach_table[] = {
"SNI RM200_PCI",
MACH_GROUP_SNI_RM,
MACH_SNI_RM200_PCI,
0
PROM_FLAG_DONT_FREE_TEMP
}
};
......
......@@ -10,6 +10,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/bootinfo.h>
#include <asm/sgialib.h>
#undef DEBUG_PROM_INIT
......@@ -19,13 +20,13 @@ struct linux_romvec *romvec;
int prom_argc;
LONG *_prom_argv, *_prom_envp;
void __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
void __init prom_init(void)
{
PSYSTEM_PARAMETER_BLOCK pb = PROMBLOCK;
romvec = ROMVECTOR;
prom_argc = argc;
_prom_argv = (LONG *) argv;
_prom_envp = (LONG *) envp;
prom_argc = fw_arg0;
_prom_argv = (LONG *) fw_arg1;
_prom_envp = (LONG *) fw_arg2;
if (pb->magic != 0x53435241) {
prom_printf("Aieee, bad prom vector magic %08lx\n", pb->magic);
......
......@@ -26,6 +26,12 @@
#undef DEBUG
/*
* For ARC firmware memory functions the unit of meassuring memory is always
* a 4k page of memory
*/
#define ARC_PAGE_SHIFT 12
struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
{
return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
......@@ -127,20 +133,23 @@ void __init prom_meminit(void)
unsigned long base, size;
long type;
base = p->base << PAGE_SHIFT;
size = p->pages << PAGE_SHIFT;
base = p->base << ARC_PAGE_SHIFT;
size = p->pages << ARC_PAGE_SHIFT;
type = prom_memtype_classify(p->type);
add_memory_region(base, size, type);
}
}
void __init prom_free_prom_memory (void)
unsigned long __init prom_free_prom_memory(void)
{
unsigned long freed = 0;
unsigned long addr;
int i;
if (prom_flags & PROM_FLAG_DONT_FREE_TEMP)
return 0;
for (i = 0; i < boot_mem_map.nr_map; i++) {
if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
continue;
......@@ -156,4 +165,6 @@ void __init prom_free_prom_memory (void)
}
}
printk(KERN_INFO "Freeing prom memory: %ldkb freed\n", freed >> 10);
return freed;
}
......@@ -101,3 +101,8 @@ ArcFlushAllCaches(VOID)
{
ARC_CALL0(cache_flush);
}
DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
{
return ARC_CALL1(GetDisplayStatus, FileID);
}
......@@ -5,14 +5,11 @@
#
# Makefile for the Alchemy Au1000 CPU, generic files.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y += prom.o int-handler.o dma.o irq.o puts.o \
time.o reset.o clocks.o power.o
time.o reset.o clocks.o power.o setup.o \
sleeper.o
obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
obj-$(CONFIG_KGDB) += dbg_io.o
obj-$(CONFIG_RTC) += rtc.o
obj-$(CONFIG_PCI) += pci.o
......@@ -28,7 +28,7 @@
*/
#include <linux/module.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
static unsigned int au1x00_clock; // Hz
static unsigned int lcd_clock; // KHz
......@@ -85,8 +85,7 @@ void set_au1x00_lcd_clock(void)
lcd_clock = sys_busclk / 4;
if (lcd_clock > 50000) /* Epson MAX */
printk("%s: warning: LCD clock too high (%d KHz)\n",
__FUNCTION__, lcd_clock);
printk("warning: LCD clock too high (%d KHz)\n", lcd_clock);
}
unsigned int get_au1x00_lcd_clock(void)
......
#include <linux/config.h>
#include <asm/io.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
#ifdef CONFIG_KGDB
......
......@@ -36,12 +36,12 @@
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <asm/au1000.h>
#include <asm/au1000_dma.h>
#include <linux/interrupt.h>
#include <asm/system.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1000_dma.h>
#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
/*
* A note on resource allocation:
*
......@@ -95,7 +95,6 @@ static const struct {
{I2S_DATA, DMA_DR | DMA_DW32 | DMA_NC}
};
int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
int length, int *eof, void *data)
{
......@@ -152,7 +151,7 @@ void dump_au1000_dma_channel(unsigned int dmanr)
* Requests the DMA done IRQ if irqhandler != NULL.
*/
int request_au1000_dma(int dev_id, const char *dev_str,
void (*irqhandler)(int, void *, struct pt_regs *),
irqreturn_t (*irqhandler)(int, void *, struct pt_regs *),
unsigned long irqflags,
void *irq_dev_id)
{
......@@ -198,7 +197,6 @@ int request_au1000_dma(int dev_id, const char *dev_str,
return i;
}
void free_au1000_dma(unsigned int dmanr)
{
struct dma_chan *chan = get_dma_chan(dmanr);
......@@ -215,3 +213,4 @@ void free_au1000_dma(unsigned int dmanr)
chan->irq_dev = NULL;
chan->dev_id = -1;
}
#endif // AU1000 AU1500 AU1100
This diff is collapsed.
/*
* BRIEF MODULE DESCRIPTION
* Alchemy/AMD Au1x00 pci support.
*
* Copyright 2001,2002,2003 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
* Support for all devices (greater than 16) added by David Gathright.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/mach-au1x00/au1000.h>
//#include <asm/pb1500.h>
#ifdef CONFIG_MIPS_PB1000
#include <asm/mach-pb1x00/pb1000.h>
#endif
#include <asm/pci_channel.h>
/* TBD */
static struct resource pci_io_resource = {
"pci IO space",
(u32)PCI_IO_START,
(u32)PCI_IO_END,
IORESOURCE_IO
};
static struct resource pci_mem_resource = {
"pci memory space",
(u32)PCI_MEM_START,
(u32)PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops au1x_pci_ops;
static struct pci_controller au1x_controller = {
.pci_ops = &au1x_pci_ops,
.io_resource = &pci_io_resource,
.mem_resource = &pci_mem_resource,
};
#ifdef CONFIG_SOC_AU1500
static unsigned long virt_io_addr;
#endif
static int __init au1x_pci_setup(void)
{
#ifdef CONFIG_SOC_AU1500
int i;
struct pci_dev *dev;
virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
if (!virt_io_addr) {
printk(KERN_ERR "Unable to ioremap pci space\n");
return;
}
#ifdef CONFIG_DMA_NONCOHERENT
/*
* Set the NC bit in controller for pre-AC silicon
*/
au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
printk("Non-coherent PCI accesses enabled\n");
#endif
set_io_port_base(virt_io_addr);
#endif
#ifdef CONFIG_MIPS_PB1000 /* This is truly board specific */
unsigned long pci_mem_start = (unsigned long) PCI_MEM_START;
au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
au_writel(0, SDRAM_MBAR); // set mbar to 0
au_writel(0x2, SDRAM_CMD); // enable memory accesses
au_sync_delay(1);
// set extend byte to mbar of ext slot
au_writel(((pci_mem_start >> 24) & 0xff) |
(1 << 8 | 1 << 9 | 1 << 10 | 1 << 27), PCI_BRIDGE_CONFIG);
#endif
register_pci_controller(&au1x_controller);
}
arch_initcall(au1x_pci_setup);
......@@ -39,7 +39,9 @@
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
#ifdef CONFIG_PM
#define DEBUG 1
#ifdef DEBUG
......@@ -48,13 +50,12 @@
# define DPRINTK(fmt, args...)
#endif
extern void au1k_wait(void);
static void calibrate_delay(void);
extern void set_au1000_speed(unsigned int new_freq);
extern unsigned int get_au1000_speed(void);
extern unsigned long get_au1000_uart_baud_base(void);
extern void set_au1000_uart_baud_base(unsigned long new_baud_base);
extern void set_au1x00_speed(unsigned int new_freq);
extern unsigned int get_au1x00_speed(void);
extern unsigned long get_au1x00_uart_baud_base(void);
extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
extern unsigned long save_local_and_disable(int controller);
extern void restore_local_and_enable(int controller, unsigned long mask);
extern void local_enable_irq(unsigned int irq_nr);
......@@ -64,10 +65,144 @@ extern void local_enable_irq(unsigned int irq_nr);
#define ACPI_S1_SLP_TYP 19
#define ACPI_SLEEP 21
#ifdef CONFIG_PM
static spinlock_t pm_lock = SPIN_LOCK_UNLOCKED;
/* We need to save/restore a bunch of core registers that are
* either volatile or reset to some state across a processor sleep.
* If reading a register doesn't provide a proper result for a
* later restore, we have to provide a function for loading that
* register and save a copy.
*
* We only have to save/restore registers that aren't otherwise
* done as part of a driver pm_* function.
*/
static uint sleep_aux_pll_cntrl;
static uint sleep_cpu_pll_cntrl;
static uint sleep_pin_function;
static uint sleep_uart0_inten;
static uint sleep_uart0_fifoctl;
static uint sleep_uart0_linectl;
static uint sleep_uart0_clkdiv;
static uint sleep_uart0_enable;
static uint sleep_usbhost_enable;
static uint sleep_usbdev_enable;
static uint sleep_static_memctlr[4][3];
/* Define this to cause the value you write to /proc/sys/pm/sleep to
* set the TOY timer for the amount of time you want to sleep.
* This is done mainly for testing, but may be useful in other cases.
* The value is number of 32KHz ticks to sleep.
*/
#define SLEEP_TEST_TIMEOUT 1
#ifdef SLEEP_TEST_TIMEOUT
static int sleep_ticks;
void wakeup_counter0_set(int ticks);
#endif
static void
save_core_regs(void)
{
extern void save_au1xxx_intctl(void);
extern void pm_eth0_shutdown(void);
/* Do the serial ports.....these really should be a pm_*
* registered function by the driver......but of course the
* standard serial driver doesn't understand our Au1xxx
* unique registers.
*/
sleep_uart0_inten = au_readl(UART0_ADDR + UART_IER);
sleep_uart0_fifoctl = au_readl(UART0_ADDR + UART_FCR);
sleep_uart0_linectl = au_readl(UART0_ADDR + UART_LCR);
sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
/* Shutdown USB host/device.
*/
sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
/* There appears to be some undocumented reset register....
*/
au_writel(0, 0xb0100004); au_sync();
au_writel(0, USB_HOST_CONFIG); au_sync();
sleep_usbdev_enable = au_readl(USBD_ENABLE);
au_writel(0, USBD_ENABLE); au_sync();
/* Save interrupt controller state.
*/
save_au1xxx_intctl();
/* Clocks and PLLs.
*/
sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL);
/* We don't really need to do this one, but unless we
* write it again it won't have a valid value if we
* happen to read it.
*/
sleep_cpu_pll_cntrl = au_readl(SYS_CPUPLL);
sleep_pin_function = au_readl(SYS_PINFUNC);
/* Save the static memory controller configuration.
*/
sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0);
sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0);
sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0);
sleep_static_memctlr[1][0] = au_readl(MEM_STCFG1);
sleep_static_memctlr[1][1] = au_readl(MEM_STTIME1);
sleep_static_memctlr[1][2] = au_readl(MEM_STADDR1);
sleep_static_memctlr[2][0] = au_readl(MEM_STCFG2);
sleep_static_memctlr[2][1] = au_readl(MEM_STTIME2);
sleep_static_memctlr[2][2] = au_readl(MEM_STADDR2);
sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3);
sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3);
sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
}
static void
restore_core_regs(void)
{
extern void restore_au1xxx_intctl(void);
extern void wakeup_counter0_adjust(void);
au_writel(sleep_aux_pll_cntrl, SYS_AUXPLL); au_sync();
au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync();
au_writel(sleep_pin_function, SYS_PINFUNC); au_sync();
/* Restore the static memory controller configuration.
*/
au_writel(sleep_static_memctlr[0][0], MEM_STCFG0);
au_writel(sleep_static_memctlr[0][1], MEM_STTIME0);
au_writel(sleep_static_memctlr[0][2], MEM_STADDR0);
au_writel(sleep_static_memctlr[1][0], MEM_STCFG1);
au_writel(sleep_static_memctlr[1][1], MEM_STTIME1);
au_writel(sleep_static_memctlr[1][2], MEM_STADDR1);
au_writel(sleep_static_memctlr[2][0], MEM_STCFG2);
au_writel(sleep_static_memctlr[2][1], MEM_STTIME2);
au_writel(sleep_static_memctlr[2][2], MEM_STADDR2);
au_writel(sleep_static_memctlr[3][0], MEM_STCFG3);
au_writel(sleep_static_memctlr[3][1], MEM_STTIME3);
au_writel(sleep_static_memctlr[3][2], MEM_STADDR3);
/* Enable the UART if it was enabled before sleep.
* I guess I should define module control bits........
*/
if (sleep_uart0_enable & 0x02) {
au_writel(0, UART0_ADDR + UART_MOD_CNTRL); au_sync();
au_writel(1, UART0_ADDR + UART_MOD_CNTRL); au_sync();
au_writel(3, UART0_ADDR + UART_MOD_CNTRL); au_sync();
au_writel(sleep_uart0_inten, UART0_ADDR + UART_IER); au_sync();
au_writel(sleep_uart0_fifoctl, UART0_ADDR + UART_FCR); au_sync();
au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync();
au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync();
}
restore_au1xxx_intctl();
wakeup_counter0_adjust();
}
unsigned long suspend_mode;
void wakeup_from_suspend(void)
......@@ -78,33 +213,48 @@ void wakeup_from_suspend(void)
int au_sleep(void)
{
unsigned long wakeup, flags;
extern void save_and_sleep(void);
spin_lock_irqsave(&pm_lock,flags);
save_core_regs();
flush_cache_all();
/* pin 6 is gpio */
/** The code below is all system dependent and we should probably
** have a function call out of here to set this up. You need
** to configure the GPIO or timer interrupts that will bring
** you out of sleep.
** For testing, the TOY counter wakeup is useful.
**/
#if 0
au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
/* gpio 6 can cause a wake up event */
wakeup = au_readl(SYS_WAKEMSK);
wakeup &= ~(1 << 8); /* turn off match20 wakeup */
wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
au_writel(wakeup, SYS_WAKEMSK);
#else
/* For testing, allow match20 to wake us up.
*/
#ifdef SLEEP_TEST_TIMEOUT
wakeup_counter0_set(sleep_ticks);
#endif
wakeup = 1 << 8; /* turn on match20 wakeup */
wakeup = 0;
#endif
au_writel(1, SYS_WAKESRC); /* clear cause */
au_writel(1, SYS_SLPPWR); /* prepare to sleep */
au_sync();
au_writel(wakeup, SYS_WAKEMSK);
au_sync();
__asm__("la $4, 1f\n\t"
"lui $5, 0xb190\n\t"
"ori $5, 0x18\n\t"
"sw $4, 0($5)\n\t"
"li $4, 1\n\t"
"lui $5, 0xb190\n\t"
"ori $5, 0x7c\n\t"
"sw $4, 0($5)\n\t" "sync\n\t" "1:\t\n\t" "nop\n\t");
save_and_sleep();
/* after a wakeup, the cpu vectors back to 0x1fc00000 so
* it's up to the boot code to get us back here.
*/
restore_core_regs();
spin_unlock_irqrestore(&pm_lock, flags);
return 0;
}
......@@ -113,11 +263,27 @@ static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
void *buffer, size_t * len)
{
int retval = 0;
#ifdef SLEEP_TEST_TIMEOUT
#define TMPBUFLEN2 16
char buf[TMPBUFLEN2], *p;
#endif
if (!write) {
*len = 0;
} else {
#ifdef SLEEP_TEST_TIMEOUT
if (*len > TMPBUFLEN2 - 1) {
return -EFAULT;
}
if (copy_from_user(buf, buffer, *len)) {
return -EFAULT;
}
buf[*len] = 0;
p = buf;
sleep_ticks = simple_strtoul(p, &p, 0);
#endif
retval = pm_send_all(PM_SUSPEND, (void *) 2);
if (retval)
return retval;
......@@ -131,6 +297,7 @@ static int pm_do_suspend(ctl_table * ctl, int write, struct file *file,
void *buffer, size_t * len)
{
int retval = 0;
void au1k_wait(void);
if (!write) {
*len = 0;
......@@ -187,13 +354,13 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
return -EFAULT;
}
old_baud_base = get_au1000_uart_baud_base();
old_cpu_freq = get_au1000_speed();
old_baud_base = get_au1x00_uart_baud_base();
old_cpu_freq = get_au1x00_speed();
new_cpu_freq = pll * 12 * 1000000;
new_baud_base = (new_cpu_freq / 4) / 16;
set_au1000_speed(new_cpu_freq);
set_au1000_uart_baud_base(new_baud_base);
set_au1x00_speed(new_cpu_freq);
set_au1x00_uart_baud_base(new_baud_base);
old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
new_refresh =
......@@ -323,10 +490,4 @@ static void calibrate_delay(void)
loops_per_jiffy &= ~loopbit;
}
}
void au1k_wait(void)
{
__asm__("nop\n\t" "nop\n\t");
}
#endif /* CONFIG_PM */
......@@ -44,7 +44,6 @@
/* #define DEBUG_CMDLINE */
char arcs_cmdline[CL_SIZE];
extern int prom_argc;
extern char **prom_argv, **prom_envp;
......@@ -153,6 +152,11 @@ int get_ethernet_addr(char *ethernet_addr)
return 0;
}
void prom_free_prom_memory (void) {}
unsigned long __init prom_free_prom_memory(void)
{
return 0;
}
EXPORT_SYMBOL(prom_getcmdline);
EXPORT_SYMBOL(get_ethernet_addr);
EXPORT_SYMBOL(str2eaddr);
......@@ -29,7 +29,7 @@
*/
#include <linux/types.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
#define SERIAL_BASE UART_BASE
#define SER_CMD 0x7
......@@ -40,11 +40,11 @@
#define SLOW_DOWN
static const char digits[16] = "0123456789abcdef";
static volatile unsigned long * const com1 = (unsigned char *)SERIAL_BASE;
static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
#ifdef SLOW_DOWN
static inline void slow_down()
static inline void slow_down(void)
{
int k;
for (k=0; k<10000; k++);
......
......@@ -35,9 +35,10 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/au1000.h>
#include <asm/mach-au1x00/au1000.h>
extern int au_sleep(void);
extern void (*flush_cache_all)(void);
void au1000_restart(char *command)
{
......@@ -54,6 +55,10 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
au_writel(0x00, 0xb0300040); /* ir_enable */
au_writel(0x00, 0xb4004104); /* mac dma */
au_writel(0x00, 0xb4004114); /* mac dma */
au_writel(0x00, 0xb4004124); /* mac dma */
au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb0520000); /* macen0 */
au_writel(0x00, 0xb0520004); /* macen1 */
au_writel(0x00, 0xb1000008); /* i2s_enable */
......@@ -66,6 +71,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
au_writel(0x10, 0xb1900060); /* sys_cpupll */
au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
case 0x01000000: /* Au1500 */
......@@ -74,6 +81,10 @@ void au1000_restart(char *command)
asm("sync");
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
au_writel(0x00, 0xb4004104); /* mac dma */
au_writel(0x00, 0xb4004114); /* mac dma */
au_writel(0x00, 0xb4004124); /* mac dma */
au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb1520000); /* macen0 */
au_writel(0x00, 0xb1520004); /* macen1 */
au_writel(0x00, 0xb1100100); /* uart0_enable */
......@@ -81,6 +92,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
au_writel(0x10, 0xb1900060); /* sys_cpupll */
au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
case 0x02000000: /* Au1100 */
......@@ -90,6 +103,10 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
au_writel(0x00, 0xb0300040); /* ir_enable */
au_writel(0x00, 0xb4004104); /* mac dma */
au_writel(0x00, 0xb4004114); /* mac dma */
au_writel(0x00, 0xb4004124); /* mac dma */
au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb0520000); /* macen0 */
au_writel(0x00, 0xb1000008); /* i2s_enable */
au_writel(0x00, 0xb1100100); /* uart0_enable */
......@@ -100,6 +117,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
au_writel(0x10, 0xb1900060); /* sys_cpupll */
au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
......
/*
*
* BRIEF MODULE DESCRIPTION
* Alchemy Db1000 board setup.
*
* Copyright 2000 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
......@@ -32,55 +28,53 @@
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/mc146818rtc.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/keyboard.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
#include <asm/pgtable.h>
#include <asm/au1000.h>
#include <asm/db1x00.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/time.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops std_ide_ops;
extern struct ide_ops *ide_ops;
#endif
extern struct rtc_ops no_rtc_ops;
extern char * __init prom_getcmdline(void);
extern void __init board_setup(void);
extern void au1000_restart(char *);
extern void au1000_halt(void);
extern void au1000_power_off(void);
extern struct resource ioport_resource;
extern struct resource iomem_resource;
extern void (*board_time_init)(void);
extern void au1x_time_init(void);
extern void (*board_timer_setup)(struct irqaction *irq);
extern void au1x_timer_setup(struct irqaction *irq);
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
static phys_t db_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
#endif
extern void au1xxx_time_init(void);
extern void au1xxx_timer_setup(struct irqaction *irq);
void __init au1x00_setup(void)
static int __init au1x00_setup(void)
{
char *argptr;
u32 pin_func, static_cfg0;
u32 sys_freqctrl, sys_clksrc;
u32 prid = read_c0_prid();
argptr = prom_getcmdline();
/* Various early Au1000 Errata corrected by this */
set_c0_config(1<<19); /* Config[OD] */
#ifdef CONFIG_AU1X00_SERIAL_CONSOLE
board_setup(); /* board specific setup */
argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_AU1X00_CONSOLE
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS0,115200");
......@@ -91,36 +85,53 @@ void __init au1x00_setup(void)
if ((argptr = strstr(argptr, "video=")) == NULL) {
argptr = prom_getcmdline();
/* default panel */
//strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");
/*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
#ifdef CONFIG_MIPS_HYDROGEN3
strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
#else
strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
#endif
}
#endif
#ifdef CONFIG_FB_E1356
if ((argptr = strstr(argptr, "video=")) == NULL) {
argptr = prom_getcmdline();
#ifdef CONFIG_MIPS_PB1000
strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
#else
strcat(argptr, " video=e1356fb:system:pb1500");
#endif
}
#endif
#ifdef CONFIG_FB_XPERT98
if ((argptr = strstr(argptr, "video=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " video=atyfb:1024x768-8@70");
}
#endif
#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
// au1000 does not support vra, au1500 and au1100 do
/* au1000 does not support vra, au1500 and au1100 do */
strcat(argptr, " au1000_audio=vra");
argptr = prom_getcmdline();
#endif
rtc_ops = &no_rtc_ops;
_machine_restart = au1000_restart;
_machine_halt = au1000_halt;
_machine_power_off = au1000_power_off;
board_time_init = au1xxx_time_init;
board_timer_setup = au1xxx_timer_setup;
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
fixup_bigphys_addr = db_fixup_bigphys_addr;
fixup_bigphys_addr = au1500_fixup_bigphys_addr;
#endif
// IO/MEM resources.
/* IO/MEM resources. */
set_io_port_base(0);
#ifdef CONFIG_SOC_AU1500
ioport_resource.start = 0x00000000;
#else
/* don't allow any legacy ports probing */
ioport_resource.start = 0x10000000;
#endif
ioport_resource.end = 0xffffffff;
iomem_resource.start = 0x10000000;
iomem_resource.end = 0xffffffff;
ioport_resource.start = IOPORT_RESOURCE_START;
ioport_resource.end = IOPORT_RESOURCE_END;
iomem_resource.start = IOMEM_RESOURCE_START;
iomem_resource.end = IOMEM_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
......@@ -128,14 +139,6 @@ void __init au1x00_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
//
// NOTE:
//
// YAMON (specifically reset_db1500.s) enables 32khz osc
// YAMON (specifically reset_db1x00.s) setups all clocking and GPIOs
// YAMON (specifically reset_db1500.s) setups all PCI
//
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
#ifdef CONFIG_USB_OHCI
if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
......@@ -149,69 +152,30 @@ void __init au1x00_setup(void)
#endif
#ifdef CONFIG_USB_OHCI
// enable host controller and wait for reset done
/* enable host controller and wait for reset done */
au_writel(0x08, USB_HOST_CONFIG);
udelay(1000);
au_writel(0x0E, USB_HOST_CONFIG);
udelay(1000);
au_readl(USB_HOST_CONFIG); // throw away first read
au_readl(USB_HOST_CONFIG); /* throw away first read */
while (!(au_readl(USB_HOST_CONFIG) & 0x10))
au_readl(USB_HOST_CONFIG);
#endif
#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
#ifdef CONFIG_AU1X00_USB_DEVICE
// 2nd USB port is USB device
pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
au_writel(pin_func, SYS_PINFUNC);
#endif
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
#ifdef CONFIG_FB
// Needed if PCI video card in use
conswitchp = &dummy_con;
#endif
#ifndef CONFIG_SERIAL_NONSTANDARD
/* don't touch the default serial console */
au_writel(0, UART_ADDR + UART_CLK);
#endif
//au_writel(0, UART3_ADDR + UART_CLK);
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &std_ide_ops;
#endif
#if 0
//// FIX!!! must be valid for au1000, au1500 and au1100
/* Enable Au1000 BCLK switching */
switch (prid & 0x000000FF)
{
case 0x00: /* DA */
case 0x01: /* HA */
case 0x02: /* HB */
break;
default: /* HC and newer */
au_writel(0x00000060, 0xb190003c);
break;
}
#endif
au_writel(0, 0xAE000010); /* turn off pcmcia power */
#ifdef CONFIG_MIPS_DB1000
printk("AMD Alchemy Au1000/Db1000 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1500
printk("AMD Alchemy Au1500/Db1500 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1100
printk("AMD Alchemy Au1100/Db1100 Board\n");
#endif
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
au_writel(0, SYS_TOYTRIM);
return 0;
}
early_initcall(au1x00_setup);
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
static phys_t db_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
/* This routine should be valid for all Au1500 based boards */
static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
u32 pci_start = (u32)Au1500_PCI_MEM_START;
u32 pci_end = (u32)Au1500_PCI_MEM_END;
......
/*
* Copyright 2002 Embedded Edge, LLC
* Author: dan@embeddededge.com
*
* Sleep helper for Au1xxx sleep mode.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
.text
.set macro
.set noat
.align 5
/* Save all of the processor general registers and go to sleep.
* A wakeup condition will get us back here to restore the registers.
*/
LEAF(save_and_sleep)
subu sp, PT_SIZE
sw $1, PT_R1(sp)
sw $2, PT_R2(sp)
sw $3, PT_R3(sp)
sw $4, PT_R4(sp)
sw $5, PT_R5(sp)
sw $6, PT_R6(sp)
sw $7, PT_R7(sp)
sw $8, PT_R8(sp)
sw $9, PT_R9(sp)
sw $10, PT_R10(sp)
sw $11, PT_R11(sp)
sw $12, PT_R12(sp)
sw $13, PT_R13(sp)
sw $14, PT_R14(sp)
sw $15, PT_R15(sp)
sw $16, PT_R16(sp)
sw $17, PT_R17(sp)
sw $18, PT_R18(sp)
sw $19, PT_R19(sp)
sw $20, PT_R20(sp)
sw $21, PT_R21(sp)
sw $22, PT_R22(sp)
sw $23, PT_R23(sp)
sw $24, PT_R24(sp)
sw $25, PT_R25(sp)
sw $26, PT_R26(sp)
sw $27, PT_R27(sp)
sw $28, PT_R28(sp)
sw $29, PT_R29(sp)
sw $30, PT_R30(sp)
sw $31, PT_R31(sp)
mfc0 k0, CP0_STATUS
sw k0, 0x20(sp)
mfc0 k0, CP0_CONTEXT
sw k0, 0x1c(sp)
mfc0 k0, CP0_PAGEMASK
sw k0, 0x18(sp)
mfc0 k0, CP0_CONFIG
sw k0, 0x14(sp)
/* Now set up the scratch registers so the boot rom will
* return to this point upon wakeup.
*/
la k0, 1f
lui k1, 0xb190
ori k1, 0x18
sw sp, 0(k1)
ori k1, 0x1c
sw k0, 0(k1)
/* Put SDRAM into self refresh. Preload instructions into cache,
* issue a precharge, then auto refresh, then sleep commands to it.
*/
la t0, sdsleep
.set mips3
cache 0x14, 0(t0)
cache 0x14, 32(t0)
cache 0x14, 64(t0)
cache 0x14, 96(t0)
.set mips0
sdsleep:
lui k0, 0xb400
sw zero, 0x001c(k0) /* Precharge */
sw zero, 0x0020(k0) /* Auto refresh */
sw zero, 0x0030(k0) /* SDRAM sleep */
sync
lui k1, 0xb190
sw zero, 0x0078(k1) /* get ready to sleep */
sync
sw zero, 0x007c(k1) /* Put processor to sleep */
sync
/* This is where we return upon wakeup.
* Reload all of the registers and return.
*/
1: nop
lw k0, 0x20(sp)
mtc0 k0, CP0_STATUS
lw k0, 0x1c(sp)
mtc0 k0, CP0_CONTEXT
lw k0, 0x18(sp)
mtc0 k0, CP0_PAGEMASK
lw k0, 0x14(sp)
mtc0 k0, CP0_CONFIG
lw $1, PT_R1(sp)
lw $2, PT_R2(sp)
lw $3, PT_R3(sp)
lw $4, PT_R4(sp)
lw $5, PT_R5(sp)
lw $6, PT_R6(sp)
lw $7, PT_R7(sp)
lw $8, PT_R8(sp)
lw $9, PT_R9(sp)
lw $10, PT_R10(sp)
lw $11, PT_R11(sp)
lw $12, PT_R12(sp)
lw $13, PT_R13(sp)
lw $14, PT_R14(sp)
lw $15, PT_R15(sp)
lw $16, PT_R16(sp)
lw $17, PT_R17(sp)
lw $18, PT_R18(sp)
lw $19, PT_R19(sp)
lw $20, PT_R20(sp)
lw $21, PT_R21(sp)
lw $22, PT_R22(sp)
lw $23, PT_R23(sp)
lw $24, PT_R24(sp)
lw $25, PT_R25(sp)
lw $26, PT_R26(sp)
lw $27, PT_R27(sp)
lw $28, PT_R28(sp)
lw $29, PT_R29(sp)
lw $30, PT_R30(sp)
lw $31, PT_R31(sp)
addiu sp, PT_SIZE
jr ra
END(save_and_sleep)
This diff is collapsed.
......@@ -26,8 +26,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <linux/sched.h>
......
#
# Copyright 2002 Cogent Computer Systems
# dan@embeddededge.com
#
# Makefile for the Cogent CSB250 Au1500 board. Copied from Pb1500.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
USE_STANDARD_AS_RULE := true
O_TARGET := csb250.o
obj-y := init.o board_setup.o irqmap.o
include $(TOPDIR)/Rules.make
/*
*
* BRIEF MODULE DESCRIPTION
* Cogent CSB250 board setup.
*
* Copyright 2002 Cogent Computer Systems, Inc.
* dan@embeddededge.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/mc146818rtc.h>
#include <linux/delay.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/keyboard.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
#include <asm/pgtable.h>
#include <asm/au1000.h>
#include <asm/csb250.h>
#ifdef CONFIG_USB_OHCI
// Enable the workaround for the OHCI DoneHead
// register corruption problem.
#define CONFIG_AU1000_OHCI_FIX
#endif
#ifdef CONFIG_RTC
extern struct rtc_ops csb250_rtc_ops;
#endif
extern int (*board_pci_idsel)(unsigned int devsel, int assert);
int csb250_pci_idsel(unsigned int devsel, int assert);
void __init board_setup(void)
{
u32 pin_func, pin_val;
u32 sys_freqctrl, sys_clksrc;
// set AUX clock to 12MHz * 8 = 96 MHz
au_writel(8, SYS_AUXPLL);
au_writel(0, SYS_PINSTATERD);
udelay(100);
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
/* GPIO201 is input for PCMCIA card detect */
/* GPIO203 is input for PCMCIA interrupt request */
au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
/* zero and disable FREQ2 */
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD clocks */
sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
au_writel(sys_clksrc, SYS_CLKSRC);
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
// FREQ2 = aux/2 = 48 MHz
sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/*
* Route 48MHz FREQ2 into USB Host and/or Device
*/
#ifdef CONFIG_USB_OHCI
sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
#endif
#ifdef CONFIG_AU1X00_USB_DEVICE
sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
#endif
au_writel(sys_clksrc, SYS_CLKSRC);
pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
#ifndef CONFIG_AU1X00_USB_DEVICE
// 2nd USB port is USB host
pin_func |= 0x8000;
#endif
au_writel(pin_func, SYS_PINFUNC);
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
/* Configure GPIO2....it's used by PCI among other things.
*/
/* Make everything but GP200 (PCI RST) an input until we get
* the pins set correctly.
*/
au_writel(0x00000001, GPIO2_DIR);
/* Set the pins used for output.
* A zero bit will leave PCI reset, LEDs off, power up USB,
* IDSEL disabled.
*/
pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16));
au_writel(pin_val, GPIO2_OUTPUT);
/* Set the output direction.
*/
pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0));
au_writel(pin_val, GPIO2_DIR);
#ifdef CONFIG_PCI
/* Use FREQ1 for the PCI output clock. We use the
* CPU clock of 384 MHz divided by 12 to get 32 MHz PCI.
* If Michael changes the CPU speed, we need to adjust
* that here as well :-).
*/
/* zero and disable FREQ1
*/
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0x000ffc00;
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable PCI clock
*/
sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x000f8000;
au_writel(sys_clksrc, SYS_CLKSRC);
/* Get current values (which really should match above).
*/
sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0x000ffc00;
sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x000f8000;
/* FREQ1 = cpu/12 = 32 MHz
*/
sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10));
au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* Just connect the clock without further dividing.
*/
sys_clksrc |= ((3<<17) | (0<<16) | (0<<15));
au_writel(sys_clksrc, SYS_CLKSRC);
udelay(1);
/* Now that clocks should be running, take PCI out of reset.
*/
pin_val = au_readl(GPIO2_OUTPUT);
pin_val |= ((1 << 16) | 1);
au_writel(pin_val, GPIO2_OUTPUT);
// Setup PCI bus controller
au_writel(0, Au1500_PCI_CMEM);
au_writel(0x00003fff, Au1500_CFG_BASE);
/* We run big endian without any of the software byte swapping,
* so configure the PCI bridge to help us out.
*/
au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG);
au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
au_writel(0x02a00356, Au1500_PCI_STATCMD);
au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
au_writel(0x00000008, Au1500_PCI_MBAR);
au_sync();
board_pci_idsel = csb250_pci_idsel;
#endif
/* Enable sys bus clock divider when IDLE state or no bus activity. */
au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
#ifdef CONFIG_RTC
rtc_ops = &csb250_rtc_ops;
// Enable the RTC if not already enabled
if (!(au_readl(0xac000028) & 0x20)) {
printk("enabling clock ...\n");
au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
}
// Put the clock in BCD mode
if (readl(0xac00002C) & 0x4) { /* reg B */
au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
au_sync();
}
#endif
}
/* The IDSEL is selected in the GPIO2 register. We will make device
* 12 appear in slot 0 and device 13 appear in slot 1.
*/
int
csb250_pci_idsel(unsigned int devsel, int assert)
{
int retval;
unsigned int gpio2_pins;
retval = 1;
/* First, disable both selects, then assert the one requested.
*/
au_writel(0xc000c000, GPIO2_OUTPUT);
au_sync();
if (assert) {
if (devsel == 12)
gpio2_pins = 0x40000000;
else if (devsel == 13)
gpio2_pins = 0x80000000;
else {
gpio2_pins = 0xc000c000;
retval = 0;
}
au_writel(gpio2_pins, GPIO2_OUTPUT);
}
au_sync();
return retval;
}
/*
*
* BRIEF MODULE DESCRIPTION
* Cogent CSB250 board setup
*
* Copyright 2002 Cogent Computer Systems, Inc.
* dan@embeddededge.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
extern void __init prom_init_cmdline(void);
extern char *prom_getenv(char *envname);
/* When we get initrd working someday.........
*/
int my_initrd_start, my_initrd_size;
/* Start arguments and environment.
*/
static char *csb_env[2];
static char *csb_arg[4];
static char *arg1 = "console=ttyS3,38400";
static char *arg2 = "root=/dev/nfs rw ip=any";
static char *env1 = "ethaddr=00:30:23:50:00:00";
const char *get_system_type(void)
{
return "Cogent CSB250";
}
int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
{
unsigned char *memsize_str;
unsigned long memsize;
/* We use a0 and a1 to pass initrd start and size.
*/
if (((uint) argc > 0) && ((uint)argv > 0)) {
my_initrd_start = (uint)argc;
my_initrd_size = (uint)argv;
}
/* First argv is ignored.
*/
prom_argc = 3;
prom_argv = csb_arg;
prom_envp = csb_env;
csb_arg[1] = arg1;
csb_arg[2] = arg2;
csb_env[0] = env1;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_CSB250;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
if (!memsize_str) {
memsize = 0x02000000;
} else {
memsize = simple_strtol(memsize_str, NULL, 0);
}
add_memory_region(0, memsize, BOOT_MEM_RAM);
return 0;
}
/*
* BRIEF MODULE DESCRIPTION
* Au1xxx irq map table
*
* Copyright 2003 Embedded Edge, LLC
* dan@embeddededge.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/au1000.h>
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
{ AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
/* Careful if you change match 2 request!
* The interrupt handler is called directly
* from the low level dispatch code.
*/
{ AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
};
int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
......@@ -3,18 +3,6 @@
# Author: MontaVista Software, Inc.
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor PB1000 board.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
.S.s:
$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
$(CC) $(CFLAGS) -c $< -o $*.o
O_TARGET := db1x00.o
# Makefile for the Alchemy Semiconductor Db1x00 board.
obj-y := init.o setup.o
lib-y := init.o board_setup.o irqmap.o
/*
*
* BRIEF MODULE DESCRIPTION
* Alchemy Db1x00 board setup.
*
* Copyright 2000 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/mc146818rtc.h>
#include <linux/delay.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
#include <asm/pgtable.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-db1x00/db1x00.h>
static BCSR * const bcsr = (BCSR *)0xAE000000;
void __init board_setup(void)
{
u32 pin_func;
pin_func = 0;
#ifdef CONFIG_AU1X00_USB_DEVICE
// 2nd USB port is USB device
pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
au_writel(pin_func, SYS_PINFUNC);
#endif
#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
/* set IRFIRSEL instead of GPIO15 */
pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
au_writel(pin_func, SYS_PINFUNC);
/* power off until the driver is in use */
bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
au_sync();
#endif
au_writel(0, 0xAE000010); /* turn off pcmcia power */
#ifdef CONFIG_MIPS_DB1000
printk("AMD Alchemy Au1000/Db1000 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1500
printk("AMD Alchemy Au1500/Db1500 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1100
printk("AMD Alchemy Au1100/Db1100 Board\n");
#endif
#ifdef CONFIG_MIPS_BOSPORUS
printk("AMD Alchemy Bosporus Board\n");
#endif
#ifdef CONFIG_MIPS_MIRAGE
printk("AMD Alchemy Mirage Board\n");
#endif
}
/*
*
* BRIEF MODULE DESCRIPTION
* PB1000 board setup
*
......@@ -37,7 +36,6 @@
#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
......@@ -46,28 +44,31 @@ extern char *prom_getenv(char *envname);
const char *get_system_type(void)
{
return "Alchemy Db1000";
#ifdef CONFIG_MIPS_BOSPORUS
return "Alchemy Bosporus Gateway Reference";
#else
return "Alchemy Db1x00";
#endif
}
int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
void __init prom_init(void)
{
unsigned char *memsize_str;
unsigned long memsize;
prom_argc = argc;
prom_argv = argv;
prom_envp = envp;
prom_argc = fw_arg0;
prom_argv = (char **) fw_arg1;
prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_DB1000; /* set the platform # */
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
if (!memsize_str) {
if (!memsize_str)
memsize = 0x04000000;
} else {
else
memsize = simple_strtol(memsize_str, NULL, 0);
}
add_memory_region(0, memsize, BOOT_MEM_RAM);
return 0;
}
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#
# Copyright 2000 MontaVista Software Inc.
# Author: MontaVista Software, Inc.
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor PB1000 board.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
.S.s:
$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
$(CC) $(CFLAGS) -c $< -o $*.o
O_TARGET := hydrogen3.o
obj-y := init.o board_setup.o irqmap.o
include $(TOPDIR)/Rules.make
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#
# Copyright 2003 MontaVista Software Inc.
# Author: MontaVista Software, Inc.
# ppopov@mvista.com or source@mvista.com
# Bruno Randolf <bruno.randolf@4g-systems.biz>
#
# Makefile for 4G Systems MTX-1 board.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
lib-y := init.o board_setup.o irqmap.o
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......@@ -4,10 +4,5 @@
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor Pb1500 board.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
lib-y := init.o setup.o
lib-y := init.o board_setup.o irqmap.o
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