Commit de66b0f0 authored by Paul Burton's avatar Paul Burton Committed by Sasha Levin

MIPS: math-emu: Fix jalr emulation when rd == $0

[ Upstream commit ab4a92e6 ]

When emulating a jalr instruction with rd == $0, the code in
isBranchInstr was incorrectly writing to GPR $0 which should actually
always remain zeroed. This would lead to any further instructions
emulated which use $0 operating on a bogus value until the task is next
context switched, at which point the value of $0 in the task context
would be restored to the correct zero by a store in SAVE_SOME. Fix this
by not writing to rd if it is $0.

Fixes: 102cedc3 ("MIPS: microMIPS: Floating point support.")
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable <stable@vger.kernel.org> # v3.10
Patchwork: https://patchwork.linux-mips.org/patch/13160/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent 9365bd6c
...@@ -443,9 +443,11 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, ...@@ -443,9 +443,11 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
case spec_op: case spec_op:
switch (insn.r_format.func) { switch (insn.r_format.func) {
case jalr_op: case jalr_op:
if (insn.r_format.rd != 0) {
regs->regs[insn.r_format.rd] = regs->regs[insn.r_format.rd] =
regs->cp0_epc + dec_insn.pc_inc + regs->cp0_epc + dec_insn.pc_inc +
dec_insn.next_pc_inc; dec_insn.next_pc_inc;
}
/* Fall through */ /* Fall through */
case jr_op: case jr_op:
*contpc = regs->regs[insn.r_format.rs]; *contpc = regs->regs[insn.r_format.rs];
......
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