Commit df456f47 authored by Bridge Wu's avatar Bridge Wu Committed by Pierre Ossman

mmc: pxamci: set proper buswidth capabilities according to PXA flavor

From PXA27x, it is possible to do 4-bit data transfers.
Signed-off-by: default avatarBridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
parent fe2dc44e
......@@ -284,7 +284,7 @@ static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
host->data = NULL;
if (host->mrq->stop) {
pxamci_stop_clock(host);
pxamci_start_cmd(host, host->mrq->stop, 0);
pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
} else {
pxamci_finish_request(host, host->mrq);
}
......@@ -382,6 +382,11 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
host->cmdat |= CMDAT_INIT;
}
if (ios->bus_width == MMC_BUS_WIDTH_4)
host->cmdat |= CMDAT_SD_4DAT;
else
host->cmdat &= ~CMDAT_SD_4DAT;
pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
host->clkrt, host->cmdat);
}
......@@ -460,6 +465,9 @@ static int pxamci_probe(struct platform_device *pdev)
mmc->ocr_avail = host->pdata ?
host->pdata->ocr_mask :
MMC_VDD_32_33|MMC_VDD_33_34;
mmc->caps = 0;
if (!cpu_is_pxa21x() && !cpu_is_pxa25x())
mmc->caps |= MMC_CAP_4_BIT_DATA;
host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
if (!host->sg_cpu) {
......
......@@ -25,6 +25,7 @@
#define SPI_EN (1 << 0)
#define MMC_CMDAT 0x0010
#define CMDAT_SD_4DAT (1 << 8)
#define CMDAT_DMAEN (1 << 7)
#define CMDAT_INIT (1 << 6)
#define CMDAT_BUSY (1 << 5)
......
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