Commit df5cc9d0 authored by Marco Franchi's avatar Marco Franchi Committed by Shawn Guo

ARM: dts: imx6qdl: Remove leading zeroes from unit addresses

The following build warnings are seen with W=1:

Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit
address format error, expected "900000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000 simple-bus unit
address format error, expected "2000000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000/pxp@020f0000
simple-bus unit address format error, expected "20f0000"
(...)

Remove the leading zeroes from unit addresses to fix the warnings.
Signed-off-by: default avatarMarco Franchi <marco.franchi@nxp.com>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent efb9adb2
...@@ -60,35 +60,35 @@ cpu@1 { ...@@ -60,35 +60,35 @@ cpu@1 {
}; };
soc { soc {
ocram: sram@00900000 { ocram: sram@900000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x00900000 0x20000>; reg = <0x00900000 0x20000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>; clocks = <&clks IMX6QDL_CLK_OCRAM>;
}; };
aips1: aips-bus@02000000 { aips1: aips-bus@2000000 {
iomuxc: iomuxc@020e0000 { iomuxc: iomuxc@20e0000 {
compatible = "fsl,imx6dl-iomuxc"; compatible = "fsl,imx6dl-iomuxc";
}; };
pxp: pxp@020f0000 { pxp: pxp@20f0000 {
reg = <0x020f0000 0x4000>; reg = <0x020f0000 0x4000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
}; };
epdc: epdc@020f4000 { epdc: epdc@20f4000 {
reg = <0x020f4000 0x4000>; reg = <0x020f4000 0x4000>;
interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
}; };
lcdif: lcdif@020f8000 { lcdif: lcdif@20f8000 {
reg = <0x020f8000 0x4000>; reg = <0x020f8000 0x4000>;
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
}; };
}; };
aips2: aips-bus@02100000 { aips2: aips-bus@2100000 {
i2c4: i2c@021f8000 { i2c4: i2c@21f8000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
......
...@@ -79,15 +79,15 @@ cpu@3 { ...@@ -79,15 +79,15 @@ cpu@3 {
}; };
soc { soc {
ocram: sram@00900000 { ocram: sram@900000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x00900000 0x40000>; reg = <0x00900000 0x40000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>; clocks = <&clks IMX6QDL_CLK_OCRAM>;
}; };
aips-bus@02000000 { /* AIPS1 */ aips-bus@2000000 { /* AIPS1 */
spba-bus@02000000 { spba-bus@2000000 {
ecspi5: ecspi@02018000 { ecspi5: ecspi@2018000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
...@@ -102,12 +102,12 @@ ecspi5: ecspi@02018000 { ...@@ -102,12 +102,12 @@ ecspi5: ecspi@02018000 {
}; };
}; };
iomuxc: iomuxc@020e0000 { iomuxc: iomuxc@20e0000 {
compatible = "fsl,imx6q-iomuxc"; compatible = "fsl,imx6q-iomuxc";
}; };
}; };
sata: sata@02200000 { sata: sata@2200000 {
compatible = "fsl,imx6q-ahci"; compatible = "fsl,imx6q-ahci";
reg = <0x02200000 0x4000>; reg = <0x02200000 0x4000>;
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
...@@ -118,7 +118,7 @@ sata: sata@02200000 { ...@@ -118,7 +118,7 @@ sata: sata@02200000 {
status = "disabled"; status = "disabled";
}; };
gpu_vg: gpu@02204000 { gpu_vg: gpu@2204000 {
compatible = "vivante,gc"; compatible = "vivante,gc";
reg = <0x02204000 0x4000>; reg = <0x02204000 0x4000>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
...@@ -128,7 +128,7 @@ gpu_vg: gpu@02204000 { ...@@ -128,7 +128,7 @@ gpu_vg: gpu@02204000 {
power-domains = <&pd_pu>; power-domains = <&pd_pu>;
}; };
ipu2: ipu@02800000 { ipu2: ipu@2800000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ipu"; compatible = "fsl,imx6q-ipu";
......
This diff is collapsed.
...@@ -56,7 +56,7 @@ ocram3: sram@00960000 { ...@@ -56,7 +56,7 @@ ocram3: sram@00960000 {
clocks = <&clks IMX6QDL_CLK_OCRAM>; clocks = <&clks IMX6QDL_CLK_OCRAM>;
}; };
aips-bus@02100000 { aips-bus@2100000 {
pre1: pre@21c8000 { pre1: pre@21c8000 {
compatible = "fsl,imx6qp-pre"; compatible = "fsl,imx6qp-pre";
reg = <0x021c8000 0x1000>; reg = <0x021c8000 0x1000>;
......
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