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Commit e06cf18f authored by Mirko Lindner's avatar Mirko Lindner Committed by Stephen Hemminger
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[PATCH] sk98lin-2.6: Kernel Update to Driver Version v6.21 

Patch 1/4 (Update to version 6.21)
* Add: Common module update
* Add: New function for PCI initialization (SkGeInitPCI)
* Add: Yukon Plus changes (ChipID, PCI...)
* Add: Code for DIAG tool
* Fix: Problems while unloading the linux driver
* Fix: PrefPort=B not allowed on single NICs
* Fix: Fixed Linux System crash when using vlans
* Fix: Remove useless register_netdev
* Fix: Initalize Board before network configuration
* Fix: Modifications regarding try_module_get() and capable()
parent 4576b4fa
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Showing with 2933 additions and 1153 deletions
drivers/net/sk98lin/Makefile
View file @ e06cf18f
......@@ -76,7 +76,7 @@ endif
# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_USE_CSUM -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_DIAG_SUPPORT -DSK_USE_CSUM -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
clean:
rm -f core *.o *.a *.s
......
drivers/net/sk98lin/h/skcsum.h
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skcsum.h
* Project: GEnesis - SysKonnect SK-NET Gigabit Ethernet (SK-98xx)
* Version: $Revision: 1.9 $
* Date: $Date: 2001/02/06 11:21:39 $
* Version: $Revision: 1.10 $
* Date: $Date: 2003/08/20 13:59:57 $
* Purpose: Store/verify Internet checksum in send/receive packets.
*
******************************************************************************/
......@@ -26,6 +26,10 @@
* History:
*
* $Log: skcsum.h,v $
* Revision 1.10 2003/08/20 13:59:57 mschmid
* Changed notation of #ifndef SkCsCalculateChecksum to
* #ifndef SK_CS_CALCULATE_CHECKSUM
*
* Revision 1.9 2001/02/06 11:21:39 rassmann
* Editorial changes.
*
......@@ -226,11 +230,11 @@ typedef struct s_CsPacketInfo {
/* function prototypes ********************************************************/
#ifndef SkCsCalculateChecksum
#ifndef SK_CS_CALCULATE_CHECKSUM
extern unsigned SkCsCalculateChecksum(
void *pData,
unsigned Length);
#endif
#endif /* SK_CS_CALCULATE_CHECKSUM */
extern int SkCsEvent(
SK_AC *pAc,
......
drivers/net/sk98lin/h/skdrv1st.h
View file @ e06cf18f
......@@ -2,15 +2,16 @@
*
* Name: skdrv1st.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.1 $
* Date: $Date: 2003/07/21 07:22:43 $
* Version: $Revision: 1.4 $
* Date: $Date: 2003/11/12 14:28:14 $
* Purpose: First header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,15 @@
* History:
*
* $Log: skdrv1st.h,v $
* Revision 1.4 2003/11/12 14:28:14 rroesler
* Fix: use dedicated ip_fast_csum() on X86_64 systems
*
* Revision 1.3 2003/10/07 08:16:52 mlindner
* Fix: Copyright changes
*
* Revision 1.2 2003/09/29 12:05:59 mlindner
* Fix: Added define SK_CS_CALCULSTE_CHECKSUM
*
* Revision 1.1 2003/07/21 07:22:43 rroesler
* Fix: Re-Enter after CVS crash
*
......@@ -110,6 +120,9 @@
#ifndef __INC_SKDRV1ST_H
#define __INC_SKDRV1ST_H
/* Check kernel version */
#include <linux/version.h>
typedef struct s_AC SK_AC;
/* Set card versions */
......@@ -124,17 +137,15 @@ typedef struct s_AC SK_AC;
#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),4)
#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),8)
#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
#define SK_ADDR_EQUAL(a1,a2) (!memcmp(a1,a2,6))
#if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
#warning You must compile this file with the correct options!
#warning See the last lines of the source file.
#error You must compile this driver with "-O".
#endif
#include <linux/version.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
......@@ -154,6 +165,13 @@ typedef struct s_AC SK_AC;
#include <asm/uaccess.h>
#include <net/checksum.h>
#define SK_CS_CALCULATE_CHECKSUM
#ifndef CONFIG_X86_64
#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
#else
#define SkCsCalculateChecksum(p,l) ((~ip_fast_csum(p, l)) & 0xffff)
#endif
#include "h/sktypes.h"
#include "h/skerror.h"
#include "h/skdebug.h"
......
drivers/net/sk98lin/h/skdrv2nd.h
View file @ e06cf18f
......@@ -2,15 +2,16 @@
*
* Name: skdrv2nd.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.3 $
* Date: $Date: 2003/08/12 16:51:18 $
* Version: $Revision: 1.10 $
* Date: $Date: 2003/12/11 16:04:45 $
* Purpose: Second header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,27 @@
* History:
*
* $Log: skdrv2nd.h,v $
* Revision 1.10 2003/12/11 16:04:45 mlindner
* Add: New pnmi data backup structure
*
* Revision 1.9 2003/11/10 09:31:37 rroesler
* Add: pnmiBackup structure for DIAG backup restore
*
* Revision 1.8 2003/10/22 14:18:32 rroesler
* Fix: DIAG handling for DualNet cards
*
* Revision 1.7 2003/10/07 09:34:59 mlindner
* Add: New defines for lower and upper range values (interrupt moderation)
*
* Revision 1.6 2003/10/07 08:16:51 mlindner
* Fix: Copyright changes
*
* Revision 1.5 2003/09/01 13:10:39 rroesler
* Add: Prototypes for DIAG Attach/Detach functions
*
* Revision 1.4 2003/09/01 12:33:38 rroesler
* Add: Defines for optimized DIAG interaction
*
* Revision 1.3 2003/08/12 16:51:18 mlindner
* Fix: UDP and TCP Proto checks
* Fix: UDP header offset
......@@ -206,6 +228,11 @@ extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
#ifdef SK_DIAG_SUPPORT
extern int SkDrvEnterDiagMode(SK_AC *pAc);
extern int SkDrvLeaveDiagMode(SK_AC *pAc);
#endif
struct s_DrvRlmtMbuf {
SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */
SK_U8 *pData; /* Data buffer (virtually contig.). */
......@@ -247,6 +274,7 @@ struct s_DrvRlmtMbuf {
#define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
#define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
#define SK_IOCTL_GEN (SK_IOCTL_BASE + 3)
#define SK_IOCTL_DIAG (SK_IOCTL_BASE + 4)
typedef struct s_IOCTL SK_GE_IOCTL;
......@@ -462,6 +490,9 @@ struct s_RxPort {
#define C_INTS_PER_SEC_DEFAULT 2000
#define C_INT_MOD_ENABLE_PERCENTAGE 50 /* if higher 50% enable */
#define C_INT_MOD_DISABLE_PERCENTAGE 50 /* if lower 50% disable */
#define C_INT_MOD_IPS_LOWER_RANGE 30
#define C_INT_MOD_IPS_UPPER_RANGE 40000
typedef struct s_DynIrqModInfo DIM_INFO;
struct s_DynIrqModInfo {
......@@ -493,6 +524,11 @@ typedef struct s_PerStrm PER_STRM;
#define SK_ALLOC_IRQ 0x00000001
#ifdef SK_DIAG_SUPPORT
#define DIAG_ACTIVE 1
#define DIAG_NOTACTIVE 0
#endif
/****************************************************************************
* Per board structure / Adapter Context structure:
* Allocated within attach(9e) and freed within detach(9e).
......@@ -563,9 +599,18 @@ struct s_AC {
int PortUp;
int PortDown;
int ChipsetType; /* Chipset family type
* 0 == Genesis family support
* 1 == Yukon family support
*/
* 0 == Genesis family support
* 1 == Yukon family support
*/
#ifdef SK_DIAG_SUPPORT
SK_U32 DiagModeActive; /* is diag active? */
SK_BOOL DiagFlowCtrl; /* for control purposes */
SK_PNMI_STRUCT_DATA PnmiBackup; /* backup structure for all Pnmi-Data */
SK_BOOL WasIfUp[SK_MAX_MACS]; /* for OpenClose while
* DIAG is busy with NIC
*/
#endif
};
......
drivers/net/sk98lin/h/skgehw.h
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgehw.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.53 $
* Date: $Date: 2003/07/04 12:39:01 $
* Version: $Revision: 1.56 $
* Date: $Date: 2003/09/23 09:01:00 $
* Purpose: Defines and Macros for the Gigabit Ethernet Adapter Product Family
*
******************************************************************************/
......@@ -26,6 +26,17 @@
*
* History:
* $Log: skgehw.h,v $
* Revision 1.56 2003/09/23 09:01:00 malthoff
* Minor change: Define I2C device size constants as long.
*
* Revision 1.55 2003/09/16 14:03:34 rschmidt
* Added define for YUKON-Lite Rev. A1,A2 Chip Revision
* Moved defines for PHY power down modes to skgeinit.h
* Editorial changes
*
* Revision 1.54 2003/09/16 07:37:58 mschmid
* Added defines for Marvell PHY low power modes
*
* Revision 1.53 2003/07/04 12:39:01 rschmidt
* Added SK_FAR to pointers in XM_IN32() and GM_IN32() macros (for PXE)
* Editorial changes
......@@ -84,7 +95,7 @@
* Editorial changes
*
* Revision 1.39 2002/06/10 09:37:07 rschmidt
* Added macros for the ADDR-Modul
* Added macros for the ADDR-Module
*
* Revision 1.38 2002/06/05 08:15:19 rschmidt
* Added defines for WOL Registers
......@@ -628,12 +639,12 @@ extern "C" {
#define B2_FAR 0x0120 /* 32 bit Flash-Prom Addr Reg/Cnt */
#define B2_FDP 0x0124 /* 8 bit Flash-Prom Data Port */
/* 0x0125 - 0x0127: reserved */
#define B2_LD_CRTL 0x0128 /* 8 bit EPROM loader control register */
#define B2_LD_CTRL 0x0128 /* 8 bit EPROM loader control register */
#define B2_LD_TEST 0x0129 /* 8 bit EPROM loader test register */
/* 0x012a - 0x012f: reserved */
#define B2_TI_INI 0x0130 /* 32 bit Timer Init Value */
#define B2_TI_VAL 0x0134 /* 32 bit Timer Value */
#define B2_TI_CRTL 0x0138 /* 8 bit Timer Control */
#define B2_TI_CTRL 0x0138 /* 8 bit Timer Control */
#define B2_TI_TEST 0x0139 /* 8 Bit Timer Test */
/* 0x013a - 0x013f: reserved */
#define B2_IRQM_INI 0x0140 /* 32 bit IRQ Moderation Timer Init Reg.*/
......@@ -1021,7 +1032,7 @@ extern "C" {
/* Bit 7: reserved */
#define RAP_RAP 0x3f /* Bit 6..0: 0 = block 0,..,6f = block 6f */
/* B0_CTST 16 bit Control/Status register */
/* B0_CTST 16 bit Control/Status register */
/* Bit 15..14: reserved */
#define CS_CLK_RUN_HOT BIT_13S /* CLK_RUN hot m. (YUKON-Lite only) */
#define CS_CLK_RUN_RST BIT_12S /* CLK_RUN reset (YUKON-Lite only) */
......@@ -1038,7 +1049,7 @@ extern "C" {
#define CS_RST_CLR BIT_1S /* Clear Software reset */
#define CS_RST_SET BIT_0S /* Set Software reset */
/* B0_LED 8 Bit LED register */
/* B0_LED 8 Bit LED register */
/* Bit 7.. 2: reserved */
#define LED_STAT_ON BIT_1S /* Status LED on */
#define LED_STAT_OFF BIT_0S /* Status LED off */
......@@ -1053,9 +1064,9 @@ extern "C" {
#define PC_VCC_ON BIT_1 /* Switch VCC On */
#define PC_VCC_OFF BIT_0 /* Switch VCC Off */
/* B0_ISRC 32 bit Interrupt Source Register */
/* B0_IMSK 32 bit Interrupt Mask Register */
/* B0_SP_ISRC 32 bit Special Interrupt Source Reg */
/* B0_ISRC 32 bit Interrupt Source Register */
/* B0_IMSK 32 bit Interrupt Mask Register */
/* B0_SP_ISRC 32 bit Special Interrupt Source Reg */
/* B2_IRQM_MSK 32 bit IRQ Moderation Mask */
#define IS_ALL_MSK 0xbfffffffUL /* All Interrupt bits */
#define IS_HW_ERR BIT_31 /* Interrupt HW Error */
......@@ -1099,9 +1110,9 @@ extern "C" {
#define IS_XA2_C BIT_0 /* Q_XA2 Encoding Error */
/* B0_HWE_ISRC 32 bit HW Error Interrupt Src Reg */
/* B0_HWE_IMSK 32 bit HW Error Interrupt Mask Reg */
/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
/* B0_HWE_ISRC 32 bit HW Error Interrupt Src Reg */
/* B0_HWE_IMSK 32 bit HW Error Interrupt Mask Reg */
/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
#define IS_ERR_MSK 0x00000fffL /* All Error bits */
/* Bit 31..14: reserved */
#define IS_IRQ_TIST_OV BIT_13 /* Time Stamp Timer Overflow (YUKON only) */
......@@ -1119,29 +1130,32 @@ extern "C" {
#define IS_R1_PAR_ERR BIT_1 /* Queue R1 Parity Error */
#define IS_R2_PAR_ERR BIT_0 /* Queue R2 Parity Error */
/* B2_CONN_TYP 8 bit Connector type */
/* B2_PMD_TYP 8 bit PMD type */
/* B2_CONN_TYP 8 bit Connector type */
/* B2_PMD_TYP 8 bit PMD type */
/* Values of connector and PMD type comply to SysKonnect internal std */
/* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */
/* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */
#define CFG_CHIP_R_MSK (0xf<<4) /* Bit 7.. 4: Chip Revision */
/* Bit 3.. 2: reserved */
#define CFG_DIS_M2_CLK BIT_1S /* Disable Clock for 2nd MAC */
#define CFG_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/
/* B2_CHIP_ID 8 bit Chip Identification Number */
/* B2_CHIP_ID 8 bit Chip Identification Number */
#define CHIP_ID_GENESIS 0x0a /* Chip ID for GENESIS */
#define CHIP_ID_YUKON 0xb0 /* Chip ID for YUKON */
#define CHIP_ID_YUKON_LITE 0xb1 /* Chip ID for YUKON-Lite (Rev. A1) */
#define CHIP_ID_YUKON_LITE 0xb1 /* Chip ID for YUKON-Lite (Rev. A1-A3) */
#define CHIP_ID_YUKON_LP 0xb2 /* Chip ID for YUKON-LP */
/* B2_FAR 32 bit Flash-Prom Addr Reg/Cnt */
#define CHIP_REV_YU_LITE_A1 3 /* Chip Rev. for YUKON-Lite A1,A2 */
#define CHIP_REV_YU_LITE_A3 7 /* Chip Rev. for YUKON-Lite A3 */
/* B2_FAR 32 bit Flash-Prom Addr Reg/Cnt */
#define FAR_ADDR 0x1ffffL /* Bit 16.. 0: FPROM Address mask */
/* B2_LD_CRTL 8 bit EPROM loader control register */
/* B2_LD_CTRL 8 bit EPROM loader control register */
/* Bits are currently reserved */
/* B2_LD_TEST 8 bit EPROM loader test register */
/* B2_LD_TEST 8 bit EPROM loader test register */
/* Bit 7.. 4: reserved */
#define LD_T_ON BIT_3S /* Loader Test mode on */
#define LD_T_OFF BIT_2S /* Loader Test mode off */
......@@ -1151,16 +1165,16 @@ extern "C" {
/*
* Timer Section
*/
/* B2_TI_CRTL 8 bit Timer control */
/* B2_TI_CTRL 8 bit Timer control */
/* B2_IRQM_CTRL 8 bit IRQ Moderation Timer Control */
/* Bit 7.. 3: reserved */
#define TIM_START BIT_2S /* Start Timer */
#define TIM_STOP BIT_1S /* Stop Timer */
#define TIM_CLR_IRQ BIT_0S /* Clear Timer IRQ (!IRQM) */
/* B2_TI_TEST 8 Bit Timer Test */
/* B2_TI_TEST 8 Bit Timer Test */
/* B2_IRQM_TEST 8 bit IRQ Moderation Timer Test */
/* B28_DPT_TST 8 bit Descriptor Poll Timer Test Reg */
/* B28_DPT_TST 8 bit Descriptor Poll Timer Test Reg */
/* Bit 7.. 3: reserved */
#define TIM_T_ON BIT_2S /* Test mode on */
#define TIM_T_OFF BIT_1S /* Test mode off */
......@@ -1197,7 +1211,7 @@ extern "C" {
#define TST_FRC_APERR_1M64 BIT_1S /* AddrPERR on 1. phase */
#define TST_FRC_APERR_2M64 BIT_0S /* AddrPERR on 2. phase */
/* B2_GP_IO 32 bit General Purpose I/O Register */
/* B2_GP_IO 32 bit General Purpose I/O Register */
/* Bit 31..26: reserved */
#define GP_DIR_9 BIT_25 /* IO_9 direct, 0=In/1=Out */
#define GP_DIR_8 BIT_24 /* IO_8 direct, 0=In/1=Out */
......@@ -1221,28 +1235,28 @@ extern "C" {
#define GP_IO_1 BIT_1 /* IO_1 pin */
#define GP_IO_0 BIT_0 /* IO_0 pin */
/* B2_I2C_CTRL 32 bit I2C HW Control Register */
/* B2_I2C_CTRL 32 bit I2C HW Control Register */
#define I2C_FLAG BIT_31 /* Start read/write if WR */
#define I2C_ADDR (0x7fffL<<16) /* Bit 30..16: Addr to be RD/WR */
#define I2C_DEV_SEL (0x7fL<<9) /* Bit 15.. 9: I2C Device Select */
/* Bit 8.. 5: reserved */
#define I2C_BURST_LEN BIT_4 /* Burst Len, 1/4 bytes */
#define I2C_DEV_SIZE (7L<<1) /* Bit 3.. 1: I2C Device Size */
#define I2C_025K_DEV (0L<<1) /* 0: 256 Bytes or smal. */
#define I2C_05K_DEV (1L<<1) /* 1: 512 Bytes */
#define I2C_1K_DEV (2L<<1) /* 2: 1024 Bytes */
#define I2C_2K_DEV (3L<<1) /* 3: 2048 Bytes */
#define I2C_4K_DEV (4L<<1) /* 4: 4096 Bytes */
#define I2C_8K_DEV (5L<<1) /* 5: 8192 Bytes */
#define I2C_16K_DEV (6L<<1) /* 6: 16384 Bytes */
#define I2C_32K_DEV (7L<<1) /* 7: 32768 Bytes */
#define I2C_DEV_SIZE (7<<1) /* Bit 3.. 1: I2C Device Size */
#define I2C_025K_DEV (0<<1) /* 0: 256 Bytes or smal. */
#define I2C_05K_DEV (1<<1) /* 1: 512 Bytes */
#define I2C_1K_DEV (2<<1) /* 2: 1024 Bytes */
#define I2C_2K_DEV (3<<1) /* 3: 2048 Bytes */
#define I2C_4K_DEV (4<<1) /* 4: 4096 Bytes */
#define I2C_8K_DEV (5<<1) /* 5: 8192 Bytes */
#define I2C_16K_DEV (6<<1) /* 6: 16384 Bytes */
#define I2C_32K_DEV (7<<1) /* 7: 32768 Bytes */
#define I2C_STOP BIT_0 /* Interrupt I2C transfer */
/* B2_I2C_IRQ 32 bit I2C HW IRQ Register */
/* B2_I2C_IRQ 32 bit I2C HW IRQ Register */
/* Bit 31.. 1 reserved */
#define I2C_CLR_IRQ BIT_0 /* Clear I2C IRQ */
/* B2_I2C_SW 32 bit (8 bit access) I2C HW SW Port Register */
/* B2_I2C_SW 32 bit (8 bit access) I2C HW SW Port Register */
/* Bit 7.. 3: reserved */
#define I2C_DATA_DIR BIT_2S /* direction of I2C_DATA */
#define I2C_DATA BIT_1S /* I2C Data Port */
......@@ -1254,27 +1268,27 @@ extern "C" {
#define I2C_SENS_ADDR LM80_ADDR /* I2C Sensor Address, (Volt and Temp)*/
/* B2_BSC_CTRL 8 bit Blink Source Counter Control */
/* B2_BSC_CTRL 8 bit Blink Source Counter Control */
/* Bit 7.. 2: reserved */
#define BSC_START BIT_1S /* Start Blink Source Counter */
#define BSC_STOP BIT_0S /* Stop Blink Source Counter */
/* B2_BSC_STAT 8 bit Blink Source Counter Status */
/* B2_BSC_STAT 8 bit Blink Source Counter Status */
/* Bit 7.. 1: reserved */
#define BSC_SRC BIT_0S /* Blink Source, 0=Off / 1=On */
/* B2_BSC_TST 16 bit Blink Source Counter Test Reg */
/* B2_BSC_TST 16 bit Blink Source Counter Test Reg */
#define BSC_T_ON BIT_2S /* Test mode on */
#define BSC_T_OFF BIT_1S /* Test mode off */
#define BSC_T_STEP BIT_0S /* Test step */
/* B3_RAM_ADDR 32 bit RAM Address, to read or write */
/* B3_RAM_ADDR 32 bit RAM Address, to read or write */
/* Bit 31..19: reserved */
#define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */
/* RAM Interface Registers */
/* B3_RI_CTRL 16 bit RAM Iface Control Register */
/* B3_RI_CTRL 16 bit RAM Iface Control Register */
/* Bit 15..10: reserved */
#define RI_CLR_RD_PERR BIT_9S /* Clear IRQ RAM Read Parity Err */
#define RI_CLR_WR_PERR BIT_8S /* Clear IRQ RAM Write Parity Err*/
......@@ -1282,7 +1296,7 @@ extern "C" {
#define RI_RST_CLR BIT_1S /* Clear RAM Interface Reset */
#define RI_RST_SET BIT_0S /* Set RAM Interface Reset */
/* B3_RI_TEST 8 bit RAM Iface Test Register */
/* B3_RI_TEST 8 bit RAM Iface Test Register */
/* Bit 15.. 4: reserved */
#define RI_T_EV BIT_3S /* Timeout Event occured */
#define RI_T_ON BIT_2S /* Timeout Timer Test On */
......@@ -1309,7 +1323,7 @@ extern "C" {
#define MA_DIS_REC_RX1 BIT_0S /* Disable Recovery Timer RX1 */
/* Packet Arbiter Registers */
/* B3_PA_CTRL 16 bit Packet Arbiter Ctrl Register */
/* B3_PA_CTRL 16 bit Packet Arbiter Ctrl Register */
/* Bit 15..14: reserved */
#define PA_CLR_TO_TX2 BIT_13S /* Clear IRQ Packet Timeout TX2 */
#define PA_CLR_TO_TX1 BIT_12S /* Clear IRQ Packet Timeout TX1 */
......@@ -1332,7 +1346,7 @@ extern "C" {
/* Rx/Tx Path related Arbiter Test Registers */
/* B3_MA_TO_TEST 16 bit MAC Arbiter Timeout Test Reg */
/* B3_MA_RC_TEST 16 bit MAC Arbiter Recovery Test Reg */
/* B3_PA_TEST 16 bit Packet Arbiter Test Register */
/* B3_PA_TEST 16 bit Packet Arbiter Test Register */
/* Bit 15, 11, 7, and 3 are reserved in B3_PA_TEST */
#define TX2_T_EV BIT_15S /* TX2 Timeout/Recv Event occured */
#define TX2_T_ON BIT_14S /* TX2 Timeout/Recv Timer Test On */
......@@ -1353,14 +1367,14 @@ extern "C" {
/* Transmit Arbiter Registers MAC 1 and 2, use MR_ADDR() to access */
/* TXA_ITI_INI 32 bit Tx Arb Interval Timer Init Val */
/* TXA_ITI_VAL 32 bit Tx Arb Interval Timer Value */
/* TXA_LIM_INI 32 bit Tx Arb Limit Counter Init Val */
/* TXA_LIM_VAL 32 bit Tx Arb Limit Counter Value */
/* TXA_ITI_INI 32 bit Tx Arb Interval Timer Init Val */
/* TXA_ITI_VAL 32 bit Tx Arb Interval Timer Value */
/* TXA_LIM_INI 32 bit Tx Arb Limit Counter Init Val */
/* TXA_LIM_VAL 32 bit Tx Arb Limit Counter Value */
/* Bit 31..24: reserved */
#define TXA_MAX_VAL 0x00ffffffUL/* Bit 23.. 0: Max TXA Timer/Cnt Val */
/* TXA_CTRL 8 bit Tx Arbiter Control Register */
/* TXA_CTRL 8 bit Tx Arbiter Control Register */
#define TXA_ENA_FSYNC BIT_7S /* Enable force of sync Tx queue */
#define TXA_DIS_FSYNC BIT_6S /* Disable force of sync Tx queue */
#define TXA_ENA_ALLOC BIT_5S /* Enable alloc of free bandwidth */
......@@ -1370,7 +1384,7 @@ extern "C" {
#define TXA_ENA_ARB BIT_1S /* Enable Tx Arbiter */
#define TXA_DIS_ARB BIT_0S /* Disable Tx Arbiter */
/* TXA_TEST 8 bit Tx Arbiter Test Register */
/* TXA_TEST 8 bit Tx Arbiter Test Register */
/* Bit 7.. 6: reserved */
#define TXA_INT_T_ON BIT_5S /* Tx Arb Interval Timer Test On */
#define TXA_INT_T_OFF BIT_4S /* Tx Arb Interval Timer Test Off */
......@@ -1379,22 +1393,22 @@ extern "C" {
#define TXA_LIM_T_OFF BIT_1S /* Tx Arb Limit Timer Test Off */
#define TXA_LIM_T_STEP BIT_0S /* Tx Arb Limit Timer Step */
/* TXA_STAT 8 bit Tx Arbiter Status Register */
/* TXA_STAT 8 bit Tx Arbiter Status Register */
/* Bit 7.. 1: reserved */
#define TXA_PRIO_XS BIT_0S /* sync queue has prio to send */
/* Q_BC 32 bit Current Byte Counter */
/* Q_BC 32 bit Current Byte Counter */
/* Bit 31..16: reserved */
#define BC_MAX 0xffff /* Bit 15.. 0: Byte counter */
/* BMU Control Status Registers */
/* B0_R1_CSR 32 bit BMU Ctrl/Stat Rx Queue 1 */
/* B0_R2_CSR 32 bit BMU Ctrl/Stat Rx Queue 2 */
/* B0_XA1_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
/* B0_XS1_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 1 */
/* B0_XA2_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
/* B0_XS2_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 2 */
/* Q_CSR 32 bit BMU Control/Status Register */
/* B0_R1_CSR 32 bit BMU Ctrl/Stat Rx Queue 1 */
/* B0_R2_CSR 32 bit BMU Ctrl/Stat Rx Queue 2 */
/* B0_XA1_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
/* B0_XS1_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 1 */
/* B0_XA2_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
/* B0_XS2_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 2 */
/* Q_CSR 32 bit BMU Control/Status Register */
/* Bit 31..25: reserved */
#define CSR_SV_IDLE BIT_24 /* BMU SM Idle */
/* Bit 23..22: reserved */
......@@ -1428,7 +1442,7 @@ extern "C" {
CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\
CSR_TRANS_RUN)
/* Q_F 32 bit Flag Register */
/* Q_F 32 bit Flag Register */
/* Bit 31..28: reserved */
#define F_ALM_FULL BIT_27 /* Rx FIFO: almost full */
#define F_EMPTY BIT_27 /* Tx FIFO: empty flag */
......@@ -1439,17 +1453,17 @@ extern "C" {
/* Bit 15..11: reserved */
#define F_WATER_MARK 0x0007ffL /* Bit 10.. 0: Watermark */
/* Q_T1 32 bit Test Register 1 */
/* Q_T1 32 bit Test Register 1 */
/* Holds four State Machine control Bytes */
#define SM_CRTL_SV_MSK (0xffL<<24) /* Bit 31..24: Control Supervisor SM */
#define SM_CRTL_RD_MSK (0xffL<<16) /* Bit 23..16: Control Read Desc SM */
#define SM_CRTL_WR_MSK (0xffL<<8) /* Bit 15.. 8: Control Write Desc SM */
#define SM_CRTL_TR_MSK 0xffL /* Bit 7.. 0: Control Transfer SM */
#define SM_CTRL_SV_MSK (0xffL<<24) /* Bit 31..24: Control Supervisor SM */
#define SM_CTRL_RD_MSK (0xffL<<16) /* Bit 23..16: Control Read Desc SM */
#define SM_CTRL_WR_MSK (0xffL<<8) /* Bit 15.. 8: Control Write Desc SM */
#define SM_CTRL_TR_MSK 0xffL /* Bit 7.. 0: Control Transfer SM */
/* Q_T1_TR 8 bit Test Register 1 Transfer SM */
/* Q_T1_WR 8 bit Test Register 1 Write Descriptor SM */
/* Q_T1_RD 8 bit Test Register 1 Read Descriptor SM */
/* Q_T1_SV 8 bit Test Register 1 Supervisor SM */
/* Q_T1_TR 8 bit Test Register 1 Transfer SM */
/* Q_T1_WR 8 bit Test Register 1 Write Descriptor SM */
/* Q_T1_RD 8 bit Test Register 1 Read Descriptor SM */
/* Q_T1_SV 8 bit Test Register 1 Supervisor SM */
/* The control status byte of each machine looks like ... */
#define SM_STATE 0xf0 /* Bit 7.. 4: State which shall be loaded */
......@@ -1459,7 +1473,7 @@ extern "C" {
#define SM_STEP BIT_0S /* Step the State Machine */
/* The encoding of the states is not supported by the Diagnostics Tool */
/* Q_T2 32 bit Test Register 2 */
/* Q_T2 32 bit Test Register 2 */
/* Bit 31.. 8: reserved */
#define T2_AC_T_ON BIT_7 /* Address Counter Test Mode on */
#define T2_AC_T_OFF BIT_6 /* Address Counter Test Mode off */
......@@ -1470,23 +1484,23 @@ extern "C" {
#define T2_STEP02 BIT_1 /* Inc AC/Dec BC by 2 */
#define T2_STEP01 BIT_0 /* Inc AC/Dec BC by 1 */
/* Q_T3 32 bit Test Register 3 */
/* Q_T3 32 bit Test Register 3 */
/* Bit 31.. 7: reserved */
#define T3_MUX_MSK (7<<4) /* Bit 6.. 4: Mux Position */
/* Bit 3: reserved */
#define T3_VRAM_MSK 7 /* Bit 2.. 0: Virtual RAM Buffer Address */
/* RAM Buffer Register Offsets, use RB_ADDR(Queue, Offs) to access */
/* RB_START 32 bit RAM Buffer Start Address */
/* RB_END 32 bit RAM Buffer End Address */
/* RB_WP 32 bit RAM Buffer Write Pointer */
/* RB_RP 32 bit RAM Buffer Read Pointer */
/* RB_RX_UTPP 32 bit Rx Upper Threshold, Pause Pack */
/* RB_RX_LTPP 32 bit Rx Lower Threshold, Pause Pack */
/* RB_RX_UTHP 32 bit Rx Upper Threshold, High Prio */
/* RB_RX_LTHP 32 bit Rx Lower Threshold, High Prio */
/* RB_PC 32 bit RAM Buffer Packet Counter */
/* RB_LEV 32 bit RAM Buffer Level Register */
/* RB_START 32 bit RAM Buffer Start Address */
/* RB_END 32 bit RAM Buffer End Address */
/* RB_WP 32 bit RAM Buffer Write Pointer */
/* RB_RP 32 bit RAM Buffer Read Pointer */
/* RB_RX_UTPP 32 bit Rx Upper Threshold, Pause Pack */
/* RB_RX_LTPP 32 bit Rx Lower Threshold, Pause Pack */
/* RB_RX_UTHP 32 bit Rx Upper Threshold, High Prio */
/* RB_RX_LTHP 32 bit Rx Lower Threshold, High Prio */
/* RB_PC 32 bit RAM Buffer Packet Counter */
/* RB_LEV 32 bit RAM Buffer Level Register */
/* Bit 31..19: reserved */
#define RB_MSK 0x0007ffff /* Bit 18.. 0: RAM Buffer Pointer Bits */
......@@ -1519,17 +1533,17 @@ extern "C" {
/* Receive and Transmit MAC FIFO Registers (GENESIS only) */
/* RX_MFF_EA 32 bit Receive MAC FIFO End Address */
/* RX_MFF_WP 32 bit Receive MAC FIFO Write Pointer */
/* RX_MFF_RP 32 bit Receive MAC FIFO Read Pointer */
/* RX_MFF_PC 32 bit Receive MAC FIFO Packet Counter */
/* RX_MFF_LEV 32 bit Receive MAC FIFO Level */
/* TX_MFF_EA 32 bit Transmit MAC FIFO End Address */
/* TX_MFF_WP 32 bit Transmit MAC FIFO Write Pointer */
/* TX_MFF_WSP 32 bit Transmit MAC FIFO WR Shadow Pointer */
/* TX_MFF_RP 32 bit Transmit MAC FIFO Read Pointer */
/* TX_MFF_PC 32 bit Transmit MAC FIFO Packet Cnt */
/* TX_MFF_LEV 32 bit Transmit MAC FIFO Level */
/* RX_MFF_EA 32 bit Receive MAC FIFO End Address */
/* RX_MFF_WP 32 bit Receive MAC FIFO Write Pointer */
/* RX_MFF_RP 32 bit Receive MAC FIFO Read Pointer */
/* RX_MFF_PC 32 bit Receive MAC FIFO Packet Counter */
/* RX_MFF_LEV 32 bit Receive MAC FIFO Level */
/* TX_MFF_EA 32 bit Transmit MAC FIFO End Address */
/* TX_MFF_WP 32 bit Transmit MAC FIFO Write Pointer */
/* TX_MFF_WSP 32 bit Transmit MAC FIFO WR Shadow Pointer */
/* TX_MFF_RP 32 bit Transmit MAC FIFO Read Pointer */
/* TX_MFF_PC 32 bit Transmit MAC FIFO Packet Cnt */
/* TX_MFF_LEV 32 bit Transmit MAC FIFO Level */
/* Bit 31.. 6: reserved */
#define MFF_MSK 0x007fL /* Bit 5.. 0: MAC FIFO Address/Ptr Bits */
......@@ -1682,7 +1696,7 @@ extern "C" {
#define RX_GMF_FL_THR_DEF 0x0a /* Rx GMAC FIFO Flush Threshold default */
/* GMAC_TI_ST_CTRL 8 bit Time Stamp Timer Ctrl Reg (YUKON only) */
/* GMAC_TI_ST_CTRL 8 bit Time Stamp Timer Ctrl Reg (YUKON only) */
/* Bit 7.. 3: reserved */
#define GMT_ST_START BIT_2S /* Start Time Stamp Timer */
#define GMT_ST_STOP BIT_1S /* Stop Time Stamp Timer */
......@@ -1766,13 +1780,13 @@ extern "C" {
#define GMAC_DEF_MSK (GM_IS_TX_CO_OV | GM_IS_RX_CO_OV | \
GM_IS_TX_FF_UR)
/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
/* Bits 15.. 2: reserved */
#define GMLC_RST_CLR BIT_1S /* Clear GMAC Link Reset */
#define GMLC_RST_SET BIT_0S /* Set GMAC Link Reset */
/* WOL_CTRL_STAT 16 bit WOL Control/Status Reg */
/* WOL_CTRL_STAT 16 bit WOL Control/Status Reg */
#define WOL_CTL_LINK_CHG_OCC BIT_15S
#define WOL_CTL_MAGIC_PKT_OCC BIT_14S
#define WOL_CTL_PATTERN_OCC BIT_13S
......@@ -1801,7 +1815,7 @@ extern "C" {
WOL_CTL_DIS_PATTERN_UNIT | \
WOL_CTL_DIS_MAGIC_PKT_UNIT)
/* WOL_MATCH_CTL 8 bit WOL Match Control Reg */
/* WOL_MATCH_CTL 8 bit WOL Match Control Reg */
#define WOL_CTL_PATT_ENA(x) (BIT_0 << (x))
#define SK_NUM_WOL_PATTERN 7
......
drivers/net/sk98lin/h/skgehwt.h
View file @ e06cf18f
/******************************************************************************
*
* Name: skhwt.h
* Project: Gigabit Ethernet Adapters, Schedule-Modul
* Version: $Revision: 1.6 $
* Date: $Date: 2003/05/13 17:57:48 $
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.7 $
* Date: $Date: 2003/09/16 12:55:08 $
* Purpose: Defines for the hardware timer functions
*
******************************************************************************/
......@@ -27,6 +27,9 @@
* History:
*
* $Log: skgehwt.h,v $
* Revision 1.7 2003/09/16 12:55:08 rschmidt
* Editorial changes
*
* Revision 1.6 2003/05/13 17:57:48 mkarl
* Editorial changes.
*
......@@ -34,7 +37,7 @@
* Changed license header to GPL.
*
* Revision 1.4 1998/08/19 09:50:58 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
* fix: remove struct keyword from C-code (see CCC) add typedefs
*
* Revision 1.3 1998/08/14 07:09:29 gklug
* fix: chg pAc -> pAC
......@@ -44,10 +47,6 @@
*
* Revision 1.1 1998/08/07 09:32:58 gklug
* first version
*
*
*
*
*
******************************************************************************/
......@@ -64,14 +63,14 @@
* - use in Adapters context name pAC->Hwt
*/
typedef struct s_Hwt {
SK_U32 TStart ; /* HWT start */
SK_U32 TStop ; /* HWT stop */
int TActive ; /* HWT: flag : active/inactive */
SK_U32 TStart; /* HWT start */
SK_U32 TStop; /* HWT stop */
int TActive; /* HWT: flag : active/inactive */
} SK_HWT;
extern void SkHwtInit(SK_AC *pAC, SK_IOC Ioc);
extern void SkHwtStart(SK_AC *pAC, SK_IOC Ioc, SK_U32 Time);
extern void SkHwtStop(SK_AC *pAC, SK_IOC Ioc);
extern SK_U32 SkHwtRead(SK_AC *pAC,SK_IOC Ioc);
extern SK_U32 SkHwtRead(SK_AC *pAC, SK_IOC Ioc);
extern void SkHwtIsr(SK_AC *pAC, SK_IOC Ioc);
#endif /* _SKGEHWT_H_ */
drivers/net/sk98lin/h/skgei2c.h
View file @ e06cf18f
/******************************************************************************
*
* Name: skgei2c.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.23 $
* Date: $Date: 2002/12/19 14:34:27 $
* Purpose: Special GEnesis defines for TWSI
* Project: Gigabit Ethernet Adapters, TWSI-Module
* Version: $Revision: 1.25 $
* Date: $Date: 2003/10/20 09:06:05 $
* Purpose: Special defines for TWSI
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,12 @@
* History:
*
* $Log: skgei2c.h,v $
* Revision 1.25 2003/10/20 09:06:05 rschmidt
* Editorial changes.
*
* Revision 1.24 2003/09/23 09:31:15 malthoff
* Parameter dev_size added to macro definition of SK_I2C_CTL.
*
* Revision 1.23 2002/12/19 14:34:27 rschmidt
* Added cast in macros SK_I2C_SET_BIT() and SK_I2C_CLR_BIT()
* Editorial changes (TWSI)
......@@ -107,8 +114,6 @@
* Revision 1.1 1998/07/17 11:27:56 gklug
* Created.
*
*
*
******************************************************************************/
/*
......@@ -121,12 +126,13 @@
/*
* Macros to access the B2_I2C_CTRL
*/
#define SK_I2C_CTL(IoC, flag, dev, reg, burst) \
#define SK_I2C_CTL(IoC, flag, dev, dev_size, reg, burst) \
SK_OUT32(IoC, B2_I2C_CTRL,\
(flag ? 0x80000000UL : 0x0L) | \
(((SK_U32) reg << 16) & I2C_ADDR) | \
(((SK_U32) dev << 9) & I2C_DEV_SEL) | \
(( burst << 4) & I2C_BURST_LEN))
(((SK_U32)reg << 16) & I2C_ADDR) | \
(((SK_U32)dev << 9) & I2C_DEV_SEL) | \
(dev_size & I2C_DEV_SIZE) | \
((burst << 4) & I2C_BURST_LEN))
#define SK_I2C_STOP(IoC) { \
SK_U32 I2cCtrl; \
......@@ -166,42 +172,42 @@
*/
#define SK_LM80_VT_LSB 22 /* 22mV LSB resolution */
#define SK_LM80_TEMP_LSB 10 /* 1 degree LSB resolution */
#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for the
* extension value
*/
#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
/* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for ext. val. */
/*
* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
* assuming: 6500rpm, 4 pulses, divisor 1
*/
#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
/*
* Define sensor management data
* Maximum is reached on copperfield with dual Broadcom.
* Maximum is reached on Genesis copper dual port and Yukon-64
* Board specific maximum is in pAC->I2c.MaxSens
*/
#define SK_MAX_SENSORS 8 /* maximal no. of installed sensors */
#define SK_MIN_SENSORS 5 /* minimal no. of installed sensors */
/*
* To watch the statemachine (JS) use the timer in two ways instead of one as hitherto
* To watch the state machine (SM) use the timer in two ways
* instead of one as hitherto
*/
#define SK_TIMER_WATCH_STATEMACHINE 0 /* Watch the statemachine to finish in a specific time */
#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
#define SK_TIMER_WATCH_SM 0 /* Watch the SM to finish in a spec. time */
#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
/*
* Defines for the individual Thresholds
* Defines for the individual thresholds
*/
/* Temperature sensor */
#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
#define SK_SEN_TEMP_HIGH_WARN 700 /* Temperature High Warn Threshold */
#define SK_SEN_TEMP_LOW_WARN 100 /* Temperature Low Warn Threshold */
#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
/* VCC which should be 5 V */
#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
#define SK_SEN_PCI_5V_LOW_WARN 4664 /* Voltage PCI Low Warn Threshold */
#define SK_SEN_PCI_5V_LOW_ERR 4422 /* Voltage PCI Low Err Threshold */
......@@ -229,17 +235,16 @@
#define SK_SEN_PCI_IO_3V3_HIGH_ERR 3850 /* + 15% V PCI-IO High Err Threshold */
#define SK_SEN_PCI_IO_3V3_HIGH_WARN 3674 /* + 10% V PCI-IO High Warn Threshold */
/* 3300 mVolt */
#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
/*
* VDD voltage
*/
#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
/*
* PHY PLL 3V3 voltage
......@@ -255,8 +260,8 @@
#define SK_SEN_VAUX_3V3_HIGH_ERR 3630 /* Voltage VAUX High Err Threshold */
#define SK_SEN_VAUX_3V3_HIGH_WARN 3476 /* Voltage VAUX High Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_WARN 3146 /* Voltage VAUX Low Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
#define SK_SEN_VAUX_RANGE_LIMITER 1000 /* 1000 mV range delimiter */
/*
......@@ -270,7 +275,7 @@
/*
* ASIC Core 1V5 voltage (YUKON only)
*/
#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
#define SK_SEN_CORE_1V5_HIGH_WARN 1575 /* Voltage ASIC Core High Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_WARN 1425 /* Voltage ASIC Core Low Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_ERR 1350 /* Voltage ASIC Core Low Err Threshold */
......@@ -285,8 +290,8 @@
*/
#define SK_SEN_FAN_HIGH_ERR 20000 /* FAN Speed High Err Threshold */
#define SK_SEN_FAN_HIGH_WARN 20000 /* FAN Speed High Warn Threshold */
#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
/*
* Some Voltages need dynamic thresholds
......
drivers/net/sk98lin/h/skgeinit.h
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgeinit.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.81 $
* Date: $Date: 2003/07/04 12:30:38 $
* Version: $Revision: 1.83 $
* Date: $Date: 2003/09/16 14:07:37 $
* Purpose: Structures and prototypes for the GE Init Module
*
******************************************************************************/
......@@ -27,6 +27,23 @@
* History:
*
* $Log: skgeinit.h,v $
* Revision 1.83 2003/09/16 14:07:37 rschmidt
* Moved defines for PHY power down modes from skgehw.h
* Added prototypes for SkMacClearRst()
* Editorial changes
*
* Revision 1.82 2003/09/16 07:18:36 mschmid
* Added members to port structure for MAC control
* - PMacColThres
* - PMacJamLen
* - PMacJamIpgVal
* - PMacJamIpgData
* - PMacIpgData
* - PMacLimit4
* Added PHY power state to port structure
* - PPhyPowerState
* Added function prototypes to enter and leave low power modes
*
* Revision 1.81 2003/07/04 12:30:38 rschmidt
* Added SK_FAR to pointers in MAC statistic functions (for PXE)
* Editorial changes
......@@ -594,6 +611,13 @@ extern "C" {
#define SK_PRT_INIT 2 /* the port is initialized */
#define SK_PRT_RUN 3 /* the port has an active link */
/* PHY power down modes */
#define PHY_PM_OPERATIONAL_MODE 0 /* PHY operational mode */
#define PHY_PM_DEEP_SLEEP 1 /* coma mode --> minimal power */
#define PHY_PM_IEEE_POWER_DOWN 2 /* IEEE 22.2.4.1.5 compl. power down */
#define PHY_PM_ENERGY_DETECT 3 /* energy detect */
#define PHY_PM_ENERGY_DETECT_PLUS 4 /* energy detect plus */
/* Default receive frame limit for Workaround of XMAC Errata */
#define SK_DEF_RX_WA_LIM SK_CONSTU64(100)
......@@ -685,6 +709,13 @@ typedef struct s_GePort {
SK_U8 PCableLen; /* Cable Length */
SK_U8 PMdiPairLen[4]; /* MDI[0..3] Pair Length */
SK_U8 PMdiPairSts[4]; /* MDI[0..3] Pair Diagnostic Status */
SK_U8 PPhyPowerState; /* PHY current power state */
int PMacColThres; /* MAC Collision Threshold */
int PMacJamLen; /* MAC Jam length */
int PMacJamIpgVal; /* MAC Jam IPG */
int PMacJamIpgData; /* MAC IPG Jam to Data */
int PMacIpgData; /* MAC Data IPG */
SK_BOOL PMacLimit4; /* reset collision counter and backoff algorithm */
} SK_GEPORT;
/*
......@@ -865,6 +896,11 @@ extern void SkMacHardRst(
SK_IOC IoC,
int Port);
extern void SkMacClearRst(
SK_AC *pAC,
SK_IOC IoC,
int Port);
extern void SkXmInitMac(
SK_AC *pAC,
SK_IOC IoC,
......@@ -1040,6 +1076,17 @@ extern int SkGmCableDiagStatus(
int Port,
SK_BOOL StartTest);
extern int SkGmEnterLowPowerMode(
SK_AC *pAC,
SK_IOC IoC,
int Port,
SK_U8 Mode);
extern int SkGmLeaveLowPowerMode(
SK_AC *pAC,
SK_IOC IoC,
int Port);
#ifdef SK_DIAG
extern void SkGePhyRead(
SK_AC *pAC,
......@@ -1101,6 +1148,7 @@ extern int SkGeInitAssignRamToQueues();
extern void SkMacRxTxDisable();
extern void SkMacSoftRst();
extern void SkMacHardRst();
extern void SkMacClearRst();
extern void SkMacInitPhy();
extern int SkMacRxTxEnable();
extern void SkMacPromiscMode();
......@@ -1131,6 +1179,8 @@ extern int SkGmResetCounter();
extern int SkXmOverflowStatus();
extern int SkGmOverflowStatus();
extern int SkGmCableDiagStatus();
extern int SkGmEnterLowPowerMode();
extern int SkGmLeaveLowPowerMode();
#ifdef SK_DIAG
extern void SkGePhyRead();
......
drivers/net/sk98lin/h/skgepnmi.h
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgepnmi.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.61 $
* Date: $Date: 2003/05/23 12:53:52 $
* Version: $Revision: 1.62 $
* Date: $Date: 2003/08/15 12:31:52 $
* Purpose: Defines for Private Network Management Interface
*
****************************************************************************/
......@@ -27,6 +27,18 @@
* History:
*
* $Log: skgepnmi.h,v $
* Revision 1.62 2003/08/15 12:31:52 tschilli
* Added new OIDs:
* OID_SKGE_DRIVER_RELDATE
* OID_SKGE_DRIVER_FILENAME
* OID_SKGE_CHIPID
* OID_SKGE_RAMSIZE
* OID_SKGE_VAUXAVAIL
* OID_SKGE_PHY_TYPE
* OID_SKGE_PHY_LP_MODE
*
* Added new define SK_DIAG_ATTACHED for OID_SKGE_DIAG_MODE handling.
*
* Revision 1.61 2003/05/23 12:53:52 tschilli
* Generic PNMI IOCTL subcommands added.
* Function prototype SkPnmiGenIoctl() added.
......@@ -568,15 +580,23 @@
#define OID_SKGE_ALL_DATA 0xFF020190
/* Defines for VCT. */
#define OID_SKGE_VCT_GET 0xFF020200
#define OID_SKGE_VCT_SET 0xFF020201
#define OID_SKGE_VCT_STATUS 0xFF020202
#define OID_SKGE_VCT_GET 0xFF020200
#define OID_SKGE_VCT_SET 0xFF020201
#define OID_SKGE_VCT_STATUS 0xFF020202
#ifdef SK_DIAG_SUPPORT
/* Defines for driver DIAG mode. */
#define OID_SKGE_DIAG_MODE 0xFF020204
#define OID_SKGE_DIAG_MODE 0xFF020204
#endif /* SK_DIAG_SUPPORT */
/* New OIDs */
#define OID_SKGE_DRIVER_RELDATE 0xFF020210
#define OID_SKGE_DRIVER_FILENAME 0xFF020211
#define OID_SKGE_CHIPID 0xFF020212
#define OID_SKGE_RAMSIZE 0xFF020213
#define OID_SKGE_VAUXAVAIL 0xFF020214
#define OID_SKGE_PHY_TYPE 0xFF020215
#define OID_SKGE_PHY_LP_MODE 0xFF020216
/* VCT struct to store a backup copy of VCT data after a port reset. */
typedef struct s_PnmiVct {
......@@ -613,6 +633,12 @@ typedef struct s_PnmiVct {
#define OID_SKGE_TRAP_RLMT_PORT_UP 523
#define OID_SKGE_TRAP_RLMT_SEGMENTATION 524
#ifdef SK_DIAG_SUPPORT
/* Defines for driver DIAG mode. */
#define SK_DIAG_ATTACHED 2
#define SK_DIAG_RUNNING 1
#define SK_DIAG_IDLE 0
#endif /* SK_DIAG_SUPPORT */
/*
* Generic PNMI IOCTL subcommand definitions.
......@@ -730,6 +756,14 @@ typedef struct s_PnmiVct {
#define SK_PNMI_ERR051MSG "SkPnmiEvent: Port switch suspicious"
#define SK_PNMI_ERR052 (SK_ERRBASE_PNMI + 52)
#define SK_PNMI_ERR052MSG ""
#define SK_PNMI_ERR053 (SK_ERRBASE_PNMI + 53)
#define SK_PNMI_ERR053MSG "General: Driver release date not initialized"
#define SK_PNMI_ERR054 (SK_ERRBASE_PNMI + 54)
#define SK_PNMI_ERR054MSG "General: Driver release date string too long"
#define SK_PNMI_ERR055 (SK_ERRBASE_PNMI + 55)
#define SK_PNMI_ERR055MSG "General: Driver file name not initialized"
#define SK_PNMI_ERR056 (SK_ERRBASE_PNMI + 56)
#define SK_PNMI_ERR056MSG "General: Driver file name string too long"
/*
* Management counter macros called by the driver
......@@ -740,6 +774,11 @@ typedef struct s_PnmiVct {
#define SK_PNMI_SET_DRIVER_VER(pAC,v) ((pAC)->Pnmi.pDriverVersion = \
(char *)(v))
#define SK_PNMI_SET_DRIVER_RELDATE(pAC,v) ((pAC)->Pnmi.pDriverReleaseDate = \
(char *)(v))
#define SK_PNMI_SET_DRIVER_FILENAME(pAC,v) ((pAC)->Pnmi.pDriverFileName = \
(char *)(v))
#define SK_PNMI_CNT_TX_QUEUE_LEN(pAC,v,p) \
{ \
......@@ -916,6 +955,8 @@ typedef struct s_PnmiConf {
char ConfMacFactoryAddr[6];
SK_U8 ConfPMD;
SK_U8 ConfConnector;
SK_U32 ConfPhyType;
SK_U32 ConfPhyMode;
SK_U8 ConfLinkCapability;
SK_U8 ConfLinkMode;
SK_U8 ConfLinkModeStatus;
......@@ -964,9 +1005,14 @@ typedef struct s_PnmiStrucData {
SK_U32 DeviceType;
char DriverDescr[SK_PNMI_STRINGLEN1];
char DriverVersion[SK_PNMI_STRINGLEN2];
char DriverReleaseDate[SK_PNMI_STRINGLEN1];
char DriverFileName[SK_PNMI_STRINGLEN1];
char HwDescr[SK_PNMI_STRINGLEN1];
char HwVersion[SK_PNMI_STRINGLEN2];
SK_U16 Chipset;
SK_U32 ChipId;
SK_U8 VauxAvail;
SK_U32 RamSize;
SK_U32 MtuSize;
SK_U32 Action;
SK_U32 TestResult;
......@@ -1090,6 +1136,8 @@ typedef struct s_PnmiData {
char *pDriverDescription;
char *pDriverVersion;
char *pDriverReleaseDate;
char *pDriverFileName;
int MacUpdatedFlag;
int RlmtUpdatedFlag;
......@@ -1119,6 +1167,9 @@ typedef struct s_PnmiData {
SK_U8 VctStatus[SK_MAX_MACS];
SK_PNMI_VCT VctBackup[SK_MAX_MACS];
SK_PNMI_VCT_TIMER VctTimeout[SK_MAX_MACS];
#ifdef SK_DIAG_SUPPORT
SK_U32 DiagAttached;
#endif /* SK_DIAG_SUPPORT */
} SK_PNMI;
......
drivers/net/sk98lin/h/ski2c.h
View file @ e06cf18f
/******************************************************************************
*
* Name: ski2c.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.34 $
* Date: $Date: 2003/01/28 09:11:21 $
* Project: Gigabit Ethernet Adapters, TWSI-Module
* Version: $Revision: 1.35 $
* Date: $Date: 2003/10/20 09:06:30 $
* Purpose: Defines to access Voltage and Temperature Sensor
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,10 @@
* History:
*
* $Log: ski2c.h,v $
* Revision 1.35 2003/10/20 09:06:30 rschmidt
* Added prototypes for SkI2cRead() and SkI2cWrite().
* Editorial changes.
*
* Revision 1.34 2003/01/28 09:11:21 rschmidt
* Editorial changes
*
......@@ -137,7 +142,6 @@
* Revision 1.1 1998/06/19 14:30:10 malthoff
* Created. Sources taken from ML Project.
*
*
******************************************************************************/
/*
......@@ -252,7 +256,7 @@ struct s_Sensor {
SK_I32 SenThreWarnLow; /* Lower warning Threshold of the sensor */
int SenErrFlag; /* Sensor indicated an error */
SK_BOOL SenInit; /* Is sensor initialized ? */
SK_U64 SenErrCts; /* Error trap counter */
SK_U64 SenErrCts; /* Error trap counter */
SK_U64 SenWarnCts; /* Warning trap counter */
SK_U64 SenBegErrTS; /* Begin error timestamp */
SK_U64 SenBegWarnTS; /* Begin warning timestamp */
......@@ -279,13 +283,17 @@ typedef struct s_I2c {
#endif /* !SK_DIAG */
} SK_I2C;
extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
int Reg, int Burst);
extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#ifndef SK_DIAG
#ifdef SK_DIAG
extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
int Burst);
#else /* !SK_DIAG */
extern int SkI2cEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
extern void SkI2cWaitIrq(SK_AC *pAC, SK_IOC IoC);
extern void SkI2cIsr(SK_AC *pAC, SK_IOC IoC);
#endif
#endif /* !SK_DIAG */
#endif /* n_SKI2C_H */
drivers/net/sk98lin/h/skqueue.h
View file @ e06cf18f
/******************************************************************************
*
* Name: skqueue.h
* Project: Gigabit Ethernet Adapters, Schedule-Modul
* Version: $Revision: 1.15 $
* Date: $Date: 2003/05/13 17:54:57 $
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.16 $
* Date: $Date: 2003/09/16 12:50:32 $
* Purpose: Defines for the Event queue
*
******************************************************************************/
......@@ -27,6 +27,9 @@
* History:
*
* $Log: skqueue.h,v $
* Revision 1.16 2003/09/16 12:50:32 rschmidt
* Editorial changes
*
* Revision 1.15 2003/05/13 17:54:57 mkarl
* Editorial changes.
*
......@@ -47,7 +50,7 @@
* add: typedef SK_QUEUE
*
* Revision 1.9 1998/08/19 09:50:59 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
* fix: remove struct keyword from C-code (see CCC) add typedefs
*
* Revision 1.8 1998/08/18 07:00:01 gklug
* fix: SK_PTR not defined use void * instead.
......@@ -74,8 +77,6 @@
* Revision 1.1 1998/07/30 14:52:12 gklug
* Initial version.
* Defines Event Classes, Event structs and queue management variables.
*
*
*
******************************************************************************/
......@@ -92,7 +93,7 @@
*/
#define SKGE_DRV 1 /* Driver Event Class */
#define SKGE_RLMT 2 /* RLMT Event Class */
#define SKGE_I2C 3 /* i2C Event Class */
#define SKGE_I2C 3 /* I2C Event Class */
#define SKGE_PNMI 4 /* PNMI Event Class */
#define SKGE_CSUM 5 /* Checksum Event Class */
#define SKGE_HWAC 6 /* Hardware Access Event Class */
......@@ -121,25 +122,25 @@ typedef union u_EvPara {
* Event Queue
* skqueue.c
* events are class/value pairs
* class is addressee, e.g. RMT, PCM etc.
* class is addressee, e.g. RLMT, PNMI etc.
* value is command, e.g. line state change, ring op change etc.
*/
typedef struct s_EventElem {
SK_U32 Class ; /* Event class */
SK_U32 Event ; /* Event value */
SK_EVPARA Para ; /* Event parameter */
SK_U32 Class; /* Event class */
SK_U32 Event; /* Event value */
SK_EVPARA Para; /* Event parameter */
} SK_EVENTELEM;
typedef struct s_Queue {
SK_EVENTELEM EvQueue[SK_MAX_EVENT];
SK_EVENTELEM *EvPut ;
SK_EVENTELEM *EvGet ;
SK_EVENTELEM *EvPut;
SK_EVENTELEM *EvGet;
} SK_QUEUE;
extern void SkEventInit(SK_AC *pAC, SK_IOC Ioc, int Level);
extern void SkEventQueue(SK_AC *pAC, SK_U32 Class, SK_U32 Event,
SK_EVPARA Para);
extern int SkEventDispatcher(SK_AC *pAC,SK_IOC Ioc);
extern int SkEventDispatcher(SK_AC *pAC, SK_IOC Ioc);
/* Define Error Numbers and messages */
......
drivers/net/sk98lin/h/sktimer.h
View file @ e06cf18f
/******************************************************************************
*
* Name: sktimer.h
* Project: Gigabit Ethernet Adapters, Schedule-Modul
* Version: $Revision: 1.10 $
* Date: $Date: 2003/05/13 17:56:44 $
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.11 $
* Date: $Date: 2003/09/16 12:58:18 $
* Purpose: Defines for the timer functions
*
******************************************************************************/
......@@ -27,6 +27,9 @@
* History:
*
* $Log: sktimer.h,v $
* Revision 1.11 2003/09/16 12:58:18 rschmidt
* Editorial changes
*
* Revision 1.10 2003/05/13 17:56:44 mkarl
* Editorial changes.
*
......@@ -40,7 +43,7 @@
* fix: SK_TIMCTRL needs to be defined
*
* Revision 1.6 1998/08/19 09:51:00 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
* fix: remove struct keyword from C-code (see CCC) add typedefs
*
* Revision 1.5 1998/08/17 13:43:21 gklug
* chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
......@@ -78,25 +81,25 @@
typedef struct s_Timer SK_TIMER;
struct s_Timer {
SK_TIMER *TmNext ; /* linked list */
SK_U32 TmClass ; /* Timer Event class */
SK_U32 TmEvent ; /* Timer Event value */
SK_EVPARA TmPara ; /* Timer Event parameter */
SK_U32 TmDelta ; /* delta time */
int TmActive ; /* flag : active/inactive */
} ;
SK_TIMER *TmNext; /* linked list */
SK_U32 TmClass; /* Timer Event class */
SK_U32 TmEvent; /* Timer Event value */
SK_EVPARA TmPara; /* Timer Event parameter */
SK_U32 TmDelta; /* delta time */
int TmActive; /* flag: active/inactive */
};
/*
* Timer control struct.
* - use in Adapters context name pAC->Tim
*/
typedef struct s_TimCtrl {
SK_TIMER *StQueue ; /* Head of Timer queue */
} SK_TIMCTRL ;
SK_TIMER *StQueue; /* Head of Timer queue */
} SK_TIMCTRL;
extern void SkTimerInit(SK_AC *pAC,SK_IOC Ioc, int Level);
extern void SkTimerStop(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer);
extern void SkTimerStart(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer,
SK_U32 Time,SK_U32 Class,SK_U32 Event,SK_EVPARA Para);
extern void SkTimerDone(SK_AC *pAC,SK_IOC Ioc);
extern void SkTimerInit(SK_AC *pAC, SK_IOC Ioc, int Level);
extern void SkTimerStop(SK_AC *pAC, SK_IOC Ioc, SK_TIMER *pTimer);
extern void SkTimerStart(SK_AC *pAC, SK_IOC Ioc, SK_TIMER *pTimer,
SK_U32 Time, SK_U32 Class, SK_U32 Event, SK_EVPARA Para);
extern void SkTimerDone(SK_AC *pAC, SK_IOC Ioc);
#endif /* _SKTIMER_H_ */
drivers/net/sk98lin/h/sktypes.h
View file @ e06cf18f
......@@ -2,15 +2,16 @@
*
* Name: sktypes.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.1 $
* Date: $Date: 2003/07/21 07:26:01 $
* Version: $Revision: 1.2 $
* Date: $Date: 2003/10/07 08:16:51 $
* Purpose: Define data types for Linux
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,9 @@
* History:
*
* $Log: sktypes.h,v $
* Revision 1.2 2003/10/07 08:16:51 mlindner
* Fix: Copyright changes
*
* Revision 1.1 2003/07/21 07:26:01 rroesler
* Fix: Re-Enter after CVS crash
*
......
drivers/net/sk98lin/h/skversion.h
View file @ e06cf18f
......@@ -2,15 +2,16 @@
*
* Name: version.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.3 $
* Date: $Date: 2003/08/25 13:34:48 $
* Version: $Revision: 1.5 $
* Date: $Date: 2003/10/07 08:16:51 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -25,6 +26,12 @@
*
* History:
* $Log: skversion.h,v $
* Revision 1.5 2003/10/07 08:16:51 mlindner
* Fix: Copyright changes
*
* Revision 1.4 2003/09/22 08:40:10 mlindner
* Add: Added DRIVER_FILE_NAME and DRIVER_REL_DATE
*
* Revision 1.3 2003/08/25 13:34:48 mlindner
* Fix: Lint changes
*
......@@ -54,12 +61,14 @@
#ifdef lint
static const char SysKonnectFileId[] = "@(#) (C) SysKonnect GmbH.";
static const char SysKonnectBuildNumber[] =
"@(#)SK-BUILD: 6.18 PL: 01";
"@(#)SK-BUILD: 6.21 PL: 01";
#endif /* !defined(lint) */
#define BOOT_STRING "sk98lin: Network Device Driver v6.18\n" \
#define BOOT_STRING "sk98lin: Network Device Driver v6.21\n" \
"(C)Copyright 1999-2003 Marvell(R)."
#define VER_STRING "6.18"
#define VER_STRING "6.21"
#define DRIVER_FILE_NAME "sk98lin"
#define DRIVER_REL_DATE "Dec-15-2003"
drivers/net/sk98lin/h/xmac_ii.h
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: xmac_ii.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.48 $
* Date: $Date: 2003/05/13 17:17:55 $
* Version: $Revision: 1.52 $
* Date: $Date: 2003/10/02 16:35:50 $
* Purpose: Defines and Macros for Gigabit Ethernet Controller
*
******************************************************************************/
......@@ -27,6 +27,22 @@
* History:
*
* $Log: xmac_ii.h,v $
* Revision 1.52 2003/10/02 16:35:50 rschmidt
* Added defines for default values of GMAC parameters
* Changed defines for setting GMAC parameters
* Editorial changes
*
* Revision 1.51 2003/09/23 09:04:27 malthoff
* Add bit definitions for PHY_MARV_EXT_P_STAT.
*
* Revision 1.50 2003/09/16 14:15:07 rschmidt
* Added defines for Extended PHY Specific Control
* Editorial changes
*
* Revision 1.49 2003/09/16 07:22:46 mschmid
* Added defines for Marvell PHY energy detect modes
* Added macros for MAC parameter setting in port structure
*
* Revision 1.48 2003/05/13 17:17:55 mkarl
* Editorial changes.
*
......@@ -676,7 +692,7 @@ extern "C" {
#define PHY_XMAC_AUNE_LP 0x05 /* 16 bit r/o Link Partner Abi Reg */
#define PHY_XMAC_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
#define PHY_XMAC_NEPG 0x07 /* 16 bit r/w Next Page Register */
#define PHY_XMAC_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
#define PHY_XMAC_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner */
/* 0x09 - 0x0e: reserved */
#define PHY_XMAC_EXT_STAT 0x0f /* 16 bit r/o Ext Status Register */
#define PHY_XMAC_RES_ABI 0x10 /* 16 bit r/o PHY Resolved Ability */
......@@ -693,7 +709,7 @@ extern "C" {
#define PHY_BCOM_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
#define PHY_BCOM_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
#define PHY_BCOM_NEPG 0x07 /* 16 bit r/w Next Page Register */
#define PHY_BCOM_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
#define PHY_BCOM_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner */
/* Broadcom-specific registers */
#define PHY_BCOM_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
#define PHY_BCOM_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
......@@ -702,7 +718,7 @@ extern "C" {
#define PHY_BCOM_P_EXT_CTRL 0x10 /* 16 bit r/w PHY Extended Ctrl Reg */
#define PHY_BCOM_P_EXT_STAT 0x11 /* 16 bit r/o PHY Extended Stat Reg */
#define PHY_BCOM_RE_CTR 0x12 /* 16 bit r/w Receive Error Counter */
#define PHY_BCOM_FC_CTR 0x13 /* 16 bit r/w False Carr Sense Cnt */
#define PHY_BCOM_FC_CTR 0x13 /* 16 bit r/w False Carrier Sense Cnt */
#define PHY_BCOM_RNO_CTR 0x14 /* 16 bit r/w Receiver NOT_OK Cnt */
/* 0x15 - 0x17: reserved */
#define PHY_BCOM_AUX_CTRL 0x18 /* 16 bit r/w Auxiliary Control Reg */
......@@ -724,7 +740,7 @@ extern "C" {
#define PHY_MARV_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
#define PHY_MARV_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
#define PHY_MARV_NEPG 0x07 /* 16 bit r/w Next Page Register */
#define PHY_MARV_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
#define PHY_MARV_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner */
/* Marvel-specific registers */
#define PHY_MARV_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
#define PHY_MARV_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
......@@ -757,7 +773,7 @@ extern "C" {
#define PHY_LONE_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
#define PHY_LONE_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
#define PHY_LONE_NEPG 0x07 /* 16 bit r/w Next Page Register */
#define PHY_LONE_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner*/
#define PHY_LONE_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner */
/* Level One-specific registers */
#define PHY_LONE_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg*/
#define PHY_LONE_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
......@@ -804,12 +820,13 @@ extern "C" {
/*
* PHY bit definitions
* Bits defined as PHY_X_..., PHY_B_..., PHY_L_... or PHY_N_... are
* Xmac/Broadcom/LevelOne/National-specific.
* XMAC/Broadcom/LevelOne/National/Marvell-specific.
* All other are general.
*/
/***** PHY_XMAC_CTRL 16 bit r/w PHY Control Register *****/
/***** PHY_BCOM_CTRL 16 bit r/w PHY Control Register *****/
/***** PHY_MARV_CTRL 16 bit r/w PHY Status Register *****/
/***** PHY_LONE_CTRL 16 bit r/w PHY Control Register *****/
#define PHY_CT_RESET (1<<15) /* Bit 15: (sc) clear all PHY related regs */
#define PHY_CT_LOOP (1<<14) /* Bit 14: enable Loopback over PHY */
......@@ -909,27 +926,20 @@ extern "C" {
/***** PHY_XMAC_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
/* Bit 15..4: reserved */
#define PHY_AN_LP_NP (1<<3) /* Bit 3: Link Partner can Next Page */
#define PHY_AN_LOC_NP (1<<2) /* Bit 2: Local PHY can Next Page */
#define PHY_AN_RX_PG (1<<1) /* Bit 1: Page Received */
#define PHY_ANE_LP_NP (1<<3) /* Bit 3: Link Partner can Next Page */
#define PHY_ANE_LOC_NP (1<<2) /* Bit 2: Local PHY can Next Page */
#define PHY_ANE_RX_PG (1<<1) /* Bit 1: Page Received */
/* Bit 0: reserved */
/***** PHY_BCOM_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
/* Bit 15..5: reserved */
#define PHY_B_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
/***** PHY_LONE_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
#define PHY_L_AN_BP (1<<5) /* Bit 5: Base Page Indication */
#define PHY_L_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
/***** PHY_MARV_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
/* Bit 15..5: reserved */
#define PHY_ANE_PAR_DF (1<<4) /* Bit 4: Parallel Detection Fault */
/* PHY_ANE_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
/* PHY_ANE_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
/* PHY_ANE_RX_PG (see XMAC) Bit 1: Page Received */
#define PHY_ANE_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
/***** PHY_XMAC_NEPG 16 bit r/w Next Page Register *****/
/***** PHY_BCOM_NEPG 16 bit r/w Next Page Register *****/
......@@ -958,7 +968,7 @@ extern "C" {
#define PHY_X_RS_HD (1<<6) /* Bit 6: Half Duplex Mode selected */
#define PHY_X_RS_FD (1<<5) /* Bit 5: Full Duplex Mode selected */
#define PHY_X_RS_ABLMIS (1<<4) /* Bit 4: duplex or pause cap mismatch */
#define PHY_X_RS_PAUMIS (1<<3) /* Bit 3: pause capability missmatch */
#define PHY_X_RS_PAUMIS (1<<3) /* Bit 3: pause capability mismatch */
/* Bit 2..0: reserved */
/*
* Remote Fault Bits (PHY_X_AN_RFB) encoding
......@@ -990,6 +1000,7 @@ extern "C" {
/* Bit 7..0: reserved */
/***** PHY_BCOM_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
/***** PHY_MARV_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
#define PHY_B_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
#define PHY_B_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
#define PHY_B_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
......@@ -1309,7 +1320,6 @@ extern "C" {
/* Bit 7..0: reserved */
/***** PHY_MARV_PHY_CTRL 16 bit r/w PHY Specific Ctrl Reg *****/
#define PHY_M_PC_TX_FFD_MSK (3<<14) /* Bit 15..14: Tx FIFO Depth Mask */
#define PHY_M_PC_RX_FFD_MSK (3<<12) /* Bit 13..12: Rx FIFO Depth Mask */
#define PHY_M_PC_ASS_CRS_TX (1<<11) /* Bit 11: Assert CRS on Transmit */
......@@ -1323,6 +1333,9 @@ extern "C" {
#define PHY_M_PC_POL_R_DIS (1<<1) /* Bit 1: Polarity Reversal Disabled */
#define PHY_M_PC_DIS_JABBER (1<<0) /* Bit 0: Disable Jabber */
#define PHY_M_PC_EN_DET SHIFT8(2) /* Energy Detect (Mode 1) */
#define PHY_M_PC_EN_DET_PLUS SHIFT8(3) /* Energy Detect Plus (Mode 2) */
#define PHY_M_PC_MDI_XMODE(x) SHIFT5(x)
#define PHY_M_PC_MAN_MDI 0 /* 00 = Manual MDI configuration */
#define PHY_M_PC_MAN_MDIX 1 /* 01 = Manual MDIX configuration */
......@@ -1373,6 +1386,7 @@ extern "C" {
#define PHY_M_EC_M_DSC_MSK (3<<10) /* Bit 11..10: Master downshift counter */
#define PHY_M_EC_S_DSC_MSK (3<<8) /* Bit 9.. 8: Slave downshift counter */
#define PHY_M_EC_MAC_S_MSK (7<<4) /* Bit 6.. 4: Def. MAC interface speed */
#define PHY_M_EC_FIB_AN_ENA (1<<3) /* Bit 3: Fiber Auto-Neg. Enable */
#define PHY_M_EC_M_DSC(x) SHIFT10(x) /* 00=1x; 01=2x; 10=3x; 11=4x */
#define PHY_M_EC_S_DSC(x) SHIFT8(x) /* 00=dis; 01=1x; 10=2x; 11=3x */
......@@ -1434,6 +1448,18 @@ extern "C" {
#define PHY_M_EC2_FO_BOOST (1<<3) /* Bit 3: Fiber Output Boost */
#define PHY_M_EC2_FO_AM_MSK 7 /* Bit 2.. 0: Fiber Output Amplitude */
/***** PHY_MARV_EXT_P_STAT 16 bit r/w Ext. PHY Specific Status *****/
#define PHY_M_FC_AUTO_SEL (1<<15) /* Bit 15: Fiber/Copper Auto Sel. dis. */
#define PHY_M_FC_AN_REG_ACC (1<<14) /* Bit 14: Fiber/Copper Autoneg. reg acc */
#define PHY_M_FC_RESULUTION (1<<13) /* Bit 13: Fiber/Copper Resulution */
#define PHY_M_SER_IF_AN_BP (1<<12) /* Bit 12: Ser IF autoneg. bypass enable */
#define PHY_M_SER_IF_BP_ST (1<<11) /* Bit 11: Ser IF autoneg. bypass status */
#define PHY_M_IRQ_POLARITY (1<<10) /* Bit 10: IRQ polarity */
/* Bit 9..4: reserved */
#define PHY_M_UNDOC1 (1<< 7) /* undocumented bit !! */
#define PHY_M_MODE_MASK (0xf<<0)/* Bit 3..0: copy of HWCFG MODE[3:0] */
/***** PHY_MARV_CABLE_DIAG 16 bit r/o Cable Diagnostic Reg *****/
#define PHY_M_CABD_ENA_TEST (1<<15) /* Bit 15: Enable Test */
#define PHY_M_CABD_STAT_MSK (3<<13) /* Bit 14..13: Status */
......@@ -1531,7 +1557,7 @@ extern "C" {
#define GM_RXF_SHT \
(GM_MIB_CNT_BASE + 80) /* Frames <64 Byte Received OK */
#define GM_RXE_FRAG \
(GM_MIB_CNT_BASE + 88) /* Frames <64 Byte Receeived with FCS Err */
(GM_MIB_CNT_BASE + 88) /* Frames <64 Byte Received with FCS Err */
#define GM_RXF_64B \
(GM_MIB_CNT_BASE + 96) /* 64 Byte Rx Frame */
#define GM_RXF_127B \
......@@ -1606,7 +1632,6 @@ extern "C" {
*/
/* GM_GP_STAT 16 bit r/o General Purpose Status Register */
#define GM_GPSR_SPEED (1<<15) /* Bit 15: Port Speed (1 = 100 Mbps) */
#define GM_GPSR_DUPLEX (1<<14) /* Bit 14: Duplex Mode (1 = Full) */
#define GM_GPSR_FC_TX_DIS (1<<13) /* Bit 13: Tx Flow-Control Mode Disabled */
......@@ -1646,11 +1671,14 @@ extern "C" {
GM_GPCR_AU_SPD_DIS)
/* GM_TX_CTRL 16 bit r/w Transmit Control Register */
#define GM_TXCR_FORCE_JAM (1<<15) /* Bit 15: Force Jam / Flow-Control */
#define GM_TXCR_CRC_DIS (1<<14) /* Bit 14: Disable insertion of CRC */
#define GM_TXCR_PAD_DIS (1<<13) /* Bit 13: Disable padding of packets */
#define GM_TXCR_COL_THR (4<<10) /* Bit 12..10: Collision Threshold */
#define GM_TXCR_COL_THR_MSK (1<<10) /* Bit 12..10: Collision Threshold */
#define TX_COL_THR(x) (SHIFT10(x) & GM_TXCR_COL_THR_MSK)
#define TX_COL_DEF 0x04
/* GM_RX_CTRL 16 bit r/w Receive Control Register */
#define GM_RXCR_UCF_ENA (1<<15) /* Bit 15: Enable Unicast filtering */
......@@ -1663,35 +1691,41 @@ extern "C" {
#define GM_TXPA_JAMIPG_MSK (0x1f<<9) /* Bit 13..9: Jam IPG */
#define GM_TXPA_JAMDAT_MSK (0x1f<<4) /* Bit 8..4: IPG Jam to Data */
/* Bit 3..0: reserved */
#define JAM_LEN_VAL(x) SHIFT14(x)
#define JAM_IPG_VAL(x) SHIFT9(x)
#define IPG_JAM_DATA(x) SHIFT4(x)
#define TX_JAM_LEN_VAL(x) (SHIFT14(x) & GM_TXPA_JAMLEN_MSK)
#define TX_JAM_IPG_VAL(x) (SHIFT9(x) & GM_TXPA_JAMIPG_MSK)
#define TX_IPG_JAM_DATA(x) (SHIFT4(x) & GM_TXPA_JAMDAT_MSK)
#define TX_JAM_LEN_DEF 0x03
#define TX_JAM_IPG_DEF 0x0b
#define TX_IPG_JAM_DEF 0x1c
/* GM_SERIAL_MODE 16 bit r/w Serial Mode Register */
#define GM_SMOD_DATABL_MSK (0x1f<<11) /* Bit 15..11: Data Blinder */
#define GM_SMOD_DATABL_MSK (0x1f<<11) /* Bit 15..11: Data Blinder (r/o) */
#define GM_SMOD_LIMIT_4 (1<<10) /* Bit 10: 4 consecutive Tx trials */
#define GM_SMOD_VLAN_ENA (1<<9) /* Bit 9: Enable VLAN (Max. Frame Len) */
#define GM_SMOD_JUMBO_ENA (1<<8) /* Bit 8: Enable Jumbo (Max. Frame Len) */
/* Bit 7..5: reserved */
#define GM_SMOD_IPG_MSK 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */
#define DATA_BLIND_VAL(x) SHIFT11(x)
#define DATA_BLIND_FAST_ETH 0x1c
#define DATA_BLIND_GIGABIT 4
#define DATA_BLIND_VAL(x) (SHIFT11(x) & GM_SMOD_DATABL_MSK)
#define DATA_BLIND_DEF 0x04
#define IPG_VAL_FAST_ETH 0x1e
#define IPG_VAL_GIGABIT 6
#define IPG_DATA_VAL(x) (x & GM_SMOD_IPG_MSK)
#define IPG_DATA_DEF 0x1e
/* GM_SMI_CTRL 16 bit r/w SMI Control Register */
#define GM_SMI_CT_PHY_AD(x) SHIFT11(x)
#define GM_SMI_CT_REG_AD(x) SHIFT6(x)
#define GM_SMI_CT_PHY_A_MSK (0x1f<<11) /* Bit 15..11: PHY Device Address */
#define GM_SMI_CT_REG_A_MSK (0x1f<<6) /* Bit 10.. 6: PHY Register Address */
#define GM_SMI_CT_OP_RD (1<<5) /* Bit 5: OpCode Read (0=Write)*/
#define GM_SMI_CT_RD_VAL (1<<4) /* Bit 4: Read Valid (Read completed) */
#define GM_SMI_CT_BUSY (1<<3) /* Bit 3: Busy (Operation in progress) */
/* Bit 2..0: reserved */
/* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
#define GM_SMI_CT_PHY_AD(x) (SHIFT11(x) & GM_SMI_CT_PHY_A_MSK)
#define GM_SMI_CT_REG_AD(x) (SHIFT6(x) & GM_SMI_CT_REG_A_MSK)
/* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
/* Bit 15..6: reserved */
#define GM_PAR_MIB_CLR (1<<5) /* Bit 5: Set MIB Clear Counter Mode */
#define GM_PAR_MIB_TST (1<<4) /* Bit 4: MIB Load Counter (Test Mode) */
......
drivers/net/sk98lin/skcsum.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skcsum.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.11 $
* Date: $Date: 2003/03/11 14:05:55 $
* Version: $Revision: 1.12 $
* Date: $Date: 2003/08/20 13:55:53 $
* Purpose: Store/verify Internet checksum in send/receive packets.
*
******************************************************************************/
......@@ -26,6 +26,10 @@
* History:
*
* $Log: skcsum.c,v $
* Revision 1.12 2003/08/20 13:55:53 mschmid
* Changed notation of #ifndef SkCsCalculateChecksum to
* #ifndef SK_CS_CALCULATE_CHECKSUM
*
* Revision 1.11 2003/03/11 14:05:55 rschmidt
* Replaced memset() by macro SK_MEMSET()
* Editorial changes
......@@ -78,7 +82,7 @@
#ifndef lint
static const char SysKonnectFileId[] =
"@(#) $Id: skcsum.c,v 1.11 2003/03/11 14:05:55 rschmidt Exp $ (C) SysKonnect.";
"@(#) $Id: skcsum.c,v 1.12 2003/08/20 13:55:53 mschmid Exp $ (C) SysKonnect.";
#endif /* !lint */
/******************************************************************************
......@@ -791,7 +795,7 @@ int NetNumber)
*pChecksum2Offset = SKCS_MAC_HEADER_SIZE + SKCS_IP_HEADER_SIZE;
} /* SkCsSetReceiveFlags */
#ifndef SkCsCalculateChecksum
#ifndef SK_CS_CALCULATE_CHECKSUM
/******************************************************************************
*
......@@ -856,7 +860,7 @@ unsigned Length) /* Length of data. */
return ((unsigned) Checksum);
} /* SkCsCalculateChecksum */
#endif /* SkCsCalculateChecksum */
#endif /* SK_CS_CALCULATE_CHECKSUM */
/******************************************************************************
*
......
drivers/net/sk98lin/skdim.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skdim.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.2 $
* Date: $Date: 2003/08/21 12:35:05 $
* Version: $Revision: 1.5 $
* Date: $Date: 2003/11/28 12:55:40 $
* Purpose: All functions to maintain interrupt moderation
*
******************************************************************************/
......@@ -11,6 +11,7 @@
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,15 @@
* History:
*
* $Log: skdim.c,v $
* Revision 1.5 2003/11/28 12:55:40 rroesler
* Fix: support for new process timing interface added
*
* Revision 1.4 2003/10/10 10:58:56 mlindner
* Fix: CPU detection under the kernel 2.6
*
* Revision 1.3 2003/10/07 08:17:08 mlindner
* Fix: Copyright changes
*
* Revision 1.2 2003/08/21 12:35:05 mlindner
* Fix: Corrected CPU detection and compile errors on single CPU machines
*
......@@ -62,7 +72,7 @@
#ifndef lint
static const char SysKonnectFileId[] =
"@(#) $Id: skdim.c,v 1.2 2003/08/21 12:35:05 mlindner Exp $ (C) SysKonnect.";
"@(#) $Id: skdim.c,v 1.5 2003/11/28 12:55:40 rroesler Exp $ (C) SysKonnect.";
#endif
#define __SKADDR_C
......@@ -327,7 +337,9 @@ GetCurrentSystemLoad(SK_AC *pAC) {
**
** struct kernel_stat kstat
**
** is not marked as an exported symbol
** is not marked as an exported symbol in the file
**
** kernel/ksyms.c
**
** As a consequence, using this driver as KLM is not possible
** and any access of the structure kernel_stat via the
......
drivers/net/sk98lin/skge.c
View file @ e06cf18f
/******************************************************************************
*
* Name: skge.c
* Name: skge.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.11 $
* Date: $Date: 2003/08/26 16:05:19 $
* Version: $Revision: 1.42 $
* Date: $Date: 2003/12/12 10:05:43 $
* Purpose: The main driver source module
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
*
* Driver for SysKonnect Gigabit Ethernet Server Adapters:
*
* SK-9871 (single link 1000Base-ZX)
* SK-9872 (dual link 1000Base-ZX)
* SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
* SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
* SK-9841 (single link 1000Base-LX)
* SK-9842 (dual link 1000Base-LX)
* SK-9843 (single link 1000Base-SX)
* SK-9844 (dual link 1000Base-SX)
* SK-9821 (single link 1000Base-T)
* SK-9822 (dual link 1000Base-T)
* SK-9881 (single link 1000Base-SX V2 LC)
* SK-9871 (single link 1000Base-ZX V2)
* SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
* SK-9841 (single link 1000Base-LX V2)
* SK-9843 (single link 1000Base-SX V2)
* SK-9821 (single link 1000Base-T V2)
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* Driver for Marvell Yukon chipset and SysKonnect Gigabit Ethernet
* Server Adapters.
*
* Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
* SysKonnects GEnesis Solaris driver
......@@ -56,6 +41,87 @@
* History:
*
* $Log: skge.c,v $
* Revision 1.42 2003/12/12 10:05:43 mlindner
* Fix: Format of error message corrected
*
* Revision 1.41 2003/12/11 16:03:57 mlindner
* Fix: Create backup from pnmi data structure
*
* Revision 1.40 2003/12/11 12:14:48 mlindner
* Fix: Initalize Board before network configuration
* Fix: Change device names to driver name
*
* Revision 1.39 2003/12/10 08:57:38 rroesler
* Fix: Modifications regarding try_module_get() and capable()
*
* Revision 1.38 2003/12/01 17:16:50 mlindner
* Fix: Remove useless register_netdev
*
* Revision 1.37 2003/12/01 17:11:30 mlindner
* Fix: Register net device before SkGeBoardInit
*
* Revision 1.36 2003/11/28 13:04:27 rroesler
* Fix: do not print interface status in case DIAG is used
*
* Revision 1.35 2003/11/17 14:41:06 mlindner
* Fix: Endif command
*
* Revision 1.34 2003/11/17 13:29:05 mlindner
* Fix: Editorial changes
*
* Revision 1.33 2003/11/14 14:56:54 rroesler
* Fix: corrected compilation warnings kernel 2.2
*
* Revision 1.32 2003/11/13 14:18:47 rroesler
* Fix: added latest changes regarding the use of the proc system
*
* Revision 1.31 2003/11/13 09:28:35 rroesler
* Fix: removed kernel warning 'driver changed get_stats after register'
*
* Revision 1.30 2003/11/11 13:15:27 rroesler
* Fix: use suitables kernel usage count macros when using the diag
*
* Revision 1.29 2003/11/10 09:38:26 rroesler
* Fix: restore PNMI structure backup for DIAG actions
*
* Revision 1.28 2003/11/07 17:28:45 rroesler
* Fix: Additions for the LeaveDiagMode
*
* Revision 1.27 2003/11/03 13:21:14 mlindner
* Add: SkGeBuffPad function for padding to ensure the trailing bytes exist
*
* Revision 1.26 2003/10/30 09:20:40 mlindner
* Fix: Control bit check
*
* Revision 1.25 2003/10/29 07:43:37 rroesler
* Fix: Implemented full None values handling for parameter Moderation
*
* Revision 1.24 2003/10/22 14:18:12 rroesler
* Fix: DIAG handling for DualNet cards
*
* Revision 1.23 2003/10/17 10:05:13 mlindner
* Add: New blinkmode for Morvell cards
*
* Revision 1.22 2003/10/15 12:31:25 rroesler
* Fix: Corrected bugreport #10954 (Linux System crash when using vlans)
*
* Revision 1.21 2003/10/07 12:32:28 mlindner
* Fix: Editorial changes
*
* Revision 1.20 2003/10/07 12:22:40 mlindner
* Fix: Compiler warnings
*
* Revision 1.19 2003/10/07 09:33:40 mlindner
* Fix: No warnings for illegal values of Mod and IntsPerSec
* Fix: Speed 100 in Half Duplex not allowed for Yukon
* Fix: PrefPort=B not allowed on single NICs
*
* Revision 1.18 2003/10/07 08:17:08 mlindner
* Fix: Copyright changes
*
* Revision 1.17 2003/09/29 12:06:59 mlindner
* *** empty log message ***
*
* Revision 1.16 2003/09/23 11:07:35 mlindner
* Fix: IO-control return race condition
* Fix: Interrupt moderation value check
......@@ -68,6 +134,12 @@
* Add: Yukon Plus changes (ChipID, PCI...)
* Fix: TCP and UDP Checksum calculation
*
* Revision 1.13 2003/09/01 13:30:08 rroesler
* Fix: Corrected missing defines
*
* Revision 1.12 2003/09/01 13:12:02 rroesler
* Add: Code for improved DIAG Attach/Detach interface
*
* Revision 1.11 2003/08/26 16:05:19 mlindner
* Fix: Compiler warnings (void *)
*
......@@ -406,7 +478,6 @@
* <linux/module.h>
*
* "h/skdrv1st.h"
* <linux/version.h>
* <linux/types.h>
* <linux/kernel.h>
* <linux/string.h>
......@@ -568,6 +639,12 @@ static void StartDrvCleanupTimer(SK_AC *pAC);
static void StopDrvCleanupTimer(SK_AC *pAC);
static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
#ifdef SK_DIAG_SUPPORT
static SK_U32 ParseDeviceNbrFromSlotName(const char *SlotName);
static int SkDrvInitAdapter(SK_AC *pAC, int devNbr);
static int SkDrvDeInitAdapter(SK_AC *pAC, int devNbr);
#endif
/*******************************************************************************
*
* Extern Function Prototypes
......@@ -576,8 +653,8 @@ static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
#ifdef CONFIG_PROC_FS
static const char SK_Root_Dir_entry[] = "sk98lin";
static struct proc_dir_entry *pSkRootDir;
extern struct file_operations sk_proc_fops;
static struct proc_dir_entry *pSkRootDir = NULL;
extern struct file_operations sk_proc_fops;
#endif
extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);
......@@ -595,12 +672,19 @@ static void DumpLong(char*, int);
static const char *BootString = BOOT_STRING;
struct SK_NET_DEVICE *SkGeRootDev = NULL;
static int probed __initdata = 0;
static SK_BOOL DoPrintInterfaceChange = SK_TRUE;
/* local variables **********************************************************/
static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
#ifdef CONFIG_PROC_FS
static struct proc_dir_entry *pSkRootDir;
#endif
/*****************************************************************************
*
* skge_probe - find all SK-98xx adapters
......@@ -626,6 +710,7 @@ static int __init skge_probe (void)
SK_BOOL BootStringCount = SK_FALSE;
int retval;
#ifdef CONFIG_PROC_FS
int proc_root_initialized = 0;
struct proc_dir_entry *pProcFile;
#endif
......@@ -700,6 +785,7 @@ static int __init skge_probe (void)
dev->stop = &SkGeClose;
dev->hard_start_xmit = &SkGeXmit;
dev->get_stats = &SkGeStats;
dev->last_stats = &SkGeStats;
dev->set_multicast_list = &SkGeSetRxMode;
dev->set_mac_address = &SkGeSetMacAddr;
dev->do_ioctl = &SkGeIoctl;
......@@ -718,15 +804,13 @@ static int __init skge_probe (void)
#endif
pAC->Index = boards_found;
if (SkGeBoardInit(dev, pAC)) {
FreeResources(dev);
free_netdev(dev);
continue;
}
memcpy((caddr_t) &dev->dev_addr,
(caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
/* Register net device */
if (register_netdev(dev)) {
printk(KERN_ERR "SKGE: Could not register device.\n");
FreeResources(dev);
......@@ -734,6 +818,25 @@ static int __init skge_probe (void)
continue;
}
/* Print adapter specific string from vpd */
ProductStr(pAC);
printk("%s: %s\n", dev->name, pAC->DeviceStr);
/* Print configuration settings */
printk(" PrefPort:%c RlmtMode:%s\n",
'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
(pAC->RlmtMode==0) ? "Check Link State" :
((pAC->RlmtMode==1) ? "Check Link State" :
((pAC->RlmtMode==3) ? "Check Local Port" :
((pAC->RlmtMode==7) ? "Check Segmentation" :
((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
SkGeYellowLED(pAC, pAC->IoBase, 1);
memcpy((caddr_t) &dev->dev_addr,
(caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
/* First adapter... Create proc and print message */
#ifdef CONFIG_PROC_FS
if (!DeviceFound) {
......@@ -744,25 +847,27 @@ static int __init skge_probe (void)
/*Create proc (directory)*/
if(!pSkRootDir) {
pSkRootDir = proc_mkdir(SK_Root_Dir_entry, proc_net);
if (!pSkRootDir)
if (!pSkRootDir) {
printk(KERN_WARNING "%s: Unable to create /proc/net/%s",
dev->name, SK_Root_Dir_entry);
else
dev->name, SK_Root_Dir_entry);
} else {
pSkRootDir->owner = THIS_MODULE;
}
}
}
/* Create proc file */
if (pSkRootDir
&& (pProcFile = create_proc_entry(dev->name, S_IRUGO,
pSkRootDir))) {
if (pSkRootDir &&
(pProcFile = create_proc_entry(dev->name, S_IRUGO,
pSkRootDir))) {
pProcFile->proc_fops = &sk_proc_fops;
pProcFile->data = dev;
pProcFile->data = dev;
}
#endif
pNet->PortNr = 0;
pNet->NetNr = 0;
pNet->NetNr = 0;
boards_found++;
......@@ -774,23 +879,24 @@ static int __init skge_probe (void)
break;
}
pAC->dev[1] = dev;
pNet = dev->priv;
pNet->PortNr = 1;
pNet->NetNr = 1;
pNet->pAC = pAC;
pNet->Mtu = 1500;
pNet->Up = 0;
dev->open = &SkGeOpen;
dev->stop = &SkGeClose;
dev->hard_start_xmit = &SkGeXmit;
dev->get_stats = &SkGeStats;
pAC->dev[1] = dev;
pNet = dev->priv;
pNet->PortNr = 1;
pNet->NetNr = 1;
pNet->pAC = pAC;
pNet->Mtu = 1500;
pNet->Up = 0;
dev->open = &SkGeOpen;
dev->stop = &SkGeClose;
dev->hard_start_xmit = &SkGeXmit;
dev->get_stats = &SkGeStats;
dev->last_stats = &SkGeStats;
dev->set_multicast_list = &SkGeSetRxMode;
dev->set_mac_address = &SkGeSetMacAddr;
dev->do_ioctl = &SkGeIoctl;
dev->change_mtu = &SkGeChangeMtu;
dev->flags &= ~IFF_RUNNING;
dev->set_mac_address = &SkGeSetMacAddr;
dev->do_ioctl = &SkGeIoctl;
dev->change_mtu = &SkGeChangeMtu;
dev->flags &= ~IFF_RUNNING;
#ifdef SK_ZEROCOPY
#ifdef USE_SK_TX_CHECKSUM
......@@ -802,34 +908,39 @@ static int __init skge_probe (void)
#endif
if (register_netdev(dev)) {
printk(KERN_ERR "SKGE: Could not register "
"second port.\n");
printk(KERN_ERR "SKGE: Could not register device.\n");
free_netdev(dev);
pAC->dev[1] = pAC->dev[0];
} else {
#ifdef CONFIG_PROC_FS
if (pSkRootDir
&& (pProcFile = create_proc_entry(dev->name,
S_IRUGO,
pSkRootDir))) {
S_IRUGO, pSkRootDir))) {
pProcFile->proc_fops = &sk_proc_fops;
pProcFile->data = dev;
pProcFile->data = dev;
}
#endif
memcpy((caddr_t) &dev->dev_addr,
(caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
memcpy((caddr_t) &dev->dev_addr,
(caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
printk("%s: %s\n", dev->name, pAC->DeviceStr);
printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
printk("%s: %s\n", dev->name, pAC->DeviceStr);
printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
}
}
/* Save the hardware revision */
pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
(pAC->GIni.GIPciHwRev & 0x0F);
/* Set driver globals */
pAC->Pnmi.pDriverFileName = DRIVER_FILE_NAME;
pAC->Pnmi.pDriverReleaseDate = DRIVER_REL_DATE;
SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct),
sizeof(SK_PNMI_STRUCT_DATA));
/*
* This is bollocks, but we need to tell the net-init
* code that it shall go for the next device.
......@@ -849,7 +960,6 @@ static int __init skge_probe (void)
} /* skge_probe */
/*****************************************************************************
*
* SkGeInitPCI - Init the PCI resources
......@@ -1161,8 +1271,7 @@ SK_EVPARA EvPara;
#ifdef CONFIG_PROC_FS
/* clear proc-dir */
if (pSkRootDir)
remove_proc_entry(pSkRootDir->name, proc_net);
remove_proc_entry(pSkRootDir->name, proc_net);
#endif
} /* skge_cleanup_module */
......@@ -1224,7 +1333,7 @@ SK_BOOL DualNet;
SkAddrInit( pAC, pAC->IoBase, SK_INIT_DATA);
SkRlmtInit( pAC, pAC->IoBase, SK_INIT_DATA);
SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
pAC->BoardLevel = SK_INIT_DATA;
pAC->RxBufSize = ETH_BUF_SIZE;
......@@ -1236,7 +1345,7 @@ SK_BOOL DualNet;
/* level 1 init common modules here (HW init) */
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
printk("HWInit (1) failed.\n");
printk("sk98lin: HWInit (1) failed.\n");
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
return(-EAGAIN);
}
......@@ -1268,14 +1377,14 @@ SK_BOOL DualNet;
Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
pAC->Name, dev);
} else {
printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
dev->name, pAC->GIni.GIMacsFound);
printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
pAC->GIni.GIMacsFound);
return -EAGAIN;
}
if (Ret) {
printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
dev->name, dev->irq);
printk(KERN_WARNING "sk98lin: Requested IRQ %d is busy.\n",
dev->irq);
return -EAGAIN;
}
pAC->AllocFlag |= SK_ALLOC_IRQ;
......@@ -1303,25 +1412,10 @@ SK_BOOL DualNet;
pAC->ActivePort,
DualNet)) {
BoardFreeMem(pAC);
printk("SkGeInitAssignRamToQueues failed.\n");
printk("sk98lin: SkGeInitAssignRamToQueues failed.\n");
return(-EAGAIN);
}
/* Print adapter specific string from vpd */
ProductStr(pAC);
printk("%s: %s\n", dev->name, pAC->DeviceStr);
/* Print configuration settings */
printk(" PrefPort:%c RlmtMode:%s\n",
'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
(pAC->RlmtMode==0) ? "Check Link State" :
((pAC->RlmtMode==1) ? "Check Link State" :
((pAC->RlmtMode==3) ? "Check Local Port" :
((pAC->RlmtMode==7) ? "Check Segmentation" :
((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
SkGeYellowLED(pAC, pAC->IoBase, 1);
/*
* Register the device here
*/
......@@ -1879,14 +1973,26 @@ struct SK_NET_DEVICE *dev)
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
#ifdef SK_DIAG_SUPPORT
if (pAC->DiagModeActive == DIAG_ACTIVE) {
if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
return (-1); /* still in use by diag; deny actions */
}
}
#endif
if (!try_module_get(THIS_MODULE)) {
return (-1); /* increase of usage count not possible */
}
/* Set blink mode */
if (pAC->PciDev->vendor == 0x1186)
if ((pAC->PciDev->vendor == 0x1186) || (pAC->PciDev->vendor == 0x11ab ))
pAC->GIni.GILedBlinkCtrl = OEM_CONFIG_VALUE;
if (pAC->BoardLevel == SK_INIT_DATA) {
/* level 1 init common modules here */
if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
module_put(THIS_MODULE); /* decrease usage count */
printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
return (-1);
}
......@@ -1902,6 +2008,7 @@ struct SK_NET_DEVICE *dev)
if (pAC->BoardLevel != SK_INIT_RUN) {
/* tschilling: Level 2 init modules here, check return value. */
if (SkGeInit(pAC, pAC->IoBase, SK_INIT_RUN) != 0) {
module_put(THIS_MODULE); /* decrease usage count */
printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
return (-1);
}
......@@ -1953,7 +2060,6 @@ struct SK_NET_DEVICE *dev)
pAC->MaxPorts++;
pNet->Up = 1;
try_module_get(THIS_MODULE);
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeOpen suceeded\n"));
......@@ -1976,26 +2082,50 @@ struct SK_NET_DEVICE *dev)
static int SkGeClose(
struct SK_NET_DEVICE *dev)
{
DEV_NET *pNet;
SK_AC *pAC;
DEV_NET *pNet;
DEV_NET *newPtrNet;
SK_AC *pAC;
unsigned long Flags; /* for spin lock */
int i;
int PortIdx;
SK_EVPARA EvPara;
int i;
int PortIdx;
SK_EVPARA EvPara;
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
netif_stop_queue(dev);
pNet = (DEV_NET*) dev->priv;
pAC = pNet->pAC;
#ifdef SK_DIAG_SUPPORT
if (pAC->DiagModeActive == DIAG_ACTIVE) {
if (pAC->DiagFlowCtrl == SK_FALSE) {
module_put(THIS_MODULE);
/*
** notify that the interface which has been closed
** by operator interaction must not be started up
** again when the DIAG has finished.
*/
newPtrNet = (DEV_NET *) pAC->dev[0]->priv;
if (newPtrNet == pNet) {
pAC->WasIfUp[0] = SK_FALSE;
} else {
pAC->WasIfUp[1] = SK_FALSE;
}
return 0; /* return to system everything is fine... */
} else {
pAC->DiagFlowCtrl = SK_FALSE;
}
}
#endif
netif_stop_queue(dev);
if (pAC->RlmtNets == 1)
PortIdx = pAC->ActivePort;
else
PortIdx = pNet->NetNr;
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
StopDrvCleanupTimer(pAC);
/*
......@@ -2053,6 +2183,10 @@ struct SK_NET_DEVICE *dev)
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeClose: done "));
SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct),
sizeof(SK_PNMI_STRUCT_DATA));
pAC->MaxPorts--;
pNet->Up = 0;
......@@ -2199,9 +2333,10 @@ struct sk_buff *pMessage) /* pointer to send-message */
** This is to resolve faulty padding by the HW with 0xaa bytes.
*/
if (BytesSend < C_LEN_ETHERNET_MINSIZE) {
skb_put(pMessage, (C_LEN_ETHERNET_MINSIZE-BytesSend));
SK_MEMSET( ((char *)(pMessage->data))+BytesSend,
0, C_LEN_ETHERNET_MINSIZE-BytesSend);
if ((pMessage = skb_padto(pMessage, C_LEN_ETHERNET_MINSIZE)) == NULL) {
return 0;
}
pMessage->len = C_LEN_ETHERNET_MINSIZE;
}
/*
......@@ -3318,6 +3453,16 @@ SK_EVPARA EvPara;
return -EINVAL;
}
#ifdef SK_DIAG_SUPPORT
if (pAC->DiagModeActive == DIAG_ACTIVE) {
if (pAC->DiagFlowCtrl == SK_FALSE) {
return -1; /* still in use, deny any actions of MTU */
} else {
pAC->DiagFlowCtrl = SK_FALSE;
}
}
#endif
pNet->Mtu = NewMtu;
pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
if ((pOtherNet->Mtu>1500) && (NewMtu<=1500) && (pOtherNet->Up==1)) {
......@@ -3537,11 +3682,20 @@ unsigned long Flags; /* for spin lock */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
("SkGeStats starts now...\n"));
pPnmiStruct = &pAC->PnmiStruct;
memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
#ifdef SK_DIAG_SUPPORT
if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
(pAC->BoardLevel == SK_INIT_RUN)) {
#endif
SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
Size = SK_PNMI_STRUCT_SIZE;
SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
#ifdef SK_DIAG_SUPPORT
}
#endif
pPnmiStat = &pPnmiStruct->Stat[0];
pPnmiConf = &pPnmiStruct->Conf[0];
......@@ -3604,7 +3758,7 @@ static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
DEV_NET *pNet;
SK_AC *pAC;
void *pMemBuf;
struct pci_dev *pdev = NULL;
SK_GE_IOCTL Ioctl;
unsigned int Err = 0;
int Size = 0;
......@@ -3671,6 +3825,45 @@ int HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
fault_gen:
kfree(pMemBuf); /* cleanup everything */
break;
#ifdef SK_DIAG_SUPPORT
case SK_IOCTL_DIAG:
if (!capable(CAP_NET_ADMIN)) return -EPERM;
if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
Length = Ioctl.Len;
} else {
Length = sizeof(pAC->PnmiStruct) + HeaderLength;
}
if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
return -ENOMEM;
}
if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
Err = -EFAULT;
goto fault_diag;
}
pdev = pAC->PciDev;
Length = 3 * sizeof(SK_U32); /* Error, Bus and Device */
/*
** While coding this new IOCTL interface, only a few lines of code
** are to to be added. Therefore no dedicated function has been
** added. If more functionality is added, a separate function
** should be used...
*/
* ((SK_U32 *)pMemBuf) = 0;
* ((SK_U32 *)pMemBuf + 1) = pdev->bus->number;
* ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pdev->slot_name);
if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
Err = -EFAULT;
goto fault_diag;
}
Ioctl.Len = Length;
if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
Err = -EFAULT;
goto fault_diag;
}
fault_diag:
kfree(pMemBuf); /* cleanup everything */
break;
#endif
default:
Err = -EOPNOTSUPP;
}
......@@ -3826,10 +4019,9 @@ int Capabilities[3][3] =
(strcmp(ConType[pAC->Index],"Auto")!=0) &&
(strcmp(ConType[pAC->Index],"")!=0)) {
/* Set the speed parameter back */
printk("%s: Illegal value \"%s\" "
printk("sk98lin: Illegal value \"%s\" "
"for ConType."
" Using Auto.\n",
pAC->dev[0]->name,
ConType[pAC->Index]);
sprintf(ConType[pAC->Index], "Auto");
......@@ -3873,8 +4065,8 @@ int Capabilities[3][3] =
M_CurrPort.PLinkSpeed = SK_LSPEED_10MBPS;
}
} else {
printk("%s: Illegal value \"%s\" for ConType\n",
pAC->dev[0]->name, ConType[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for ConType\n",
ConType[pAC->Index]);
IsConTypeDefined = SK_FALSE; /* Wrong ConType defined */
}
} else {
......@@ -3898,8 +4090,8 @@ int Capabilities[3][3] =
} else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
LinkSpeed = SK_LSPEED_1000MBPS;
} else {
printk("%s: Illegal value \"%s\" for Speed_A\n",
pAC->dev[0]->name, Speed_A[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for Speed_A\n",
Speed_A[pAC->Index]);
IsLinkSpeedDefined = SK_FALSE;
}
} else {
......@@ -3913,9 +4105,9 @@ int Capabilities[3][3] =
if (((!pAC->ChipsetType) || (pAC->GIni.GICopperType != SK_TRUE)) &&
((LinkSpeed != SK_LSPEED_AUTO) &&
(LinkSpeed != SK_LSPEED_1000MBPS))) {
printk("%s: Illegal value for Speed_A. "
printk("sk98lin: Illegal value for Speed_A. "
"Not a copper card or GE V2 card\n Using "
"speed 1000\n", pAC->dev[0]->name);
"speed 1000\n");
LinkSpeed = SK_LSPEED_1000MBPS;
}
......@@ -3945,8 +4137,8 @@ int Capabilities[3][3] =
} else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
AutoNeg = AN_SENS;
} else {
printk("%s: Illegal value \"%s\" for AutoNeg_A\n",
pAC->dev[0]->name, AutoNeg_A[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for AutoNeg_A\n",
AutoNeg_A[pAC->Index]);
}
}
......@@ -3964,33 +4156,32 @@ int Capabilities[3][3] =
} else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
DuplexCap = DC_HALF;
} else {
printk("%s: Illegal value \"%s\" for DupCap_A\n",
pAC->dev[0]->name, DupCap_A[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for DupCap_A\n",
DupCap_A[pAC->Index]);
}
}
/*
** Check for illegal combinations
*/
if ((LinkSpeed = SK_LSPEED_1000MBPS) &&
if ((LinkSpeed == SK_LSPEED_1000MBPS) &&
((DuplexCap == SK_LMODE_STAT_AUTOHALF) ||
(DuplexCap == SK_LMODE_STAT_HALF)) &&
(pAC->ChipsetType)) {
printk("%s: Half Duplex not possible with Gigabit speed!\n"
" Using Full Duplex.\n",
pAC->dev[0]->name);
printk("sk98lin: Half Duplex not possible with Gigabit speed!\n"
" Using Full Duplex.\n");
DuplexCap = DC_FULL;
}
if ( AutoSet && AutoNeg==AN_SENS && DupSet) {
printk("%s, Port A: DuplexCapabilities"
" ignored using Sense mode\n", pAC->dev[0]->name);
printk("sk98lin, Port A: DuplexCapabilities"
" ignored using Sense mode\n");
}
if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
printk("%s, Port A: Illegal combination"
printk("sk98lin: Port A: Illegal combination"
" of values AutoNeg. and DuplexCap.\n Using "
"Full Duplex\n", pAC->dev[0]->name);
"Full Duplex\n");
DuplexCap = DC_FULL;
}
......@@ -3999,10 +4190,9 @@ int Capabilities[3][3] =
}
if (!AutoSet && DupSet) {
printk("%s, Port A: Duplex setting not"
printk("sk98lin: Port A: Duplex setting not"
" possible in\n default AutoNegotiation mode"
" (Sense).\n Using AutoNegotiation On\n",
pAC->dev[0]->name);
" (Sense).\n Using AutoNegotiation On\n");
AutoNeg = AN_ON;
}
......@@ -4029,8 +4219,8 @@ int Capabilities[3][3] =
} else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
FlowCtrl = SK_FLOW_MODE_NONE;
} else {
printk("%s: Illegal value \"%s\" for FlowCtrl_A\n",
pAC->dev[0]->name, FlowCtrl_A[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for FlowCtrl_A\n",
FlowCtrl_A[pAC->Index]);
IsFlowCtrlDefined = SK_FALSE;
}
} else {
......@@ -4039,9 +4229,9 @@ int Capabilities[3][3] =
if (IsFlowCtrlDefined) {
if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
printk("%s, Port A: FlowControl"
printk("sk98lin: Port A: FlowControl"
" impossible without AutoNegotiation,"
" disabled\n", pAC->dev[0]->name);
" disabled\n");
FlowCtrl = SK_FLOW_MODE_NONE;
}
pAC->GIni.GP[0].PFlowCtrlMode = FlowCtrl;
......@@ -4061,8 +4251,8 @@ int Capabilities[3][3] =
} else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
MSMode = SK_MS_MODE_SLAVE;
} else {
printk("%s: Illegal value \"%s\" for Role_A\n",
pAC->dev[0]->name, Role_A[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for Role_A\n",
Role_A[pAC->Index]);
IsRoleDefined = SK_FALSE;
}
} else {
......@@ -4097,8 +4287,8 @@ int Capabilities[3][3] =
} else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
LinkSpeed = SK_LSPEED_1000MBPS;
} else {
printk("%s: Illegal value \"%s\" for Speed_B\n",
pAC->dev[1]->name, Speed_B[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for Speed_B\n",
Speed_B[pAC->Index]);
IsLinkSpeedDefined = SK_FALSE;
}
} else {
......@@ -4112,9 +4302,9 @@ int Capabilities[3][3] =
if (((!pAC->ChipsetType) || (pAC->GIni.GICopperType != SK_TRUE)) &&
((LinkSpeed != SK_LSPEED_AUTO) &&
(LinkSpeed != SK_LSPEED_1000MBPS))) {
printk("%s: Illegal value for Speed_B. "
printk("sk98lin: Illegal value for Speed_B. "
"Not a copper card or GE V2 card\n Using "
"speed 1000\n", pAC->dev[1]->name);
"speed 1000\n");
LinkSpeed = SK_LSPEED_1000MBPS;
}
......@@ -4144,8 +4334,8 @@ int Capabilities[3][3] =
} else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
AutoNeg = AN_SENS;
} else {
printk("%s: Illegal value \"%s\" for AutoNeg_B\n",
pAC->dev[0]->name, AutoNeg_B[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for AutoNeg_B\n",
AutoNeg_B[pAC->Index]);
}
}
......@@ -4163,8 +4353,8 @@ int Capabilities[3][3] =
} else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
DuplexCap = DC_HALF;
} else {
printk("%s: Illegal value \"%s\" for DupCap_B\n",
pAC->dev[0]->name, DupCap_B[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for DupCap_B\n",
DupCap_B[pAC->Index]);
}
}
......@@ -4172,25 +4362,24 @@ int Capabilities[3][3] =
/*
** Check for illegal combinations
*/
if ((LinkSpeed = SK_LSPEED_1000MBPS) &&
if ((LinkSpeed == SK_LSPEED_1000MBPS) &&
((DuplexCap == SK_LMODE_STAT_AUTOHALF) ||
(DuplexCap == SK_LMODE_STAT_HALF)) &&
(pAC->ChipsetType)) {
printk("%s: Half Duplex not possible with Gigabit speed!\n"
" Using Full Duplex.\n",
pAC->dev[1]->name);
printk("sk98lin: Half Duplex not possible with Gigabit speed!\n"
" Using Full Duplex.\n");
DuplexCap = DC_FULL;
}
if (AutoSet && AutoNeg==AN_SENS && DupSet) {
printk("%s, Port B: DuplexCapabilities"
" ignored using Sense mode\n", pAC->dev[1]->name);
printk("sk98lin, Port B: DuplexCapabilities"
" ignored using Sense mode\n");
}
if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
printk("%s, Port B: Illegal combination"
printk("sk98lin: Port B: Illegal combination"
" of values AutoNeg. and DuplexCap.\n Using "
"Full Duplex\n", pAC->dev[1]->name);
"Full Duplex\n");
DuplexCap = DC_FULL;
}
......@@ -4199,10 +4388,9 @@ int Capabilities[3][3] =
}
if (!AutoSet && DupSet) {
printk("%s, Port B: Duplex setting not"
printk("sk98lin: Port B: Duplex setting not"
" possible in\n default AutoNegotiation mode"
" (Sense).\n Using AutoNegotiation On\n",
pAC->dev[1]->name);
" (Sense).\n Using AutoNegotiation On\n");
AutoNeg = AN_ON;
}
......@@ -4229,8 +4417,8 @@ int Capabilities[3][3] =
} else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
FlowCtrl = SK_FLOW_MODE_NONE;
} else {
printk("%s: Illegal value \"%s\" for FlowCtrl_B\n",
pAC->dev[0]->name, FlowCtrl_B[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for FlowCtrl_B\n",
FlowCtrl_B[pAC->Index]);
IsFlowCtrlDefined = SK_FALSE;
}
} else {
......@@ -4239,9 +4427,9 @@ int Capabilities[3][3] =
if (IsFlowCtrlDefined) {
if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
printk("%s, Port B: FlowControl"
printk("sk98lin: Port B: FlowControl"
" impossible without AutoNegotiation,"
" disabled\n", pAC->dev[1]->name);
" disabled\n");
FlowCtrl = SK_FLOW_MODE_NONE;
}
pAC->GIni.GP[1].PFlowCtrlMode = FlowCtrl;
......@@ -4261,8 +4449,8 @@ int Capabilities[3][3] =
} else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
MSMode = SK_MS_MODE_SLAVE;
} else {
printk("%s: Illegal value \"%s\" for Role_B\n",
pAC->dev[1]->name, Role_B[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for Role_B\n",
Role_B[pAC->Index]);
IsRoleDefined = SK_FALSE;
}
} else {
......@@ -4280,28 +4468,37 @@ int Capabilities[3][3] =
if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
PrefPort[pAC->Index] != NULL) {
if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
pAC->ActivePort = 0;
pAC->Rlmt.Net[0].Preference = -1; /* auto */
pAC->Rlmt.Net[0].PrefPort = 0;
pAC->ActivePort = 0;
pAC->Rlmt.Net[0].Preference = -1; /* auto */
pAC->Rlmt.Net[0].PrefPort = 0;
} else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
/*
** do not set ActivePort here, thus a port
** switch is issued after net up.
*/
Port = 0;
pAC->Rlmt.Net[0].Preference = Port;
pAC->Rlmt.Net[0].PrefPort = Port;
/*
** do not set ActivePort here, thus a port
** switch is issued after net up.
*/
Port = 0;
pAC->Rlmt.Net[0].Preference = Port;
pAC->Rlmt.Net[0].PrefPort = Port;
} else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
/*
** do not set ActivePort here, thus a port
** switch is issued after net up.
*/
Port = 1;
pAC->Rlmt.Net[0].Preference = Port;
pAC->Rlmt.Net[0].PrefPort = Port;
/*
** do not set ActivePort here, thus a port
** switch is issued after net up.
*/
if (pAC->GIni.GIMacsFound == 1) {
printk("sk98lin: Illegal value \"B\" for PrefPort.\n"
" Port B not available on single port adapters.\n");
pAC->ActivePort = 0;
pAC->Rlmt.Net[0].Preference = -1; /* auto */
pAC->Rlmt.Net[0].PrefPort = 0;
} else {
Port = 1;
pAC->Rlmt.Net[0].Preference = Port;
pAC->Rlmt.Net[0].PrefPort = Port;
}
} else {
printk("%s: Illegal value \"%s\" for PrefPort\n",
pAC->dev[0]->name, PrefPort[pAC->Index]);
printk("sk98lin: Illegal value \"%s\" for PrefPort\n",
PrefPort[pAC->Index]);
}
}
......@@ -4325,9 +4522,9 @@ int Capabilities[3][3] =
pAC->RlmtMode = SK_RLMT_CHECK_LINK;
pAC->RlmtNets = 2;
} else {
printk("%s: Illegal value \"%s\" for"
printk("sk98lin: Illegal value \"%s\" for"
" RlmtMode, using default\n",
pAC->dev[0]->name, RlmtMode[pAC->Index]);
RlmtMode[pAC->Index]);
pAC->RlmtMode = 0;
}
} else {
......@@ -4338,97 +4535,111 @@ int Capabilities[3][3] =
** Check the interrupt moderation parameters
*/
if (Moderation[pAC->Index] != NULL) {
if (strcmp(Moderation[pAC->Index], "Static") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_STATIC;
} else if (strcmp(Moderation[pAC->Index], "Dynamic") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_DYNAMIC;
} else {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
}
if (strcmp(Moderation[pAC->Index], "") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
} else if (strcmp(Moderation[pAC->Index], "Static") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_STATIC;
} else if (strcmp(Moderation[pAC->Index], "Dynamic") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_DYNAMIC;
} else if (strcmp(Moderation[pAC->Index], "None") == 0) {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
} else {
printk("sk98lin: Illegal value \"%s\" for Moderation.\n"
" Disable interrupt moderation.\n",
Moderation[pAC->Index]);
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
}
} else {
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
}
if (Stats[pAC->Index] != NULL) {
if (strcmp(Stats[pAC->Index], "Yes") == 0) {
pAC->DynIrqModInfo.DisplayStats = SK_TRUE;
} else {
pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
}
if (strcmp(Stats[pAC->Index], "Yes") == 0) {
pAC->DynIrqModInfo.DisplayStats = SK_TRUE;
} else {
pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
}
} else {
pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
}
if (ModerationMask[pAC->Index] != NULL) {
if (strcmp(ModerationMask[pAC->Index], "Rx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "Tx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "Sp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "RxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
} else if (strcmp(ModerationMask[pAC->Index], "SpRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
} else if (strcmp(ModerationMask[pAC->Index], "RxTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
} else if (strcmp(ModerationMask[pAC->Index], "TxRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
} else if (strcmp(ModerationMask[pAC->Index], "TxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
} else if (strcmp(ModerationMask[pAC->Index], "SpTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
} else if (strcmp(ModerationMask[pAC->Index], "RxTxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "RxSpTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "TxRxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "TxSpRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "SpTxRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "SpRxTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else { /* some rubbish */
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
}
} else { /* operator has stated nothing */
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
}
if (ModerationMask[pAC->Index] != NULL) {
if (strcmp(ModerationMask[pAC->Index], "Rx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "Tx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "Sp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_ONLY;
} else if (strcmp(ModerationMask[pAC->Index], "RxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
} else if (strcmp(ModerationMask[pAC->Index], "SpRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
} else if (strcmp(ModerationMask[pAC->Index], "RxTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
} else if (strcmp(ModerationMask[pAC->Index], "TxRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
} else if (strcmp(ModerationMask[pAC->Index], "TxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
} else if (strcmp(ModerationMask[pAC->Index], "SpTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
} else if (strcmp(ModerationMask[pAC->Index], "RxTxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "RxSpTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "TxRxSp") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "TxSpRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "SpTxRx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else if (strcmp(ModerationMask[pAC->Index], "SpRxTx") == 0) {
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
} else { /* some rubbish */
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
}
} else { /* operator has stated nothing */
pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
}
if (AutoSizing[pAC->Index] != NULL) {
if (strcmp(AutoSizing[pAC->Index], "On") == 0) {
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
} else {
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
}
} else { /* operator has stated nothing */
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
}
if (AutoSizing[pAC->Index] != NULL) {
if (strcmp(AutoSizing[pAC->Index], "On") == 0) {
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
} else {
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
}
} else { /* operator has stated nothing */
pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
}
if (IntsPerSec[pAC->Index] != 0) {
if ((IntsPerSec[pAC->Index]< 30) || (IntsPerSec[pAC->Index]> 40000)) {
pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
} else {
pAC->DynIrqModInfo.MaxModIntsPerSec = IntsPerSec[pAC->Index];
}
} else {
pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
}
if (IntsPerSec[pAC->Index] != 0) {
if ((IntsPerSec[pAC->Index]< C_INT_MOD_IPS_LOWER_RANGE) ||
(IntsPerSec[pAC->Index] > C_INT_MOD_IPS_UPPER_RANGE)) {
printk("sk98lin: Illegal value \"%d\" for IntsPerSec. (Range: %d - %d)\n"
" Using default value of %i.\n",
IntsPerSec[pAC->Index],
C_INT_MOD_IPS_LOWER_RANGE,
C_INT_MOD_IPS_UPPER_RANGE,
C_INTS_PER_SEC_DEFAULT);
pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
} else {
pAC->DynIrqModInfo.MaxModIntsPerSec = IntsPerSec[pAC->Index];
}
} else {
pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
}
/*
/*
** Evaluate upper and lower moderation threshold
*/
pAC->DynIrqModInfo.MaxModIntsPerSecUpperLimit =
pAC->DynIrqModInfo.MaxModIntsPerSec +
(pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
pAC->DynIrqModInfo.MaxModIntsPerSecUpperLimit =
pAC->DynIrqModInfo.MaxModIntsPerSec +
(pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
pAC->DynIrqModInfo.MaxModIntsPerSecLowerLimit =
pAC->DynIrqModInfo.MaxModIntsPerSec -
(pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
pAC->DynIrqModInfo.MaxModIntsPerSecLowerLimit =
pAC->DynIrqModInfo.MaxModIntsPerSec -
(pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
pAC->DynIrqModInfo.PrevTimeVal = jiffies; /* initial value */
pAC->DynIrqModInfo.PrevTimeVal = jiffies; /* initial value */
} /* GetConfiguration */
......@@ -4826,6 +5037,10 @@ SK_BOOL DualNet;
FromPort = Param.Para32[0];
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
("NET UP EVENT, Port: %d ", Param.Para32[0]));
/* Mac update */
SkAddrMcUpdate(pAC,IoC, FromPort);
if (DoPrintInterfaceChange) {
printk("%s: network connection up using"
" port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
......@@ -4841,8 +5056,6 @@ SK_BOOL DualNet;
printk(" speed: unknown\n");
}
/* Mac update */
SkAddrMcUpdate(pAC,IoC, FromPort);
Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
if (Stat == SK_LMODE_STAT_AUTOHALF ||
......@@ -4920,6 +5133,9 @@ SK_BOOL DualNet;
printk(" rx-checksum: disabled\n");
#endif
} else {
DoPrintInterfaceChange = SK_TRUE;
}
if ((Param.Para32[0] != pAC->ActivePort) &&
(pAC->RlmtNets == 1)) {
......@@ -4937,7 +5153,12 @@ SK_BOOL DualNet;
/* action list 7 */
SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
("NET DOWN EVENT "));
printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
if (DoPrintInterfaceChange) {
printk("%s: network connection down\n",
pAC->dev[Param.Para32[1]]->name);
} else {
DoPrintInterfaceChange = SK_TRUE;
}
pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
break;
case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
......@@ -5122,6 +5343,231 @@ char ClassStr[80];
} /* SkErrorLog */
#ifdef SK_DIAG_SUPPORT
/*****************************************************************************
*
* SkDrvEnterDiagMode - handles DIAG attach request
*
* Description:
* Notify the kernel to NOT access the card any longer due to DIAG
* Deinitialize the Card
*
* Returns:
* int
*/
int SkDrvEnterDiagMode(
SK_AC *pAc) /* pointer to adapter context */
{
SK_AC *pAC = NULL;
DEV_NET *pNet = NULL;
pNet = (DEV_NET *) pAc->dev[0]->priv;
pAC = pNet->pAC;
SK_MEMCPY(&(pAc->PnmiBackup), &(pAc->PnmiStruct),
sizeof(SK_PNMI_STRUCT_DATA));
pAC->DiagModeActive = DIAG_ACTIVE;
if (pAC->BoardLevel > SK_INIT_DATA) {
if (pNet->Up) {
pAC->WasIfUp[0] = SK_TRUE;
pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
DoPrintInterfaceChange = SK_FALSE;
SkDrvDeInitAdapter(pAC, 0); /* performs SkGeClose */
} else {
pAC->WasIfUp[0] = SK_FALSE;
}
if (pNet != (DEV_NET *) pAc->dev[1]->priv) {
pNet = (DEV_NET *) pAc->dev[1]->priv;
if (pNet->Up) {
pAC->WasIfUp[1] = SK_TRUE;
pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
DoPrintInterfaceChange = SK_FALSE;
SkDrvDeInitAdapter(pAC, 1); /* do SkGeClose */
} else {
pAC->WasIfUp[1] = SK_FALSE;
}
}
pAC->BoardLevel = SK_INIT_DATA;
}
return(0);
}
/*****************************************************************************
*
* SkDrvLeaveDiagMode - handles DIAG detach request
*
* Description:
* Notify the kernel to may access the card again after use by DIAG
* Initialize the Card
*
* Returns:
* int
*/
int SkDrvLeaveDiagMode(
SK_AC *pAc) /* pointer to adapter control context */
{
SK_MEMCPY(&(pAc->PnmiStruct), &(pAc->PnmiBackup),
sizeof(SK_PNMI_STRUCT_DATA));
pAc->DiagModeActive = DIAG_NOTACTIVE;
pAc->Pnmi.DiagAttached = SK_DIAG_IDLE;
if (pAc->WasIfUp[0] == SK_TRUE) {
pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
DoPrintInterfaceChange = SK_FALSE;
SkDrvInitAdapter(pAc, 0); /* first device */
}
if (pAc->WasIfUp[1] == SK_TRUE) {
pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
DoPrintInterfaceChange = SK_FALSE;
SkDrvInitAdapter(pAc, 1); /* second device */
}
return(0);
}
/*****************************************************************************
*
* ParseDeviceNbrFromSlotName - Evaluate PCI device number
*
* Description:
* This function parses the PCI slot name information string and will
* retrieve the devcie number out of it. The slot_name maintianed by
* linux is in the form of '02:0a.0', whereas the first two characters
* represent the bus number in hex (in the sample above this is
* pci bus 0x02) and the next two characters the device number (0x0a).
*
* Returns:
* SK_U32: The device number from the PCI slot name
*/
static SK_U32 ParseDeviceNbrFromSlotName(
const char *SlotName) /* pointer to pci slot name eg. '02:0a.0' */
{
char *CurrCharPos = (char *) SlotName;
int FirstNibble = -1;
int SecondNibble = -1;
SK_U32 Result = 0;
while (*CurrCharPos != '\0') {
if (*CurrCharPos == ':') {
while (*CurrCharPos != '.') {
CurrCharPos++;
if ( (*CurrCharPos >= '0') &&
(*CurrCharPos <= '9')) {
if (FirstNibble == -1) {
/* dec. value for '0' */
FirstNibble = *CurrCharPos - 48;
} else {
SecondNibble = *CurrCharPos - 48;
}
} else if ( (*CurrCharPos >= 'a') &&
(*CurrCharPos <= 'f') ) {
if (FirstNibble == -1) {
FirstNibble = *CurrCharPos - 87;
} else {
SecondNibble = *CurrCharPos - 87;
}
} else {
Result = 0;
}
}
Result = FirstNibble;
Result = Result << 4; /* first nibble is higher one */
Result = Result | SecondNibble;
}
CurrCharPos++; /* next character */
}
return (Result);
}
/****************************************************************************
*
* SkDrvDeInitAdapter - deinitialize adapter (this function is only
* called if Diag attaches to that card)
*
* Description:
* Close initialized adapter.
*
* Returns:
* 0 - on success
* error code - on error
*/
static int SkDrvDeInitAdapter(
SK_AC *pAC, /* pointer to adapter context */
int devNbr) /* what device is to be handled */
{
struct SK_NET_DEVICE *dev;
dev = pAC->dev[devNbr];
/*
** Function SkGeClose() uses MOD_DEC_USE_COUNT (2.2/2.4)
** or module_put() (2.6) to decrease the number of users for
** a device, but if a device is to be put under control of
** the DIAG, that count is OK already and does not need to
** be adapted! Hence the opposite MOD_INC_USE_COUNT or
** try_module_get() needs to be used again to correct that.
*/
if (!try_module_get(THIS_MODULE)) {
return (-1);
}
if (SkGeClose(dev) != 0) {
module_put(THIS_MODULE);
return (-1);
}
return (0);
} /* SkDrvDeInitAdapter() */
/****************************************************************************
*
* SkDrvInitAdapter - Initialize adapter (this function is only
* called if Diag deattaches from that card)
*
* Description:
* Close initialized adapter.
*
* Returns:
* 0 - on success
* error code - on error
*/
static int SkDrvInitAdapter(
SK_AC *pAC, /* pointer to adapter context */
int devNbr) /* what device is to be handled */
{
struct SK_NET_DEVICE *dev;
dev = pAC->dev[devNbr];
if (SkGeOpen(dev) != 0) {
return (-1);
} else {
/*
** Function SkGeOpen() uses MOD_INC_USE_COUNT (2.2/2.4)
** or try_module_get() (2.6) to increase the number of
** users for a device, but if a device was just under
** control of the DIAG, that count is OK already and
** does not need to be adapted! Hence the opposite
** MOD_DEC_USE_COUNT or module_put() needs to be used
** again to correct that.
*/
module_put(THIS_MODULE);
}
/*
** Use correct MTU size and indicate to kernel TX queue can be started
*/
if (SkGeChangeMtu(dev, dev->mtu) != 0) {
return (-1);
}
return (0);
} /* SkDrvInitAdapter */
#endif
#ifdef DEBUG
/****************************************************************************/
/* "debug only" section *****************************************************/
......
drivers/net/sk98lin/skgehwt.c
View file @ e06cf18f
/******************************************************************************
*
* Name: skgehwt.c
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.14 $
* Date: $Date: 2003/05/13 18:01:58 $
* Purpose: Hardware Timer.
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.15 $
* Date: $Date: 2003/09/16 13:41:23 $
* Purpose: Hardware Timer
*
******************************************************************************/
......@@ -27,6 +27,10 @@
* History:
*
* $Log: skgehwt.c,v $
* Revision 1.15 2003/09/16 13:41:23 rschmidt
* Added (C) Marvell to SysKonnectFileId
* Editorial changes
*
* Revision 1.14 2003/05/13 18:01:58 mkarl
* Editorial changes.
*
......@@ -69,19 +73,15 @@
*
* Revision 1.1 1998/08/05 11:28:36 gklug
* first version: adapted from SMT/FDDI
*
*
*
*
******************************************************************************/
/*
Event queue and dispatcher
*/
* Event queue and dispatcher
*/
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"$Header: /usr56/projects/ge/schedule/skgehwt.c,v 1.14 2003/05/13 18:01:58 mkarl Exp $" ;
"@(#) $Id: skgehwt.c,v 1.15 2003/09/16 13:41:23 rschmidt Exp $ (C) Marvell.";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
......@@ -89,10 +89,7 @@ static const char SysKonnectFileId[] =
#ifdef __C2MAN__
/*
Hardware Timer function queue management.
General Description:
* Hardware Timer function queue management.
*/
intro()
{}
......@@ -117,9 +114,9 @@ SK_IOC Ioc) /* IoContext */
{
pAC->Hwt.TStart = 0 ;
pAC->Hwt.TStop = 0 ;
pAC->Hwt.TActive = SK_FALSE ;
pAC->Hwt.TActive = SK_FALSE;
SkHwtStop(pAC,Ioc) ;
SkHwtStop(pAC, Ioc);
}
/*
......@@ -132,28 +129,29 @@ SK_AC *pAC, /* Adapters context */
SK_IOC Ioc, /* IoContext */
SK_U32 Time) /* Time in units of 16us to load the timer with. */
{
SK_U32 Cnt ;
SK_U32 Cnt;
if (Time > SK_HWT_MAX)
Time = SK_HWT_MAX ;
Time = SK_HWT_MAX;
pAC->Hwt.TStart = Time ;
pAC->Hwt.TStop = 0L ;
pAC->Hwt.TStart = Time;
pAC->Hwt.TStop = 0L;
Cnt = Time ;
Cnt = Time;
/*
* if time < 16 us
* time = 16 us
*/
if (!Cnt) {
Cnt++ ;
Cnt++;
}
SK_OUT32(Ioc, B2_TI_INI, Cnt * SK_HWT_FAC) ;
SK_OUT16(Ioc, B2_TI_CRTL, TIM_START) ; /* Start timer. */
SK_OUT32(Ioc, B2_TI_INI, Cnt * SK_HWT_FAC);
SK_OUT16(Ioc, B2_TI_CTRL, TIM_START); /* Start timer. */
pAC->Hwt.TActive = SK_TRUE ;
pAC->Hwt.TActive = SK_TRUE;
}
/*
......@@ -164,10 +162,11 @@ void SkHwtStop(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc) /* IoContext */
{
SK_OUT16(Ioc, B2_TI_CRTL, TIM_STOP) ;
SK_OUT16(Ioc, B2_TI_CRTL, TIM_CLR_IRQ) ;
SK_OUT16(Ioc, B2_TI_CTRL, TIM_STOP);
SK_OUT16(Ioc, B2_TI_CTRL, TIM_CLR_IRQ);
pAC->Hwt.TActive = SK_FALSE ;
pAC->Hwt.TActive = SK_FALSE;
}
......@@ -182,26 +181,31 @@ SK_U32 SkHwtRead(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc) /* IoContext */
{
SK_U32 TRead ;
SK_U32 IStatus ;
SK_U32 TRead;
SK_U32 IStatus;
if (pAC->Hwt.TActive) {
SkHwtStop(pAC,Ioc) ;
SkHwtStop(pAC, Ioc);
SK_IN32(Ioc, B2_TI_VAL, &TRead);
TRead /= SK_HWT_FAC;
SK_IN32(Ioc, B0_ISRC, &IStatus);
/* Check if timer expired (or wraparound). */
/* Check if timer expired (or wraped around) */
if ((TRead > pAC->Hwt.TStart) || (IStatus & IS_TIMINT)) {
SkHwtStop(pAC,Ioc) ;
pAC->Hwt.TStop = pAC->Hwt.TStart ;
} else {
pAC->Hwt.TStop = pAC->Hwt.TStart - TRead ;
SkHwtStop(pAC, Ioc);
pAC->Hwt.TStop = pAC->Hwt.TStart;
}
else {
pAC->Hwt.TStop = pAC->Hwt.TStart - TRead;
}
}
return (pAC->Hwt.TStop) ;
return(pAC->Hwt.TStop);
}
/*
......@@ -211,9 +215,11 @@ void SkHwtIsr(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc) /* IoContext */
{
SkHwtStop(pAC,Ioc);
SkHwtStop(pAC, Ioc);
pAC->Hwt.TStop = pAC->Hwt.TStart;
SkTimerDone(pAC,Ioc) ;
SkTimerDone(pAC, Ioc);
}
/* End of file */
drivers/net/sk98lin/skgeinit.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgeinit.c
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.93 $
* Date: $Date: 2003/05/28 15:44:43 $
* Version: $Revision: 1.97 $
* Date: $Date: 2003/10/02 16:45:31 $
* Purpose: Contains functions to initialize the adapter
*
******************************************************************************/
......@@ -27,6 +27,32 @@
* History:
*
* $Log: skgeinit.c,v $
* Revision 1.97 2003/10/02 16:45:31 rschmidt
* Replaced default values of GMAC parameters with defines.
* Removed hard reset of MACs in SkGeDeInit().
* Added define SK_PHY_LP_MODE around power saving mode in SkGeDeInit().
* Added check for VAUX available before switch power to VAUX.
*
* Revision 1.96 2003/09/18 14:02:41 rroesler
* Add: Perform a hardreset of MACs in GeDeInit()
*
* Revision 1.95 2003/09/16 14:26:59 rschmidt
* Added switch power to VCC (WA for VAUX problem) in SkGeInit1().
* Fixed setting PHY to coma mode and D3 power state in SkGeDeInit().
* Editorial changes.
*
* Revision 1.94 2003/09/16 07:17:10 mschmid
* Added init for new members in port structure for MAC control
* - PMacColThres
* - PMacJamLen
* - PMacJamIpgVal
* - PMacJamIpgData
* - PMacIpgData
* - PMacLimit4
* Added init for PHY power state in port structure
* - PPhyPowerState
* Added shutdown handling for Yukon Plus in SkGeDeInit()
*
* Revision 1.93 2003/05/28 15:44:43 rschmidt
* Added check for chip Id on WOL WA for chip Rev. A.
* Added setting of GILevel in SkGeDeInit().
......@@ -446,7 +472,7 @@
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"@(#) $Id: skgeinit.c,v 1.93 2003/05/28 15:44:43 rschmidt Exp $ (C) Marvell.";
"@(#) $Id: skgeinit.c,v 1.97 2003/10/02 16:45:31 rschmidt Exp $ (C) Marvell.";
#endif
struct s_QOffTab {
......@@ -1013,8 +1039,6 @@ int Port) /* Port Index (MAC_1 + n) */
* - enable the FIFO
*/
Word = (SK_U16)GMF_RX_CTRL_DEF;
#ifdef GENESIS
if (pAC->GIni.GIGenesis) {
/* Configure Rx MAC FIFO */
......@@ -1039,6 +1063,8 @@ int Port) /* Port Index (MAC_1 + n) */
/* set Rx GMAC FIFO Flush Mask */
SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_MSK), (SK_U16)RX_FF_FL_DEF_MSK);
Word = (SK_U16)GMF_RX_CTRL_DEF;
/* disable Rx GMAC FIFO Flush for YUKON-Lite Rev. A0 only */
if (pAC->GIni.GIYukonLite && pAC->GIni.GIChipId == CHIP_ID_YUKON) {
......@@ -1809,6 +1835,13 @@ SK_IOC IoC) /* IO context */
pPrt->PAutoNegFail = SK_FALSE;
pPrt->PHWLinkUp = SK_FALSE;
pPrt->PLinkBroken = SK_TRUE; /* See WA code */
pPrt->PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
pPrt->PMacColThres = TX_COL_DEF;
pPrt->PMacJamLen = TX_JAM_LEN_DEF;
pPrt->PMacJamIpgVal = TX_JAM_IPG_DEF;
pPrt->PMacJamIpgData = TX_IPG_JAM_DEF;
pPrt->PMacIpgData = IPG_DATA_DEF;
pPrt->PMacLimit4 = SK_FALSE;
}
pAC->GIni.GIPortUsage = SK_RED_LINK;
......@@ -1963,7 +1996,7 @@ SK_IOC IoC) /* IO context */
/* restore CLK_RUN bits */
SK_OUT16(IoC, B0_CTST, (SK_U16)(CtrlStat &
(CS_CLK_RUN_HOT | CS_CLK_RUN_RST | CS_CLK_RUN_ENA)));
/* read Chip Identification Number */
SK_IN8(IoC, B2_CHIP_ID, &Byte);
pAC->GIni.GIChipId = Byte;
......@@ -2053,6 +2086,10 @@ SK_IOC IoC) /* IO context */
}
}
/* switch power to VCC (WA for VAUX problem) */
SK_OUT8(IoC, B0_POWER_CTRL, (SK_U8)(PC_VAUX_ENA | PC_VCC_ENA |
PC_VAUX_OFF | PC_VCC_ON));
/* read the Interrupt source */
SK_IN32(IoC, B0_ISRC, &DWord);
......@@ -2395,6 +2432,11 @@ SK_IOC IoC) /* IO context */
int i;
SK_U16 Word;
#ifdef SK_PHY_LP_MODE
SK_U8 Byte;
SK_U16 PmCtlSts;
#endif /* SK_PHY_LP_MODE */
#if (!defined(SK_SLIM) && !defined(VCPU))
/* ensure I2C is ready */
SkI2cWaitIrq(pAC, IoC);
......@@ -2409,6 +2451,38 @@ SK_IOC IoC) /* IO context */
}
}
#ifdef SK_PHY_LP_MODE
/*
* for power saving purposes within mobile environments
* we set the PHY to coma mode and switch to D3 power state.
*/
if (pAC->GIni.GIYukonLite &&
pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
/* for all ports switch PHY to coma mode */
for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
}
if (pAC->GIni.GIVauxAvail) {
/* switch power to VAUX */
Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
SK_OUT8(IoC, B0_POWER_CTRL, Byte);
}
/* switch to D3 state */
SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
PmCtlSts |= PCI_PM_STATE_D3;
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
}
#endif /* SK_PHY_LP_MODE */
/* Reset all bits in the PCI STATUS register */
/*
* Note: PCI Cfg cycles cannot be used, because they are not
......
drivers/net/sk98lin/skgemib.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgemib.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.9 $
* Date: $Date: 2003/05/23 12:55:20 $
* Version: $Revision: 1.11 $
* Date: $Date: 2003/09/15 13:38:12 $
* Purpose: Private Network Management Interface Management Database
*
****************************************************************************/
......@@ -27,6 +27,19 @@
* History:
*
* $Log: skgemib.c,v $
* Revision 1.11 2003/09/15 13:38:12 tschilli
* OID_SKGE_PHY_LP_MODE included only after using #define SK_PHY_LP_MODE.
*
* Revision 1.10 2003/08/15 12:28:59 tschilli
* Added new OIDs:
* OID_SKGE_DRIVER_RELDATE
* OID_SKGE_DRIVER_FILENAME
* OID_SKGE_CHIPID
* OID_SKGE_RAMSIZE
* OID_SKGE_VAUXAVAIL
* OID_SKGE_PHY_TYPE
* OID_SKGE_PHY_LP_MODE
*
* Revision 1.9 2003/05/23 12:55:20 tschilli
* OID_SKGE_BOARDLEVEL added.
*
......@@ -356,6 +369,16 @@ PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
0,
SK_PNMI_MAI_OFF(DriverVersion),
SK_PNMI_RO, General, 0},
{OID_SKGE_DRIVER_RELDATE,
1,
0,
SK_PNMI_MAI_OFF(DriverReleaseDate),
SK_PNMI_RO, General, 0},
{OID_SKGE_DRIVER_FILENAME,
1,
0,
SK_PNMI_MAI_OFF(DriverFileName),
SK_PNMI_RO, General, 0},
{OID_SKGE_HW_DESCR,
1,
0,
......@@ -371,6 +394,21 @@ PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
0,
SK_PNMI_MAI_OFF(Chipset),
SK_PNMI_RO, General, 0},
{OID_SKGE_CHIPID,
1,
0,
SK_PNMI_MAI_OFF(ChipId),
SK_PNMI_RO, General, 0},
{OID_SKGE_RAMSIZE,
1,
0,
SK_PNMI_MAI_OFF(RamSize),
SK_PNMI_RO, General, 0},
{OID_SKGE_VAUXAVAIL,
1,
0,
SK_PNMI_MAI_OFF(VauxAvail),
SK_PNMI_RO, General, 0},
{OID_SKGE_ACTION,
1,
0,
......@@ -876,6 +914,18 @@ PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
sizeof(SK_PNMI_CONF),
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfConnector),
SK_PNMI_RO, MacPrivateConf, 0},
{OID_SKGE_PHY_TYPE,
SK_PNMI_MAC_ENTRIES,
sizeof(SK_PNMI_CONF),
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType),
SK_PNMI_RO, MacPrivateConf, 0},
#ifdef SK_PHY_LP_MODE
{OID_SKGE_PHY_LP_MODE,
SK_PNMI_MAC_ENTRIES,
sizeof(SK_PNMI_CONF),
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode),
SK_PNMI_RW, MacPrivateConf, 0},
#endif
{OID_SKGE_LINK_CAP,
SK_PNMI_MAC_ENTRIES,
sizeof(SK_PNMI_CONF),
......
drivers/net/sk98lin/skgepnmi.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgepnmi.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.109 $
* Date: $Date: 2003/07/17 14:15:24 $
* Version: $Revision: 1.111 $
* Date: $Date: 2003/09/15 13:35:35 $
* Purpose: Private Network Management Interface
*
****************************************************************************/
......@@ -27,6 +27,22 @@
* History:
*
* $Log: skgepnmi.c,v $
* Revision 1.111 2003/09/15 13:35:35 tschilli
* Code for OID_SKGE_PHY_LP_MODE completed (using #define SK_PHY_LP_MODE).
* SK_DIAG_ATTACHED handling for OID_SKGE_DIAG_MODE in DiagActions() changed.
*
* Revision 1.110 2003/08/15 12:28:04 tschilli
* Added new OIDs:
* OID_SKGE_DRIVER_RELDATE
* OID_SKGE_DRIVER_FILENAME
* OID_SKGE_CHIPID
* OID_SKGE_RAMSIZE
* OID_SKGE_VAUXAVAIL
* OID_SKGE_PHY_TYPE
* OID_SKGE_PHY_LP_MODE
*
* Added SK_DIAG_ATTACHED handling for OID_SKGE_DIAG_MODE in DiagActions().
*
* Revision 1.109 2003/07/17 14:15:24 tschilli
* Bug in SkPnmiGenIoctl() fixed.
*
......@@ -471,7 +487,7 @@
#ifndef _lint
static const char SysKonnectFileId[] =
"@(#) $Id: skgepnmi.c,v 1.109 2003/07/17 14:15:24 tschilli Exp $ (C) Marvell.";
"@(#) $Id: skgepnmi.c,v 1.111 2003/09/15 13:35:35 tschilli Exp $ (C) Marvell.";
#endif /* !_lint */
#include "h/skdrv1st.h"
......@@ -4008,14 +4024,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
#endif /* SK_NDIS_64BIT_CTR */
break;
case OID_SKGE_BOARDLEVEL:
if (*pLen < sizeof(SK_U32)) {
*pLen = sizeof(SK_U32);
return (SK_PNMI_ERR_TOO_SHORT);
}
break;
case OID_SKGE_PORT_NUMBER:
case OID_SKGE_DEVICE_TYPE:
case OID_SKGE_RESULT:
......@@ -4023,6 +4031,9 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
case OID_GEN_TRANSMIT_QUEUE_LENGTH:
case OID_SKGE_TRAP_NUMBER:
case OID_SKGE_MDB_VERSION:
case OID_SKGE_BOARDLEVEL:
case OID_SKGE_CHIPID:
case OID_SKGE_RAMSIZE:
if (*pLen < sizeof(SK_U32)) {
*pLen = sizeof(SK_U32);
......@@ -4043,6 +4054,7 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
case OID_SKGE_BUS_WIDTH:
case OID_SKGE_SENSOR_NUMBER:
case OID_SKGE_CHKSM_NUMBER:
case OID_SKGE_VAUXAVAIL:
if (*pLen < sizeof(SK_U8)) {
*pLen = sizeof(SK_U8);
......@@ -4234,6 +4246,66 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
*pLen = Len;
break;
case OID_SKGE_DRIVER_RELDATE:
if (pAC->Pnmi.pDriverReleaseDate == NULL) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
SK_PNMI_ERR053MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
Len = SK_STRLEN(pAC->Pnmi.pDriverReleaseDate) + 1;
if (Len > SK_PNMI_STRINGLEN1) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
SK_PNMI_ERR054MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
if (*pLen < Len) {
*pLen = Len;
return (SK_PNMI_ERR_TOO_SHORT);
}
*pBuf = (char)(Len - 1);
SK_MEMCPY(pBuf + 1, pAC->Pnmi.pDriverReleaseDate, Len - 1);
*pLen = Len;
break;
case OID_SKGE_DRIVER_FILENAME:
if (pAC->Pnmi.pDriverFileName == NULL) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
SK_PNMI_ERR055MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
Len = SK_STRLEN(pAC->Pnmi.pDriverFileName) + 1;
if (Len > SK_PNMI_STRINGLEN1) {
SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
SK_PNMI_ERR056MSG);
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
if (*pLen < Len) {
*pLen = Len;
return (SK_PNMI_ERR_TOO_SHORT);
}
*pBuf = (char)(Len - 1);
SK_MEMCPY(pBuf + 1, pAC->Pnmi.pDriverFileName, Len - 1);
*pLen = Len;
break;
case OID_SKGE_HW_DESCR:
/*
* The hardware description is located in the VPD. This
......@@ -4291,8 +4363,25 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
*pLen = sizeof(SK_U16);
break;
case OID_SKGE_CHIPID:
Val32 = pAC->GIni.GIChipId;
SK_PNMI_STORE_U32(pBuf, Val32);
*pLen = sizeof(SK_U32);
break;
case OID_SKGE_RAMSIZE:
Val32 = pAC->GIni.GIRamSize;
SK_PNMI_STORE_U32(pBuf, Val32);
*pLen = sizeof(SK_U32);
break;
case OID_SKGE_VAUXAVAIL:
*pBuf = (char) pAC->GIni.GIVauxAvail;
*pLen = sizeof(char);
break;
case OID_SKGE_BUS_TYPE:
*pBuf = (char)SK_PNMI_BUS_PCI;
*pBuf = (char) SK_PNMI_BUS_PCI;
*pLen = sizeof(char);
break;
......@@ -5435,6 +5524,9 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
case OID_SKGE_SPEED_CAP:
case OID_SKGE_SPEED_MODE:
case OID_SKGE_SPEED_STATUS:
#ifdef SK_PHY_LP_MODE
case OID_SKGE_PHY_LP_MODE:
#endif
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
*pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
......@@ -5443,6 +5535,7 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
break;
case OID_SKGE_MTU:
case OID_SKGE_PHY_TYPE:
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U32)) {
*pLen = (Limit - LogPortIndex) * sizeof(SK_U32);
......@@ -5488,6 +5581,49 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
Offset += sizeof(char);
break;
case OID_SKGE_PHY_TYPE:
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
continue;
}
else {
/* Get value for physical ports */
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
pAC, LogPortIndex);
Val32 = pAC->GIni.GP[PhysPortIndex].PhyType;
SK_PNMI_STORE_U32(pBufPtr, Val32);
}
}
else { /* DualNetMode */
Val32 = pAC->GIni.GP[NetIndex].PhyType;
SK_PNMI_STORE_U32(pBufPtr, Val32);
}
Offset += sizeof(SK_U32);
break;
#ifdef SK_PHY_LP_MODE
case OID_SKGE_PHY_LP_MODE:
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
continue;
}
else {
/* Get value for physical ports */
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
*pBufPtr = Val8;
}
}
else { /* DualNetMode */
Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
*pBufPtr = Val8;
}
Offset += sizeof(SK_U8);
break;
#endif
case OID_SKGE_LINK_CAP:
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
......@@ -5804,6 +5940,16 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
}
break;
#ifdef SK_PHY_LP_MODE
case OID_SKGE_PHY_LP_MODE:
if (*pLen < Limit - LogPortIndex) {
*pLen = Limit - LogPortIndex;
return (SK_PNMI_ERR_TOO_SHORT);
}
break;
#endif
case OID_SKGE_MTU:
if (*pLen < sizeof(SK_U32)) {
......@@ -6160,6 +6306,116 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
Offset += sizeof(SK_U32);
break;
#ifdef SK_PHY_LP_MODE
case OID_SKGE_PHY_LP_MODE:
/* The preset ends here */
if (Action == SK_PNMI_PRESET) {
return (SK_PNMI_ERR_OK);
}
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
Offset = 0;
continue;
}
else {
/* Set value for physical ports */
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
switch (*(pBuf + Offset)) {
case 0:
/* If LowPowerMode is active, we can leave it. */
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
SkDrvInitAdapter(pAC);
}
break;
}
else {
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
case 1:
case 2:
case 3:
case 4:
/* If no LowPowerMode is active, we can enter it. */
if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
if ((*(pBuf + Offset)) < 3) {
SkDrvDeInitAdapter(pAC);
}
Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
break;
}
else {
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
default:
*pLen = 0;
return (SK_PNMI_ERR_BAD_VALUE);
}
}
}
else { /* DualNetMode */
switch (*(pBuf + Offset)) {
case 0:
/* If we are in a LowPowerMode, we can leave it. */
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
SkDrvInitAdapter(pAC);
}
break;
}
else {
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
case 1:
case 2:
case 3:
case 4:
/* If we are not already in LowPowerMode, we can enter it. */
if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
if ((*(pBuf + Offset)) < 3) {
SkDrvDeInitAdapter(pAC);
}
else {
Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
}
break;
}
else {
*pLen = 0;
return (SK_PNMI_ERR_GENERAL);
}
default:
*pLen = 0;
return (SK_PNMI_ERR_BAD_VALUE);
}
}
Offset += sizeof(SK_U8);
break;
#endif
default:
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
......@@ -6318,6 +6574,7 @@ char *pBuf) /* Buffer used for the management data transfer */
unsigned int PhysPortMax;
unsigned int PhysPortIndex;
SK_U8 Val8;
SK_U32 Val32;
SK_BOOL PortActiveFlag;
SK_GEPORT *pPrt;
......@@ -6340,6 +6597,14 @@ char *pBuf) /* Buffer used for the management data transfer */
switch (Id) {
case OID_SKGE_PHY_TYPE:
/* Check if it is the first active port */
if (*pBuf == 0) {
Val32 = pPrt->PhyType;
SK_PNMI_STORE_U32(pBuf, Val32);
continue;
}
case OID_SKGE_LINK_CAP:
/*
......@@ -7974,6 +8239,7 @@ unsigned int TableIndex, /* Index to the Id table */
SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
{
SK_U32 DiagStatus;
SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
/*
......@@ -8012,7 +8278,8 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
switch (Id) {
case OID_SKGE_DIAG_MODE:
SK_PNMI_STORE_U32(pBuf, pAC->DiagModeActive);
DiagStatus = pAC->Pnmi.DiagAttached;
SK_PNMI_STORE_U32(pBuf, DiagStatus);
*pLen = sizeof(SK_U32);
RetCode = SK_PNMI_ERR_OK;
break;
......@@ -8022,7 +8289,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
RetCode = SK_PNMI_ERR_GENERAL;
break;
}
return (RetCode);
}
......@@ -8039,23 +8305,84 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
/* Handle the SET. */
switch (*pBuf) {
/* Attach the DIAG to this adapter. */
case SK_DIAG_ATTACHED:
/* Check if we come from running */
if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
RetCode = SkDrvLeaveDiagMode(pAC);
}
else if (pAC->Pnmi.DiagAttached == SK_DIAG_IDLE) {
RetCode = SK_PNMI_ERR_OK;
}
else {
RetCode = SK_PNMI_ERR_GENERAL;
}
if (RetCode == SK_PNMI_ERR_OK) {
pAC->Pnmi.DiagAttached = SK_DIAG_ATTACHED;
}
break;
/* Enter the DIAG mode in the driver. */
case 1:
/* If DiagMode is not active, we can enter it. */
if (!pAC->DiagModeActive) {
case SK_DIAG_RUNNING:
RetCode = SK_PNMI_ERR_OK;
/*
* If DiagAttached is set, we can tell the driver
* to enter the DIAG mode.
*/
if (pAC->Pnmi.DiagAttached == SK_DIAG_ATTACHED) {
/* If DiagMode is not active, we can enter it. */
if (!pAC->DiagModeActive) {
RetCode = SkDrvEnterDiagMode(pAC);
RetCode = SkDrvEnterDiagMode(pAC);
}
else {
RetCode = SK_PNMI_ERR_GENERAL;
}
}
else {
RetCode = SK_PNMI_ERR_GENERAL;
}
if (RetCode == SK_PNMI_ERR_OK) {
pAC->Pnmi.DiagAttached = SK_DIAG_RUNNING;
}
break;
/* Leave the DIAG mode in the driver. */
case 0:
RetCode = SkDrvLeaveDiagMode(pAC);
case SK_DIAG_IDLE:
/* Check if we come from running */
if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
RetCode = SkDrvLeaveDiagMode(pAC);
}
else if (pAC->Pnmi.DiagAttached == SK_DIAG_ATTACHED) {
RetCode = SK_PNMI_ERR_OK;
}
else {
RetCode = SK_PNMI_ERR_GENERAL;
}
if (RetCode == SK_PNMI_ERR_OK) {
pAC->Pnmi.DiagAttached = SK_DIAG_IDLE;
}
break;
default:
......
drivers/net/sk98lin/skgesirq.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skgesirq.c
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.91 $
* Date: $Date: 2003/07/04 12:46:22 $
* Version: $Revision: 1.92 $
* Date: $Date: 2003/09/16 14:37:07 $
* Purpose: Special IRQ module
*
******************************************************************************/
......@@ -27,6 +27,12 @@
* History:
*
* $Log: skgesirq.c,v $
* Revision 1.92 2003/09/16 14:37:07 rschmidt
* Added debug messages in some SkGePortCheckUp...() routines.
* Fixed compiler warnings for different types.
* Avoided port check up in reset state (eg. coma mode).
* Editorial changes.
*
* Revision 1.91 2003/07/04 12:46:22 rschmidt
* Added debug messages in SkGePortCheckUpGmac().
* Added error log message and new driver event SK_DRV_DOWNSHIFT_DET
......@@ -410,7 +416,7 @@
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"@(#) $Id: skgesirq.c,v 1.91 2003/07/04 12:46:22 rschmidt Exp $ (C) Marvell.";
"@(#) $Id: skgesirq.c,v 1.92 2003/09/16 14:37:07 rschmidt Exp $ (C) Marvell.";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
......@@ -490,7 +496,7 @@ int Port) /* Port Index (MAC_1 + n) */
("AutoSensing: First mode %d on Port %d\n",
(int)SK_LMODE_AUTOFULL, Port));
pPrt->PLinkMode = SK_LMODE_AUTOFULL;
pPrt->PLinkMode = (SK_U8)SK_LMODE_AUTOFULL;
return;
} /* SkHWInitDefSense */
......@@ -606,7 +612,7 @@ int Port) /* Port Index (MAC_1 + n) */
/* Reset Port stati */
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_INDETERMINATED;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_INDETERMINATED;
/* Re-init Phy especially when the AutoSense default is set now */
SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
......@@ -655,19 +661,19 @@ int Port) /* Port Index (MAC_1 + n) */
case SK_LSPEED_AUTO:
/* default is 1000 Mbps */
case SK_LSPEED_1000MBPS:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
break;
case SK_LSPEED_100MBPS:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_100MBPS;
break;
case SK_LSPEED_10MBPS:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_10MBPS;
break;
}
/* Set Link Mode Status */
if (pPrt->PLinkMode == SK_LMODE_FULL) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_FULL;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_FULL;
}
else {
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_HALF;
......@@ -1598,8 +1604,7 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
* (clear Page Received bit if set)
*/
SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_EXP, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
return(SK_HW_PS_LINK);
}
......@@ -1870,7 +1875,7 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg: %d, PhyStat: 0x%04X\n", AutoNeg, PhyStat));
("CheckUp Port %d, PhyStat: 0x%04X\n", Port, PhyStat));
SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
......@@ -1897,8 +1902,11 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
if (AutoNeg) {
if ((PhyStat & PHY_ST_AN_OVER) != 0) {
SkHWLinkUp(pAC, IoC, Port);
Done = SkMacAutoNegDone(pAC, IoC, Port);
if (Done != SK_AND_OK) {
#ifdef DEBUG
/* Get PHY parameters, for debugging only */
......@@ -1924,9 +1932,6 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
(void *)NULL);
}
#endif /* DEBUG */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
return(SK_HW_PS_LINK);
}
}
......@@ -1989,9 +1994,22 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
SK_U16 PhySpecStat;/* PHY Specific Status */
SK_U16 ResAb; /* Master/Slave resolution */
SK_EVPARA Para;
#ifdef DEBUG
SK_U16 Word; /* I/O helper */
#endif /* DEBUG */
pPrt = &pAC->GIni.GP[Port];
if (pPrt->PHWLinkUp) {
return(SK_HW_PS_NONE);
}
/* Read PHY Status */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("CheckUp Port %d, PhyStat: 0x%04X\n", Port, PhyStat));
/* Read PHY Interrupt Status */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &PhyIsrc);
......@@ -2005,16 +2023,6 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
("Link Speed Changed, PhyIsrc: 0x%04X\n", PhyIsrc));
}
if (pPrt->PHWLinkUp) {
return(SK_HW_PS_NONE);
}
/* Read PHY Status */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg: %d, PhyStat: 0x%04X\n", AutoNeg, PhyStat));
SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
......@@ -2034,7 +2042,20 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg: %d, PhySpecStat: 0x%04X\n", AutoNeg, PhySpecStat));
("Phy1000BT: 0x%04X, PhySpecStat: 0x%04X\n", ResAb, PhySpecStat));
#ifdef DEBUG
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_EXP, &Word);
if ((PhyIsrc & PHY_M_IS_AN_PR) != 0 || (Word & PHY_ANE_RX_PG) != 0 ||
(PhySpecStat & PHY_M_PS_PAGE_REC) != 0) {
/* Read PHY Next Page Link Partner */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_NEPG_LP, &Word);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Page Received, NextPage: 0x%04X\n", Word));
}
#endif /* DEBUG */
if ((PhySpecStat & PHY_M_PS_LINK_UP) == 0) {
return(SK_HW_PS_NONE);
......@@ -2069,8 +2090,6 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
return(SK_HW_PS_RESTART);
}
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
return(SK_HW_PS_LINK);
}
}
......@@ -2179,8 +2198,6 @@ SK_BOOL AutoNeg) /* Is Auto-negotiation used ? */
* extra link down/ups
*/
SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
return(SK_HW_PS_LINK);
}
}
......@@ -2278,8 +2295,14 @@ SK_EVPARA Para) /* Event specific Parameter */
switch (Event) {
case SK_HWEV_WATIM:
/* Check whether port came up */
PortStat = SkGePortCheckUp(pAC, IoC, (int)Port);
if (pPrt->PState == SK_PRT_RESET) {
PortStat = SK_HW_PS_NONE;
}
else {
/* Check whether port came up */
PortStat = SkGePortCheckUp(pAC, IoC, (int)Port);
}
switch (PortStat) {
case SK_HW_PS_RESTART:
......
drivers/net/sk98lin/ski2c.c
View file @ e06cf18f
/******************************************************************************
*
* Name: ski2c.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.57 $
* Date: $Date: 2003/01/28 09:17:38 $
* Project: Gigabit Ethernet Adapters, TWSI-Module
* Version: $Revision: 1.59 $
* Date: $Date: 2003/10/20 09:07:25 $
* Purpose: Functions to access Voltage and Temperature Sensor
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,6 +27,14 @@
* History:
*
* $Log: ski2c.c,v $
* Revision 1.59 2003/10/20 09:07:25 rschmidt
* Added cast SK_U32 in SkI2cWrite() to avoid compiler warning.
* Editorial changes.
*
* Revision 1.58 2003/09/23 09:22:53 malthoff
* Parameter I2cDevSize added in SkI2cRead and SkI2cWrite to
* support larger devices on the TWSI bus.
*
* Revision 1.57 2003/01/28 09:17:38 rschmidt
* Fixed handling for sensors on YUKON Fiber.
* Editorial changes.
......@@ -224,15 +233,15 @@
* Created. Sources taken from ML Projekt.
* Sources have to be reworked for GE.
*
*
******************************************************************************/
/*
* I2C Protocol
*/
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"$Id: ski2c.c,v 1.57 2003/01/28 09:17:38 rschmidt Exp $";
"@(#) $Id: ski2c.c,v 1.59 2003/10/20 09:07:25 rschmidt Exp $ (C) Marvell. ";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/lm80.h"
......@@ -312,7 +321,7 @@ intro()
{}
#endif
#ifdef SK_DIAG
#ifdef SK_DIAG
/*
* I2C Fast Mode timing values used by the LM80.
* If new devices are added to the I2C bus the timing values have to be checked.
......@@ -516,7 +525,6 @@ SK_IOC IoC) /* I/O Context */
{
/*
* Received bit must be zero.
*
*/
SkI2cSndBit(IoC, 0);
} /* SkI2cSndAck */
......@@ -590,7 +598,7 @@ int Rw) /* Read / Write Flag */
return(SkI2cSndByte(IoC, (Addr<<1) | Rw));
} /* SkI2cSndDev */
#endif /* SK_DIAG */
#endif /* SK_DIAG */
/*----------------- I2C CTRL Register Functions ----------*/
......@@ -620,7 +628,7 @@ int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
SK_I2C_STOP(IoC);
#ifndef SK_DIAG
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
#endif /* !SK_DIAG */
#endif /* !SK_DIAG */
return(1);
}
......@@ -661,15 +669,19 @@ SK_IOC IoC) /* I/O Context */
}
StartTime = SkOsGetTime(pAC);
do {
if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) {
SK_I2C_STOP(IoC);
#ifndef SK_DIAG
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E016, SKERR_I2C_E016MSG);
#endif /* !SK_DIAG */
#endif /* !SK_DIAG */
return;
}
SK_IN32(IoC, B0_ISRC, &IrqSrc);
} while ((IrqSrc & IS_I2C_READY) == 0);
pSen->SenState = SK_SEN_IDLE;
......@@ -687,18 +699,19 @@ SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
SK_U32 I2cData, /* I2C Data to write */
int I2cDev, /* I2C Device Address */
int I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
int I2cReg, /* I2C Device Register Address */
int I2cBurst) /* I2C Burst Flag */
{
SK_OUT32(IoC, B2_I2C_DATA, I2cData);
SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cReg, I2cBurst);
SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cDevSize, I2cReg, I2cBurst);
return(SkI2cWait(pAC, IoC, I2C_WRITE));
} /* SkI2cWrite*/
#ifdef SK_DIAG
/*
* reads a single byte or 4 bytes from the I2C device
*
......@@ -708,23 +721,24 @@ SK_U32 SkI2cRead(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
int I2cDev, /* I2C Device Address */
int I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
int I2cReg, /* I2C Device Register Address */
int I2cBurst) /* I2C Burst Flag */
{
SK_U32 Data;
SK_OUT32(IoC, B2_I2C_DATA, 0);
SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cReg, I2cBurst);
SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cDevSize, I2cReg, I2cBurst);
if (SkI2cWait(pAC, IoC, I2C_READ) != 0) {
w_print("%s\n", SKERR_I2C_E002MSG);
}
SK_IN32(IoC, B2_I2C_DATA, &Data);
return(Data);
} /* SkI2cRead */
#endif /* SK_DIAG */
#endif /* SK_DIAG */
/*
......@@ -745,9 +759,10 @@ SK_SENSOR *pSen) /* Sensor to be read */
if (pSen->SenRead != NULL) {
return((*pSen->SenRead)(pAC, IoC, pSen));
}
else
else {
return(0); /* no success */
} /* SkI2cReadSensor*/
}
} /* SkI2cReadSensor */
/*
* Do the Init state 0 initialization
......@@ -761,12 +776,12 @@ SK_AC *pAC) /* Adapter Context */
pAC->I2c.CurrSens = 0;
/* Begin with timeout control for state machine */
pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
/* Set sensor number to zero */
pAC->I2c.MaxSens = 0;
#ifndef SK_DIAG
#ifndef SK_DIAG
/* Initialize Number of Dummy Reads */
pAC->I2c.DummyReads = SK_MAX_SENSORS;
#endif
......@@ -840,19 +855,20 @@ SK_IOC IoC) /* I/O Context */
}
/* Check for 64 Bit Yukon without sensors */
if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_CFG, 0) != 0) {
if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_CFG, 0) != 0) {
return(0);
}
(void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_1, 0);
(void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_1, 0);
(void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_2, 0);
(void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_2, 0);
(void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_FAN_CTRL, 0);
(void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_FAN_CTRL, 0);
(void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_TEMP_CTRL, 0);
(void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_TEMP_CTRL, 0);
(void)SkI2cWrite(pAC, IoC, LM80_CFG_START, LM80_ADDR, LM80_CFG, 0);
(void)SkI2cWrite(pAC, IoC, (SK_U32)LM80_CFG_START, LM80_ADDR, I2C_025K_DEV,
LM80_CFG, 0);
/*
* MaxSens has to be updated here, because PhyType is not
......@@ -957,7 +973,7 @@ SK_IOC IoC) /* I/O Context */
pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
}
else {
pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC-Co 1V5";
pAC->I2c.SenTable[i].SenDesc = "Voltage Core 1V5";
pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
......@@ -1015,9 +1031,9 @@ SK_IOC IoC) /* I/O Context */
pAC->I2c.SenTable[i].SenDev = LM80_ADDR;
}
#ifndef SK_DIAG
#ifndef SK_DIAG
pAC->I2c.DummyReads = pAC->I2c.MaxSens;
#endif /* !SK_DIAG */
#endif /* !SK_DIAG */
/* Clear I2C IRQ */
SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
......@@ -1208,15 +1224,13 @@ SK_SENSOR *pSen)
pSen->SenLastErrLogTS = CurrTime;
if (pSen->SenType == SK_SEN_TEMP) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E011,
SKERR_I2C_E011MSG);
} else if (pSen->SenType == SK_SEN_VOLT) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E012,
SKERR_I2C_E012MSG);
} else
{
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E015,
SKERR_I2C_E015MSG);
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E011, SKERR_I2C_E011MSG);
}
else if (pSen->SenType == SK_SEN_VOLT) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E012, SKERR_I2C_E012MSG);
}
else {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E015, SKERR_I2C_E015MSG);
}
}
}
......@@ -1235,8 +1249,7 @@ SK_SENSOR *pSen)
/* This state is the former one */
/* So check first whether we have to send a trap */
if (pSen->SenLastWarnTrapTS + SK_SEN_WARN_TR_HOLD >
CurrTime) {
if (pSen->SenLastWarnTrapTS + SK_SEN_WARN_TR_HOLD > CurrTime) {
/*
* Do NOT send the Trap. The hold back time
* has to run out first.
......@@ -1245,8 +1258,7 @@ SK_SENSOR *pSen)
}
/* Check now whether we have to log an Error */
if (pSen->SenLastWarnLogTS + SK_SEN_WARN_LOG_HOLD >
CurrTime) {
if (pSen->SenLastWarnLogTS + SK_SEN_WARN_LOG_HOLD > CurrTime) {
/*
* Do NOT log the error. The hold back time
* has to run out first.
......@@ -1277,15 +1289,13 @@ SK_SENSOR *pSen)
pSen->SenLastWarnLogTS = CurrTime;
if (pSen->SenType == SK_SEN_TEMP) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E009,
SKERR_I2C_E009MSG);
} else if (pSen->SenType == SK_SEN_VOLT) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E010,
SKERR_I2C_E010MSG);
} else
{
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E014,
SKERR_I2C_E014MSG);
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E009, SKERR_I2C_E009MSG);
}
else if (pSen->SenType == SK_SEN_VOLT) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E010, SKERR_I2C_E010MSG);
}
else {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E014, SKERR_I2C_E014MSG);
}
}
}
......@@ -1317,7 +1327,7 @@ SK_SENSOR *pSen)
}
}
#if 0
#ifdef TEST_ONLY
/* Dynamic thresholds also for VAUX of LM80 sensor */
if (pSen->SenInit == SK_SEN_DYN_INIT_VAUX) {
......@@ -1359,7 +1369,7 @@ SK_SENSOR *pSen)
if (pSen->SenInit != SK_SEN_DYN_INIT_NONE) {
SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E013, SKERR_I2C_E013MSG);
}
} /* SkI2cCheckSensor*/
} /* SkI2cCheckSensor */
/*
......@@ -1390,7 +1400,7 @@ SK_EVPARA Para) /* Event specific Parameter */
if (ReadComplete) {
/* Check sensor against defined thresholds */
SkI2cCheckSensor (pAC, pSen);
SkI2cCheckSensor(pAC, pSen);
/* Increment Current sensor and set appropriate Timeout */
pAC->I2c.CurrSens++;
......@@ -1414,7 +1424,7 @@ SK_EVPARA Para) /* Event specific Parameter */
/* Start Timer */
ParaLocal.Para64 = (SK_U64)0;
pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, SK_I2C_TIM_WATCH,
SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
......@@ -1431,7 +1441,7 @@ SK_EVPARA Para) /* Event specific Parameter */
if (ReadComplete) {
/* Check sensor against defined thresholds */
SkI2cCheckSensor (pAC, pSen);
SkI2cCheckSensor(pAC, pSen);
/* Increment Current sensor and set appropriate Timeout */
pAC->I2c.CurrSens++;
......@@ -1496,4 +1506,4 @@ SK_EVPARA Para) /* Event specific Parameter */
return(0);
} /* SkI2cEvent*/
#endif /* !SK_DIAG */
#endif /* !SK_DIAG */
drivers/net/sk98lin/sklm80.c
View file @ e06cf18f
/******************************************************************************
*
* Name: sklm80.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.20 $
* Date: $Date: 2002/08/13 09:16:27 $
* Purpose: Funktions to access Voltage and Temperature Sensor (LM80)
* Project: Gigabit Ethernet Adapters, TWSI-Module
* Version: $Revision: 1.22 $
* Date: $Date: 2003/10/20 09:08:21 $
* Purpose: Functions to access Voltage and Temperature Sensor (LM80)
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -26,15 +27,21 @@
* History:
*
* $Log: sklm80.c,v $
* Revision 1.22 2003/10/20 09:08:21 rschmidt
* Editorial changes.
*
* Revision 1.21 2003/09/23 09:29:04 malthoff
* Parameter Dev_Size added to macro SK_I2C_CTL.
*
* Revision 1.20 2002/08/13 09:16:27 rschmidt
* Changed return value for SkLm80ReadSensor() back to 'int'
* Editorial changes
* Editorial changes.
*
* Revision 1.19 2002/08/06 09:43:31 jschmalz
* Extensions and changes for Yukon
* Extensions and changes for Yukon.
*
* Revision 1.18 2002/08/02 12:26:57 rschmidt
* Editorial changes
* Editorial changes.
*
* Revision 1.17 1999/11/22 13:35:51 cgoos
* Changed license header to GPL.
......@@ -93,16 +100,15 @@
* Revision 1.1 1998/07/17 09:57:12 gklug
* initial version
*
*
*
******************************************************************************/
/*
LM80 functions
*/
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"$Id: sklm80.c,v 1.20 2002/08/13 09:16:27 rschmidt Exp $" ;
"@(#) $Id: sklm80.c,v 1.22 2003/10/20 09:08:21 rschmidt Exp $ (C) Marvell. ";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
#include "h/lm80.h"
......@@ -202,7 +208,7 @@ SK_SENSOR *pSen) /* Sensor to be read */
switch (pSen->SenState) {
case SK_SEN_IDLE:
/* Send address to ADDR register */
SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, pSen->SenReg, 0);
SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, I2C_025K_DEV, pSen->SenReg, 0);
pSen->SenState = SK_SEN_VALUE ;
BREAK_OR_WAIT(pAC, IoC, I2C_READ);
......@@ -250,7 +256,7 @@ SK_SENSOR *pSen) /* Sensor to be read */
(pSen->SenValue % SK_LM80_TEMP_LSB);
/* Send address to ADDR register */
SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, LM80_TEMP_CTRL, 0);
SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, I2C_025K_DEV, LM80_TEMP_CTRL, 0);
pSen->SenState = SK_SEN_VALEXT ;
BREAK_OR_WAIT(pAC, IoC, I2C_READ);
......@@ -284,3 +290,4 @@ SK_SENSOR *pSen) /* Sensor to be read */
/* Not completed */
return(0);
}
drivers/net/sk98lin/skproc.c
View file @ e06cf18f
/******************************************************************************
*
* Name: skproc.c
* Name: skproc.c
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.2 $
* Date: $Date: 2003/08/12 16:45:29 $
* Version: $Revision: 1.11 $
* Date: $Date: 2003/12/11 16:03:57 $
* Purpose: Funktions to display statictic data
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -28,6 +29,33 @@
* History:
*
* $Log: skproc.c,v $
* Revision 1.11 2003/12/11 16:03:57 mlindner
* Fix: Create backup from pnmi data structure
*
* Revision 1.10 2003/11/19 16:25:36 mlindner
* Fix: Print output as 64-bit digit
*
* Revision 1.9 2003/11/17 13:29:05 mlindner
* Fix: Editorial changes
*
* Revision 1.8 2003/11/13 14:18:48 rroesler
* Fix: added latest changes regarding the use of the proc system
*
* Revision 1.7 2003/11/10 09:35:07 rroesler
* Fix: diag backup restore of PNMI structure
*
* Revision 1.6 2003/11/07 17:31:39 rroesler
* Add: security counter for the proc file system
*
* Revision 1.5 2003/10/07 08:17:08 mlindner
* Fix: Copyright changes
*
* Revision 1.4 2003/09/01 15:29:24 mlindner
* Fix: Editorial changes
*
* Revision 1.3 2003/08/29 12:30:58 mlindner
* Add: Version entry in the proc file system
*
* Revision 1.2 2003/08/12 16:45:29 mlindner
* Add: Removed SkNumber and SkDoDiv
* Add: Counter output as (unsigned long long)
......@@ -94,223 +122,350 @@
#include "h/skdrv1st.h"
#include "h/skdrv2nd.h"
#include "h/skversion.h"
#ifdef CONFIG_PROC_FS
extern struct SK_NET_DEVICE *SkGeRootDev;
static int sk_proc_print(void *writePtr, char *format, ...);
static void sk_gen_browse(void *buffer);
int len;
extern struct net_device *SkGeRootDev;
static int sk_seq_show(struct seq_file *seq, void *v);
static int sk_proc_open(struct inode *inode, struct file *file);
struct file_operations sk_proc_fops = {
.owner = THIS_MODULE,
.open = sk_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
struct net_device *currDev = NULL;
static int sk_seq_show(struct seq_file *seq, void *v)
/*****************************************************************************
*
* sk_gen_browse -generic print "summaries" entry
*
* Description:
* This function fills the proc entry with statistic data about
* the ethernet device.
*
* Returns: -
*
*/
static void sk_gen_browse(void *buffer)
{
struct net_device *dev = seq->private;
DEV_NET *pNet = dev->priv;
SK_AC *pAC = pNet->pAC;
SK_PNMI_STRUCT_DATA *pPnmiStruct = &pAC->PnmiStruct;
SK_PNMI_STAT *pPnmiStat = &pPnmiStruct->Stat[0];
int unit = !(pAC->dev[0] == dev);
int i;
char sens_msg[50];
struct SK_NET_DEVICE *SkgeProcDev = SkGeRootDev;
struct SK_NET_DEVICE *next;
SK_PNMI_STRUCT_DATA *pPnmiStruct;
SK_PNMI_STAT *pPnmiStat;
unsigned long Flags;
unsigned int Size;
DEV_NET *pNet;
SK_AC *pAC;
char sens_msg[50];
int MaxSecurityCount = 0;
int t;
int i;
while (SkgeProcDev) {
MaxSecurityCount++;
if (MaxSecurityCount > 100) {
printk("Max limit for sk_proc_read security counter!\n");
return;
}
pNet = (DEV_NET*) SkgeProcDev->priv;
pAC = pNet->pAC;
next = pAC->Next;
pPnmiStruct = &pAC->PnmiStruct;
/* NetIndex in GetStruct is now required, zero is only dummy */
for (t=pAC->GIni.GIMacsFound; t > 0; t--) {
if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 1)
t--;
seq_printf(seq,
"\nDetailed statistic for device %s\n",
dev->name);
seq_printf(seq,
"=======================================\n");
spin_lock_irqsave(&pAC->SlowPathLock, Flags);
Size = SK_PNMI_STRUCT_SIZE;
#ifdef SK_DIAG_SUPPORT
if (pAC->BoardLevel == SK_INIT_DATA) {
SK_MEMCPY(&(pAC->PnmiStruct), &(pAC->PnmiBackup), sizeof(SK_PNMI_STRUCT_DATA));
if (pAC->DiagModeActive == DIAG_NOTACTIVE) {
pAC->Pnmi.DiagAttached = SK_DIAG_IDLE;
}
} else {
SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, t-1);
}
#else
SkPnmiGetStruct(pAC, pAC->IoBase,
pPnmiStruct, &Size, t-1);
#endif
spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
/* Board statistics */
seq_printf(seq,
"\nBoard statistics\n\n");
seq_printf(seq,
"Active Port %c\n",
'A' + pAC->Rlmt.Net[unit].Port[pAC->Rlmt.
Net[unit].PrefPort]->PortNumber);
seq_printf(seq,
"Preferred Port %c\n",
'A' + pAC->Rlmt.Net[unit].Port[pAC->Rlmt.
Net[unit].PrefPort]->PortNumber);
if (strcmp(pAC->dev[t-1]->name, currDev->name) == 0) {
pPnmiStat = &pPnmiStruct->Stat[0];
len = sk_proc_print(buffer,
"\nDetailed statistic for device %s\n",
pAC->dev[t-1]->name);
len += sk_proc_print(buffer,
"=======================================\n");
/* Board statistics */
len += sk_proc_print(buffer,
"\nBoard statistics\n\n");
len += sk_proc_print(buffer,
"Active Port %c\n",
'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
Net[t-1].PrefPort]->PortNumber);
len += sk_proc_print(buffer,
"Preferred Port %c\n",
'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
Net[t-1].PrefPort]->PortNumber);
seq_printf(seq,
"Bus speed (MHz) %d\n",
pPnmiStruct->BusSpeed);
len += sk_proc_print(buffer,
"Bus speed (MHz) %d\n",
pPnmiStruct->BusSpeed);
seq_printf(seq,
"Bus width (Bit) %d\n",
pPnmiStruct->BusWidth);
seq_printf(seq,
"Hardware revision v%d.%d\n",
(pAC->GIni.GIPciHwRev >> 4) & 0x0F,
pAC->GIni.GIPciHwRev & 0x0F);
len += sk_proc_print(buffer,
"Bus width (Bit) %d\n",
pPnmiStruct->BusWidth);
len += sk_proc_print(buffer,
"Driver version %s\n",
VER_STRING);
len += sk_proc_print(buffer,
"Hardware revision v%d.%d\n",
(pAC->GIni.GIPciHwRev >> 4) & 0x0F,
pAC->GIni.GIPciHwRev & 0x0F);
/* Print sensor informations */
for (i=0; i < pAC->I2c.MaxSens; i ++) {
/* Check type */
switch (pAC->I2c.SenTable[i].SenType) {
case 1:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (C)");
seq_printf(seq,
"%-25s %d.%02d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue / 10,
pAC->I2c.SenTable[i].SenValue % 10);
/* Print sensor informations */
for (i=0; i < pAC->I2c.MaxSens; i ++) {
/* Check type */
switch (pAC->I2c.SenTable[i].SenType) {
case 1:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (C)");
len += sk_proc_print(buffer,
"%-25s %d.%02d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue / 10,
pAC->I2c.SenTable[i].SenValue % 10);
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (F)");
seq_printf(seq,
"%-25s %d.%02d\n",
sens_msg,
((((pAC->I2c.SenTable[i].SenValue)
*10)*9)/5 + 3200)/100,
((((pAC->I2c.SenTable[i].SenValue)
*10)*9)/5 + 3200) % 10);
break;
case 2:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (V)");
seq_printf(seq,
"%-25s %d.%03d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue / 1000,
pAC->I2c.SenTable[i].SenValue % 1000);
break;
case 3:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (rpm)");
seq_printf(seq,
"%-25s %d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue);
break;
default:
break;
}
}
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (F)");
len += sk_proc_print(buffer,
"%-25s %d.%02d\n",
sens_msg,
((((pAC->I2c.SenTable[i].SenValue)
*10)*9)/5 + 3200)/100,
((((pAC->I2c.SenTable[i].SenValue)
*10)*9)/5 + 3200) % 10);
break;
case 2:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (V)");
len += sk_proc_print(buffer,
"%-25s %d.%03d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue / 1000,
pAC->I2c.SenTable[i].SenValue % 1000);
break;
case 3:
strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
strcat(sens_msg, " (rpm)");
len += sk_proc_print(buffer,
"%-25s %d\n",
sens_msg,
pAC->I2c.SenTable[i].SenValue);
break;
default:
break;
}
}
/*Receive statistics */
seq_printf(seq,
"\nReceive statistics\n\n");
/*Receive statistics */
len += sk_proc_print(buffer,
"\nReceive statistics\n\n");
seq_printf(seq,
"Received bytes %Ld\n",
(unsigned long long) pPnmiStat->StatRxOctetsOkCts);
seq_printf(seq,
"Received packets %Ld\n",
(unsigned long long) pPnmiStat->StatRxOkCts);
len += sk_proc_print(buffer,
"Received bytes %Lu\n",
(unsigned long long) pPnmiStat->StatRxOctetsOkCts);
len += sk_proc_print(buffer,
"Received packets %Lu\n",
(unsigned long long) pPnmiStat->StatRxOkCts);
#if 0
if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
pAC->HWRevision < 12) {
pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
pPnmiStat->StatRxShortsCts;
pPnmiStat->StatRxShortsCts = 0;
}
if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
pAC->HWRevision < 12) {
pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
pPnmiStat->StatRxShortsCts;
pPnmiStat->StatRxShortsCts = 0;
}
#endif
if (pNet->Mtu > 1500)
pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
pPnmiStat->StatRxTooLongCts;
if (pNet->Mtu > 1500)
pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
pPnmiStat->StatRxTooLongCts;
seq_printf(seq,
"Receive errors %Ld\n",
(unsigned long long) pPnmiStruct->InErrorsCts);
seq_printf(seq,
"Receive dropped %Ld\n",
(unsigned long long) pPnmiStruct->RxNoBufCts);
seq_printf(seq,
"Received multicast %Ld\n",
(unsigned long long) pPnmiStat->StatRxMulticastOkCts);
seq_printf(seq,
"Receive error types\n");
seq_printf(seq,
" length %Ld\n",
(unsigned long long) pPnmiStat->StatRxRuntCts);
seq_printf(seq,
" buffer overflow %Ld\n",
(unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
seq_printf(seq,
" bad crc %Ld\n",
(unsigned long long) pPnmiStat->StatRxFcsCts);
seq_printf(seq,
" framing %Ld\n",
(unsigned long long) pPnmiStat->StatRxFramingCts);
seq_printf(seq,
" missed frames %Ld\n",
(unsigned long long) pPnmiStat->StatRxMissedCts);
len += sk_proc_print(buffer,
"Receive errors %Lu\n",
(unsigned long long) pPnmiStruct->InErrorsCts);
len += sk_proc_print(buffer,
"Receive dropped %Lu\n",
(unsigned long long) pPnmiStruct->RxNoBufCts);
len += sk_proc_print(buffer,
"Received multicast %Lu\n",
(unsigned long long) pPnmiStat->StatRxMulticastOkCts);
len += sk_proc_print(buffer,
"Receive error types\n");
len += sk_proc_print(buffer,
" length %Lu\n",
(unsigned long long) pPnmiStat->StatRxRuntCts);
len += sk_proc_print(buffer,
" buffer overflow %Lu\n",
(unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
len += sk_proc_print(buffer,
" bad crc %Lu\n",
(unsigned long long) pPnmiStat->StatRxFcsCts);
len += sk_proc_print(buffer,
" framing %Lu\n",
(unsigned long long) pPnmiStat->StatRxFramingCts);
len += sk_proc_print(buffer,
" missed frames %Lu\n",
(unsigned long long) pPnmiStat->StatRxMissedCts);
if (pNet->Mtu > 1500)
pPnmiStat->StatRxTooLongCts = 0;
if (pNet->Mtu > 1500)
pPnmiStat->StatRxTooLongCts = 0;
seq_printf(seq,
" too long %Ld\n",
(unsigned long long) pPnmiStat->StatRxTooLongCts);
seq_printf(seq,
" carrier extension %Ld\n",
(unsigned long long) pPnmiStat->StatRxCextCts);
seq_printf(seq,
" too short %Ld\n",
(unsigned long long) pPnmiStat->StatRxShortsCts);
seq_printf(seq,
" symbol %Ld\n",
(unsigned long long) pPnmiStat->StatRxSymbolCts);
seq_printf(seq,
" LLC MAC size %Ld\n",
(unsigned long long) pPnmiStat->StatRxIRLengthCts);
seq_printf(seq,
" carrier event %Ld\n",
(unsigned long long) pPnmiStat->StatRxCarrierCts);
seq_printf(seq,
" jabber %Ld\n",
(unsigned long long) pPnmiStat->StatRxJabberCts);
len += sk_proc_print(buffer,
" too long %Lu\n",
(unsigned long long) pPnmiStat->StatRxTooLongCts);
len += sk_proc_print(buffer,
" carrier extension %Lu\n",
(unsigned long long) pPnmiStat->StatRxCextCts);
len += sk_proc_print(buffer,
" too short %Lu\n",
(unsigned long long) pPnmiStat->StatRxShortsCts);
len += sk_proc_print(buffer,
" symbol %Lu\n",
(unsigned long long) pPnmiStat->StatRxSymbolCts);
len += sk_proc_print(buffer,
" LLC MAC size %Lu\n",
(unsigned long long) pPnmiStat->StatRxIRLengthCts);
len += sk_proc_print(buffer,
" carrier event %Lu\n",
(unsigned long long) pPnmiStat->StatRxCarrierCts);
len += sk_proc_print(buffer,
" jabber %Lu\n",
(unsigned long long) pPnmiStat->StatRxJabberCts);
/*Transmit statistics */
seq_printf(seq,
"\nTransmit statistics\n\n");
/*Transmit statistics */
len += sk_proc_print(buffer,
"\nTransmit statistics\n\n");
seq_printf(seq,
"Transmited bytes %Ld\n",
(unsigned long long) pPnmiStat->StatTxOctetsOkCts);
seq_printf(seq,
"Transmited packets %Ld\n",
(unsigned long long) pPnmiStat->StatTxOkCts);
seq_printf(seq,
"Transmit errors %Ld\n",
(unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
seq_printf(seq,
"Transmit dropped %Ld\n",
(unsigned long long) pPnmiStruct->TxNoBufCts);
seq_printf(seq,
"Transmit collisions %Ld\n",
(unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
seq_printf(seq,
"Transmit error types\n");
seq_printf(seq,
" excessive collision %ld\n",
pAC->stats.tx_aborted_errors);
seq_printf(seq,
" carrier %Ld\n",
(unsigned long long) pPnmiStat->StatTxCarrierCts);
seq_printf(seq,
" fifo underrun %Ld\n",
(unsigned long long) pPnmiStat->StatTxFifoUnderrunCts);
seq_printf(seq,
" heartbeat %Ld\n",
(unsigned long long) pPnmiStat->StatTxCarrierCts);
seq_printf(seq,
" window %ld\n",
pAC->stats.tx_window_errors);
len += sk_proc_print(buffer,
"Transmited bytes %Lu\n",
(unsigned long long) pPnmiStat->StatTxOctetsOkCts);
len += sk_proc_print(buffer,
"Transmited packets %Lu\n",
(unsigned long long) pPnmiStat->StatTxOkCts);
len += sk_proc_print(buffer,
"Transmit errors %Lu\n",
(unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
len += sk_proc_print(buffer,
"Transmit dropped %Lu\n",
(unsigned long long) pPnmiStruct->TxNoBufCts);
len += sk_proc_print(buffer,
"Transmit collisions %Lu\n",
(unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
len += sk_proc_print(buffer,
"Transmit error types\n");
len += sk_proc_print(buffer,
" excessive collision %ld\n",
pAC->stats.tx_aborted_errors);
len += sk_proc_print(buffer,
" carrier %Lu\n",
(unsigned long long) pPnmiStat->StatTxCarrierCts);
len += sk_proc_print(buffer,
" fifo underrun %Lu\n",
(unsigned long long) pPnmiStat->StatTxFifoUnderrunCts);
len += sk_proc_print(buffer,
" heartbeat %Lu\n",
(unsigned long long) pPnmiStat->StatTxCarrierCts);
len += sk_proc_print(buffer,
" window %ld\n",
pAC->stats.tx_window_errors);
return 0;
} /* if (strcmp(pACname, currDeviceName) == 0) */
}
SkgeProcDev = next;
}
}
/*****************************************************************************
*
* sk_proc_print -generic line print
*
* Description:
* This function fills the proc entry with statistic data about
* the ethernet device.
*
* Returns: number of bytes written
*
*/
static int sk_proc_print(void *writePtr, char *format, ...)
{
#define MAX_LEN_SINGLE_LINE 256
char str[MAX_LEN_SINGLE_LINE];
va_list a_start;
int lenght = 0;
struct seq_file *seq = (struct seq_file *) writePtr;
SK_MEMSET(str, 0, MAX_LEN_SINGLE_LINE);
va_start(a_start, format);
vsprintf(str, format, a_start);
va_end(a_start);
lenght = strlen(str);
seq_printf(seq, str);
return lenght;
}
/*****************************************************************************
*
* sk_seq_show - show proc information of a particular adapter
*
* Description:
* This function fills the proc entry with statistic data about
* the ethernet device. It invokes the generic sk_gen_browse() to
* print out all items one per one.
*
* Returns: number of bytes written
*
*/
static int sk_seq_show(struct seq_file *seq, void *v)
{
void *castedBuffer = (void *) seq;
currDev = seq->private;
sk_gen_browse(castedBuffer);
return 0;
}
/*****************************************************************************
*
* sk_proc_open - register the show function when proc is open'ed
*
* Description:
* This function is called whenever a sk98lin proc file is queried.
*
* Returns: the return value of single_open()
*
*/
static int sk_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, sk_seq_show, PDE(inode)->data);
return single_open(file, sk_seq_show, PDE(inode)->data);
}
struct file_operations sk_proc_fops = {
.owner = THIS_MODULE,
.open = sk_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
#endif
/*******************************************************************************
*
* End of file
*
******************************************************************************/
drivers/net/sk98lin/skqueue.c
View file @ e06cf18f
/******************************************************************************
*
* Name: skqueue.c
* Project: Gigabit Ethernet Adapters, Schedule-Modul
* Version: $Revision: 1.19 $
* Date: $Date: 2003/05/13 18:00:07 $
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.20 $
* Date: $Date: 2003/09/16 13:44:00 $
* Purpose: Management of an event queue.
*
******************************************************************************/
......@@ -27,6 +27,10 @@
* History:
*
* $Log: skqueue.c,v $
* Revision 1.20 2003/09/16 13:44:00 rschmidt
* Added (C) Marvell to SysKonnectFileId
* Editorial changes
*
* Revision 1.19 2003/05/13 18:00:07 mkarl
* Removed calls to RLMT, TWSI, and PNMI for SLIM driver (SK_SLIM).
* Editorial changes.
......@@ -85,18 +89,16 @@
*
* Revision 1.1 1998/07/30 15:14:01 gklug
* Initial version. Adapted from SMT
*
*
*
******************************************************************************/
/*
Event queue and dispatcher
*/
* Event queue and dispatcher
*/
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"$Header: /usr56/projects/ge/schedule/skqueue.c,v 1.19 2003/05/13 18:00:07 mkarl Exp $" ;
"@(#) $Id: skqueue.c,v 1.20 2003/09/16 13:44:00 rschmidt Exp $ (C) Marvell.";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
......@@ -124,11 +126,11 @@ intro()
void SkEventInit(
SK_AC *pAC, /* Adapter context */
SK_IOC Ioc, /* IO context */
int Level) /* Init level */
int Level) /* Init level */
{
switch (Level) {
case SK_INIT_DATA:
pAC->Event.EvPut = pAC->Event.EvGet = pAC->Event.EvQueue ;
pAC->Event.EvPut = pAC->Event.EvGet = pAC->Event.EvQueue;
break;
default:
break;
......@@ -144,14 +146,15 @@ SK_U32 Class, /* Event Class */
SK_U32 Event, /* Event to be queued */
SK_EVPARA Para) /* Event parameter */
{
pAC->Event.EvPut->Class = Class ;
pAC->Event.EvPut->Event = Event ;
pAC->Event.EvPut->Para = Para ;
pAC->Event.EvPut->Class = Class;
pAC->Event.EvPut->Event = Event;
pAC->Event.EvPut->Para = Para;
if (++pAC->Event.EvPut == &pAC->Event.EvQueue[SK_MAX_EVENT])
pAC->Event.EvPut = pAC->Event.EvQueue ;
pAC->Event.EvPut = pAC->Event.EvQueue;
if (pAC->Event.EvPut == pAC->Event.EvGet) {
SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E001, SKERR_Q_E001MSG) ;
SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E001, SKERR_Q_E001MSG);
}
}
......@@ -168,77 +171,79 @@ int SkEventDispatcher(
SK_AC *pAC, /* Adapters Context */
SK_IOC Ioc) /* Io context */
{
SK_EVENTELEM *pEv ; /* pointer into queue */
SK_U32 Class ;
int Rtv ;
pEv = pAC->Event.EvGet ;
PRINTF("dispatch get %x put %x\n",pEv,pAC->Event.ev_put) ;
SK_EVENTELEM *pEv; /* pointer into queue */
SK_U32 Class;
int Rtv;
pEv = pAC->Event.EvGet;
PRINTF("dispatch get %x put %x\n", pEv, pAC->Event.ev_put);
while (pEv != pAC->Event.EvPut) {
PRINTF("dispatch Class %d Event %d\n",pEv->Class,pEv->Event) ;
switch(Class = pEv->Class) {
PRINTF("dispatch Class %d Event %d\n", pEv->Class, pEv->Event);
switch (Class = pEv->Class) {
#ifndef SK_USE_LAC_EV
#ifndef SK_SLIM
case SKGE_RLMT : /* RLMT Event */
Rtv = SkRlmtEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
case SKGE_I2C : /* I2C Event */
Rtv = SkI2cEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
case SKGE_PNMI :
Rtv = SkPnmiEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
case SKGE_RLMT: /* RLMT Event */
Rtv = SkRlmtEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
case SKGE_I2C: /* I2C Event */
Rtv = SkI2cEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
case SKGE_PNMI: /* PNMI Event */
Rtv = SkPnmiEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#endif /* not SK_SLIM */
#endif /* not SK_USE_LAC_EV */
case SKGE_DRV : /* Driver Event */
Rtv = SkDrvEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
#ifndef SK_USE_SW_TIMER
case SKGE_HWAC :
Rtv = SkGeSirqEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
case SKGE_DRV: /* Driver Event */
Rtv = SkDrvEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#ifndef SK_USE_SW_TIMER
case SKGE_HWAC:
Rtv = SkGeSirqEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#else /* !SK_USE_SW_TIMER */
case SKGE_SWT :
Rtv = SkSwtEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
case SKGE_SWT :
Rtv = SkSwtEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#endif /* !SK_USE_SW_TIMER */
#ifdef SK_USE_LAC_EV
#ifdef SK_USE_LAC_EV
case SKGE_LACP :
Rtv = SkLacpEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
Rtv = SkLacpEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
case SKGE_RSF :
Rtv = SkRsfEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
Rtv = SkRsfEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
case SKGE_MARKER :
Rtv = SkMarkerEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
Rtv = SkMarkerEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
case SKGE_FD :
Rtv = SkFdEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
Rtv = SkFdEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#endif /* SK_USE_LAC_EV */
#ifdef SK_USE_CSUM
case SKGE_CSUM :
Rtv = SkCsEvent(pAC,Ioc,pEv->Event,pEv->Para);
break ;
Rtv = SkCsEvent(pAC, Ioc, pEv->Event, pEv->Para);
break;
#endif /* SK_USE_CSUM */
default :
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_Q_E002,
SKERR_Q_E002MSG) ;
SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_Q_E002, SKERR_Q_E002MSG);
Rtv = 0;
}
if (Rtv != 0) {
return(Rtv) ;
return(Rtv);
}
if (++pEv == &pAC->Event.EvQueue[SK_MAX_EVENT])
pEv = pAC->Event.EvQueue ;
pEv = pAC->Event.EvQueue;
/* Renew get: it is used in queue_events to detect overruns */
pAC->Event.EvGet = pEv;
}
return(0) ;
return(0);
}
/* End of file */
drivers/net/sk98lin/sktimer.c
View file @ e06cf18f
/******************************************************************************
*
* Name: sktimer.c
* Project: Gigabit Ethernet Adapters, Schedule-Modul
* Version: $Revision: 1.13 $
* Date: $Date: 2003/05/13 18:01:01 $
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.14 $
* Date: $Date: 2003/09/16 13:46:51 $
* Purpose: High level timer functions.
*
******************************************************************************/
......@@ -27,6 +27,10 @@
* History:
*
* $Log: sktimer.c,v $
* Revision 1.14 2003/09/16 13:46:51 rschmidt
* Added (C) Marvell to SysKonnectFileId
* Editorial changes
*
* Revision 1.13 2003/05/13 18:01:01 mkarl
* Editorial changes.
*
......@@ -68,19 +72,16 @@
*
* Revision 1.1 1998/08/05 11:27:55 gklug
* first version: adapted from SMT
*
*
*
*
******************************************************************************/
/*
Event queue and dispatcher
*/
* Event queue and dispatcher
*/
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"$Header: /usr56/projects/ge/schedule/sktimer.c,v 1.13 2003/05/13 18:01:01 mkarl Exp $" ;
"@(#) $Id: sktimer.c,v 1.14 2003/09/16 13:46:51 rschmidt Exp $ (C) Marvell.";
#endif
#include "h/skdrv1st.h" /* Driver Specific Definitions */
......@@ -110,14 +111,14 @@ static void timer_done(SK_AC *pAC,SK_IOC Ioc,int Restart);
void SkTimerInit(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc, /* IoContext */
int Level) /* Init Level */
int Level) /* Init Level */
{
switch (Level) {
case SK_INIT_DATA:
pAC->Tim.StQueue = 0 ;
pAC->Tim.StQueue = 0;
break;
case SK_INIT_IO:
SkHwtInit(pAC,Ioc) ;
SkHwtInit(pAC, Ioc);
SkTimerDone(pAC, Ioc);
break;
default:
......@@ -134,31 +135,34 @@ SK_AC *pAC, /* Adapters context */
SK_IOC Ioc, /* IoContext */
SK_TIMER *pTimer) /* Timer Pointer to be started */
{
SK_TIMER **ppTimPrev ;
SK_TIMER *pTm ;
SK_TIMER **ppTimPrev;
SK_TIMER *pTm;
/*
* remove timer from queue
*/
pTimer->TmActive = SK_FALSE ;
pTimer->TmActive = SK_FALSE;
if (pAC->Tim.StQueue == pTimer && !pTimer->TmNext) {
SkHwtStop(pAC,Ioc) ;
SkHwtStop(pAC, Ioc);
}
for (ppTimPrev = &pAC->Tim.StQueue ; (pTm = *ppTimPrev) ;
for (ppTimPrev = &pAC->Tim.StQueue; (pTm = *ppTimPrev);
ppTimPrev = &pTm->TmNext ) {
if (pTm == pTimer) {
/*
* Timer found in queue
* - dequeue it and
* - correct delta of the next timer
*/
*ppTimPrev = pTm->TmNext ;
*ppTimPrev = pTm->TmNext;
if (pTm->TmNext) {
/* correct delta of next timer in queue */
pTm->TmNext->TmDelta += pTm->TmDelta ;
pTm->TmNext->TmDelta += pTm->TmDelta;
}
return ;
return;
}
}
}
......@@ -175,65 +179,67 @@ SK_U32 Class, /* Event Class for this timer */
SK_U32 Event, /* Event Value for this timer */
SK_EVPARA Para) /* Event Parameter for this timer */
{
SK_TIMER **ppTimPrev ;
SK_TIMER *pTm ;
SK_U32 Delta ;
SK_TIMER **ppTimPrev;
SK_TIMER *pTm;
SK_U32 Delta;
Time /= 16 ; /* input is uS, clock ticks are 16uS */
Time /= 16; /* input is uS, clock ticks are 16uS */
if (!Time)
Time = 1 ;
Time = 1;
SkTimerStop(pAC,Ioc,pTimer) ;
SkTimerStop(pAC, Ioc, pTimer);
pTimer->TmClass = Class ;
pTimer->TmEvent = Event ;
pTimer->TmPara = Para ;
pTimer->TmActive = SK_TRUE ;
pTimer->TmClass = Class;
pTimer->TmEvent = Event;
pTimer->TmPara = Para;
pTimer->TmActive = SK_TRUE;
if (!pAC->Tim.StQueue) {
/* First Timer to be started */
pAC->Tim.StQueue = pTimer ;
pTimer->TmNext = 0 ;
pTimer->TmDelta = Time ;
SkHwtStart(pAC,Ioc,Time) ;
return ;
pAC->Tim.StQueue = pTimer;
pTimer->TmNext = 0;
pTimer->TmDelta = Time;
SkHwtStart(pAC, Ioc, Time);
return;
}
/*
* timer correction
*/
timer_done(pAC,Ioc,0) ;
timer_done(pAC, Ioc, 0);
/*
* find position in queue
*/
Delta = 0 ;
for (ppTimPrev = &pAC->Tim.StQueue ; (pTm = *ppTimPrev) ;
Delta = 0;
for (ppTimPrev = &pAC->Tim.StQueue; (pTm = *ppTimPrev);
ppTimPrev = &pTm->TmNext ) {
if (Delta + pTm->TmDelta > Time) {
/* Position found */
/* Here the timer needs to be inserted. */
break ;
break;
}
Delta += pTm->TmDelta ;
Delta += pTm->TmDelta;
}
/* insert in queue */
*ppTimPrev = pTimer ;
pTimer->TmNext = pTm ;
pTimer->TmDelta = Time - Delta ;
*ppTimPrev = pTimer;
pTimer->TmNext = pTm;
pTimer->TmDelta = Time - Delta;
if (pTm) {
/* There is a next timer
* -> correct its Delta value.
*/
pTm->TmDelta -= pTimer->TmDelta ;
pTm->TmDelta -= pTimer->TmDelta;
}
/*
* start new with first
*/
SkHwtStart(pAC,Ioc,pAC->Tim.StQueue->TmDelta) ;
/* restart with first */
SkHwtStart(pAC, Ioc, pAC->Tim.StQueue->TmDelta);
}
......@@ -241,55 +247,56 @@ void SkTimerDone(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc) /* IoContext */
{
timer_done(pAC,Ioc,1) ;
timer_done(pAC, Ioc, 1);
}
static void timer_done(
SK_AC *pAC, /* Adapters context */
SK_IOC Ioc, /* IoContext */
int Restart) /* Do we need to restart the Hardware timer ? */
int Restart) /* Do we need to restart the Hardware timer ? */
{
SK_U32 Delta ;
SK_TIMER *pTm ;
SK_TIMER *pTComp ; /* Timer completed now now */
SK_TIMER **ppLast ; /* Next field of Last timer to be deq */
int Done = 0 ;
Delta = SkHwtRead(pAC,Ioc) ;
ppLast = &pAC->Tim.StQueue ;
pTm = pAC->Tim.StQueue ;
SK_U32 Delta;
SK_TIMER *pTm;
SK_TIMER *pTComp; /* Timer completed now now */
SK_TIMER **ppLast; /* Next field of Last timer to be deq */
int Done = 0;
Delta = SkHwtRead(pAC, Ioc);
ppLast = &pAC->Tim.StQueue;
pTm = pAC->Tim.StQueue;
while (pTm && !Done) {
if (Delta >= pTm->TmDelta) {
/* Timer ran out */
pTm->TmActive = SK_FALSE ;
Delta -= pTm->TmDelta ;
ppLast = &pTm->TmNext ;
pTm = pTm->TmNext ;
} else {
pTm->TmActive = SK_FALSE;
Delta -= pTm->TmDelta;
ppLast = &pTm->TmNext;
pTm = pTm->TmNext;
}
else {
/* We found the first timer that did not run out */
pTm->TmDelta -= Delta ;
Delta = 0 ;
Done = 1 ;
pTm->TmDelta -= Delta;
Delta = 0;
Done = 1;
}
}
*ppLast = 0 ;
*ppLast = 0;
/*
* pTm points to the first Timer that did not run out.
* StQueue points to the first Timer that run out.
*/
for ( pTComp = pAC->Tim.StQueue ; pTComp ; pTComp = pTComp->TmNext) {
SkEventQueue(pAC,pTComp->TmClass, pTComp->TmEvent,
pTComp->TmPara) ;
for ( pTComp = pAC->Tim.StQueue; pTComp; pTComp = pTComp->TmNext) {
SkEventQueue(pAC,pTComp->TmClass, pTComp->TmEvent, pTComp->TmPara);
}
/* Set head of timer queue to the first timer that did not run out */
pAC->Tim.StQueue = pTm ;
pAC->Tim.StQueue = pTm;
if (Restart && pAC->Tim.StQueue) {
/* Restart HW timer */
SkHwtStart(pAC,Ioc,pAC->Tim.StQueue->TmDelta) ;
SkHwtStart(pAC, Ioc, pAC->Tim.StQueue->TmDelta);
}
}
......
drivers/net/sk98lin/skxmac2.c
View file @ e06cf18f
......@@ -2,8 +2,8 @@
*
* Name: skxmac2.c
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.99 $
* Date: $Date: 2003/07/11 12:19:33 $
* Version: $Revision: 1.102 $
* Date: $Date: 2003/10/02 16:53:58 $
* Purpose: Contains functions to initialize the MACs and PHYs
*
******************************************************************************/
......@@ -27,6 +27,23 @@
* History:
*
* $Log: skxmac2.c,v $
* Revision 1.102 2003/10/02 16:53:58 rschmidt
* Changed setting of GMAC parameters with new macros.
* Added define SLIM around SkGm...LowPowerMode().
* Editorial changes.
*
* Revision 1.101 2003/09/16 14:49:07 rschmidt
* Added routines SkGmClearRst(), SkXmClearRst, SkMacClearRst().
* Added WA code for Yukon-Lite's COMA mode in SkGmHardRst().
* Replaced PCI-Config R/W through internal access.
* Fixed return from coma mode in SkGmLeaveLowPowerMode().
* Fixed compiler warnings for different types.
* Editorial changes.
*
* Revision 1.100 2003/09/16 07:09:11 mschmid
* Added functions SkGmEnterLowPowerMode() and
* SkGmLeaveLowPowerMode()
*
* Revision 1.99 2003/07/11 12:19:33 rschmidt
* Reduced init values for Master & Slave downshift counters to
* minimum values.
......@@ -164,7 +181,7 @@
* Revision 1.74 2002/08/12 14:00:17 rschmidt
* Replaced usage of Broadcom PHY Ids with defines.
* Corrected error messages in SkGmMacStatistic().
* Made SkMacPromiscMode() public for ADDR-Modul.
* Made SkMacPromiscMode() public for ADDR-Module.
* Editorial changes.
*
* Revision 1.73 2002/08/08 16:26:24 rschmidt
......@@ -475,7 +492,7 @@ typedef struct s_PhyHack {
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
"@(#) $Id: skxmac2.c,v 1.99 2003/07/11 12:19:33 rschmidt Exp $ (C) Marvell.";
"@(#) $Id: skxmac2.c,v 1.102 2003/10/02 16:53:58 rschmidt Exp $ (C) Marvell.";
#endif
#ifdef GENESIS
......@@ -1343,7 +1360,7 @@ int Port) /* Port Index (MAC_1 + n) */
* Description:
* The XMAC of the specified 'Port' and all connected devices
* (PHY and SERDES) will receive a reset signal on its *Reset pins.
* External PHYs must be reset be clearing a bit in the GPIO register
* External PHYs must be reset by clearing a bit in the GPIO register
* (Timing requirements: Broadcom: 400ns, Level One: none, National: 80ns).
*
* ATTENTION:
......@@ -1386,23 +1403,62 @@ int Port) /* Port Index (MAC_1 + n) */
/* For external PHYs there must be special handling */
if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
/* reset external PHY */
SK_IN32(IoC, B2_GP_IO, &Reg);
if (Port == 0) {
Reg |= GP_DIR_0; /* set to output */
Reg &= ~GP_IO_0;
Reg |= GP_DIR_0; /* set to output */
Reg &= ~GP_IO_0; /* set PHY reset (active low) */
}
else {
Reg |= GP_DIR_2; /* set to output */
Reg &= ~GP_IO_2;
Reg |= GP_DIR_2; /* set to output */
Reg &= ~GP_IO_2; /* set PHY reset (active low) */
}
/* reset external PHY */
SK_OUT32(IoC, B2_GP_IO, Reg);
/* short delay */
SK_IN32(IoC, B2_GP_IO, &Reg);
}
} /* SkXmHardRst */
/******************************************************************************
*
* SkXmClearRst() - Release the PHY & XMAC reset
*
* Description:
*
* Returns:
* nothing
*/
static void SkXmClearRst(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
SK_U32 DWord;
/* clear HW reset */
SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
SK_IN32(IoC, B2_GP_IO, &DWord);
if (Port == 0) {
DWord |= (GP_DIR_0 | GP_IO_0); /* set to output */
}
else {
DWord |= (GP_DIR_2 | GP_IO_2); /* set to output */
}
/* Clear PHY reset */
SK_OUT32(IoC, B2_GP_IO, DWord);
/* Enable GMII interface */
XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
}
} /* SkXmClearRst */
#endif /* GENESIS */
......@@ -1452,10 +1508,6 @@ int Port) /* Port Index (MAC_1 + n) */
*
* Description:
*
* ATTENTION:
* It is absolutely necessary to reset the SW_RST Bit first
* before calling this function.
*
* Returns:
* nothing
*/
......@@ -1464,6 +1516,20 @@ SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
SK_U32 DWord;
/* WA code for COMA mode */
if (pAC->GIni.GIYukonLite &&
pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
SK_IN32(IoC, B2_GP_IO, &DWord);
DWord |= (GP_DIR_9 | GP_IO_9);
/* set PHY reset */
SK_OUT32(IoC, B2_GP_IO, DWord);
}
/* set GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
......@@ -1471,6 +1537,73 @@ int Port) /* Port Index (MAC_1 + n) */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
} /* SkGmHardRst */
/******************************************************************************
*
* SkGmClearRst() - Release the GPHY & GMAC reset
*
* Description:
*
* Returns:
* nothing
*/
static void SkGmClearRst(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
SK_U32 DWord;
#ifdef XXX
/* clear GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
/* set GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
#endif /* XXX */
/* WA code for COMA mode */
if (pAC->GIni.GIYukonLite &&
pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
SK_IN32(IoC, B2_GP_IO, &DWord);
DWord |= GP_DIR_9; /* set to output */
DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
/* clear PHY reset */
SK_OUT32(IoC, B2_GP_IO, DWord);
}
/* set HWCFG_MODE */
DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
(pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
GPC_HWCFG_GMII_FIB);
/* set GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
/* release GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
#ifdef VCPU
VCpuWait(9000);
#endif /* VCPU */
/* clear GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
#ifdef VCPU
VCpuWait(2000);
SK_IN32(IoC, MR_ADDR(Port, GPHY_CTRL), &DWord);
SK_IN32(IoC, B0_ISRC, &DWord);
#endif /* VCPU */
} /* SkGmClearRst */
#endif /* YUKON */
......@@ -1553,6 +1686,38 @@ int Port) /* Port Index (MAC_1 + n) */
} /* SkMacHardRst */
/******************************************************************************
*
* SkMacClearRst() - Clear the MAC reset
*
* Description: calls a clear MAC reset routine dep. on board type
*
* Returns:
* nothing
*/
void SkMacClearRst(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
#ifdef GENESIS
if (pAC->GIni.GIGenesis) {
SkXmClearRst(pAC, IoC, Port);
}
#endif /* GENESIS */
#ifdef YUKON
if (pAC->GIni.GIYukon) {
SkGmClearRst(pAC, IoC, Port);
}
#endif /* YUKON */
} /* SkMacClearRst */
#ifdef GENESIS
/******************************************************************************
*
......@@ -1574,7 +1739,6 @@ SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
{
SK_GEPORT *pPrt;
SK_U32 Reg;
int i;
SK_U16 SWord;
......@@ -1594,32 +1758,10 @@ int Port) /* Port Index (MAC_1 + n) */
}
if (pPrt->PState == SK_PRT_RESET) {
/*
* clear HW reset
* Note: The SW reset is self clearing, therefore there is
* nothing to do here.
*/
SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
/* Ensure that XMAC reset release is done (errata from LReinbold?) */
SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
SkXmClearRst(pAC, IoC, Port);
/* Clear PHY reset */
if (pPrt->PhyType != SK_PHY_XMAC) {
SK_IN32(IoC, B2_GP_IO, &Reg);
if (Port == 0) {
Reg |= (GP_DIR_0 | GP_IO_0); /* set to output */
}
else {
Reg |= (GP_DIR_2 | GP_IO_2); /* set to output */
}
SK_OUT32(IoC, B2_GP_IO, Reg);
/* Enable GMII interface */
XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
/* read Id from external PHY (all have the same address) */
SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_ID1, &pPrt->PhyId1);
......@@ -1831,43 +1973,11 @@ int Port) /* Port Index (MAC_1 + n) */
}
if (pPrt->PState == SK_PRT_RESET) {
/* set GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
/* set GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
#ifdef XXX
/* clear GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
/* set GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
#endif /* XXX */
/* set HWCFG_MODE */
DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
(pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
GPC_HWCFG_GMII_FIB);
/* set GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
/* release GPHY Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
#ifdef VCPU
VCpuWait(9000);
#endif /* VCPU */
/* clear GMAC Control reset */
SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
#ifdef VCPU
VCpuWait(2000);
#endif /* VCPU */
SkGmHardRst(pAC, IoC, Port);
SkGmClearRst(pAC, IoC, Port);
/* Auto-negotiation ? */
if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
/* Auto-negotiation disabled */
......@@ -1906,6 +2016,7 @@ int Port) /* Port Index (MAC_1 + n) */
SWord |= GM_GPCR_DUP_FULL;
}
/* flow-control settings */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
/* set Pause Off */
......@@ -1940,7 +2051,7 @@ int Port) /* Port Index (MAC_1 + n) */
(void)SkGmResetCounter(pAC, IoC, Port);
/* setup Transmit Control Register */
GM_OUT16(IoC, Port, GM_TX_CTRL, GM_TXCR_COL_THR);
GM_OUT16(IoC, Port, GM_TX_CTRL, TX_COL_THR(pPrt->PMacColThres));
/* setup Receive Control Register */
GM_OUT16(IoC, Port, GM_RX_CTRL, GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA |
......@@ -1954,7 +2065,9 @@ int Port) /* Port Index (MAC_1 + n) */
GM_IN16(IoC, Port, GM_TX_PARAM, &SWord);
#endif /* VCPU */
SWord = (SK_U16)(JAM_LEN_VAL(3) | JAM_IPG_VAL(11) | IPG_JAM_DATA(26));
SWord = TX_JAM_LEN_VAL(pPrt->PMacJamLen) |
TX_JAM_IPG_VAL(pPrt->PMacJamIpgVal) |
TX_IPG_JAM_DATA(pPrt->PMacJamIpgData);
GM_OUT16(IoC, Port, GM_TX_PARAM, SWord);
......@@ -1963,7 +2076,12 @@ int Port) /* Port Index (MAC_1 + n) */
GM_IN16(IoC, Port, GM_SERIAL_MODE, &SWord);
#endif /* VCPU */
SWord = GM_SMOD_VLAN_ENA | IPG_VAL_FAST_ETH;
SWord = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(pPrt->PMacIpgData);
if (pPrt->PMacLimit4) {
/* reset of collision counter after 4 consecutive collisions */
SWord |= GM_SMOD_LIMIT_4;
}
if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
/* enable jumbo mode (Max. Frame Length = 9018) */
......@@ -2021,11 +2139,13 @@ int Port) /* Port Index (MAC_1 + n) */
GM_OUT16(IoC, Port, GM_RX_IRQ_MSK, 0);
GM_OUT16(IoC, Port, GM_TR_IRQ_MSK, 0);
#if defined(SK_DIAG) || defined(DEBUG)
/* read General Purpose Status */
GM_IN16(IoC, Port, GM_GP_STAT, &SWord);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("MAC Stat Reg=0x%04X\n", SWord));
("MAC Stat Reg.=0x%04X\n", SWord));
#endif /* SK_DIAG || DEBUG */
#ifdef SK_DIAG
c_print("MAC Stat Reg=0x%04X\n", SWord);
......@@ -2226,6 +2346,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SKERR_HWI_E015MSG);
}
/* Set Flow-control capabilities */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
Ctrl |= PHY_X_P_NO_PAUSE;
......@@ -2306,7 +2427,9 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("InitPhyBcom: no auto-negotiation Port %d\n", Port));
/* Set DuplexMode in Config register */
Ctrl1 |= (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
if (pPrt->PLinkMode == SK_LMODE_FULL) {
Ctrl1 |= PHY_CT_DUP_MD;
}
/* Determine Master/Slave manually if not already done */
if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
......@@ -2346,6 +2469,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SKERR_HWI_E015MSG);
}
/* Set Flow-control capabilities */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
Ctrl3 |= PHY_B_P_NO_PAUSE;
......@@ -2375,12 +2499,12 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Write 1000Base-T Control Register */
SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
("Set 1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
/* Write AutoNeg Advertisement Register */
SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
("Set Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
if (DoLoop) {
/* Set the Phy Loopback bit, too */
......@@ -2409,6 +2533,281 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
#ifdef YUKON
#ifndef SK_SLIM
/******************************************************************************
*
* SkGmEnterLowPowerMode()
*
* Description:
* This function sets the Marvell Alaska PHY to the low power mode
* given by parameter mode.
* The following low power modes are available:
*
* - Coma Mode (Deep Sleep):
* Power consumption: ~15 - 30 mW
* The PHY cannot wake up on its own.
*
* - IEEE 22.2.4.1.5 compatible power down mode
* Power consumption: ~240 mW
* The PHY cannot wake up on its own.
*
* - energy detect mode
* Power consumption: ~160 mW
* The PHY can wake up on its own by detecting activity
* on the CAT 5 cable.
*
* - energy detect plus mode
* Power consumption: ~150 mW
* The PHY can wake up on its own by detecting activity
* on the CAT 5 cable.
* Connected devices can be woken up by sending normal link
* pulses every one second.
*
* Note:
*
* Returns:
* 0: ok
* 1: error
*/
int SkGmEnterLowPowerMode(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port, /* Port Index (e.g. MAC_1) */
SK_U8 Mode) /* low power mode */
{
SK_U16 Word;
SK_U32 DWord;
SK_U8 LastMode;
int Ret = 0;
if (pAC->GIni.GIYukonLite &&
pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
/* save current power mode */
LastMode = pAC->GIni.GP[Port].PPhyPowerState;
pAC->GIni.GP[Port].PPhyPowerState = Mode;
switch (Mode) {
/* coma mode (deep sleep) */
case PHY_PM_DEEP_SLEEP:
/* setup General Purpose Control Register */
GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
/* apply COMA mode workaround */
SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
/* Set PHY to Coma Mode */
SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
break;
/* IEEE 22.2.4.1.5 compatible power down mode */
case PHY_PM_IEEE_POWER_DOWN:
/*
* - disable MAC 125 MHz clock
* - allow MAC power down
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
Word |= PHY_M_PC_DIS_125CLK;
Word &= ~PHY_M_PC_MAC_POW_UP;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/*
* register changes must be followed by a software
* reset to take effect
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
Word |= PHY_CT_RESET;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
/* switch IEEE compatible power down mode on */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
Word |= PHY_CT_PDOWN;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
break;
/* energy detect and energy detect plus mode */
case PHY_PM_ENERGY_DETECT:
case PHY_PM_ENERGY_DETECT_PLUS:
/*
* - disable MAC 125 MHz clock
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
Word |= PHY_M_PC_DIS_125CLK;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/* activate energy detect mode 1 */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
/* energy detect mode */
if (Mode == PHY_PM_ENERGY_DETECT) {
Word |= PHY_M_PC_EN_DET;
}
/* energy detect plus mode */
else {
Word |= PHY_M_PC_EN_DET_PLUS;
}
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/*
* reinitialize the PHY to force a software reset
* which is necessary after the register settings
* for the energy detect modes.
* Furthermore reinitialisation prevents that the
* PHY is running out of a stable state.
*/
SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
break;
/* don't change current power mode */
default:
pAC->GIni.GP[Port].PPhyPowerState = LastMode;
Ret = 1;
break;
}
}
/* low power modes are not supported by this chip */
else {
Ret = 1;
}
return(Ret);
} /* SkGmEnterLowPowerMode */
/******************************************************************************
*
* SkGmLeaveLowPowerMode()
*
* Description:
* Leave the current low power mode and switch to normal mode
*
* Note:
*
* Returns:
* 0: ok
* 1: error
*/
int SkGmLeaveLowPowerMode(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (e.g. MAC_1) */
{
SK_U32 DWord;
SK_U16 Word;
SK_U8 LastMode;
int Ret = 0;
if (pAC->GIni.GIYukonLite &&
pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
/* save current power mode */
LastMode = pAC->GIni.GP[Port].PPhyPowerState;
pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
switch (LastMode) {
/* coma mode (deep sleep) */
case PHY_PM_DEEP_SLEEP:
SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
/* Release PHY from Coma Mode */
SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
SK_IN32(IoC, B2_GP_IO, &DWord);
/* set to output */
DWord |= (GP_DIR_9 | GP_IO_9);
/* set PHY reset */
SK_OUT32(IoC, B2_GP_IO, DWord);
DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
/* clear PHY reset */
SK_OUT32(IoC, B2_GP_IO, DWord);
break;
/* IEEE 22.2.4.1.5 compatible power down mode */
case PHY_PM_IEEE_POWER_DOWN:
/*
* - enable MAC 125 MHz clock
* - set MAC power up
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
Word &= ~PHY_M_PC_DIS_125CLK;
Word |= PHY_M_PC_MAC_POW_UP;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/*
* register changes must be followed by a software
* reset to take effect
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
Word |= PHY_CT_RESET;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
/* switch IEEE compatible power down mode off */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
Word &= ~PHY_CT_PDOWN;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
break;
/* energy detect and energy detect plus mode */
case PHY_PM_ENERGY_DETECT:
case PHY_PM_ENERGY_DETECT_PLUS:
/*
* - enable MAC 125 MHz clock
*/
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
Word &= ~PHY_M_PC_DIS_125CLK;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/* disable energy detect mode */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
Word &= ~PHY_M_PC_EN_DET_MSK;
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
/*
* reinitialize the PHY to force a software reset
* which is necessary after the register settings
* for the energy detect modes.
* Furthermore reinitialisation prevents that the
* PHY is running out of a stable state.
*/
SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
break;
/* don't change current power mode */
default:
pAC->GIni.GP[Port].PPhyPowerState = LastMode;
Ret = 1;
break;
}
}
/* low power modes are not supported by this chip */
else {
Ret = 1;
}
return(Ret);
} /* SkGmLeaveLowPowerMode */
#endif /* !SK_SLIM */
/******************************************************************************
*
* SkGmInitPhyMarv() - Initialize the Marvell Phy registers
......@@ -2457,7 +2856,6 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
VCPUprintf(0, "SkGmInitPhyMarv(), Port=%u, DoLoop=%u\n",
Port, DoLoop);
#else /* VCPU */
if (DoLoop) {
/* Set 'MAC Power up'-bit, set Manual MDI configuration */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
......@@ -2475,16 +2873,20 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
("Set Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
}
/* Read PHY Control */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
if (!AutoNeg) {
/* Disable Auto-negotiation */
PhyCtrl &= ~PHY_CT_ANE;
}
PhyCtrl |= PHY_CT_RESET;
/* Assert software reset */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
#endif /* VCPU */
PhyCtrl = 0 /* PHY_CT_COL_TST */;
......@@ -2533,13 +2935,9 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
if (!DoLoop) {
PhyCtrl |= PHY_CT_RESET;
}
/*
* Do NOT enable Auto-negotiation here. This would hold
* the link down because no IDLES are transmitted
*/
}
else {
PhyCtrl |= PHY_CT_ANE;
/* Set Auto-negotiation advertisement */
if (pAC->GIni.GICopperType) {
/* Set Speed capabilities */
......@@ -2554,6 +2952,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
break;
case SK_LSPEED_100MBPS:
AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
/* advertise 10Base-T also */
PHY_M_AN_10_FD | PHY_M_AN_10_HD;
break;
case SK_LSPEED_10MBPS:
......@@ -2581,7 +2980,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SKERR_HWI_E015MSG);
}
/* Set Auto-negotiation advertisement */
/* Set Flow-control capabilities */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
AutoNegAdv |= PHY_B_P_NO_PAUSE;
......@@ -2618,7 +3017,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SKERR_HWI_E015MSG);
}
/* Set Auto-negotiation advertisement */
/* Set Flow-control capabilities */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
AutoNegAdv |= PHY_M_P_NO_PAUSE_X;
......@@ -2640,7 +3039,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
if (!DoLoop) {
/* Restart Auto-negotiation */
PhyCtrl |= PHY_CT_RE_CFG;
PhyCtrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
}
}
......@@ -2659,12 +3058,12 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Write 1000Base-T Control Register */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("1000B-T Ctrl=0x%04X\n", C1000BaseT));
("Set 1000B-T Ctrl =0x%04X\n", C1000BaseT));
/* Write AutoNeg Advertisement Register */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Auto-Neg.Ad.=0x%04X\n", AutoNegAdv));
("Set Auto-Neg.Adv.=0x%04X\n", AutoNegAdv));
#endif /* VCPU */
if (DoLoop) {
......@@ -2694,6 +3093,8 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Write to the PHY Control register */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Set PHY Ctrl Reg.=0x%04X\n", PhyCtrl));
#ifdef VCPU
VCpuWait(2000);
......@@ -2712,7 +3113,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);
if ((pAC->GIni.GILedBlinkCtrl & SK_LED_LINK100_ON) != 0) {
/* only in forced 100Mbps mode */
/* only in forced 100 Mbps mode */
if (!AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_100MBPS) {
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER,
......@@ -2741,7 +3142,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Read AutoNeg Advertisement Register */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Auto-Neg. Ad.=0x%04X\n", AutoNegAdv));
("Auto-Neg.Adv.=0x%04X\n", AutoNegAdv));
/* Read Ext. PHY Specific Control */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
......@@ -2818,13 +3219,15 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Auto-negotiation ? */
if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
/*
* level one spec say: "1000Mbps: manual mode not allowed"
* level one spec say: "1000 Mbps: manual mode not allowed"
* but lets see what happens...
*/
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("InitPhyLone: no auto-negotiation Port %d\n", Port));
/* Set DuplexMode in Config register */
Ctrl1 = (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
if (pPrt->PLinkMode == SK_LMODE_FULL) {
Ctrl1 |= PHY_CT_DUP_MD;
}
/* Determine Master/Slave manually if not already done */
if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
......@@ -2857,6 +3260,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
SKERR_HWI_E015MSG);
}
/* Set Flow-control capabilities */
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
Ctrl3 |= PHY_L_P_NO_PAUSE;
......@@ -2877,7 +3281,6 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
/* Restart Auto-negotiation */
Ctrl1 = PHY_CT_ANE | PHY_CT_RE_CFG;
}
/* Write 1000Base-T Control Register */
......@@ -3019,10 +3422,10 @@ int Port) /* Port Index (MAC_1 + n) */
/* Check Duplex mismatch */
if ((ResAb & (PHY_X_RS_HD | PHY_X_RS_FD)) == PHY_X_RS_FD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOFULL;
}
else if ((ResAb & (PHY_X_RS_HD | PHY_X_RS_FD)) == PHY_X_RS_HD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
}
else {
/* Error */
......@@ -3055,7 +3458,7 @@ int Port) /* Port Index (MAC_1 + n) */
/* PAUSE mismatch -> no PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
}
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
return(SK_AND_OK);
} /* SkXmAutoNegDoneXmac */
......@@ -3110,10 +3513,10 @@ int Port) /* Port Index (MAC_1 + n) */
/* Check Duplex mismatch */
if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000FD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOFULL;
}
else if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000HD) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
}
else {
/* Error */
......@@ -3156,7 +3559,7 @@ int Port) /* Port Index (MAC_1 + n) */
/* PAUSE mismatch -> no PAUSE */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
}
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
return(SK_AND_OK);
} /* SkXmAutoNegDoneBcom */
......@@ -3192,6 +3595,8 @@ int Port) /* Port Index (MAC_1 + n) */
/* Get PHY parameters */
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_LP, &LPAb);
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("Link P.Abil.=0x%04X\n", LPAb));
if ((LPAb & PHY_M_AN_RF) != 0) {
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
......@@ -3222,15 +3627,15 @@ int Port) /* Port Index (MAC_1 + n) */
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNegFail: Speed & Duplex not resolved, Port %d\n", Port));
pPrt->PAutoNegFail = SK_TRUE;
pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
return(SK_AND_DUP_CAP);
}
if ((AuxStat & PHY_M_PS_FULL_DUP) != 0) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOFULL;
}
else {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
}
/* Check PAUSE mismatch ??? */
......@@ -3255,13 +3660,13 @@ int Port) /* Port Index (MAC_1 + n) */
/* set used link speed */
switch ((unsigned)(AuxStat & PHY_M_PS_SPEED_MSK)) {
case (unsigned)PHY_M_PS_SPEED_1000:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
break;
case PHY_M_PS_SPEED_100:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_100MBPS;
break;
default:
pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_10MBPS;
}
return(SK_AND_OK);
......@@ -3312,10 +3717,10 @@ int Port) /* Port Index (MAC_1 + n) */
/* Check Duplex mismatch */
if ((QuickStat & PHY_L_QS_DUP_MOD) != 0) {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOFULL;
}
else {
pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
}
/* Check Master/Slave resolution */
......@@ -3338,6 +3743,7 @@ int Port) /* Port Index (MAC_1 + n) */
/* We are using IEEE 802.3z/D5.0 Table 37-4 */
/* we must manually resolve the abilities here */
pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
switch (pPrt->PFlowCtrlMode) {
case SK_FLOW_MODE_NONE:
/* default */
......@@ -3457,6 +3863,9 @@ int Port) /* Port Index (MAC_1 + n) */
return(Rtv);
}
SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
("AutoNeg done Port %d\n", Port));
/* We checked everything and may now enable the link */
pPrt->PAutoNegFail = SK_FALSE;
......
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