Commit e107f4bb authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux into next/drivers

Pull "Reset controller changes for v4.17" from Philipp Zabel:

This enables level resets on Meson8b SoCs. Level resets have been
previously implemented for the newer Meson GX SoCs, so this removes
the distinction between the two families in the meson-reset driver.

Also enables the ASPEED LPC reset controller on ASPEED AST2400 and
AST2500 SoCs, by adding compatibles to the simple-reset driver.

* tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux:
  reset: simple: Enable for ASPEED systems
  dt-bindings: aspeed-lpc: Add reset controller
  reset: meson: enable level reset support on Meson8b
parents e9c112c9 1d7592f8
...@@ -135,3 +135,24 @@ lhc: lhc@20 { ...@@ -135,3 +135,24 @@ lhc: lhc@20 {
compatible = "aspeed,ast2500-lhc"; compatible = "aspeed,ast2500-lhc";
reg = <0x20 0x24 0x48 0x8>; reg = <0x20 0x24 0x48 0x8>;
}; };
LPC reset control
-----------------
The UARTs present in the ASPEED SoC can have their resets tied to the reset
state of the LPC bus. Some systems may chose to modify this configuration.
Required properties:
- compatible: "aspeed,ast2500-lpc-reset" or
"aspeed,ast2400-lpc-reset"
- reg: offset and length of the IP in the LHC memory region
- #reset-controller indicates the number of reset cells expected
Example:
lpc_reset: reset-controller@18 {
compatible = "aspeed,ast2500-lpc-reset";
reg = <0x18 0x4>;
#reset-cells = <1>;
};
...@@ -83,14 +83,18 @@ config RESET_PISTACHIO ...@@ -83,14 +83,18 @@ config RESET_PISTACHIO
config RESET_SIMPLE config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
help help
This enables a simple reset controller driver for reset lines that This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous, that can be asserted and deasserted by toggling bits in a contiguous,
exclusive register space. exclusive register space.
Currently this driver supports Altera SoCFPGAs, the RCC reset Currently this driver supports:
controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family. - Altera SoCFPGAs
- ASPEED BMC SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- ZTE's zx2967 family
config RESET_SUNXI config RESET_SUNXI
bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
......
...@@ -124,29 +124,21 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev, ...@@ -124,29 +124,21 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev,
return meson_reset_level(rcdev, id, false); return meson_reset_level(rcdev, id, false);
} }
static const struct reset_control_ops meson_reset_meson8_ops = { static const struct reset_control_ops meson_reset_ops = {
.reset = meson_reset_reset,
};
static const struct reset_control_ops meson_reset_gx_ops = {
.reset = meson_reset_reset, .reset = meson_reset_reset,
.assert = meson_reset_assert, .assert = meson_reset_assert,
.deassert = meson_reset_deassert, .deassert = meson_reset_deassert,
}; };
static const struct of_device_id meson_reset_dt_ids[] = { static const struct of_device_id meson_reset_dt_ids[] = {
{ .compatible = "amlogic,meson8b-reset", { .compatible = "amlogic,meson8b-reset" },
.data = &meson_reset_meson8_ops, }, { .compatible = "amlogic,meson-gxbb-reset" },
{ .compatible = "amlogic,meson-gxbb-reset", { .compatible = "amlogic,meson-axg-reset" },
.data = &meson_reset_gx_ops, },
{ .compatible = "amlogic,meson-axg-reset",
.data = &meson_reset_gx_ops, },
{ /* sentinel */ }, { /* sentinel */ },
}; };
static int meson_reset_probe(struct platform_device *pdev) static int meson_reset_probe(struct platform_device *pdev)
{ {
const struct reset_control_ops *ops;
struct meson_reset *data; struct meson_reset *data;
struct resource *res; struct resource *res;
...@@ -154,10 +146,6 @@ static int meson_reset_probe(struct platform_device *pdev) ...@@ -154,10 +146,6 @@ static int meson_reset_probe(struct platform_device *pdev)
if (!data) if (!data)
return -ENOMEM; return -ENOMEM;
ops = of_device_get_match_data(&pdev->dev);
if (!ops)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
data->reg_base = devm_ioremap_resource(&pdev->dev, res); data->reg_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(data->reg_base)) if (IS_ERR(data->reg_base))
...@@ -169,7 +157,7 @@ static int meson_reset_probe(struct platform_device *pdev) ...@@ -169,7 +157,7 @@ static int meson_reset_probe(struct platform_device *pdev)
data->rcdev.owner = THIS_MODULE; data->rcdev.owner = THIS_MODULE;
data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG; data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
data->rcdev.ops = ops; data->rcdev.ops = &meson_reset_ops;
data->rcdev.of_node = pdev->dev.of_node; data->rcdev.of_node = pdev->dev.of_node;
return devm_reset_controller_register(&pdev->dev, &data->rcdev); return devm_reset_controller_register(&pdev->dev, &data->rcdev);
......
...@@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = { ...@@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low }, .data = &reset_simple_active_low },
{ .compatible = "zte,zx296718-reset", { .compatible = "zte,zx296718-reset",
.data = &reset_simple_active_low }, .data = &reset_simple_active_low },
{ .compatible = "aspeed,ast2400-lpc-reset" },
{ .compatible = "aspeed,ast2500-lpc-reset" },
{ /* sentinel */ }, { /* sentinel */ },
}; };
......
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