Commit e1b1ea50 authored by Ben Dooks's avatar Ben Dooks Committed by Russell King

[ARM PATCH] 1794/1: S3C2410 - arch/arm/kernel patches [ repost 1791/1 ]

Patch from Ben Dooks

arch/arm/kernel patch for S3C2410 support

 - default configurations for S3C2410
 - build changes for S3C2410
 - IRQ support for kernel entry
 - debug serial support
parent c7f19589
...@@ -138,6 +138,13 @@ config ARCH_SHARK ...@@ -138,6 +138,13 @@ config ARCH_SHARK
config ARCH_OMAP config ARCH_OMAP
bool "TI OMAP" bool "TI OMAP"
config ARCH_S3C2410
bool "Samsung S3C2410"
help
Samsung S3C2410X CPU based systems, such as the Simtec Electronics
BAST (http://www.simtec.co.uk/products/EB110ITX/), the IPAQ 1940 or
the Samsung SMDK2410 development board (and derviatives).
endchoice endchoice
source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-clps711x/Kconfig"
...@@ -156,6 +163,8 @@ source "arch/arm/mach-sa1100/Kconfig" ...@@ -156,6 +163,8 @@ source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/mach-omap/Kconfig" source "arch/arm/mach-omap/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig"
# Definitions to make life easier # Definitions to make life easier
config ARCH_ACORN config ARCH_ACORN
bool bool
...@@ -724,6 +733,18 @@ config DEBUG_LL ...@@ -724,6 +733,18 @@ config DEBUG_LL
in the kernel. This is helpful if you are debugging code that in the kernel. This is helpful if you are debugging code that
executes before the console is initialized. executes before the console is initialized.
config DEBUG_ICEDCC
bool "Kernel low-level debugging via EmbeddedICE DCC channel"
depends on DEBUG_LL
help
Say Y here if you want the debug print routines to direct their
output to the EmbeddedICE macrocell's DCC channel using
co-processor 14. This is known to work on the ARM9 style ICE
channel.
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
config DEBUG_DC21285_PORT config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port" bool "Kernel low-level debugging messages via footbridge serial port"
depends on DEBUG_LL && FOOTBRIDGE depends on DEBUG_LL && FOOTBRIDGE
...@@ -741,6 +762,23 @@ config DEBUG_CLPS711X_UART2 ...@@ -741,6 +762,23 @@ config DEBUG_CLPS711X_UART2
output to the second serial port on these devices. Saying N will output to the second serial port on these devices. Saying N will
cause the debug messages to appear on the first serial port. cause the debug messages to appear on the first serial port.
config DEBUG_S3C2410_PORT
depends on DEBUG_LL && ARCH_S3C2410
bool "Kernel low-level debugging messages via S3C2410 UART"
help
Say Y here if you want debug print routines to go to one of the
S3C2410 internal UARTs. The chosen UART must have been configured
before it is used.
config DEBUG_S3C2410_UART
int
depends on DEBUG_LL && ARCH_S3C2410
default "0"
help
Choice for UART for kernel low-level using S3C2410 UARTS,
should be between zero and two. The port must have been
initalised by the boot-loader before use.
endmenu endmenu
source "security/Kconfig" source "security/Kconfig"
......
...@@ -93,6 +93,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000 ...@@ -93,6 +93,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000
machine-$(CONFIG_ARCH_IOP3XX) := iop3xx machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
machine-$(CONFIG_ARCH_ADIFCC) := adifcc machine-$(CONFIG_ARCH_ADIFCC) := adifcc
machine-$(CONFIG_ARCH_OMAP) := omap machine-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_S3C2410) := s3c2410
TEXTADDR := $(textaddr-y) TEXTADDR := $(textaddr-y)
ifeq ($(incdir-y),) ifeq ($(incdir-y),)
......
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...@@ -44,6 +44,34 @@ ...@@ -44,6 +44,34 @@
beq 1001b beq 1001b
.endm .endm
#elif defined(CONFIG_DEBUG_ICEDCC)
@@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rx
.endm
.macro senduart, rd, rx
mcr p14, 0, \rd, c1, c0, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
bne 1001b
1002:
.endm
#elif defined(CONFIG_ARCH_EBSA110) #elif defined(CONFIG_ARCH_EBSA110)
.macro addruart,rx .macro addruart,rx
mov \rx, #0xf0000000 mov \rx, #0xf0000000
...@@ -462,6 +490,66 @@ ...@@ -462,6 +490,66 @@
tst \rd, #0x10 tst \rd, #0x10
beq 1001b beq 1001b
.endm .endm
#elif defined(CONFIG_ARCH_S3C2410)
#include <asm/arch/map.h>
#include <asm/arch/regs-serial.h>
.macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1
ldreq \rx, = S3C2410_PA_UART
ldrne \rx, = S3C2410_VA_UART
#if CONFIG_DEBUG_S3C2410_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
#endif
.endm
.macro senduart,rd,rx
str \rd, [\rx, # S3C2410_UTXH ]
.endm
.macro busyuart, rd, rx
ldr \rd, [ \rx, # S3C2410_UFCON ]
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
beq 1001f @
@ FIFO enabled...
1003:
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
tst \rd, #S3C2410_UFSTAT_TXFULL
bne 1003b
b 1002f
1001:
@ busy waiting for non fifo
ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
tst \rd, #S3C2410_UTRSTAT_TXFE
beq 1001b
1002: @ exit busyuart
.endm
.macro waituart,rd,rx
ldr \rd, [ \rx, # S3C2410_UFCON ]
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
beq 1001f @
@ FIFO enabled...
1003:
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ands \rd, \rd, #15<<S3C2410_UFSTAT_TXSHIFT
bne 1003b
b 1002f
1001:
@ idle waiting for non fifo
ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
tst \rd, #S3C2410_UTRSTAT_TXFE
beq 1001b
1002: @ exit busyuart
.endm
#else #else
#error Unknown architecture #error Unknown architecture
#endif #endif
......
...@@ -635,6 +635,129 @@ ENTRY(soft_irq_mask) ...@@ -635,6 +635,129 @@ ENTRY(soft_irq_mask)
.macro irq_prio_table .macro irq_prio_table
.endm .endm
#elif defined(CONFIG_ARCH_S3C2410)
/* S3C2410X IRQ Handler, <ben@simtec.co.uk> */
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30000:
mov \tmp, #S3C2410_VA_IRQ
ldr \irqnr, [ \tmp, #0x14 ] @ get irq no
teq \irqnr, #4
teqne \irqnr, #5
beq 1002f @ external irq reg
teq \irqnr, #16
beq 1003f @ lcd controller
@ debug check to see if interrupt reported is the same
@ as the offset....
teq \irqnr, #0
beq 20002f
ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
mov \irqstat, \irqstat, lsr \irqnr
tst \irqstat, #1
bne 20002f
#if 1
stmfd r13!, { r0 - r4 , r14 }
ldr r1, [ \tmp, #0x14 ] @ intoffset
ldr r2, [ \tmp, #0x10 ] @ INTPND
ldr r3, [ \tmp, #0x00 ] @ SRCPND
adr r0, 20003f
bl printk
b 20004f
#endif
20003:
.ascii "<7>irq: err - bad offset %d, intpnd=%08x, srcpnd=%08x\n"
.byte 0
.align 4
20004:
mov r1, #1
mov \tmp, #S3C2410_VA_IRQ
ldmfd r13!, { r0 - r4 , r14 }
@ try working out interript number for ourselves
mov \irqnr, #0
ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
10021:
movs \irqstat, \irqstat, lsr#1
bcs 30000b @ try and re-start the proccess
add \irqnr, \irqnr, #1
cmp \irqnr, #32
ble 10021b
@ found no interrupt, set Z flag and leave
movs \irqnr, #0
b 1001f
20005:
20002: @ exit
@ we base the s3c2410x interrupts at 16 and above to allow
@ isa peripherals to have their standard interrupts, also
@ ensure that Z flag is un-set on exit
@ note, we cannot be sure if we get IRQ_EINT0 (0) that
@ there is simply no interrupt pending, so in all other
@ cases we jump to say we have found something, otherwise
@ we check to see if the interrupt really is assrted
adds \irqnr, \irqnr, #IRQ_EINT0
teq \irqnr, #IRQ_EINT0
bne 1001f @ exit
ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
teq \irqstat, #0
moveq \irqnr, #0
b 1001f
@ we get here from no main or external interrupts pending
1002:
add \tmp, \tmp, #S3C2410_VA_GPIO - S3C2410_VA_IRQ
ldr \irqstat, [ \tmp, # 0xa8 ] @ EXTINTPEND
ldr \irqnr, [ \tmp, # 0xa4 ] @ EXTINTMASK
bic \irqstat, \irqstat, \irqnr @ clear masked irqs
mov \irqnr, #IRQ_EINT4 @ start extint nos
mov \irqstat, \irqstat, lsr#4 @ ignore bottom 4 bits
10021:
movs \irqstat, \irqstat, lsr#1
bcs 1004f
add \irqnr, \irqnr, #1
cmp \irqnr, #IRQ_EINT23
ble 10021b
@ found no interrupt, set Z flag and leave
movs \irqnr, #0
b 1001f
1003:
@ lcd interrupt has been asserted...
add \tmp, \tmp, #S3C2410_VA_LCD - S3C2410_VA_IRQ
ldr \irqstat, [ \tmp, # 0x54 ] @ lcd int pending
tst \irqstat, #2
movne \irqnr, #IRQ_LCD_FRAME
tst \irqstat, #1
movne \irqnr, #IRQ_LCD_FIFO
@ fall through to exit with flags updated
1004: @ ensure Z flag clear in case our MOVS shifted out the last bit
teq \irqnr, #0
1001:
@ exit irq routine
.endm
/* currently don't need an disable_fiq macro */
.macro disable_fiq
.endm
/* we don't have an irq priority table */
.macro irq_prio_table
.endm
#else #else
#error Unknown architecture #error Unknown architecture
#endif #endif
......
...@@ -58,8 +58,9 @@ config CPU_ARM720T ...@@ -58,8 +58,9 @@ config CPU_ARM720T
# ARM920T # ARM920T
config CPU_ARM920T config CPU_ARM920T
bool "Support ARM920T processor" bool "Support ARM920T processor" if !ARCH_S3C2410
depends on ARCH_INTEGRATOR depends on ARCH_INTEGRATOR || ARCH_S3C2410
default y if ARCH_S3C2410
select CPU_32v4 select CPU_32v4
select CPU_ABRT_EV4T select CPU_ABRT_EV4T
select CPU_CACHE_V4WT select CPU_CACHE_V4WT
...@@ -67,7 +68,9 @@ config CPU_ARM920T ...@@ -67,7 +68,9 @@ config CPU_ARM920T
select CPU_TLB_V4WBI select CPU_TLB_V4WBI
help help
The ARM920T is licensed to be produced by numerous vendors, The ARM920T is licensed to be produced by numerous vendors,
and is used in the Maverick EP9312. More information at and is used in the Maverick EP9312 and the Samsung S3C2410.
More information on the Maverick EP9312 at
<http://linuxdevices.com/products/PD2382866068.html>. <http://linuxdevices.com/products/PD2382866068.html>.
Say Y if you want support for the ARM920T processor. Say Y if you want support for the ARM920T processor.
......
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