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Commit e238310c authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'samsung-dt-4.17' of... 

Merge tag 'samsung-dt-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Pull "Samsung DTS ARM changes for v4.17" from Krzysztof Kozłowski:

1. Add WiFi to Artik 5 board.
2. Remove unused samsung_k3pe0e000b memory DTSI.
3. Add few remaining SPDX license identifiers.
4. Refactor Exynos4 by using labels for overriding/extending nodes and
   moving respective nodes under the 'soc' node.
5. Add three new Exynos4412-based boards: GT-I9300 (Samsung Galaxy S3),
   GT-I9305 (Samsung Galaxy S3 LTE) and GT-N7100/N7105 (Samsung Note 2).
   They are based heavily on existing Trats2 board.
6. Fix PMIC interrupts on Trats board.
7. Fix IOMMU for GScaler devices on Exynos5250.
8. Minor fixes in unit addresses pointed by DTC.
9. Minor cleanups from unused properties and duplicated code.

* tag 'samsung-dt-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (29 commits)
  ARM: dts: exynos: Fix IOMMU support for GScaler devices on Exynos5250
  ARM: dts: exynos: Remove unused bypass-smu property from Xyref5260
  ARM: dts: exynos: Add missing interrupts property to PMIC on Trats board
  ARM: dts: exynos: Fix unit addresses of PDMA nodes in Exynos5410
  ARM: dts: exynos: Fix address of PPMU ACP on Exynos4210
  ARM: dts: exynos: Cleanup power domain nodes in exynos3250.dtsi
  ARM: dts: exynos: Add touchscreen node to Exynos4412 N710x
  ARM: dts: exynos: Add Samsung's Exynos4412-based Midas boards
  ARM: dts: exynos: Split Trats2 DTS in preparation for Midas boards
  ARM: dts: exynos: Remove "cooling-{min|max}-level" for CPU nodes
  dt-bindings: samsung: Document bindings for Midas family boards
  ARM: dts: exynos: Add soc node to exynos4412
  ARM: dts: exynos: Add soc node to exynos4210
  ARM: dts: exynos: Add soc node to exynos4
  ARM: dts: exynos: Add soc node to exynos5440
  ARM: dts: exynos: Use pmu label in exynos4412
  ARM: dts: exynos: Remove duplicated inclusion of syscon restart nodes on Exynos5410
  ARM: dts: exynos: Use label instead of full path in exynos4412-itop-elite
  ARM: dts: exynos: Use labels instead of full paths in exynos4412-trats2
  ARM: dts: exynos: Use label instead of full path in exynos4412-odroid-common
  ...
parents bf89bd52 6f487075
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Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
View file @ e238310c
......@@ -9,7 +9,11 @@ Required root node properties:
- "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
- "samsung,trats" - for Exynos4210-based Tizen Reference board.
- "samsung,universal_c210" - for Exynos4210-based Samsung board.
- "samsung,i9300" - for Exynos4412-based Samsung GT-I9300 board.
- "samsung,i9305" - for Exynos4412-based Samsung GT-I9305 board.
- "samsung,midas" - for Exynos4412-based Samsung Midas board.
- "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
- "samsung,n710x" - for Exynos4412-based Samsung GT-N7100/GT-N7105 board.
- "samsung,trats2" - for Exynos4412-based Tizen Reference board.
- "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
- "samsung,xyref5260" - for Exynos5260-based Samsung board.
......
MAINTAINERS
View file @ e238310c
......@@ -1863,7 +1863,6 @@ Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
S: Maintained
F: arch/arm/boot/dts/s3c*
F: arch/arm/boot/dts/s5p*
F: arch/arm/boot/dts/samsung*
F: arch/arm/boot/dts/exynos*
F: arch/arm64/boot/dts/exynos/
F: arch/arm/plat-samsung/
......
arch/arm/boot/dts/Makefile
View file @ e238310c
......@@ -163,7 +163,10 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
exynos4412-i9300.dtb \
exynos4412-i9305.dtb \
exynos4412-itop-elite.dtb \
exynos4412-n710x.dtb \
exynos4412-odroidu3.dtb \
exynos4412-odroidx.dtb \
exynos4412-odroidx2.dtb \
......
arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos SoC MFC (Video Codec) reserved memory common definition.
*
* Copyright (c) 2016 Samsung Electronics Co., Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
......
arch/arm/boot/dts/exynos-syscon-restart.dtsi
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos SoC syscon reboot/poweroff nodes common definition.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
......
arch/arm/boot/dts/exynos3250-artik5.dtsi
View file @ e238310c
......@@ -245,6 +245,7 @@ ldo23_reg: LDO23 {
regulator-name = "VLDO23_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo24_reg: LDO24 {
......@@ -316,6 +317,41 @@ &mshc_0 {
status = "okay";
};
&mshc_1 {
cap-sd-highspeed;
cap-sdio-irq;
disable-wp;
non-removable;
keep-power-in-suspend;
fifo-depth = <0x40>;
vqmmc-supply = <&ldo11_reg>;
/*
* Voltage negotiation is broken for the SDIO periph so we
* can't actually set the voltage here.
* vmmc-supply = <&ldo23_reg>;
*/
card-detect-delay = <500>;
clock-frequency = <100000000>;
max-frequency = <100000000>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 1>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd1_cmd &sd1_clk &sd1_bus1 &sd1_bus4 &wlanen>;
bus-width = <4>;
status = "okay";
};
&pinctrl_1 {
wlanen: wlanen {
samsung,pins = "gpx2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
samsung,pin-val = <1>;
};
};
&rtc {
clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
......
arch/arm/boot/dts/exynos3250.dtsi
View file @ e238310c
......@@ -161,34 +161,39 @@ mipi_phy: video-phy {
syscon = <&pmu_system_controller>;
};
pd_cam: cam-power-domain@10023c00 {
pd_cam: power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
label = "CAM";
};
pd_mfc: mfc-power-domain@10023c40 {
pd_mfc: power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
pd_g3d: g3d-power-domain@10023c60 {
pd_g3d: power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
label = "G3D";
};
pd_lcd0: lcd0-power-domain@10023c80 {
pd_lcd0: power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
label = "LCD0";
};
pd_isp: isp-power-domain@10023ca0 {
pd_isp: power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
label = "ISP";
};
cmu: clock-controller@10030000 {
......
arch/arm/boot/dts/exynos4.dtsi
View file @ e238310c
......@@ -52,961 +52,976 @@ aliases {
serial3 = &serial_3;
};
clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_SCLK_AUDIO0>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk0";
dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx", "tx-sec";
samsung,idma-addr = <0x03000000>;
#sound-dai-cells = <1>;
status = "disabled";
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>,
<&clock CLK_SCLK_AUDIO0>;
clock-names = "pll_ref", "pll_in", "sclk_audio",
"sclk_pcm_in";
};
scu: snoop-control-unit@10500000 {
compatible = "arm,cortex-a9-scu";
reg = <0x10500000 0x2000>;
};
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk0";
dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx", "tx-sec";
samsung,idma-addr = <0x03000000>;
#sound-dai-cells = <1>;
status = "disabled";
};
memory-controller@12570000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12570000 0x14>;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
mipi_phy: video-phy {
compatible = "samsung,s5pv210-mipi-video-phy";
#phy-cells = <1>;
syscon = <&pmu_system_controller>;
};
scu: snoop-control-unit@10500000 {
compatible = "arm,cortex-a9-scu";
reg = <0x10500000 0x2000>;
};
pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
memory-controller@12570000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12570000 0x14>;
};
pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
label = "G3D";
};
mipi_phy: video-phy {
compatible = "samsung,s5pv210-mipi-video-phy";
#phy-cells = <1>;
syscon = <&pmu_system_controller>;
};
pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
label = "LCD0";
};
pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
pd_tv: tv-power-domain@10023c20 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
power-domains = <&pd_lcd0>;
label = "TV";
};
pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
label = "G3D";
};
pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
label = "CAM";
};
pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
label = "LCD0";
};
pd_gps: gps-power-domain@10023ce0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>;
#power-domain-cells = <0>;
label = "GPS";
};
pd_tv: tv-power-domain@10023c20 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
power-domains = <&pd_lcd0>;
label = "TV";
};
pd_gps_alive: gps-alive-power-domain@10023d00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>;
#power-domain-cells = <0>;
label = "GPS alive";
};
pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
label = "CAM";
};
gic: interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
};
pd_gps: gps-power-domain@10023ce0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>;
#power-domain-cells = <0>;
label = "GPS";
};
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10440000 0x1000>;
};
pd_gps_alive: gps-alive-power-domain@10023d00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>;
#power-domain-cells = <0>;
label = "GPS alive";
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
gic: interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
};
sys_reg: syscon@10010000 {
compatible = "samsung,exynos4-sysreg", "syscon";
reg = <0x10010000 0x400>;
};
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10440000 0x1000>;
};
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4210-pmu", "syscon";
reg = <0x10020000 0x4000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
pmu: pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
dsi_0: dsi@11c80000 {
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_lcd0>;
phys = <&mipi_phy 1>;
phy-names = "dsim";
clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
clock-names = "bus_clk", "sclk_mipi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
sys_reg: syscon@10010000 {
compatible = "samsung,exynos4-sysreg", "syscon";
reg = <0x10010000 0x400>;
};
camera {
compatible = "samsung,fimc", "simple-bus";
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
#clock-cells = <1>;
clock-output-names = "cam_a_clkout", "cam_b_clkout";
ranges;
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4210-pmu", "syscon";
reg = <0x10020000 0x4000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
fimc_0: fimc@11800000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11800000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc0>;
dsi_0: dsi@11c80000 {
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_lcd0>;
phys = <&mipi_phy 1>;
phy-names = "dsim";
clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
clock-names = "bus_clk", "sclk_mipi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
fimc_1: fimc@11810000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11810000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc1>;
camera: camera {
compatible = "samsung,fimc", "simple-bus";
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
#clock-cells = <1>;
clock-output-names = "cam_a_clkout", "cam_b_clkout";
ranges;
fimc_0: fimc@11800000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11800000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc0>;
status = "disabled";
};
fimc_1: fimc@11810000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11810000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc1>;
status = "disabled";
};
fimc_2: fimc@11820000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11820000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc2>;
status = "disabled";
};
fimc_3: fimc@11830000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11830000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc3>;
status = "disabled";
};
csis_0: csis@11880000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11880000 0x4000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
clock-names = "csis", "sclk_csis";
bus-width = <4>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 0>;
phy-names = "csis";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
csis_1: csis@11890000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11890000 0x4000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS1>,
<&clock CLK_SCLK_CSIS1>;
clock-names = "csis", "sclk_csis";
bus-width = <2>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 2>;
phy-names = "csis";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
fimc_2: fimc@11820000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11820000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc2>;
rtc: rtc@10070000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x10070000 0x100>;
interrupt-parent = <&pmu_system_controller>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
status = "disabled";
};
fimc_3: fimc@11830000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11830000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc3>;
keypad: keypad@100a0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_KEYIF>;
clock-names = "keypad";
status = "disabled";
};
csis_0: csis@11880000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11880000 0x4000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
clock-names = "csis", "sclk_csis";
bus-width = <4>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 0>;
phy-names = "csis";
sdhci_0: sdhci@12510000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12510000 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
csis_1: csis@11890000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11890000 0x4000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
clock-names = "csis", "sclk_csis";
bus-width = <2>;
power-domains = <&pd_cam>;
phys = <&mipi_phy 2>;
phy-names = "csis";
sdhci_1: sdhci@12520000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12520000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
rtc: rtc@10070000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x10070000 0x100>;
interrupt-parent = <&pmu_system_controller>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
status = "disabled";
};
keypad: keypad@100a0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_KEYIF>;
clock-names = "keypad";
status = "disabled";
};
sdhci_0: sdhci@12510000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12510000 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
sdhci_1: sdhci@12520000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12520000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
sdhci_2: sdhci@12530000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12530000 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
sdhci_3: sdhci@12540000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12540000 0x100>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos4210-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
clock-names = "phy", "ref";
#phy-cells = <1>;
status = "disabled";
};
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_DEVICE>;
clock-names = "otg";
phys = <&exynos_usbphy 0>;
phy-names = "usb2-phy";
status = "disabled";
};
sdhci_2: sdhci@12530000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12530000 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
ehci: ehci@12580000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12580000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_HOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
sdhci_3: sdhci@12540000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12540000 0x100>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
clock-names = "hsmmc", "mmc_busclk.2";
status = "disabled";
};
port@1 {
reg = <1>;
phys = <&exynos_usbphy 2>;
exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos4210-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
clock-names = "phy", "ref";
#phy-cells = <1>;
status = "disabled";
};
port@2 {
reg = <2>;
phys = <&exynos_usbphy 3>;
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_DEVICE>;
clock-names = "otg";
phys = <&exynos_usbphy 0>;
phy-names = "usb2-phy";
status = "disabled";
};
};
ohci: ohci@12590000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12590000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_HOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
ehci: ehci@12580000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12580000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_HOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
status = "disabled";
};
port@1 {
reg = <1>;
phys = <&exynos_usbphy 2>;
status = "disabled";
};
port@2 {
reg = <2>;
phys = <&exynos_usbphy 3>;
status = "disabled";
};
};
};
i2s1: i2s@13960000 {
compatible = "samsung,s3c6410-i2s";
reg = <0x13960000 0x100>;
clocks = <&clock CLK_I2S1>;
clock-names = "iis";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk1";
dmas = <&pdma1 12>, <&pdma1 11>;
dma-names = "tx", "rx";
#sound-dai-cells = <1>;
status = "disabled";
};
ohci: ohci@12590000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12590000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB_HOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
status = "disabled";
};
};
i2s2: i2s@13970000 {
compatible = "samsung,s3c6410-i2s";
reg = <0x13970000 0x100>;
clocks = <&clock CLK_I2S2>;
clock-names = "iis";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk2";
dmas = <&pdma0 14>, <&pdma0 13>;
dma-names = "tx", "rx";
#sound-dai-cells = <1>;
status = "disabled";
};
i2s1: i2s@13960000 {
compatible = "samsung,s3c6410-i2s";
reg = <0x13960000 0x100>;
clocks = <&clock CLK_I2S1>;
clock-names = "iis";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk1";
dmas = <&pdma1 12>, <&pdma1 11>;
dma-names = "tx", "rx";
#sound-dai-cells = <1>;
status = "disabled";
};
mfc: codec@13400000 {
compatible = "samsung,mfc-v5";
reg = <0x13400000 0x10000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
iommu-names = "left", "right";
};
i2s2: i2s@13970000 {
compatible = "samsung,s3c6410-i2s";
reg = <0x13970000 0x100>;
clocks = <&clock CLK_I2S2>;
clock-names = "iis";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk2";
dmas = <&pdma0 14>, <&pdma0 13>;
dma-names = "tx", "rx";
#sound-dai-cells = <1>;
status = "disabled";
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma0 15>, <&pdma0 16>;
dma-names = "rx", "tx";
status = "disabled";
};
mfc: codec@13400000 {
compatible = "samsung,mfc-v5";
reg = <0x13400000 0x10000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
iommu-names = "left", "right";
};
serial_1: serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma1 15>, <&pdma1 16>;
dma-names = "rx", "tx";
status = "disabled";
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma0 15>, <&pdma0 16>;
dma-names = "rx", "tx";
status = "disabled";
};
serial_2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma0 17>, <&pdma0 18>;
dma-names = "rx", "tx";
status = "disabled";
};
serial_1: serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma1 15>, <&pdma1 16>;
dma-names = "rx", "tx";
status = "disabled";
};
serial_3: serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma1 17>, <&pdma1 18>;
dma-names = "rx", "tx";
status = "disabled";
};
serial_2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma0 17>, <&pdma0 18>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c_0: i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
status = "disabled";
};
serial_3: serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
dmas = <&pdma1 17>, <&pdma1 18>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c_1: i2c@13870000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
status = "disabled";
};
i2c_0: i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
status = "disabled";
};
i2c_2: i2c@13880000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
status = "disabled";
};
i2c_1: i2c@13870000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
status = "disabled";
};
i2c_3: i2c@13890000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
status = "disabled";
};
i2c_2: i2c@13880000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
status = "disabled";
};
i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C4>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c4_bus>;
status = "disabled";
};
i2c_3: i2c@13890000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
status = "disabled";
};
i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C5>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_bus>;
status = "disabled";
};
i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C4>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c4_bus>;
status = "disabled";
};
i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C6>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_bus>;
status = "disabled";
};
i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C5>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_bus>;
status = "disabled";
};
i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C7>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c7_bus>;
status = "disabled";
};
i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C6>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_bus>;
status = "disabled";
};
i2c_8: i2c@138e0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x138E0000 0x100>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C_HDMI>;
clock-names = "i2c";
status = "disabled";
hdmi_i2c_phy: hdmiphy@38 {
compatible = "exynos4210-hdmiphy";
reg = <0x38>;
i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C7>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c7_bus>;
status = "disabled";
};
};
spi_0: spi@13920000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13920000 0x100>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
status = "disabled";
};
i2c_8: i2c@138e0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x138E0000 0x100>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C_HDMI>;
clock-names = "i2c";
status = "disabled";
spi_1: spi@13930000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13930000 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma1 7>, <&pdma1 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
status = "disabled";
};
hdmi_i2c_phy: hdmiphy@38 {
compatible = "exynos4210-hdmiphy";
reg = <0x38>;
};
};
spi_2: spi@13940000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13940000 0x100>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
status = "disabled";
};
spi_0: spi@13920000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13920000 0x100>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
status = "disabled";
};
pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PWM>;
clock-names = "timers";
#pwm-cells = <3>;
status = "disabled";
};
spi_1: spi@13930000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13930000 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma1 7>, <&pdma1 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
status = "disabled";
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
spi_2: spi@13940000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13940000 0x100>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
status = "disabled";
};
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: mdma@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PWM>;
clock-names = "timers";
#pwm-cells = <3>;
status = "disabled";
};
};
fimd: fimd@11c00000 {
compatible = "samsung,exynos4210-fimd";
interrupt-parent = <&combiner>;
reg = <0x11c00000 0x20000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <11 0>, <11 1>, <11 2>;
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_fimd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: mdma@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
};
tmu: tmu@100c0000 {
#include "exynos4412-tmu-sensor-conf.dtsi"
};
fimd: fimd@11c00000 {
compatible = "samsung,exynos4210-fimd";
interrupt-parent = <&combiner>;
reg = <0x11c00000 0x20000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <11 0>, <11 1>, <11 2>;
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_fimd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
jpeg_codec: jpeg-codec@11840000 {
compatible = "samsung,exynos4210-jpeg";
reg = <0x11840000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_JPEG>;
clock-names = "jpeg";
power-domains = <&pd_cam>;
iommus = <&sysmmu_jpeg>;
};
tmu: tmu@100c0000 {
interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>;
interrupts = <2 4>;
status = "disabled";
#include "exynos4412-tmu-sensor-conf.dtsi"
};
rotator: rotator@12810000 {
compatible = "samsung,exynos4210-rotator";
reg = <0x12810000 0x64>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
iommus = <&sysmmu_rotator>;
};
jpeg_codec: jpeg-codec@11840000 {
compatible = "samsung,exynos4210-jpeg";
reg = <0x11840000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_JPEG>;
clock-names = "jpeg";
power-domains = <&pd_cam>;
iommus = <&sysmmu_jpeg>;
};
hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
"mout_hdmi";
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
<&clock CLK_MOUT_HDMI>;
phy = <&hdmi_i2c_phy>;
power-domains = <&pd_tv>;
samsung,syscon-phandle = <&pmu_system_controller>;
#sound-dai-cells = <0>;
status = "disabled";
};
rotator: rotator@12810000 {
compatible = "samsung,exynos4210-rotator";
reg = <0x12810000 0x64>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
iommus = <&sysmmu_rotator>;
};
hdmicec: cec@100b0000 {
compatible = "samsung,s5p-cec";
reg = <0x100B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec";
samsung,syscon-phandle = <&pmu_system_controller>;
hdmi-phandle = <&hdmi>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>;
status = "disabled";
};
hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
"sclk_hdmiphy", "mout_hdmi";
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
<&clock CLK_SCLK_PIXEL>,
<&clock CLK_SCLK_HDMIPHY>,
<&clock CLK_MOUT_HDMI>;
phy = <&hdmi_i2c_phy>;
power-domains = <&pd_tv>;
samsung,syscon-phandle = <&pmu_system_controller>;
#sound-dai-cells = <0>;
status = "disabled";
};
mixer: mixer@12c10000 {
compatible = "samsung,exynos4210-mixer";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
power-domains = <&pd_tv>;
iommus = <&sysmmu_tv>;
status = "disabled";
};
hdmicec: cec@100b0000 {
compatible = "samsung,s5p-cec";
reg = <0x100B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec";
samsung,syscon-phandle = <&pmu_system_controller>;
hdmi-phandle = <&hdmi>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>;
status = "disabled";
};
ppmu_dmc0: ppmu_dmc0@106a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106a0000 0x2000>;
clocks = <&clock CLK_PPMUDMC0>;
clock-names = "ppmu";
status = "disabled";
};
mixer: mixer@12c10000 {
compatible = "samsung,exynos4210-mixer";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
power-domains = <&pd_tv>;
iommus = <&sysmmu_tv>;
status = "disabled";
};
ppmu_dmc1: ppmu_dmc1@106b0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106b0000 0x2000>;
clocks = <&clock CLK_PPMUDMC1>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_dmc0: ppmu_dmc0@106a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106a0000 0x2000>;
clocks = <&clock CLK_PPMUDMC0>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_cpu: ppmu_cpu@106c0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106c0000 0x2000>;
clocks = <&clock CLK_PPMUCPU>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_dmc1: ppmu_dmc1@106b0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106b0000 0x2000>;
clocks = <&clock CLK_PPMUDMC1>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_acp: ppmu_acp@10ae0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106e0000 0x2000>;
status = "disabled";
};
ppmu_cpu: ppmu_cpu@106c0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106c0000 0x2000>;
clocks = <&clock CLK_PPMUCPU>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_rightbus: ppmu_rightbus@112a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x112a0000 0x2000>;
clocks = <&clock CLK_PPMURIGHT>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_rightbus: ppmu_rightbus@112a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x112a0000 0x2000>;
clocks = <&clock CLK_PPMURIGHT>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_leftbus: ppmu_leftbus0@116a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x116a0000 0x2000>;
clocks = <&clock CLK_PPMULEFT>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_leftbus: ppmu_leftbus0@116a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x116a0000 0x2000>;
clocks = <&clock CLK_PPMULEFT>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_camif: ppmu_camif@11ac0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11ac0000 0x2000>;
clocks = <&clock CLK_PPMUCAMIF>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_camif: ppmu_camif@11ac0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11ac0000 0x2000>;
clocks = <&clock CLK_PPMUCAMIF>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_lcd0: ppmu_lcd0@11e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11e40000 0x2000>;
clocks = <&clock CLK_PPMULCD0>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_lcd0: ppmu_lcd0@11e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11e40000 0x2000>;
clocks = <&clock CLK_PPMULCD0>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_fsys: ppmu_g3d@12630000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12630000 0x2000>;
status = "disabled";
};
ppmu_fsys: ppmu_g3d@12630000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12630000 0x2000>;
status = "disabled";
};
ppmu_image: ppmu_image@12aa0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12aa0000 0x2000>;
clocks = <&clock CLK_PPMUIMAGE>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_image: ppmu_image@12aa0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12aa0000 0x2000>;
clocks = <&clock CLK_PPMUIMAGE>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_tv: ppmu_tv@12e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12e40000 0x2000>;
clocks = <&clock CLK_PPMUTV>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_tv: ppmu_tv@12e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12e40000 0x2000>;
clocks = <&clock CLK_PPMUTV>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_g3d: ppmu_g3d@13220000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13220000 0x2000>;
clocks = <&clock CLK_PPMUG3D>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_g3d: ppmu_g3d@13220000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13220000 0x2000>;
clocks = <&clock CLK_PPMUG3D>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_mfc_left: ppmu_mfc_left@13660000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13660000 0x2000>;
clocks = <&clock CLK_PPMUMFC_L>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_mfc_left: ppmu_mfc_left@13660000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13660000 0x2000>;
clocks = <&clock CLK_PPMUMFC_L>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_mfc_right: ppmu_mfc_right@13670000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13670000 0x2000>;
clocks = <&clock CLK_PPMUMFC_R>;
clock-names = "ppmu";
status = "disabled";
};
ppmu_mfc_right: ppmu_mfc_right@13670000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13670000 0x2000>;
clocks = <&clock CLK_PPMUMFC_R>;
clock-names = "ppmu";
status = "disabled";
};
sysmmu_mfc_l: sysmmu@13620000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13620000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_mfc_l: sysmmu@13620000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13620000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_mfc_r: sysmmu@13630000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13630000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_mfc_r: sysmmu@13630000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13630000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_tv: sysmmu@12e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
power-domains = <&pd_tv>;
#iommu-cells = <0>;
};
sysmmu_tv: sysmmu@12e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
power-domains = <&pd_tv>;
#iommu-cells = <0>;
};
sysmmu_fimc0: sysmmu@11a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc0: sysmmu@11a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc1: sysmmu@11a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc1: sysmmu@11a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc2: sysmmu@11a40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc2: sysmmu@11a40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc3: sysmmu@11a50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc3: sysmmu@11a50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_rotator: sysmmu@12a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
#iommu-cells = <0>;
};
sysmmu_rotator: sysmmu@12a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>,
<&clock CLK_ROTATOR>;
#iommu-cells = <0>;
};
sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
sss: sss@10830000 {
compatible = "samsung,exynos4210-secss";
reg = <0x10830000 0x300>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
sss: sss@10830000 {
compatible = "samsung,exynos4210-secss";
reg = <0x10830000 0x300>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
prng: rng@10830400 {
compatible = "samsung,exynos4-rng";
reg = <0x10830400 0x200>;
clocks = <&clock CLK_SSS>;
clock-names = "secss";
prng: rng@10830400 {
compatible = "samsung,exynos4-rng";
reg = <0x10830400 0x200>;
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
};
};
arch/arm/boot/dts/exynos4210-pinctrl.dtsi
View file @ e238310c
......@@ -13,853 +13,851 @@
#include <dt-bindings/pinctrl/samsung.h>
/ {
pinctrl@11400000 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
&pinctrl_0 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
interrupt-controller;
#interrupt-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe0: gpe0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe1: gpe1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe2: gpe2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe3: gpe3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe4: gpe4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf3: gpf3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_a: uart-audio-a {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_b: uart-audio-b {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpb-0", "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c4_bus: i2c4-bus {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpb-4", "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c5_bus: i2c5-bus {
samsung,pins = "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
ac97_bus: ac97-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s2_bus: i2s2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm2_bus: pcm2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpc1-0", "gpc1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c6_bus: i2c6-bus {
samsung,pins = "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi2_bus: spi2-bus {
samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c7_bus: i2c7-bus {
samsung,pins = "gpd0-2", "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ctrl: lcd-ctrl {
samsung,pins = "gpd0-0", "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_sync: lcd-sync {
samsung,pins = "gpf0-0", "gpf0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_en: lcd-en {
samsung,pins = "gpe3-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_clk: lcd-clk {
samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data16: lcd-data-width16 {
samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
"gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
"gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data18: lcd-data-width18 {
samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
"gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
"gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data24: lcd-data-width24 {
samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
"gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
"gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pinctrl_1 {
gpj0: gpj0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj1: gpj1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk1: gpk1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk2: gpk2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk3: gpk3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl0: gpl0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl1: gpl1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl2: gpl2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpy0: gpy0 {
gpio-controller;
#gpio-cells = <2>;
};
gpy1: gpy1 {
gpio-controller;
#gpio-cells = <2>;
};
gpy2: gpy2 {
gpio-controller;
#gpio-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
gpy3: gpy3 {
gpio-controller;
#gpio-cells = <2>;
};
gpy4: gpy4 {
gpio-controller;
#gpio-cells = <2>;
};
gpy5: gpy5 {
gpio-controller;
#gpio-cells = <2>;
};
gpy6: gpy6 {
gpio-controller;
#gpio-cells = <2>;
};
gpx0: gpx0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx1: gpx1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx2: gpx2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
interrupt-controller;
#interrupt-cells = <2>;
};
gpx3: gpx3 {
gpio-controller;
#gpio-cells = <2>;
gpb: gpb {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
interrupt-controller;
#interrupt-cells = <2>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
sd0_cmd: sd0-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_clk: sd4-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cmd: sd4-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cd: sd4-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus1: sd4-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus4: sd4-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus8: sd4-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpk1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpk1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cd: sd1-cd {
samsung,pins = "gpk1-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpk1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpk2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpk2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpk2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpk2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus8: sd2-bus-width8 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_clk: sd3-clk {
samsung,pins = "gpk3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cmd: sd3-cmd {
samsung,pins = "gpk3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cd: sd3-cd {
samsung,pins = "gpk3-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus1: sd3-bus-width1 {
samsung,pins = "gpk3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus4: sd3-bus-width4 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
eint0: ext-int0 {
samsung,pins = "gpx0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint8: ext-int8 {
samsung,pins = "gpx1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint15: ext-int15 {
samsung,pins = "gpx1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint16: ext-int16 {
samsung,pins = "gpx2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint31: ext-int31 {
samsung,pins = "gpx3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
hdmi_cec: hdmi-cec {
samsung,pins = "gpx3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pinctrl_2 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
};
i2s0_bus: i2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4", "gpz-5", "gpz-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe0: gpe0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe1: gpe1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe2: gpe2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe3: gpe3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe4: gpe4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf3: gpf3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_a: uart-audio-a {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_b: uart-audio-b {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpb-0", "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c4_bus: i2c4-bus {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpb-4", "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c5_bus: i2c5-bus {
samsung,pins = "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
ac97_bus: ac97-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s2_bus: i2s2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm2_bus: pcm2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpc1-0", "gpc1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c6_bus: i2c6-bus {
samsung,pins = "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi2_bus: spi2-bus {
samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c7_bus: i2c7-bus {
samsung,pins = "gpd0-2", "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ctrl: lcd-ctrl {
samsung,pins = "gpd0-0", "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_sync: lcd-sync {
samsung,pins = "gpf0-0", "gpf0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_en: lcd-en {
samsung,pins = "gpe3-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_clk: lcd-clk {
samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data16: lcd-data-width16 {
samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
"gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
"gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data18: lcd-data-width18 {
samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
"gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
"gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data24: lcd-data-width24 {
samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
"gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
"gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
pinctrl@11000000 {
gpj0: gpj0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj1: gpj1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk1: gpk1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk2: gpk2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk3: gpk3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl0: gpl0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl1: gpl1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl2: gpl2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpy0: gpy0 {
gpio-controller;
#gpio-cells = <2>;
};
gpy1: gpy1 {
gpio-controller;
#gpio-cells = <2>;
};
gpy2: gpy2 {
gpio-controller;
#gpio-cells = <2>;
};
gpy3: gpy3 {
gpio-controller;
#gpio-cells = <2>;
};
gpy4: gpy4 {
gpio-controller;
#gpio-cells = <2>;
};
gpy5: gpy5 {
gpio-controller;
#gpio-cells = <2>;
};
gpy6: gpy6 {
gpio-controller;
#gpio-cells = <2>;
};
gpx0: gpx0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx1: gpx1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx2: gpx2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpx3: gpx3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_clk: sd4-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cmd: sd4-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cd: sd4-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus1: sd4-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus4: sd4-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus8: sd4-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpk1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpk1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cd: sd1-cd {
samsung,pins = "gpk1-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpk1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpk2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpk2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpk2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpk2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus8: sd2-bus-width8 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_clk: sd3-clk {
samsung,pins = "gpk3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cmd: sd3-cmd {
samsung,pins = "gpk3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cd: sd3-cd {
samsung,pins = "gpk3-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus1: sd3-bus-width1 {
samsung,pins = "gpk3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus4: sd3-bus-width4 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
eint0: ext-int0 {
samsung,pins = "gpx0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint8: ext-int8 {
samsung,pins = "gpx1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint15: ext-int15 {
samsung,pins = "gpx1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint16: ext-int16 {
samsung,pins = "gpx2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint31: ext-int31 {
samsung,pins = "gpx3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
hdmi_cec: hdmi-cec {
samsung,pins = "gpx3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
pinctrl@3860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
};
i2s0_bus: i2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4", "gpz-5", "gpz-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
arch/arm/boot/dts/exynos4210-trats.dts
View file @ e238310c
......@@ -148,43 +148,12 @@ map1 {
};
};
camera {
pinctrl-names = "default";
pinctrl-0 = <>;
status = "okay";
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
&camera {
pinctrl-names = "default";
pinctrl-0 = <>;
status = "okay";
};
&cpu0 {
......@@ -234,6 +203,38 @@ &exynos_usbphy {
vbus-supply = <&safe1_sreg>;
};
&fimc_0 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_1 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_2 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_3 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimd {
status = "okay";
};
......@@ -275,6 +276,7 @@ &i2c_5 {
max8997_pmic@66 {
compatible = "maxim,max8997-pmic";
interrupts-extended = <&gpx0 7 0>, <&gpx2 3 0>;
reg = <0x66>;
interrupt-parent = <&gpx0>;
......
arch/arm/boot/dts/exynos4210-universal_c210.dts
View file @ e238310c
......@@ -28,24 +28,6 @@ chosen {
stdout-path = &serial_2;
};
sysram@2020000 {
smp-sysram@0 {
status = "disabled";
};
smp-sysram@5000 {
compatible = "samsung,exynos4210-sysram";
reg = <0x5000 0x1000>;
};
smp-sysram@1f000 {
status = "disabled";
};
};
mct@10050000 {
compatible = "none";
};
fixed-rate-clocks {
xxti {
......@@ -173,45 +155,6 @@ lcd_ep: endpoint {
};
};
camera {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
hdmi_en: voltage-regulator-hdmi-5v {
compatible = "regulator-fixed";
regulator-name = "HDMI_5V";
......@@ -234,6 +177,13 @@ hdmi_ddc: i2c-ddc {
};
};
&camera {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
&cpu0 {
cpu0-supply = <&vdd_arm_reg>;
};
......@@ -250,6 +200,38 @@ &exynos_usbphy {
vbus-supply = <&safeout1_reg>;
};
&fimc_0 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_1 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_2 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimc_3 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
&fimd {
pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
pinctrl-names = "default";
......@@ -501,6 +483,10 @@ &i2c_8 {
status = "okay";
};
&mct {
compatible = "none";
};
&mdma1 {
reg = <0x12840000 0x1000>;
};
......@@ -579,3 +565,18 @@ &serial_3 {
/delete-property/dmas;
/delete-property/dma-names;
};
&sysram {
smp-sysram@0 {
status = "disabled";
};
smp-sysram@5000 {
compatible = "samsung,exynos4210-sysram";
reg = <0x5000 0x1000>;
};
smp-sysram@1f000 {
status = "disabled";
};
};
arch/arm/boot/dts/exynos4210.dtsi
View file @ e238310c
......@@ -17,7 +17,6 @@
*/
#include "exynos4.dtsi"
#include "exynos4210-pinctrl.dtsi"
#include "exynos4-cpu-thermal.dtsi"
/ {
......@@ -49,8 +48,6 @@ cpu0: cpu@900 {
400000 975000
200000 950000
>;
cooling-min-level = <4>;
cooling-max-level = <2>;
#cooling-cells = <2>; /* min followed by max */
};
......@@ -61,365 +58,323 @@ cpu@901 {
};
};
sysram: sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x20000>;
soc: soc {
sysram: sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x20000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
smp-sysram@1f000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x1f000 0x1000>;
smp-sysram@1f000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x1f000 0x1000>;
};
};
};
pd_lcd1: lcd1-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
label = "LCD1";
};
pd_lcd1: lcd1-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
label = "LCD1";
};
l2c: l2-cache-controller@10502000 {
compatible = "arm,pl310-cache";
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <2 2 1>;
};
l2c: l2-cache-controller@10502000 {
compatible = "arm,pl310-cache";
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <2 2 1>;
};
mct: mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
mct: mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map =
<0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
<5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
watchdog: watchdog@10060000 {
compatible = "samsung,s3c6410-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
};
clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
watchdog: watchdog@10060000 {
compatible = "samsung,s3c6410-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
};
};
pinctrl_2: pinctrl@3860000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x03860000 0x1000>;
};
clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
};
tmu: tmu@100c0000 {
compatible = "samsung,exynos4210-tmu";
interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>;
interrupts = <2 4>;
clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
samsung,tmu_gain = <15>;
samsung,tmu_reference_voltage = <7>;
status = "disabled";
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
trips {
cpu_alert0: cpu-alert-0 {
temperature = <85000>; /* millicelsius */
};
cpu_alert1: cpu-alert-1 {
temperature = <100000>; /* millicelsius */
};
cpu_alert2: cpu-alert-2 {
temperature = <110000>; /* millicelsius */
};
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
g2d: g2d@12800000 {
compatible = "samsung,s5pv210-g2d";
reg = <0x12800000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_g2d>;
};
camera {
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
pinctrl_2: pinctrl@3860000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x03860000 0x1000>;
};
fimc_0: fimc@11800000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
g2d: g2d@12800000 {
compatible = "samsung,s5pv210-g2d";
reg = <0x12800000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_g2d>;
};
fimc_1: fimc@11810000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
ppmu_acp: ppmu_acp@10ae0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x10ae0000 0x2000>;
status = "disabled";
};
fimc_2: fimc@11820000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,lcd-wb;
ppmu_lcd1: ppmu_lcd1@12240000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12240000 0x2000>;
clocks = <&clock CLK_PPMULCD1>;
clock-names = "ppmu";
status = "disabled";
};
fimc_3: fimc@11830000 {
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,lcd-wb;
sysmmu_g2d: sysmmu@12a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
};
mixer: mixer@12c10000 {
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
"sclk_mixer";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
<&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
};
sysmmu_fimd1: sysmmu@12220000 {
compatible = "samsung,exynos-sysmmu";
interrupt-parent = <&combiner>;
reg = <0x12220000 0x1000>;
interrupts = <5 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
power-domains = <&pd_lcd1>;
#iommu-cells = <0>;
};
ppmu_lcd1: ppmu_lcd1@12240000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12240000 0x2000>;
clocks = <&clock CLK_PPMULCD1>;
clock-names = "ppmu";
status = "disabled";
};
bus_dmc: bus_dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
sysmmu_g2d: sysmmu@12a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
bus_acp: bus_acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
};
sysmmu_fimd1: sysmmu@12220000 {
compatible = "samsung,exynos-sysmmu";
interrupt-parent = <&combiner>;
reg = <0x12220000 0x1000>;
interrupts = <5 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
power-domains = <&pd_lcd1>;
#iommu-cells = <0>;
};
bus_peri: bus_peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
};
bus_dmc: bus_dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
bus_fsys: bus_fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
};
bus_acp: bus_acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
};
bus_display: bus_display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
};
bus_peri: bus_peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
};
bus_lcd0: bus_lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK200>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_fsys: bus_fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
};
bus_leftbus: bus_leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_display: bus_display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
};
bus_rightbus: bus_rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_lcd0: bus_lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK200>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_mfc: bus_mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_leftbus: bus_leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_dmc_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
bus_rightbus: bus_rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_mfc: bus_mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <1025000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1050000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1150000>;
};
};
bus_dmc_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
bus_acp_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <1025000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1050000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1150000>;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
};
};
bus_acp_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
bus_peri_opp_table: opp_table3 {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-5000000 {
opp-hz = /bits/ 64 <5000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
};
};
bus_peri_opp_table: opp_table3 {
compatible = "operating-points-v2";
opp-shared;
bus_fsys_opp_table: opp_table4 {
compatible = "operating-points-v2";
opp-shared;
opp-5000000 {
opp-hz = /bits/ 64 <5000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-10000000 {
opp-hz = /bits/ 64 <10000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
};
};
bus_fsys_opp_table: opp_table4 {
compatible = "operating-points-v2";
opp-shared;
bus_display_opp_table: opp_table5 {
compatible = "operating-points-v2";
opp-shared;
opp-10000000 {
opp-hz = /bits/ 64 <10000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
};
};
bus_display_opp_table: opp_table5 {
compatible = "operating-points-v2";
opp-shared;
bus_leftbus_opp_table: opp_table6 {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
};
};
bus_leftbus_opp_table: opp_table6 {
compatible = "operating-points-v2";
opp-shared;
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
trips {
cpu_alert0: cpu-alert-0 {
temperature = <85000>; /* millicelsius */
};
cpu_alert1: cpu-alert-1 {
temperature = <100000>; /* millicelsius */
};
cpu_alert2: cpu-alert-2 {
temperature = <110000>; /* millicelsius */
};
};
};
};
};
......@@ -428,6 +383,12 @@ &gic {
cpu-offset = <0x8000>;
};
&camera {
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
};
&combiner {
samsung,combiner-nr = <16>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
......@@ -448,10 +409,43 @@ &combiner {
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
&fimc_0 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
};
&fimc_1 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
};
&fimc_2 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,lcd-wb;
};
&fimc_3 {
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,lcd-wb;
};
&mdma1 {
power-domains = <&pd_lcd0>;
};
&mixer {
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
"sclk_mixer";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
<&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
};
&pmu_system_controller {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
......@@ -468,3 +462,13 @@ &rotator {
&sysmmu_rotator {
power-domains = <&pd_lcd0>;
};
&tmu {
compatible = "samsung,exynos4210-tmu";
clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
samsung,tmu_gain = <15>;
samsung,tmu_reference_voltage = <7>;
};
#include "exynos4210-pinctrl.dtsi"
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi 0 → 100644
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos4412 based Galaxy S3 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*/
/dts-v1/;
#include "exynos4412-midas.dtsi"
/ {
aliases {
i2c9 = &i2c_ak8975;
i2c10 = &i2c_cm36651;
};
regulators {
lcd_vdd3_reg: voltage-regulator-2 {
compatible = "regulator-fixed";
regulator-name = "LCD_VDD_2.2V";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
ps_als_reg: voltage-regulator-5 {
compatible = "regulator-fixed";
regulator-name = "LED_A_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
i2c_ak8975: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
};
};
i2c_cm36651: i2c-gpio-2 {
compatible = "i2c-gpio";
gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
cm36651@18 {
compatible = "capella,cm36651";
reg = <0x18>;
interrupt-parent = <&gpx0>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
vled-supply = <&ps_als_reg>;
};
};
};
&buck9_reg {
maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
};
&cam_af_reg {
gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&cam_io_reg {
gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&dsi_0 {
status = "okay";
panel@0 {
compatible = "samsung,s6e8aa0";
reg = <0>;
vdd3-supply = <&lcd_vdd3_reg>;
vci-supply = <&ldo25_reg>;
reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
power-on-delay= <50>;
reset-delay = <100>;
init-delay = <100>;
flip-horizontal;
flip-vertical;
panel-width-mm = <58>;
panel-height-mm = <103>;
display-timings {
timing-0 {
clock-frequency = <57153600>;
hactive = <720>;
vactive = <1280>;
hfront-porch = <5>;
hback-porch = <5>;
hsync-len = <5>;
vfront-porch = <13>;
vback-porch = <1>;
vsync-len = <2>;
};
};
};
};
&i2c_3 {
mms114-touchscreen@48 {
compatible = "melfas,mms114";
reg = <0x48>;
interrupt-parent = <&gpm2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
x-size = <720>;
y-size = <1280>;
avdd-supply = <&ldo23_reg>;
vdd-supply = <&ldo24_reg>;
};
};
&ldo25_reg {
regulator-name = "LCD_VCC_3.3V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
&s5c73m3 {
standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
vdda-supply = <&ldo17_reg>;
status = "okay";
};
arch/arm/boot/dts/exynos4412-i9300.dts 0 → 100644
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos4412 based M0 (GT-I9300) board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*/
/dts-v1/;
#include "exynos4412-galaxy-s3.dtsi"
/ {
model = "Samsung Galaxy S3 (GT-I9300) based on Exynos4412";
compatible = "samsung,i9300", "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
/* bootargs are passed in by bootloader */
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};
};
arch/arm/boot/dts/exynos4412-i9305.dts 0 → 100644
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "exynos4412-galaxy-s3.dtsi"
/ {
model = "Samsung Galaxy S3 (GT-I9305) based on Exynos4412";
compatible = "samsung,i9305", "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
/* bootargs are passed in by bootloader */
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
};
&i2c0_bus {
/* SCL and SDA pins are swapped */
samsung,pins = "gpd1-1", "gpd1-0";
};
arch/arm/boot/dts/exynos4412-itop-elite.dts
View file @ e238310c
......@@ -116,14 +116,6 @@ beep {
compatible = "pwm-beeper";
pwms = <&pwm 0 4000000 PWM_POLARITY_INVERTED>;
};
camera: camera {
pinctrl-0 = <&cam_port_a_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
};
&adc {
......@@ -131,6 +123,14 @@ &adc {
status = "okay";
};
&camera {
pinctrl-0 = <&cam_port_a_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
......
arch/arm/boot/dts/exynos4412-midas.dtsi 0 → 100644
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos4412 based Trats 2 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Device tree source file for Samsung's Trats 2 board which is based on
* Samsung's Exynos4412 SoC.
*/
/dts-v1/;
#include "exynos4412.dtsi"
#include "exynos4412-ppmu-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/maxim,max77686.h>
#include <dt-bindings/pinctrl/samsung.h>
/ {
compatible = "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
aliases {
i2c11 = &i2c_max77693;
i2c12 = &i2c_max77693_fuel;
};
chosen {
stdout-path = &serial_2;
};
firmware@204f000 {
compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti", "fixed-clock";
clock-frequency = <0>;
};
xusbxti {
compatible = "samsung,clock-xusbxti", "fixed-clock";
clock-frequency = <24000000>;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
cam_io_reg: voltage-regulator-1 {
compatible = "regulator-fixed";
regulator-name = "CAM_SENSOR_A";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
status = "disabled";
};
cam_af_reg: voltage-regulator-3 {
compatible = "regulator-fixed";
regulator-name = "CAM_AF";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
status = "disabled";
};
vsil12: voltage-regulator-6 {
compatible = "regulator-fixed";
regulator-name = "VSIL_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&buck7_reg>;
};
vcc33mhl: voltage-regulator-7 {
compatible = "regulator-fixed";
regulator-name = "VCC_3.3_MHL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc18mhl: voltage-regulator-8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8_MHL";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
gpio-keys {
compatible = "gpio-keys";
key-down {
gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
linux,code = <114>;
label = "volume down";
debounce-interval = <10>;
};
key-up {
gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
linux,code = <115>;
label = "volume up";
debounce-interval = <10>;
};
key-power {
gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "power";
debounce-interval = <10>;
wakeup-source;
};
key-ok {
gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
linux,code = <139>;
label = "ok";
debounce-inteval = <10>;
wakeup-source;
};
};
i2c_max77693: i2c-gpio-1 {
compatible = "i2c-gpio";
gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max77693@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
reg = <0x66>;
regulators {
esafeout1_reg: ESAFEOUT1 {
regulator-name = "ESAFEOUT1";
};
esafeout2_reg: ESAFEOUT2 {
regulator-name = "ESAFEOUT2";
};
charger_reg: CHARGER {
regulator-name = "CHARGER";
regulator-min-microamp = <60000>;
regulator-max-microamp = <2580000>;
};
};
max77693_haptic {
compatible = "maxim,max77693-haptic";
haptic-supply = <&ldo26_reg>;
pwms = <&pwm 0 38022 0>;
};
charger {
compatible = "maxim,max77693-charger";
maxim,constant-microvolt = <4350000>;
maxim,min-system-microvolt = <3600000>;
maxim,thermal-regulation-celsius = <100>;
maxim,battery-overcurrent-microamp = <3500000>;
maxim,charge-input-threshold-microvolt = <4300000>;
};
};
};
i2c_max77693_fuel: i2c-gpio-3 {
compatible = "i2c-gpio";
gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max77693-fuel-gauge@36 {
compatible = "maxim,max17047";
interrupt-parent = <&gpx2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
reg = <0x36>;
maxim,over-heat-temp = <700>;
maxim,over-volt = <4500>;
};
};
i2c-mhl {
compatible = "i2c-gpio";
gpios = <&gpf0 4 GPIO_ACTIVE_HIGH>, <&gpf0 6 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <100>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&i2c_mhl_bus>;
pinctrl-names = "default";
status = "okay";
sii9234: hdmi-bridge@39 {
compatible = "sil,sii9234";
avcc33-supply = <&vcc33mhl>;
iovcc18-supply = <&vcc18mhl>;
avcc12-supply = <&vsil12>;
cvcc12-supply = <&vsil12>;
reset-gpios = <&gpf3 4 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpf3>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x39>;
port {
mhl_to_hdmi: endpoint {
remote-endpoint = <&hdmi_to_mhl>;
};
};
};
};
wlan_pwrseq: sdhci3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpj0 0 GPIO_ACTIVE_LOW>;
clocks = <&max77686 MAX77686_CLK_PMIC>;
clock-names = "ext_clock";
};
sound {
compatible = "samsung,trats2-audio";
samsung,i2s-controller = <&i2s0>;
samsung,model = "Trats2";
samsung,audio-codec = <&wm1811>;
samsung,audio-routing =
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"SPK", "SPKOUTRN",
"SPK", "SPKOUTRP";
};
thermistor-ap {
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>; /* VCC_1.8V_AP */
pullup-ohm = <100000>; /* 100K */
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 1>; /* AP temperature */
};
thermistor-battery {
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>; /* VCC_1.8V_AP */
pullup-ohm = <100000>; /* 100K */
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>;
};
};
};
};
};
&adc {
vdd-supply = <&ldo3_reg>;
status = "okay";
};
&bus_dmc {
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
vdd-supply = <&buck1_reg>;
status = "okay";
};
&bus_acp {
devfreq = <&bus_dmc>;
status = "okay";
};
&bus_c2c {
devfreq = <&bus_dmc>;
status = "okay";
};
&bus_leftbus {
devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
vdd-supply = <&buck3_reg>;
status = "okay";
};
&bus_rightbus {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_display {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_fsys {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_peri {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_mfc {
devfreq = <&bus_leftbus>;
status = "okay";
};
&camera {
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>,
<&clock CLK_MOUT_CAM1>;
assigned-clock-parents = <&clock CLK_XUSBXTI>,
<&clock CLK_XUSBXTI>;
};
&cpu0 {
cpu0-supply = <&buck2_reg>;
};
&csis_0 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
assigned-clocks = <&clock CLK_MOUT_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera C (3) MIPI CSI-2 (CSIS0) */
port@3 {
reg = <3>;
csis0_ep: endpoint {
remote-endpoint = <&s5c73m3_ep>;
data-lanes = <1 2 3 4>;
samsung,csis-hs-settle = <12>;
};
};
};
&csis_1 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
assigned-clocks = <&clock CLK_MOUT_CSIS1>,
<&clock CLK_SCLK_CSIS1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera D (4) MIPI CSI-2 (CSIS1) */
port@4 {
reg = <4>;
csis1_ep: endpoint {
remote-endpoint = <&is_s5k6a3_ep>;
data-lanes = <1>;
samsung,csis-hs-settle = <18>;
samsung,csis-wclk;
};
};
};
&dsi_0 {
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
samsung,burst-clock-frequency = <500000000>;
samsung,esc-clock-frequency = <20000000>;
samsung,pll-clock-frequency = <24000000>;
};
&exynos_usbphy {
vbus-supply = <&esafeout1_reg>;
status = "okay";
};
&fimc_0 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_1 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_2 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_3 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_is {
pinctrl-0 = <&fimc_is_uart>;
pinctrl-names = "default";
status = "okay";
};
&fimc_lite_0 {
status = "okay";
};
&fimc_lite_1 {
status = "okay";
};
&fimd {
status = "okay";
};
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd>;
vdd-supply = <&ldo3_reg>;
vdd_osc-supply = <&ldo4_reg>;
vdd_pll-supply = <&ldo3_reg>;
ddc = <&i2c_5>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
hdmi_to_mhl: endpoint {
remote-endpoint = <&mhl_to_hdmi>;
};
};
};
};
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
dr_mode = "peripheral";
status = "okay";
};
&i2c_0 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
status = "okay";
s5c73m3: s5c73m3@3c {
compatible = "samsung,s5c73m3";
reg = <0x3c>;
xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
vdd-int-supply = <&buck9_reg>;
vddio-cis-supply = <&ldo9_reg>;
vddio-host-supply = <&ldo18_reg>;
vdd-af-supply = <&cam_af_reg>;
vdd-reg-supply = <&cam_io_reg>;
clock-frequency = <24000000>;
/* CAM_A_CLKOUT */
clocks = <&camera 0>;
clock-names = "cis_extclk";
status = "disabled";
port {
s5c73m3_ep: endpoint {
remote-endpoint = <&csis0_ep>;
data-lanes = <1 2 3 4>;
};
};
};
};
&i2c1_isp {
pinctrl-0 = <&fimc_is_i2c1>;
pinctrl-names = "default";
s5k6a3@10 {
compatible = "samsung,s5k6a3";
reg = <0x10>;
svdda-supply = <&cam_io_reg>;
svddio-supply = <&ldo19_reg>;
afvdd-supply = <&ldo19_reg>;
clock-frequency = <24000000>;
/* CAM_B_CLKOUT */
clocks = <&camera 1>;
clock-names = "extclk";
samsung,camclk-out = <1>;
gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
port {
is_s5k6a3_ep: endpoint {
remote-endpoint = <&csis1_ep>;
data-lanes = <1>;
};
};
};
};
&i2c_3 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
status = "okay";
};
&i2c_4 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c4_bus>;
pinctrl-names = "default";
status = "okay";
wm1811: wm1811@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
clock-names = "MCLK1";
DCVDD-supply = <&ldo3_reg>;
DBVDD1-supply = <&ldo3_reg>;
wlf,ldo1ena = <&gpj0 4 0>;
};
};
&i2c_5 {
status = "okay";
};
&i2c_7 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c7_bus>;
pinctrl-names = "default";
status = "okay";
max77686: max77686_pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
reg = <0x09>;
#clock-cells = <1>;
voltage-regulators {
ldo1_reg: LDO1 {
regulator-name = "VALIVE_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "VM1M2_1.2V_AP";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo3_reg: LDO3 {
regulator-name = "VCC_1.8V_AP";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: LDO4 {
regulator-name = "VCC_2.8V_AP";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
ldo5_reg: LDO5 {
regulator-name = "VCC_1.8V_IO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "VMPLL_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo7_reg: LDO7 {
regulator-name = "VPLL_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo8_reg: LDO8 {
regulator-name = "VMIPI_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo9_reg: LDO9 {
regulator-name = "CAM_ISP_MIPI_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo10_reg: LDO10 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo11_reg: LDO11 {
regulator-name = "VABB1_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo12_reg: LDO12 {
regulator-name = "VUOTG_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo13_reg: LDO13 {
regulator-name = "NFC_AVDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo14_reg: LDO14 {
regulator-name = "VABB2_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo15_reg: LDO15 {
regulator-name = "VHSIC_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo16_reg: LDO16 {
regulator-name = "VHSIC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo17_reg: LDO17 {
regulator-name = "CAM_SENSOR_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo18_reg: LDO18 {
regulator-name = "CAM_ISP_SEN_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo19_reg: LDO19 {
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo20_reg: LDO20 {
regulator-name = "VDDQ_PRE_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo21_reg: LDO21 {
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
};
ldo22_reg: LDO22 {
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
};
ldo23_reg: LDO23 {
regulator-name = "TSP_AVDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo24_reg: LDO24 {
regulator-name = "TSP_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo25_reg: LDO25 {
regulator-name = "LDO25";
};
ldo26_reg: LDO26 {
regulator-name = "MOTOR_VCC_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck5_reg: BUCK5 {
regulator-name = "VMEM_1.2V_AP";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck6_reg: BUCK6 {
regulator-name = "VCC_SUB_1.35V";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
buck7_reg: BUCK7 {
regulator-name = "VCC_SUB_2.0V";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
buck8_reg: BUCK8 {
regulator-name = "VMEM_VDDF_3.0V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
};
buck9_reg: BUCK9 {
regulator-name = "CAM_ISP_CORE_1.2V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1200000>;
};
};
};
};
&i2c_8 {
status = "okay";
};
&i2s0 {
pinctrl-0 = <&i2s0_bus>;
pinctrl-names = "default";
status = "okay";
};
&mixer {
status = "okay";
};
&mshc_0 {
broken-cd;
non-removable;
card-detect-delay = <200>;
vmmc-supply = <&ldo22_reg>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <0>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
bus-width = <8>;
cap-mmc-highspeed;
};
&pmu_system_controller {
assigned-clocks = <&pmu_system_controller 0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
mhl_int: mhl-int {
samsung,pins = "gpf3-5";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i2c_mhl_bus: i2c-mhl-bus {
samsung,pins = "gpf0-4", "gpf0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
sleep0: sleep-states {
PIN_SLP(gpa0-0, INPUT, NONE);
PIN_SLP(gpa0-1, OUT0, NONE);
PIN_SLP(gpa0-2, INPUT, NONE);
PIN_SLP(gpa0-3, INPUT, UP);
PIN_SLP(gpa0-4, INPUT, NONE);
PIN_SLP(gpa0-5, INPUT, DOWN);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, INPUT, UP);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, INPUT, DOWN);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, INPUT, DOWN);
PIN_SLP(gpa1-4, INPUT, DOWN);
PIN_SLP(gpa1-5, INPUT, DOWN);
PIN_SLP(gpb-0, INPUT, NONE);
PIN_SLP(gpb-1, INPUT, NONE);
PIN_SLP(gpb-2, INPUT, NONE);
PIN_SLP(gpb-3, INPUT, NONE);
PIN_SLP(gpb-4, INPUT, DOWN);
PIN_SLP(gpb-5, INPUT, UP);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, INPUT, DOWN);
PIN_SLP(gpc0-0, INPUT, DOWN);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, INPUT, DOWN);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, INPUT, DOWN);
PIN_SLP(gpc1-0, INPUT, NONE);
PIN_SLP(gpc1-1, PREV, NONE);
PIN_SLP(gpc1-2, INPUT, NONE);
PIN_SLP(gpc1-3, INPUT, NONE);
PIN_SLP(gpc1-4, INPUT, NONE);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, INPUT, DOWN);
PIN_SLP(gpd0-2, INPUT, NONE);
PIN_SLP(gpd0-3, INPUT, NONE);
PIN_SLP(gpd1-0, INPUT, DOWN);
PIN_SLP(gpd1-1, INPUT, DOWN);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
PIN_SLP(gpf0-0, INPUT, NONE);
PIN_SLP(gpf0-1, INPUT, NONE);
PIN_SLP(gpf0-2, INPUT, DOWN);
PIN_SLP(gpf0-3, INPUT, DOWN);
PIN_SLP(gpf0-4, INPUT, NONE);
PIN_SLP(gpf0-5, INPUT, DOWN);
PIN_SLP(gpf0-6, INPUT, NONE);
PIN_SLP(gpf0-7, INPUT, DOWN);
PIN_SLP(gpf1-0, INPUT, DOWN);
PIN_SLP(gpf1-1, INPUT, DOWN);
PIN_SLP(gpf1-2, INPUT, DOWN);
PIN_SLP(gpf1-3, INPUT, DOWN);
PIN_SLP(gpf1-4, INPUT, NONE);
PIN_SLP(gpf1-5, INPUT, NONE);
PIN_SLP(gpf1-6, INPUT, DOWN);
PIN_SLP(gpf1-7, PREV, NONE);
PIN_SLP(gpf2-0, PREV, NONE);
PIN_SLP(gpf2-1, INPUT, DOWN);
PIN_SLP(gpf2-2, INPUT, DOWN);
PIN_SLP(gpf2-3, INPUT, DOWN);
PIN_SLP(gpf2-4, INPUT, DOWN);
PIN_SLP(gpf2-5, INPUT, DOWN);
PIN_SLP(gpf2-6, INPUT, NONE);
PIN_SLP(gpf2-7, INPUT, NONE);
PIN_SLP(gpf3-0, INPUT, NONE);
PIN_SLP(gpf3-1, PREV, NONE);
PIN_SLP(gpf3-2, PREV, NONE);
PIN_SLP(gpf3-3, PREV, NONE);
PIN_SLP(gpf3-4, OUT1, NONE);
PIN_SLP(gpf3-5, INPUT, DOWN);
PIN_SLP(gpj0-0, PREV, NONE);
PIN_SLP(gpj0-1, PREV, NONE);
PIN_SLP(gpj0-2, PREV, NONE);
PIN_SLP(gpj0-3, INPUT, DOWN);
PIN_SLP(gpj0-4, PREV, NONE);
PIN_SLP(gpj0-5, PREV, NONE);
PIN_SLP(gpj0-6, INPUT, DOWN);
PIN_SLP(gpj0-7, INPUT, DOWN);
PIN_SLP(gpj1-0, INPUT, DOWN);
PIN_SLP(gpj1-1, PREV, NONE);
PIN_SLP(gpj1-2, PREV, NONE);
PIN_SLP(gpj1-3, INPUT, DOWN);
PIN_SLP(gpj1-4, INPUT, DOWN);
};
};
&pinctrl_1 {
pinctrl-names = "default";
pinctrl-0 = <&sleep1>;
hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
};
sleep1: sleep-states {
PIN_SLP(gpk0-0, PREV, NONE);
PIN_SLP(gpk0-1, PREV, NONE);
PIN_SLP(gpk0-2, OUT0, NONE);
PIN_SLP(gpk0-3, PREV, NONE);
PIN_SLP(gpk0-4, PREV, NONE);
PIN_SLP(gpk0-5, PREV, NONE);
PIN_SLP(gpk0-6, PREV, NONE);
PIN_SLP(gpk1-0, INPUT, DOWN);
PIN_SLP(gpk1-1, INPUT, DOWN);
PIN_SLP(gpk1-2, INPUT, DOWN);
PIN_SLP(gpk1-3, PREV, NONE);
PIN_SLP(gpk1-4, PREV, NONE);
PIN_SLP(gpk1-5, PREV, NONE);
PIN_SLP(gpk1-6, PREV, NONE);
PIN_SLP(gpk2-0, INPUT, DOWN);
PIN_SLP(gpk2-1, INPUT, DOWN);
PIN_SLP(gpk2-2, INPUT, DOWN);
PIN_SLP(gpk2-3, INPUT, DOWN);
PIN_SLP(gpk2-4, INPUT, DOWN);
PIN_SLP(gpk2-5, INPUT, DOWN);
PIN_SLP(gpk2-6, INPUT, DOWN);
PIN_SLP(gpk3-0, OUT0, NONE);
PIN_SLP(gpk3-1, INPUT, NONE);
PIN_SLP(gpk3-2, INPUT, DOWN);
PIN_SLP(gpk3-3, INPUT, NONE);
PIN_SLP(gpk3-4, INPUT, NONE);
PIN_SLP(gpk3-5, INPUT, NONE);
PIN_SLP(gpk3-6, INPUT, NONE);
PIN_SLP(gpl0-0, INPUT, DOWN);
PIN_SLP(gpl0-1, INPUT, DOWN);
PIN_SLP(gpl0-2, INPUT, DOWN);
PIN_SLP(gpl0-3, INPUT, DOWN);
PIN_SLP(gpl0-4, PREV, NONE);
PIN_SLP(gpl0-6, PREV, NONE);
PIN_SLP(gpl1-0, INPUT, DOWN);
PIN_SLP(gpl1-1, INPUT, DOWN);
PIN_SLP(gpl2-0, INPUT, DOWN);
PIN_SLP(gpl2-1, INPUT, DOWN);
PIN_SLP(gpl2-2, INPUT, DOWN);
PIN_SLP(gpl2-3, INPUT, DOWN);
PIN_SLP(gpl2-4, INPUT, DOWN);
PIN_SLP(gpl2-5, INPUT, DOWN);
PIN_SLP(gpl2-6, PREV, NONE);
PIN_SLP(gpl2-7, INPUT, DOWN);
PIN_SLP(gpm0-0, INPUT, DOWN);
PIN_SLP(gpm0-1, INPUT, DOWN);
PIN_SLP(gpm0-2, INPUT, DOWN);
PIN_SLP(gpm0-3, INPUT, DOWN);
PIN_SLP(gpm0-4, INPUT, DOWN);
PIN_SLP(gpm0-5, INPUT, DOWN);
PIN_SLP(gpm0-6, INPUT, DOWN);
PIN_SLP(gpm0-7, INPUT, DOWN);
PIN_SLP(gpm1-0, INPUT, DOWN);
PIN_SLP(gpm1-1, INPUT, DOWN);
PIN_SLP(gpm1-2, INPUT, NONE);
PIN_SLP(gpm1-3, INPUT, NONE);
PIN_SLP(gpm1-4, INPUT, NONE);
PIN_SLP(gpm1-5, INPUT, NONE);
PIN_SLP(gpm1-6, INPUT, DOWN);
PIN_SLP(gpm2-0, INPUT, NONE);
PIN_SLP(gpm2-1, INPUT, NONE);
PIN_SLP(gpm2-2, INPUT, DOWN);
PIN_SLP(gpm2-3, INPUT, DOWN);
PIN_SLP(gpm2-4, INPUT, DOWN);
PIN_SLP(gpm3-0, PREV, NONE);
PIN_SLP(gpm3-1, PREV, NONE);
PIN_SLP(gpm3-2, PREV, NONE);
PIN_SLP(gpm3-3, OUT1, NONE);
PIN_SLP(gpm3-4, INPUT, DOWN);
PIN_SLP(gpm3-5, INPUT, DOWN);
PIN_SLP(gpm3-6, INPUT, DOWN);
PIN_SLP(gpm3-7, INPUT, DOWN);
PIN_SLP(gpm4-0, INPUT, DOWN);
PIN_SLP(gpm4-1, INPUT, DOWN);
PIN_SLP(gpm4-2, INPUT, DOWN);
PIN_SLP(gpm4-3, INPUT, DOWN);
PIN_SLP(gpm4-4, INPUT, DOWN);
PIN_SLP(gpm4-5, INPUT, DOWN);
PIN_SLP(gpm4-6, INPUT, DOWN);
PIN_SLP(gpm4-7, INPUT, DOWN);
PIN_SLP(gpy0-0, INPUT, DOWN);
PIN_SLP(gpy0-1, INPUT, DOWN);
PIN_SLP(gpy0-2, INPUT, DOWN);
PIN_SLP(gpy0-3, INPUT, DOWN);
PIN_SLP(gpy0-4, INPUT, DOWN);
PIN_SLP(gpy0-5, INPUT, DOWN);
PIN_SLP(gpy1-0, INPUT, DOWN);
PIN_SLP(gpy1-1, INPUT, DOWN);
PIN_SLP(gpy1-2, INPUT, DOWN);
PIN_SLP(gpy1-3, INPUT, DOWN);
PIN_SLP(gpy2-0, PREV, NONE);
PIN_SLP(gpy2-1, INPUT, DOWN);
PIN_SLP(gpy2-2, INPUT, NONE);
PIN_SLP(gpy2-3, INPUT, NONE);
PIN_SLP(gpy2-4, INPUT, NONE);
PIN_SLP(gpy2-5, INPUT, NONE);
PIN_SLP(gpy3-0, INPUT, DOWN);
PIN_SLP(gpy3-1, INPUT, DOWN);
PIN_SLP(gpy3-2, INPUT, DOWN);
PIN_SLP(gpy3-3, INPUT, DOWN);
PIN_SLP(gpy3-4, INPUT, DOWN);
PIN_SLP(gpy3-5, INPUT, DOWN);
PIN_SLP(gpy3-6, INPUT, DOWN);
PIN_SLP(gpy3-7, INPUT, DOWN);
PIN_SLP(gpy4-0, INPUT, DOWN);
PIN_SLP(gpy4-1, INPUT, DOWN);
PIN_SLP(gpy4-2, INPUT, DOWN);
PIN_SLP(gpy4-3, INPUT, DOWN);
PIN_SLP(gpy4-4, INPUT, DOWN);
PIN_SLP(gpy4-5, INPUT, DOWN);
PIN_SLP(gpy4-6, INPUT, DOWN);
PIN_SLP(gpy4-7, INPUT, DOWN);
PIN_SLP(gpy5-0, INPUT, DOWN);
PIN_SLP(gpy5-1, INPUT, DOWN);
PIN_SLP(gpy5-2, INPUT, DOWN);
PIN_SLP(gpy5-3, INPUT, DOWN);
PIN_SLP(gpy5-4, INPUT, DOWN);
PIN_SLP(gpy5-5, INPUT, DOWN);
PIN_SLP(gpy5-6, INPUT, DOWN);
PIN_SLP(gpy5-7, INPUT, DOWN);
PIN_SLP(gpy6-0, INPUT, DOWN);
PIN_SLP(gpy6-1, INPUT, DOWN);
PIN_SLP(gpy6-2, INPUT, DOWN);
PIN_SLP(gpy6-3, INPUT, DOWN);
PIN_SLP(gpy6-4, INPUT, DOWN);
PIN_SLP(gpy6-5, INPUT, DOWN);
PIN_SLP(gpy6-6, INPUT, DOWN);
PIN_SLP(gpy6-7, INPUT, DOWN);
};
};
&pinctrl_2 {
pinctrl-names = "default";
pinctrl-0 = <&sleep2>;
sleep2: sleep-states {
PIN_SLP(gpz-0, INPUT, DOWN);
PIN_SLP(gpz-1, INPUT, DOWN);
PIN_SLP(gpz-2, INPUT, DOWN);
PIN_SLP(gpz-3, INPUT, DOWN);
PIN_SLP(gpz-4, INPUT, DOWN);
PIN_SLP(gpz-5, INPUT, DOWN);
PIN_SLP(gpz-6, INPUT, DOWN);
};
};
&pinctrl_3 {
pinctrl-names = "default";
pinctrl-0 = <&sleep3>;
sleep3: sleep-states {
PIN_SLP(gpv0-0, INPUT, DOWN);
PIN_SLP(gpv0-1, INPUT, DOWN);
PIN_SLP(gpv0-2, INPUT, DOWN);
PIN_SLP(gpv0-3, INPUT, DOWN);
PIN_SLP(gpv0-4, INPUT, DOWN);
PIN_SLP(gpv0-5, INPUT, DOWN);
PIN_SLP(gpv0-6, INPUT, DOWN);
PIN_SLP(gpv0-7, INPUT, DOWN);
PIN_SLP(gpv1-0, INPUT, DOWN);
PIN_SLP(gpv1-1, INPUT, DOWN);
PIN_SLP(gpv1-2, INPUT, DOWN);
PIN_SLP(gpv1-3, INPUT, DOWN);
PIN_SLP(gpv1-4, INPUT, DOWN);
PIN_SLP(gpv1-5, INPUT, DOWN);
PIN_SLP(gpv1-6, INPUT, DOWN);
PIN_SLP(gpv1-7, INPUT, DOWN);
PIN_SLP(gpv2-0, INPUT, DOWN);
PIN_SLP(gpv2-1, INPUT, DOWN);
PIN_SLP(gpv2-2, INPUT, DOWN);
PIN_SLP(gpv2-3, INPUT, DOWN);
PIN_SLP(gpv2-4, INPUT, DOWN);
PIN_SLP(gpv2-5, INPUT, DOWN);
PIN_SLP(gpv2-6, INPUT, DOWN);
PIN_SLP(gpv2-7, INPUT, DOWN);
PIN_SLP(gpv3-0, INPUT, DOWN);
PIN_SLP(gpv3-1, INPUT, DOWN);
PIN_SLP(gpv3-2, INPUT, DOWN);
PIN_SLP(gpv3-3, INPUT, DOWN);
PIN_SLP(gpv3-4, INPUT, DOWN);
PIN_SLP(gpv3-5, INPUT, DOWN);
PIN_SLP(gpv3-6, INPUT, DOWN);
PIN_SLP(gpv3-7, INPUT, DOWN);
PIN_SLP(gpv4-0, INPUT, DOWN);
};
};
&pwm {
pinctrl-0 = <&pwm0_out>;
pinctrl-names = "default";
samsung,pwm-outputs = <0>;
status = "okay";
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {
bus-width = <4>;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
cd-inverted;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
vmmc-supply = <&ldo21_reg>;
status = "okay";
};
&sdhci_3 {
#address-cells = <1>;
#size-cells = <0>;
non-removable;
bus-width = <4>;
mmc-pwrseq = <&wlan_pwrseq>;
pinctrl-names = "default";
pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpx2>;
interrupts = <5 IRQ_TYPE_NONE>;
interrupt-names = "host-wake";
};
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
&spi_1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
status = "okay";
s5c73m3_spi: s5c73m3@0 {
compatible = "samsung,s5c73m3";
spi-max-frequency = <50000000>;
reg = <0>;
controller-data {
samsung,spi-feedback-delay = <2>;
};
};
};
&tmu {
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
arch/arm/boot/dts/exynos4412-n710x.dts 0 → 100644
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "exynos4412-midas.dtsi"
/ {
compatible = "samsung,n710x", "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
model = "Samsung Galaxy Note 2 (GT-N7100, GT-N7105) based on Exynos4412";
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
/* bootargs are passed in by bootloader */
regulators {
cam_vdda_reg: voltage-regulator-9 {
compatible = "regulator-fixed";
regulator-name = "CAM_SENSOR_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpm4 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
};
&buck9_reg {
maxim,ena-gpios = <&gpm1 0 GPIO_ACTIVE_HIGH>;
};
&cam_af_reg {
gpio = <&gpm1 1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&cam_io_reg {
gpio = <&gpm0 7 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c_3 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
status = "okay";
mms152-touchscreen@48 {
compatible = "melfas,mms152";
reg = <0x48>;
interrupt-parent = <&gpm2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
x-size = <720>;
y-size = <1280>;
avdd-supply = <&ldo23_reg>;
vdd-supply = <&ldo24_reg>;
};
};
&ldo13_reg {
regulator-name = "VCC_1.8V_LCD";
regulator-always-on;
};
&ldo25_reg {
regulator-name = "VCI_3.0V_LCD";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
&s5c73m3 {
standby-gpios = <&gpm0 6 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
vdda-supply = <&cam_vdda_reg>;
status = "okay";
};
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file @ e238310c
......@@ -61,12 +61,6 @@ emmc_pwrseq: pwrseq {
reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
};
camera {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
......@@ -142,6 +136,12 @@ &bus_mfc {
status = "okay";
};
&camera {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
......
arch/arm/boot/dts/exynos4412-pinctrl.dtsi
View file @ e238310c
......@@ -18,964 +18,962 @@ _pin { \
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
}
/ {
pinctrl_0: pinctrl@11400000 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
&pinctrl_0 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf3: gpf3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj0: gpj0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj1: gpj1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_a: uart-audio-a {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_b: uart-audio-b {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpb-0", "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c4_bus: i2c4-bus {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpb-4", "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c5_bus: i2c5-bus {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
ac97_bus: ac97-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s2_bus: i2s2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm2_bus: pcm2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpc1-0", "gpc1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c6_bus: i2c6-bus {
samsung,pins = "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi2_bus: spi2-bus {
samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ctrl: lcd-ctrl {
samsung,pins = "gpd0-0", "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c7_bus: i2c7-bus {
samsung,pins = "gpd0-2", "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
mipi0_clk: mipi0-clk {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
mipi1_clk: mipi1-clk {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_clk: lcd-clk {
samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data16: lcd-data-width16 {
samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
"gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
"gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data18: lcd-data-width18 {
samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
"gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
"gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data24: lcd-data-width24 {
samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
"gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
"gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ldi: lcd-ldi {
samsung,pins = "gpf3-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
pinctrl_1: pinctrl@11000000 {
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk1: gpk1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk2: gpk2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk3: gpk3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl0: gpl0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl1: gpl1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl2: gpl2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm0: gpm0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm1: gpm1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm2: gpm2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm3: gpm3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm4: gpm4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpy0: gpy0 {
gpio-controller;
#gpio-cells = <2>;
};
gpy1: gpy1 {
gpio-controller;
#gpio-cells = <2>;
};
gpy2: gpy2 {
gpio-controller;
#gpio-cells = <2>;
};
gpy3: gpy3 {
gpio-controller;
#gpio-cells = <2>;
};
gpy4: gpy4 {
gpio-controller;
#gpio-cells = <2>;
};
gpy5: gpy5 {
gpio-controller;
#gpio-cells = <2>;
};
gpy6: gpy6 {
gpio-controller;
#gpio-cells = <2>;
};
gpx0: gpx0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx1: gpx1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx2: gpx2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpx3: gpx3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_clk: sd4-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cmd: sd4-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cd: sd4-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus1: sd4-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus4: sd4-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus8: sd4-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpk1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpk1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cd: sd1-cd {
samsung,pins = "gpk1-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpk1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpk2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpk2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpk2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpk2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus8: sd2-bus-width8 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_clk: sd3-clk {
samsung,pins = "gpk3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cmd: sd3-cmd {
samsung,pins = "gpk3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cd: sd3-cd {
samsung,pins = "gpk3-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus1: sd3-bus-width1 {
samsung,pins = "gpk3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus4: sd3-bus-width4 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_b_io: cam-port-b-io {
samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
"gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
"gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_b_clk_active: cam-port-b-clk-active {
samsung,pins = "gpm2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_b_clk_idle: cam-port-b-clk-idle {
samsung,pins = "gpm2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint0: ext-int0 {
samsung,pins = "gpx0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint8: ext-int8 {
samsung,pins = "gpx1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint15: ext-int15 {
samsung,pins = "gpx1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint16: ext-int16 {
samsung,pins = "gpx2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint31: ext-int31 {
samsung,pins = "gpx3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_i2c0: fimc-is-i2c0 {
samsung,pins = "gpm4-0", "gpm4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_i2c1: fimc-is-i2c1 {
samsung,pins = "gpm4-2", "gpm4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpm3-5", "gpm3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
hdmi_cec: hdmi-cec {
samsung,pins = "gpx3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
pinctrl_2: pinctrl@3860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
i2s0_bus: i2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4", "gpz-5", "gpz-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
pinctrl_3: pinctrl@106e0000 {
gpv0: gpv0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv1: gpv1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv2: gpv2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv3: gpv3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv4: gpv4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
c2c_bus: c2c-bus {
samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
"gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
"gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
"gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7",
"gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
"gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
"gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
"gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
"gpv4-0", "gpv4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
interrupt-controller;
#interrupt-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf3: gpf3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj0: gpj0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpj1: gpj1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_a: uart-audio-a {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
uart_audio_b: uart-audio-b {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpb-0", "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c4_bus: i2c4-bus {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpb-4", "gpb-6", "gpb-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c5_bus: i2c5-bus {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm1_bus: pcm1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
ac97_bus: ac97-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2s2_bus: i2s2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm2_bus: pcm2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spdif_bus: spdif-bus {
samsung,pins = "gpc1-0", "gpc1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c6_bus: i2c6-bus {
samsung,pins = "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
spi2_bus: spi2-bus {
samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ctrl: lcd-ctrl {
samsung,pins = "gpd0-0", "gpd0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c7_bus: i2c7-bus {
samsung,pins = "gpd0-2", "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
mipi0_clk: mipi0-clk {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
mipi1_clk: mipi1-clk {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_clk: lcd-clk {
samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data16: lcd-data-width16 {
samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
"gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
"gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data18: lcd-data-width18 {
samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
"gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
"gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_data24: lcd-data-width24 {
samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
"gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
"gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
"gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
"gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
lcd_ldi: lcd-ldi {
samsung,pins = "gpf3-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pinctrl_1 {
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk1: gpk1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk2: gpk2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk3: gpk3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl0: gpl0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl1: gpl1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl2: gpl2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm0: gpm0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm1: gpm1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm2: gpm2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm3: gpm3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm4: gpm4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpy0: gpy0 {
gpio-controller;
#gpio-cells = <2>;
};
gpy1: gpy1 {
gpio-controller;
#gpio-cells = <2>;
};
gpy2: gpy2 {
gpio-controller;
#gpio-cells = <2>;
};
gpy3: gpy3 {
gpio-controller;
#gpio-cells = <2>;
};
gpy4: gpy4 {
gpio-controller;
#gpio-cells = <2>;
};
gpy5: gpy5 {
gpio-controller;
#gpio-cells = <2>;
};
gpy6: gpy6 {
gpio-controller;
#gpio-cells = <2>;
};
gpx0: gpx0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx1: gpx1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
gpx2: gpx2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpx3: gpx3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_clk: sd4-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cmd: sd4-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_cd: sd4-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus1: sd4-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus4: sd4-bus-width4 {
samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd4_bus8: sd4-bus-width8 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpk1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpk1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_cd: sd1-cd {
samsung,pins = "gpk1-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpk1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpk2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpk2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpk2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpk2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd2_bus8: sd2-bus-width8 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_clk: sd3-clk {
samsung,pins = "gpk3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cmd: sd3-cmd {
samsung,pins = "gpk3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_cd: sd3-cd {
samsung,pins = "gpk3-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus1: sd3-bus-width1 {
samsung,pins = "gpk3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
sd3_bus4: sd3-bus-width4 {
samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_b_io: cam-port-b-io {
samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
"gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
"gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
cam_port_b_clk_active: cam-port-b-clk-active {
samsung,pins = "gpm2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
};
cam_port_b_clk_idle: cam-port-b-clk-idle {
samsung,pins = "gpm2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint0: ext-int0 {
samsung,pins = "gpx0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint8: ext-int8 {
samsung,pins = "gpx1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint15: ext-int15 {
samsung,pins = "gpx1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint16: ext-int16 {
samsung,pins = "gpx2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
eint31: ext-int31 {
samsung,pins = "gpx3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_i2c0: fimc-is-i2c0 {
samsung,pins = "gpm4-0", "gpm4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_i2c1: fimc-is-i2c1 {
samsung,pins = "gpm4-2", "gpm4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpm3-5", "gpm3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
hdmi_cec: hdmi-cec {
samsung,pins = "gpx3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pinctrl_2 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
i2s0_bus: i2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4", "gpz-5", "gpz-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
pcm0_bus: pcm0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pinctrl_3 {
gpv0: gpv0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv1: gpv1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv2: gpv2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv3: gpv3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpv4: gpv4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
c2c_bus: c2c-bus {
samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
"gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
"gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
"gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7",
"gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
"gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
"gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
"gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
"gpv4-0", "gpv4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
arch/arm/boot/dts/exynos4412-tiny4412.dts
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* FriendlyARM's Exynos4412 based TINY4412 board device tree source
*
......@@ -5,11 +6,7 @@
*
* Device tree source file for FriendlyARM's TINY4412 board which is based on
* Samsung's Exynos4412 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
/dts-v1/;
#include "exynos4412.dtsi"
......
arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Device tree sources for Exynos4412 TMU sensor configuration
*
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <dt-bindings/thermal/thermal_exynos.h>
......
arch/arm/boot/dts/exynos4412-trats2.dts
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos4412 based Trats 2 board device tree source
*
......@@ -6,30 +7,14 @@
*
* Device tree source file for Samsung's Trats 2 board which is based on
* Samsung's Exynos4412 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
/dts-v1/;
#include "exynos4412.dtsi"
#include "exynos4412-ppmu-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/maxim,max77686.h>
#include <dt-bindings/pinctrl/samsung.h>
#include "exynos4412-galaxy-s3.dtsi"
/ {
model = "Samsung Trats 2 based on Exynos4412";
compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
aliases {
i2c9 = &i2c_ak8975;
i2c10 = &i2c_cm36651;
i2c11 = &i2c_max77693;
i2c12 = &i2c_max77693_fuel;
};
compatible = "samsung,trats2", "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
memory@40000000 {
device_type = "memory";
......@@ -38,1378 +23,5 @@ memory@40000000 {
chosen {
bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
stdout-path = &serial_2;
};
firmware@204f000 {
compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti", "fixed-clock";
clock-frequency = <0>;
};
xusbxti {
compatible = "samsung,clock-xusbxti", "fixed-clock";
clock-frequency = <24000000>;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
cam_io_reg: voltage-regulator-1 {
compatible = "regulator-fixed";
regulator-name = "CAM_SENSOR_A";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
lcd_vdd3_reg: voltage-regulator-2 {
compatible = "regulator-fixed";
regulator-name = "LCD_VDD_2.2V";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
cam_af_reg: voltage-regulator-3 {
compatible = "regulator-fixed";
regulator-name = "CAM_AF";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
ps_als_reg: voltage-regulator-5 {
compatible = "regulator-fixed";
regulator-name = "LED_A_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vsil12: voltage-regulator-6 {
compatible = "regulator-fixed";
regulator-name = "VSIL_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&buck7_reg>;
};
vcc33mhl: voltage-regulator-7 {
compatible = "regulator-fixed";
regulator-name = "VCC_3.3_MHL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc18mhl: voltage-regulator-8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8_MHL";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpl0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
gpio-keys {
compatible = "gpio-keys";
key-down {
gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
linux,code = <114>;
label = "volume down";
debounce-interval = <10>;
};
key-up {
gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
linux,code = <115>;
label = "volume up";
debounce-interval = <10>;
};
key-power {
gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "power";
debounce-interval = <10>;
wakeup-source;
};
key-ok {
gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
linux,code = <139>;
label = "ok";
debounce-inteval = <10>;
wakeup-source;
};
};
i2c_max77693: i2c-gpio-1 {
compatible = "i2c-gpio";
gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max77693@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
reg = <0x66>;
regulators {
esafeout1_reg: ESAFEOUT1 {
regulator-name = "ESAFEOUT1";
};
esafeout2_reg: ESAFEOUT2 {
regulator-name = "ESAFEOUT2";
};
charger_reg: CHARGER {
regulator-name = "CHARGER";
regulator-min-microamp = <60000>;
regulator-max-microamp = <2580000>;
};
};
max77693_haptic {
compatible = "maxim,max77693-haptic";
haptic-supply = <&ldo26_reg>;
pwms = <&pwm 0 38022 0>;
};
charger {
compatible = "maxim,max77693-charger";
maxim,constant-microvolt = <4350000>;
maxim,min-system-microvolt = <3600000>;
maxim,thermal-regulation-celsius = <100>;
maxim,battery-overcurrent-microamp = <3500000>;
maxim,charge-input-threshold-microvolt = <4300000>;
};
};
};
i2c_max77693_fuel: i2c-gpio-3 {
compatible = "i2c-gpio";
gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max77693-fuel-gauge@36 {
compatible = "maxim,max17047";
interrupt-parent = <&gpx2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
reg = <0x36>;
maxim,over-heat-temp = <700>;
maxim,over-volt = <4500>;
};
};
i2c_ak8975: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
};
};
i2c_cm36651: i2c-gpio-2 {
compatible = "i2c-gpio";
gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
cm36651@18 {
compatible = "capella,cm36651";
reg = <0x18>;
interrupt-parent = <&gpx0>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
vled-supply = <&ps_als_reg>;
};
};
i2c-mhl {
compatible = "i2c-gpio";
gpios = <&gpf0 4 GPIO_ACTIVE_HIGH>, <&gpf0 6 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <100>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&i2c_mhl_bus>;
pinctrl-names = "default";
status = "okay";
sii9234: hdmi-bridge@39 {
compatible = "sil,sii9234";
avcc33-supply = <&vcc33mhl>;
iovcc18-supply = <&vcc18mhl>;
avcc12-supply = <&vsil12>;
cvcc12-supply = <&vsil12>;
reset-gpios = <&gpf3 4 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpf3>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x39>;
port {
mhl_to_hdmi: endpoint {
remote-endpoint = <&hdmi_to_mhl>;
};
};
};
};
camera: camera {
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>,
<&clock CLK_MOUT_CAM1>;
assigned-clock-parents = <&clock CLK_XUSBXTI>,
<&clock CLK_XUSBXTI>;
};
wlan_pwrseq: sdhci3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpj0 0 GPIO_ACTIVE_LOW>;
clocks = <&max77686 MAX77686_CLK_PMIC>;
clock-names = "ext_clock";
};
sound {
compatible = "samsung,trats2-audio";
samsung,i2s-controller = <&i2s0>;
samsung,model = "Trats2";
samsung,audio-codec = <&wm1811>;
samsung,audio-routing =
"SPK", "SPKOUTLN",
"SPK", "SPKOUTLP",
"SPK", "SPKOUTRN",
"SPK", "SPKOUTRP";
};
thermistor-ap {
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>; /* VCC_1.8V_AP */
pullup-ohm = <100000>; /* 100K */
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 1>; /* AP temperature */
};
thermistor-battery {
compatible = "murata,ncp15wb473";
pullup-uv = <1800000>; /* VCC_1.8V_AP */
pullup-ohm = <100000>; /* 100K */
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
thermal-zones {
cpu_thermal: cpu-thermal {
cooling-maps {
map0 {
/* Corresponds to 800MHz at freq_table */
cooling-device = <&cpu0 7 7>;
};
map1 {
/* Corresponds to 200MHz at freq_table */
cooling-device = <&cpu0 13 13>;
};
};
};
};
};
&adc {
vdd-supply = <&ldo3_reg>;
status = "okay";
};
&bus_dmc {
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
vdd-supply = <&buck1_reg>;
status = "okay";
};
&bus_acp {
devfreq = <&bus_dmc>;
status = "okay";
};
&bus_c2c {
devfreq = <&bus_dmc>;
status = "okay";
};
&bus_leftbus {
devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
vdd-supply = <&buck3_reg>;
status = "okay";
};
&bus_rightbus {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_display {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_fsys {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_peri {
devfreq = <&bus_leftbus>;
status = "okay";
};
&bus_mfc {
devfreq = <&bus_leftbus>;
status = "okay";
};
&cpu0 {
cpu0-supply = <&buck2_reg>;
};
&csis_0 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
assigned-clocks = <&clock CLK_MOUT_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera C (3) MIPI CSI-2 (CSIS0) */
port@3 {
reg = <3>;
csis0_ep: endpoint {
remote-endpoint = <&s5c73m3_ep>;
data-lanes = <1 2 3 4>;
samsung,csis-hs-settle = <12>;
};
};
};
&csis_1 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
assigned-clocks = <&clock CLK_MOUT_CSIS1>,
<&clock CLK_SCLK_CSIS1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera D (4) MIPI CSI-2 (CSIS1) */
port@4 {
reg = <4>;
csis1_ep: endpoint {
remote-endpoint = <&is_s5k6a3_ep>;
data-lanes = <1>;
samsung,csis-hs-settle = <18>;
samsung,csis-wclk;
};
};
};
&dsi_0 {
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
samsung,burst-clock-frequency = <500000000>;
samsung,esc-clock-frequency = <20000000>;
samsung,pll-clock-frequency = <24000000>;
status = "okay";
panel@0 {
compatible = "samsung,s6e8aa0";
reg = <0>;
vdd3-supply = <&lcd_vdd3_reg>;
vci-supply = <&ldo25_reg>;
reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
power-on-delay= <50>;
reset-delay = <100>;
init-delay = <100>;
flip-horizontal;
flip-vertical;
panel-width-mm = <58>;
panel-height-mm = <103>;
display-timings {
timing-0 {
clock-frequency = <57153600>;
hactive = <720>;
vactive = <1280>;
hfront-porch = <5>;
hback-porch = <5>;
hsync-len = <5>;
vfront-porch = <13>;
vback-porch = <1>;
vsync-len = <2>;
};
};
};
};
&exynos_usbphy {
vbus-supply = <&esafeout1_reg>;
status = "okay";
};
&fimc_0 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_1 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_2 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_3 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&fimc_is {
pinctrl-0 = <&fimc_is_uart>;
pinctrl-names = "default";
status = "okay";
i2c1_isp: i2c-isp@12140000 {
pinctrl-0 = <&fimc_is_i2c1>;
pinctrl-names = "default";
s5k6a3@10 {
compatible = "samsung,s5k6a3";
reg = <0x10>;
svdda-supply = <&cam_io_reg>;
svddio-supply = <&ldo19_reg>;
afvdd-supply = <&ldo19_reg>;
clock-frequency = <24000000>;
/* CAM_B_CLKOUT */
clocks = <&camera 1>;
clock-names = "extclk";
samsung,camclk-out = <1>;
gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
port {
is_s5k6a3_ep: endpoint {
remote-endpoint = <&csis1_ep>;
data-lanes = <1>;
};
};
};
};
};
&fimc_lite_0 {
status = "okay";
};
&fimc_lite_1 {
status = "okay";
};
&fimd {
status = "okay";
};
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd>;
vdd-supply = <&ldo3_reg>;
vdd_osc-supply = <&ldo4_reg>;
vdd_pll-supply = <&ldo3_reg>;
ddc = <&i2c_5>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
hdmi_to_mhl: endpoint {
remote-endpoint = <&mhl_to_hdmi>;
};
};
};
};
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
dr_mode = "peripheral";
status = "okay";
};
&i2c_0 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
status = "okay";
s5c73m3@3c {
compatible = "samsung,s5c73m3";
reg = <0x3c>;
standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
vdd-int-supply = <&buck9_reg>;
vddio-cis-supply = <&ldo9_reg>;
vdda-supply = <&ldo17_reg>;
vddio-host-supply = <&ldo18_reg>;
vdd-af-supply = <&cam_af_reg>;
vdd-reg-supply = <&cam_io_reg>;
clock-frequency = <24000000>;
/* CAM_A_CLKOUT */
clocks = <&camera 0>;
clock-names = "cis_extclk";
port {
s5c73m3_ep: endpoint {
remote-endpoint = <&csis0_ep>;
data-lanes = <1 2 3 4>;
};
};
};
};
&i2c_3 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
status = "okay";
mms114-touchscreen@48 {
compatible = "melfas,mms114";
reg = <0x48>;
interrupt-parent = <&gpm2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
x-size = <720>;
y-size = <1280>;
avdd-supply = <&ldo23_reg>;
vdd-supply = <&ldo24_reg>;
};
};
&i2c_4 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c4_bus>;
pinctrl-names = "default";
status = "okay";
wm1811: wm1811@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
clock-names = "MCLK1";
DCVDD-supply = <&ldo3_reg>;
DBVDD1-supply = <&ldo3_reg>;
wlf,ldo1ena = <&gpj0 4 0>;
};
};
&i2c_5 {
status = "okay";
};
&i2c_7 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c7_bus>;
pinctrl-names = "default";
status = "okay";
max77686: max77686_pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
reg = <0x09>;
#clock-cells = <1>;
voltage-regulators {
ldo1_reg: LDO1 {
regulator-name = "VALIVE_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "VM1M2_1.2V_AP";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo3_reg: LDO3 {
regulator-name = "VCC_1.8V_AP";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: LDO4 {
regulator-name = "VCC_2.8V_AP";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
ldo5_reg: LDO5 {
regulator-name = "VCC_1.8V_IO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "VMPLL_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo7_reg: LDO7 {
regulator-name = "VPLL_1.0V_AP";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo8_reg: LDO8 {
regulator-name = "VMIPI_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo9_reg: LDO9 {
regulator-name = "CAM_ISP_MIPI_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo10_reg: LDO10 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo11_reg: LDO11 {
regulator-name = "VABB1_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo12_reg: LDO12 {
regulator-name = "VUOTG_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo13_reg: LDO13 {
regulator-name = "NFC_AVDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo14_reg: LDO14 {
regulator-name = "VABB2_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo15_reg: LDO15 {
regulator-name = "VHSIC_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo16_reg: LDO16 {
regulator-name = "VHSIC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo17_reg: LDO17 {
regulator-name = "CAM_SENSOR_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo18_reg: LDO18 {
regulator-name = "CAM_ISP_SEN_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo19_reg: LDO19 {
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo20_reg: LDO20 {
regulator-name = "VDDQ_PRE_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo21_reg: LDO21 {
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
};
ldo22_reg: LDO22 {
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
};
ldo23_reg: LDO23 {
regulator-name = "TSP_AVDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo24_reg: LDO24 {
regulator-name = "TSP_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo25_reg: LDO25 {
regulator-name = "LCD_VCC_3.3V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo26_reg: LDO26 {
regulator-name = "MOTOR_VCC_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck5_reg: BUCK5 {
regulator-name = "VMEM_1.2V_AP";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck6_reg: BUCK6 {
regulator-name = "VCC_SUB_1.35V";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
buck7_reg: BUCK7 {
regulator-name = "VCC_SUB_2.0V";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
buck8_reg: BUCK8 {
regulator-name = "VMEM_VDDF_3.0V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
};
buck9_reg: BUCK9 {
regulator-name = "CAM_ISP_CORE_1.2V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1200000>;
maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
};
};
};
};
&i2c_8 {
status = "okay";
};
&i2s0 {
pinctrl-0 = <&i2s0_bus>;
pinctrl-names = "default";
status = "okay";
};
&mixer {
status = "okay";
};
&mshc_0 {
broken-cd;
non-removable;
card-detect-delay = <200>;
vmmc-supply = <&ldo22_reg>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <0>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
bus-width = <8>;
cap-mmc-highspeed;
};
&pmu_system_controller {
assigned-clocks = <&pmu_system_controller 0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
mhl_int: mhl-int {
samsung,pins = "gpf3-5";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i2c_mhl_bus: i2c-mhl-bus {
samsung,pins = "gpf0-4", "gpf0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
sleep0: sleep-states {
PIN_SLP(gpa0-0, INPUT, NONE);
PIN_SLP(gpa0-1, OUT0, NONE);
PIN_SLP(gpa0-2, INPUT, NONE);
PIN_SLP(gpa0-3, INPUT, UP);
PIN_SLP(gpa0-4, INPUT, NONE);
PIN_SLP(gpa0-5, INPUT, DOWN);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, INPUT, UP);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, INPUT, DOWN);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, INPUT, DOWN);
PIN_SLP(gpa1-4, INPUT, DOWN);
PIN_SLP(gpa1-5, INPUT, DOWN);
PIN_SLP(gpb-0, INPUT, NONE);
PIN_SLP(gpb-1, INPUT, NONE);
PIN_SLP(gpb-2, INPUT, NONE);
PIN_SLP(gpb-3, INPUT, NONE);
PIN_SLP(gpb-4, INPUT, DOWN);
PIN_SLP(gpb-5, INPUT, UP);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, INPUT, DOWN);
PIN_SLP(gpc0-0, INPUT, DOWN);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, INPUT, DOWN);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, INPUT, DOWN);
PIN_SLP(gpc1-0, INPUT, NONE);
PIN_SLP(gpc1-1, PREV, NONE);
PIN_SLP(gpc1-2, INPUT, NONE);
PIN_SLP(gpc1-3, INPUT, NONE);
PIN_SLP(gpc1-4, INPUT, NONE);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, INPUT, DOWN);
PIN_SLP(gpd0-2, INPUT, NONE);
PIN_SLP(gpd0-3, INPUT, NONE);
PIN_SLP(gpd1-0, INPUT, DOWN);
PIN_SLP(gpd1-1, INPUT, DOWN);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
PIN_SLP(gpf0-0, INPUT, NONE);
PIN_SLP(gpf0-1, INPUT, NONE);
PIN_SLP(gpf0-2, INPUT, DOWN);
PIN_SLP(gpf0-3, INPUT, DOWN);
PIN_SLP(gpf0-4, INPUT, NONE);
PIN_SLP(gpf0-5, INPUT, DOWN);
PIN_SLP(gpf0-6, INPUT, NONE);
PIN_SLP(gpf0-7, INPUT, DOWN);
PIN_SLP(gpf1-0, INPUT, DOWN);
PIN_SLP(gpf1-1, INPUT, DOWN);
PIN_SLP(gpf1-2, INPUT, DOWN);
PIN_SLP(gpf1-3, INPUT, DOWN);
PIN_SLP(gpf1-4, INPUT, NONE);
PIN_SLP(gpf1-5, INPUT, NONE);
PIN_SLP(gpf1-6, INPUT, DOWN);
PIN_SLP(gpf1-7, PREV, NONE);
PIN_SLP(gpf2-0, PREV, NONE);
PIN_SLP(gpf2-1, INPUT, DOWN);
PIN_SLP(gpf2-2, INPUT, DOWN);
PIN_SLP(gpf2-3, INPUT, DOWN);
PIN_SLP(gpf2-4, INPUT, DOWN);
PIN_SLP(gpf2-5, INPUT, DOWN);
PIN_SLP(gpf2-6, INPUT, NONE);
PIN_SLP(gpf2-7, INPUT, NONE);
PIN_SLP(gpf3-0, INPUT, NONE);
PIN_SLP(gpf3-1, PREV, NONE);
PIN_SLP(gpf3-2, PREV, NONE);
PIN_SLP(gpf3-3, PREV, NONE);
PIN_SLP(gpf3-4, OUT1, NONE);
PIN_SLP(gpf3-5, INPUT, DOWN);
PIN_SLP(gpj0-0, PREV, NONE);
PIN_SLP(gpj0-1, PREV, NONE);
PIN_SLP(gpj0-2, PREV, NONE);
PIN_SLP(gpj0-3, INPUT, DOWN);
PIN_SLP(gpj0-4, PREV, NONE);
PIN_SLP(gpj0-5, PREV, NONE);
PIN_SLP(gpj0-6, INPUT, DOWN);
PIN_SLP(gpj0-7, INPUT, DOWN);
PIN_SLP(gpj1-0, INPUT, DOWN);
PIN_SLP(gpj1-1, PREV, NONE);
PIN_SLP(gpj1-2, PREV, NONE);
PIN_SLP(gpj1-3, INPUT, DOWN);
PIN_SLP(gpj1-4, INPUT, DOWN);
};
};
&pinctrl_1 {
pinctrl-names = "default";
pinctrl-0 = <&sleep1>;
hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
};
sleep1: sleep-states {
PIN_SLP(gpk0-0, PREV, NONE);
PIN_SLP(gpk0-1, PREV, NONE);
PIN_SLP(gpk0-2, OUT0, NONE);
PIN_SLP(gpk0-3, PREV, NONE);
PIN_SLP(gpk0-4, PREV, NONE);
PIN_SLP(gpk0-5, PREV, NONE);
PIN_SLP(gpk0-6, PREV, NONE);
PIN_SLP(gpk1-0, INPUT, DOWN);
PIN_SLP(gpk1-1, INPUT, DOWN);
PIN_SLP(gpk1-2, INPUT, DOWN);
PIN_SLP(gpk1-3, PREV, NONE);
PIN_SLP(gpk1-4, PREV, NONE);
PIN_SLP(gpk1-5, PREV, NONE);
PIN_SLP(gpk1-6, PREV, NONE);
PIN_SLP(gpk2-0, INPUT, DOWN);
PIN_SLP(gpk2-1, INPUT, DOWN);
PIN_SLP(gpk2-2, INPUT, DOWN);
PIN_SLP(gpk2-3, INPUT, DOWN);
PIN_SLP(gpk2-4, INPUT, DOWN);
PIN_SLP(gpk2-5, INPUT, DOWN);
PIN_SLP(gpk2-6, INPUT, DOWN);
PIN_SLP(gpk3-0, OUT0, NONE);
PIN_SLP(gpk3-1, INPUT, NONE);
PIN_SLP(gpk3-2, INPUT, DOWN);
PIN_SLP(gpk3-3, INPUT, NONE);
PIN_SLP(gpk3-4, INPUT, NONE);
PIN_SLP(gpk3-5, INPUT, NONE);
PIN_SLP(gpk3-6, INPUT, NONE);
PIN_SLP(gpl0-0, INPUT, DOWN);
PIN_SLP(gpl0-1, INPUT, DOWN);
PIN_SLP(gpl0-2, INPUT, DOWN);
PIN_SLP(gpl0-3, INPUT, DOWN);
PIN_SLP(gpl0-4, PREV, NONE);
PIN_SLP(gpl0-6, PREV, NONE);
PIN_SLP(gpl1-0, INPUT, DOWN);
PIN_SLP(gpl1-1, INPUT, DOWN);
PIN_SLP(gpl2-0, INPUT, DOWN);
PIN_SLP(gpl2-1, INPUT, DOWN);
PIN_SLP(gpl2-2, INPUT, DOWN);
PIN_SLP(gpl2-3, INPUT, DOWN);
PIN_SLP(gpl2-4, INPUT, DOWN);
PIN_SLP(gpl2-5, INPUT, DOWN);
PIN_SLP(gpl2-6, PREV, NONE);
PIN_SLP(gpl2-7, INPUT, DOWN);
PIN_SLP(gpm0-0, INPUT, DOWN);
PIN_SLP(gpm0-1, INPUT, DOWN);
PIN_SLP(gpm0-2, INPUT, DOWN);
PIN_SLP(gpm0-3, INPUT, DOWN);
PIN_SLP(gpm0-4, INPUT, DOWN);
PIN_SLP(gpm0-5, INPUT, DOWN);
PIN_SLP(gpm0-6, INPUT, DOWN);
PIN_SLP(gpm0-7, INPUT, DOWN);
PIN_SLP(gpm1-0, INPUT, DOWN);
PIN_SLP(gpm1-1, INPUT, DOWN);
PIN_SLP(gpm1-2, INPUT, NONE);
PIN_SLP(gpm1-3, INPUT, NONE);
PIN_SLP(gpm1-4, INPUT, NONE);
PIN_SLP(gpm1-5, INPUT, NONE);
PIN_SLP(gpm1-6, INPUT, DOWN);
PIN_SLP(gpm2-0, INPUT, NONE);
PIN_SLP(gpm2-1, INPUT, NONE);
PIN_SLP(gpm2-2, INPUT, DOWN);
PIN_SLP(gpm2-3, INPUT, DOWN);
PIN_SLP(gpm2-4, INPUT, DOWN);
PIN_SLP(gpm3-0, PREV, NONE);
PIN_SLP(gpm3-1, PREV, NONE);
PIN_SLP(gpm3-2, PREV, NONE);
PIN_SLP(gpm3-3, OUT1, NONE);
PIN_SLP(gpm3-4, INPUT, DOWN);
PIN_SLP(gpm3-5, INPUT, DOWN);
PIN_SLP(gpm3-6, INPUT, DOWN);
PIN_SLP(gpm3-7, INPUT, DOWN);
PIN_SLP(gpm4-0, INPUT, DOWN);
PIN_SLP(gpm4-1, INPUT, DOWN);
PIN_SLP(gpm4-2, INPUT, DOWN);
PIN_SLP(gpm4-3, INPUT, DOWN);
PIN_SLP(gpm4-4, INPUT, DOWN);
PIN_SLP(gpm4-5, INPUT, DOWN);
PIN_SLP(gpm4-6, INPUT, DOWN);
PIN_SLP(gpm4-7, INPUT, DOWN);
PIN_SLP(gpy0-0, INPUT, DOWN);
PIN_SLP(gpy0-1, INPUT, DOWN);
PIN_SLP(gpy0-2, INPUT, DOWN);
PIN_SLP(gpy0-3, INPUT, DOWN);
PIN_SLP(gpy0-4, INPUT, DOWN);
PIN_SLP(gpy0-5, INPUT, DOWN);
PIN_SLP(gpy1-0, INPUT, DOWN);
PIN_SLP(gpy1-1, INPUT, DOWN);
PIN_SLP(gpy1-2, INPUT, DOWN);
PIN_SLP(gpy1-3, INPUT, DOWN);
PIN_SLP(gpy2-0, PREV, NONE);
PIN_SLP(gpy2-1, INPUT, DOWN);
PIN_SLP(gpy2-2, INPUT, NONE);
PIN_SLP(gpy2-3, INPUT, NONE);
PIN_SLP(gpy2-4, INPUT, NONE);
PIN_SLP(gpy2-5, INPUT, NONE);
PIN_SLP(gpy3-0, INPUT, DOWN);
PIN_SLP(gpy3-1, INPUT, DOWN);
PIN_SLP(gpy3-2, INPUT, DOWN);
PIN_SLP(gpy3-3, INPUT, DOWN);
PIN_SLP(gpy3-4, INPUT, DOWN);
PIN_SLP(gpy3-5, INPUT, DOWN);
PIN_SLP(gpy3-6, INPUT, DOWN);
PIN_SLP(gpy3-7, INPUT, DOWN);
PIN_SLP(gpy4-0, INPUT, DOWN);
PIN_SLP(gpy4-1, INPUT, DOWN);
PIN_SLP(gpy4-2, INPUT, DOWN);
PIN_SLP(gpy4-3, INPUT, DOWN);
PIN_SLP(gpy4-4, INPUT, DOWN);
PIN_SLP(gpy4-5, INPUT, DOWN);
PIN_SLP(gpy4-6, INPUT, DOWN);
PIN_SLP(gpy4-7, INPUT, DOWN);
PIN_SLP(gpy5-0, INPUT, DOWN);
PIN_SLP(gpy5-1, INPUT, DOWN);
PIN_SLP(gpy5-2, INPUT, DOWN);
PIN_SLP(gpy5-3, INPUT, DOWN);
PIN_SLP(gpy5-4, INPUT, DOWN);
PIN_SLP(gpy5-5, INPUT, DOWN);
PIN_SLP(gpy5-6, INPUT, DOWN);
PIN_SLP(gpy5-7, INPUT, DOWN);
PIN_SLP(gpy6-0, INPUT, DOWN);
PIN_SLP(gpy6-1, INPUT, DOWN);
PIN_SLP(gpy6-2, INPUT, DOWN);
PIN_SLP(gpy6-3, INPUT, DOWN);
PIN_SLP(gpy6-4, INPUT, DOWN);
PIN_SLP(gpy6-5, INPUT, DOWN);
PIN_SLP(gpy6-6, INPUT, DOWN);
PIN_SLP(gpy6-7, INPUT, DOWN);
};
};
&pinctrl_2 {
pinctrl-names = "default";
pinctrl-0 = <&sleep2>;
sleep2: sleep-states {
PIN_SLP(gpz-0, INPUT, DOWN);
PIN_SLP(gpz-1, INPUT, DOWN);
PIN_SLP(gpz-2, INPUT, DOWN);
PIN_SLP(gpz-3, INPUT, DOWN);
PIN_SLP(gpz-4, INPUT, DOWN);
PIN_SLP(gpz-5, INPUT, DOWN);
PIN_SLP(gpz-6, INPUT, DOWN);
};
};
&pinctrl_3 {
pinctrl-names = "default";
pinctrl-0 = <&sleep3>;
sleep3: sleep-states {
PIN_SLP(gpv0-0, INPUT, DOWN);
PIN_SLP(gpv0-1, INPUT, DOWN);
PIN_SLP(gpv0-2, INPUT, DOWN);
PIN_SLP(gpv0-3, INPUT, DOWN);
PIN_SLP(gpv0-4, INPUT, DOWN);
PIN_SLP(gpv0-5, INPUT, DOWN);
PIN_SLP(gpv0-6, INPUT, DOWN);
PIN_SLP(gpv0-7, INPUT, DOWN);
PIN_SLP(gpv1-0, INPUT, DOWN);
PIN_SLP(gpv1-1, INPUT, DOWN);
PIN_SLP(gpv1-2, INPUT, DOWN);
PIN_SLP(gpv1-3, INPUT, DOWN);
PIN_SLP(gpv1-4, INPUT, DOWN);
PIN_SLP(gpv1-5, INPUT, DOWN);
PIN_SLP(gpv1-6, INPUT, DOWN);
PIN_SLP(gpv1-7, INPUT, DOWN);
PIN_SLP(gpv2-0, INPUT, DOWN);
PIN_SLP(gpv2-1, INPUT, DOWN);
PIN_SLP(gpv2-2, INPUT, DOWN);
PIN_SLP(gpv2-3, INPUT, DOWN);
PIN_SLP(gpv2-4, INPUT, DOWN);
PIN_SLP(gpv2-5, INPUT, DOWN);
PIN_SLP(gpv2-6, INPUT, DOWN);
PIN_SLP(gpv2-7, INPUT, DOWN);
PIN_SLP(gpv3-0, INPUT, DOWN);
PIN_SLP(gpv3-1, INPUT, DOWN);
PIN_SLP(gpv3-2, INPUT, DOWN);
PIN_SLP(gpv3-3, INPUT, DOWN);
PIN_SLP(gpv3-4, INPUT, DOWN);
PIN_SLP(gpv3-5, INPUT, DOWN);
PIN_SLP(gpv3-6, INPUT, DOWN);
PIN_SLP(gpv3-7, INPUT, DOWN);
PIN_SLP(gpv4-0, INPUT, DOWN);
};
};
&pwm {
pinctrl-0 = <&pwm0_out>;
pinctrl-names = "default";
samsung,pwm-outputs = <0>;
status = "okay";
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sdhci_2 {
bus-width = <4>;
cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
cd-inverted;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
vmmc-supply = <&ldo21_reg>;
status = "okay";
};
&sdhci_3 {
#address-cells = <1>;
#size-cells = <0>;
non-removable;
bus-width = <4>;
mmc-pwrseq = <&wlan_pwrseq>;
pinctrl-names = "default";
pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpx2>;
interrupts = <5 IRQ_TYPE_NONE>;
interrupt-names = "host-wake";
};
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
&spi_1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
status = "okay";
s5c73m3_spi: s5c73m3@0 {
compatible = "samsung,s5c73m3";
spi-max-frequency = <50000000>;
reg = <0>;
controller-data {
samsung,spi-feedback-delay = <2>;
};
};
};
&tmu {
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
arch/arm/boot/dts/exynos4412.dtsi
View file @ e238310c
......@@ -15,7 +15,7 @@
*/
#include "exynos4.dtsi"
#include "exynos4412-pinctrl.dtsi"
#include "exynos4-cpu-thermal.dtsi"
/ {
......@@ -42,8 +42,6 @@ cpu0: cpu@a00 {
clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
cooling-min-level = <13>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
};
......@@ -147,463 +145,410 @@ cpu0_opp_1500: opp-1500000000 {
};
};
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x40000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
soc: soc {
smp-sysram@2f000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x2f000 0x1000>;
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
};
pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
label = "ISP";
};
l2c: l2-cache-controller@10502000 {
compatible = "arm,pl310-cache";
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <3 2 1>;
arm,double-linefill = <1>;
arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <1>;
arm,prefetch-drop = <1>;
arm,prefetch-offset = <7>;
};
clock: clock-controller@10030000 {
compatible = "samsung,exynos4412-clock";
reg = <0x10030000 0x18000>;
#clock-cells = <1>;
};
isp_clock: clock-controller@10048000 {
compatible = "samsung,exynos4412-isp-clock";
reg = <0x10048000 0x1000>;
#clock-cells = <1>;
power-domains = <&pd_isp>;
clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>;
clock-names = "aclk200", "aclk400_mcuisp";
};
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
watchdog: watchdog@10060000 {
compatible = "samsung,exynos5250-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
samsung,syscon-phandle = <&pmu_system_controller>;
};
adc: adc@126c0000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x126C0000 0x100>;
interrupt-parent = <&combiner>;
interrupts = <10 3>;
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
g2d: g2d@10800000 {
compatible = "samsung,exynos4212-g2d";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>;
};
camera {
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
/* fimc_[0-3] are configured outside, under phandles */
fimc_lite_0: fimc-lite@12390000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite0>;
status = "disabled";
pinctrl_2: pinctrl@3860000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x03860000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <10 0>;
};
fimc_lite_1: fimc-lite@123a0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite1>;
status = "disabled";
pinctrl_3: pinctrl@106e0000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
};
fimc_is: fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is";
reg = <0x12000000 0x260000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
<&isp_clock CLK_ISP_FIMC_LITE1>,
<&isp_clock CLK_ISP_PPMUISPX>,
<&isp_clock CLK_ISP_PPMUISPMX>,
<&isp_clock CLK_ISP_FIMC_ISP>,
<&isp_clock CLK_ISP_FIMC_DRC>,
<&isp_clock CLK_ISP_FIMC_FD>,
<&isp_clock CLK_ISP_MCUISP>,
<&isp_clock CLK_ISP_GICISP>,
<&isp_clock CLK_ISP_MCUCTL_ISP>,
<&isp_clock CLK_ISP_PWM_ISP>,
<&isp_clock CLK_ISP_DIV_ISP0>,
<&isp_clock CLK_ISP_DIV_ISP1>,
<&isp_clock CLK_ISP_DIV_MCUISP0>,
<&isp_clock CLK_ISP_DIV_MCUISP1>,
<&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_ACLK200>,
<&clock CLK_ACLK400_MCUISP>,
<&clock CLK_DIV_ACLK200>,
<&clock CLK_DIV_ACLK400_MCUISP>,
<&clock CLK_UART_ISP_SCLK>;
clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "isp",
"drc", "fd", "mcuisp",
"gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "mpll", "aclk200",
"aclk400mcuisp", "div_aclk200",
"div_aclk400mcuisp", "uart";
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
iommu-names = "isp", "drc", "fd", "mcuctl";
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
ranges = <0 0x02020000 0x40000>;
pmu@10020000 {
reg = <0x10020000 0x3000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
i2c1_isp: i2c-isp@12140000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
clock-names = "i2c_isp";
#address-cells = <1>;
#size-cells = <0>;
smp-sysram@2f000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x2f000 0x1000>;
};
};
};
mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <0x80>;
clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
clock-names = "biu", "ciu";
status = "disabled";
};
sysmmu_g2d: sysmmu@10A40000{
compatible = "samsung,exynos-sysmmu";
reg = <0x10A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
#iommu-cells = <0>;
};
sysmmu_fimc_isp: sysmmu@12260000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12260000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 2>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_ISP>;
#iommu-cells = <0>;
};
sysmmu_fimc_drc: sysmmu@12270000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12270000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 3>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_DRC>;
#iommu-cells = <0>;
};
sysmmu_fimc_fd: sysmmu@122a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 4>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_FD>;
#iommu-cells = <0>;
};
sysmmu_fimc_mcuctl: sysmmu@122b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 5>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_ISPCX>;
#iommu-cells = <0>;
};
sysmmu_fimc_lite0: sysmmu@123b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&isp_clock CLK_ISP_SMMU_LITE0>,
<&isp_clock CLK_ISP_FIMC_LITE0>;
#iommu-cells = <0>;
};
pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
label = "ISP";
};
sysmmu_fimc_lite1: sysmmu@123c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 1>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&isp_clock CLK_ISP_SMMU_LITE1>,
<&isp_clock CLK_ISP_FIMC_LITE1>;
#iommu-cells = <0>;
};
l2c: l2-cache-controller@10502000 {
compatible = "arm,pl310-cache";
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <3 2 1>;
arm,double-linefill = <1>;
arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <1>;
arm,prefetch-drop = <1>;
arm,prefetch-offset = <7>;
};
bus_dmc: bus_dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
clock: clock-controller@10030000 {
compatible = "samsung,exynos4412-clock";
reg = <0x10030000 0x18000>;
#clock-cells = <1>;
};
bus_acp: bus_acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
};
isp_clock: clock-controller@10048000 {
compatible = "samsung,exynos4412-isp-clock";
reg = <0x10048000 0x1000>;
#clock-cells = <1>;
power-domains = <&pd_isp>;
clocks = <&clock CLK_ACLK200>,
<&clock CLK_ACLK400_MCUISP>;
clock-names = "aclk200", "aclk400_mcuisp";
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map =
<0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
};
};
bus_c2c: bus_c2c {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_C2C>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
watchdog: watchdog@10060000 {
compatible = "samsung,exynos5250-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
samsung,syscon-phandle = <&pmu_system_controller>;
};
adc: adc@126c0000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x126C0000 0x100>;
interrupt-parent = <&combiner>;
interrupts = <10 3>;
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
bus_dmc_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
g2d: g2d@10800000 {
compatible = "samsung,exynos4212-g2d";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <900000>;
mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <0x80>;
clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
clock-names = "biu", "ciu";
status = "disabled";
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <900000>;
sysmmu_g2d: sysmmu@10A40000{
compatible = "samsung,exynos-sysmmu";
reg = <0x10A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
#iommu-cells = <0>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <900000>;
sysmmu_fimc_isp: sysmmu@12260000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12260000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 2>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_ISP>;
#iommu-cells = <0>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <950000>;
sysmmu_fimc_drc: sysmmu@12270000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12270000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 3>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_DRC>;
#iommu-cells = <0>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1050000>;
sysmmu_fimc_fd: sysmmu@122a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 4>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_FD>;
#iommu-cells = <0>;
};
};
bus_acp_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
sysmmu_fimc_mcuctl: sysmmu@122b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 5>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&isp_clock CLK_ISP_SMMU_ISPCX>;
#iommu-cells = <0>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
sysmmu_fimc_lite0: sysmmu@123b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&isp_clock CLK_ISP_SMMU_LITE0>,
<&isp_clock CLK_ISP_FIMC_LITE0>;
#iommu-cells = <0>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
sysmmu_fimc_lite1: sysmmu@123c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 1>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&isp_clock CLK_ISP_SMMU_LITE1>,
<&isp_clock CLK_ISP_FIMC_LITE1>;
#iommu-cells = <0>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
bus_dmc: bus_dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
bus_acp: bus_acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
};
};
bus_leftbus: bus_leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_c2c: bus_c2c {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_C2C>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
bus_rightbus: bus_rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_dmc_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
bus_display: bus_display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <900000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <900000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <900000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <950000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1050000>;
};
};
bus_fsys: bus_fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
};
bus_acp_opp_table: opp_table2 {
compatible = "operating-points-v2";
opp-shared;
bus_peri: bus_peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
};
};
bus_mfc: bus_mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_leftbus: bus_leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_leftbus_opp_table: opp_table3 {
compatible = "operating-points-v2";
opp-shared;
bus_rightbus: bus_rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <900000>;
bus_display: bus_display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <925000>;
bus_fsys: bus_fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <950000>;
bus_peri: bus_peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1000000>;
bus_mfc: bus_mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
};
bus_display_opp_table: opp_table4 {
compatible = "operating-points-v2";
opp-shared;
bus_leftbus_opp_table: opp_table3 {
compatible = "operating-points-v2";
opp-shared;
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <900000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <925000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <950000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1000000>;
};
};
};
bus_fsys_opp_table: opp_table5 {
compatible = "operating-points-v2";
opp-shared;
bus_display_opp_table: opp_table4 {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
};
};
bus_peri_opp_table: opp_table6 {
compatible = "operating-points-v2";
opp-shared;
bus_fsys_opp_table: opp_table5 {
compatible = "operating-points-v2";
opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
};
};
pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
bus_peri_opp_table: opp_table6 {
compatible = "operating-points-v2";
opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
};
};
};
......@@ -631,6 +576,92 @@ &combiner {
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
&camera {
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
/* fimc_[0-3] are configured outside, under phandles */
fimc_lite_0: fimc-lite@12390000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite0>;
status = "disabled";
};
fimc_lite_1: fimc-lite@123a0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite1>;
status = "disabled";
};
fimc_is: fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is";
reg = <0x12000000 0x260000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
<&isp_clock CLK_ISP_FIMC_LITE1>,
<&isp_clock CLK_ISP_PPMUISPX>,
<&isp_clock CLK_ISP_PPMUISPMX>,
<&isp_clock CLK_ISP_FIMC_ISP>,
<&isp_clock CLK_ISP_FIMC_DRC>,
<&isp_clock CLK_ISP_FIMC_FD>,
<&isp_clock CLK_ISP_MCUISP>,
<&isp_clock CLK_ISP_GICISP>,
<&isp_clock CLK_ISP_MCUCTL_ISP>,
<&isp_clock CLK_ISP_PWM_ISP>,
<&isp_clock CLK_ISP_DIV_ISP0>,
<&isp_clock CLK_ISP_DIV_ISP1>,
<&isp_clock CLK_ISP_DIV_MCUISP0>,
<&isp_clock CLK_ISP_DIV_MCUISP1>,
<&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_ACLK200>,
<&clock CLK_ACLK400_MCUISP>,
<&clock CLK_DIV_ACLK200>,
<&clock CLK_DIV_ACLK400_MCUISP>,
<&clock CLK_UART_ISP_SCLK>;
clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "isp",
"drc", "fd", "mcuisp",
"gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "mpll", "aclk200",
"aclk400mcuisp", "div_aclk200",
"div_aclk400mcuisp", "uart";
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
iommu-names = "isp", "drc", "fd", "mcuctl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
pmu@10020000 {
reg = <0x10020000 0x3000>;
};
i2c1_isp: i2c-isp@12140000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
clock-names = "i2c_isp";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&exynos_usbphy {
compatible = "samsung,exynos4x12-usb2-phy";
samsung,sysreg-phandle = <&sys_reg>;
......@@ -693,35 +724,8 @@ &mixer {
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
};
&pinctrl_0 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
&pinctrl_1 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
};
&pinctrl_2 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x03860000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <10 0>;
};
&pinctrl_3 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
&pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
&pmu_system_controller {
......@@ -743,3 +747,5 @@ &tmu {
clock-names = "tmu_apbif";
status = "disabled";
};
#include "exynos4412-pinctrl.dtsi"
arch/arm/boot/dts/exynos5250.dtsi
View file @ e238310c
......@@ -77,8 +77,6 @@ cpu0: cpu@0 {
300000 937500
200000 925000
>;
cooling-min-level = <15>;
cooling-max-level = <9>;
#cooling-cells = <2>; /* min followed by max */
};
cpu@1 {
......@@ -655,7 +653,7 @@ gsc_0: gsc@13e00000 {
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
iommu = <&sysmmu_gsc0>;
iommus = <&sysmmu_gsc0>;
};
gsc_1: gsc@13e10000 {
......@@ -665,7 +663,7 @@ gsc_1: gsc@13e10000 {
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
iommu = <&sysmmu_gsc1>;
iommus = <&sysmmu_gsc1>;
};
gsc_2: gsc@13e20000 {
......@@ -675,7 +673,7 @@ gsc_2: gsc@13e20000 {
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL2>;
clock-names = "gscl";
iommu = <&sysmmu_gsc2>;
iommus = <&sysmmu_gsc2>;
};
gsc_3: gsc@13e30000 {
......@@ -685,7 +683,7 @@ gsc_3: gsc@13e30000 {
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL3>;
clock-names = "gscl";
iommu = <&sysmmu_gsc3>;
iommus = <&sysmmu_gsc3>;
};
hdmi: hdmi@14530000 {
......
arch/arm/boot/dts/exynos5260-xyref5260.dts
View file @ e238310c
......@@ -65,7 +65,6 @@ &uart3 {
&mmc_0 {
status = "okay";
broken-cd;
bypass-smu;
cap-mmc-highspeed;
supports-hs200-mode; /* 200 MHz */
card-detect-delay = <200>;
......
arch/arm/boot/dts/exynos5410.dtsi
View file @ e238310c
......@@ -11,7 +11,6 @@
*/
#include "exynos54xx.dtsi"
#include "exynos-syscon-restart.dtsi"
#include <dt-bindings/clock/exynos5410.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
......@@ -197,9 +196,9 @@ amba {
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@12680000 {
pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
......@@ -208,9 +207,9 @@ pdma0: pdma@12680000 {
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
......
arch/arm/boot/dts/exynos5420-cpus.dtsi
View file @ e238310c
......@@ -30,8 +30,6 @@ cpu0: cpu@0 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -43,8 +41,6 @@ cpu1: cpu@1 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -56,8 +52,6 @@ cpu2: cpu@2 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -69,8 +63,6 @@ cpu3: cpu@3 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -83,8 +75,6 @@ cpu4: cpu@100 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -96,8 +86,6 @@ cpu5: cpu@101 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -109,8 +97,6 @@ cpu6: cpu@102 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -122,8 +108,6 @@ cpu7: cpu@103 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......
arch/arm/boot/dts/exynos5422-cpus.dtsi
View file @ e238310c
......@@ -29,8 +29,6 @@ cpu0: cpu@100 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -42,8 +40,6 @@ cpu1: cpu@101 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -55,8 +51,6 @@ cpu2: cpu@102 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -68,8 +62,6 @@ cpu3: cpu@103 {
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <11>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <539>;
};
......@@ -82,8 +74,6 @@ cpu4: cpu@0 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <15>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -95,8 +85,6 @@ cpu5: cpu@1 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <15>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -108,8 +96,6 @@ cpu6: cpu@2 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <15>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......@@ -121,8 +107,6 @@ cpu7: cpu@3 {
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
cooling-min-level = <0>;
cooling-max-level = <15>;
#cooling-cells = <2>; /* min followed by max */
capacity-dmips-mhz = <1024>;
};
......
arch/arm/boot/dts/exynos5440.dtsi
View file @ e238310c
......@@ -26,24 +26,6 @@ aliases {
tmuctrl2 = &tmuctrl_2;
};
clock: clock-controller@160000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x1000>;
#clock-cells = <1>;
};
gic: interrupt-controller@2e0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2E1000 0x1000>,
<0x2E2000 0x2000>,
<0x2E4000 0x2000>,
<0x2E6000 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -70,182 +52,290 @@ cpu@3 {
};
};
arm-pmu {
compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <50000000>;
};
clock: clock-controller@160000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x1000>;
#clock-cells = <1>;
};
cpufreq@160000 {
compatible = "samsung,exynos5440-cpufreq";
reg = <0x160000 0x1000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
operating-points = <
/* KHz uV */
1500000 1100000
1400000 1075000
1300000 1050000
1200000 1025000
1100000 1000000
1000000 975000
900000 950000
800000 925000
>;
};
gic: interrupt-controller@2e0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2E1000 0x1000>,
<0x2E2000 0x2000>,
<0x2E4000 0x2000>,
<0x2E6000 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
serial_0: serial@b0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
serial_1: serial@c0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
arm-pmu {
compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
};
spi_0: spi@d0000 {
compatible = "samsung,exynos5440-spi";
reg = <0xD0000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
samsung,spi-src-clk = <0>;
num-cs = <1>;
clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
clock-names = "spi", "spi_busclk0";
};
timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <50000000>;
};
pin_ctrl: pinctrl@e0000 {
compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
#gpio-cells = <2>;
cpufreq@160000 {
compatible = "samsung,exynos5440-cpufreq";
reg = <0x160000 0x1000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
operating-points = <
/* KHz uV */
1500000 1100000
1400000 1075000
1300000 1050000
1200000 1025000
1100000 1000000
1000000 975000
900000 950000
800000 925000
>;
};
fan: fan {
samsung,exynos5440-pin-function = <1>;
serial_0: serial@b0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
hdd_led0: hdd_led0 {
samsung,exynos5440-pin-function = <2>;
serial_1: serial@c0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
hdd_led1: hdd_led1 {
samsung,exynos5440-pin-function = <3>;
spi_0: spi@d0000 {
compatible = "samsung,exynos5440-spi";
reg = <0xD0000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
samsung,spi-src-clk = <0>;
num-cs = <1>;
clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
clock-names = "spi", "spi_busclk0";
};
uart1: uart1 {
samsung,exynos5440-pin-function = <4>;
pin_ctrl: pinctrl@e0000 {
compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
#gpio-cells = <2>;
fan: fan {
samsung,exynos5440-pin-function = <1>;
};
hdd_led0: hdd_led0 {
samsung,exynos5440-pin-function = <2>;
};
hdd_led1: hdd_led1 {
samsung,exynos5440-pin-function = <3>;
};
uart1: uart1 {
samsung,exynos5440-pin-function = <4>;
};
};
};
i2c@f0000 {
compatible = "samsung,exynos5440-i2c";
reg = <0xF0000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
i2c@f0000 {
compatible = "samsung,exynos5440-i2c";
reg = <0xF0000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
i2c@100000 {
compatible = "samsung,exynos5440-i2c";
reg = <0x100000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
i2c@100000 {
compatible = "samsung,exynos5440-i2c";
reg = <0x100000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
watchdog@110000 {
compatible = "samsung,s3c6410-wdt";
reg = <0x110000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "watchdog";
};
watchdog@110000 {
compatible = "samsung,s3c6410-wdt";
reg = <0x110000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "watchdog";
};
gmac: ethernet@230000 {
compatible = "snps,dwmac-3.70a", "snps,dwmac";
reg = <0x00230000 0x8000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
phy-mode = "sgmii";
clocks = <&clock CLK_GMAC0>;
clock-names = "stmmaceth";
};
gmac: ethernet@230000 {
compatible = "snps,dwmac-3.70a", "snps,dwmac";
reg = <0x00230000 0x8000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
phy-mode = "sgmii";
clocks = <&clock CLK_GMAC0>;
clock-names = "stmmaceth";
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
};
rtc@130000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x130000 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "rtc";
};
rtc@130000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x130000 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "rtc";
};
tmuctrl_0: tmuctrl@160118 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160118 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
};
tmuctrl_0: tmuctrl@160118 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160118 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
};
tmuctrl_1: tmuctrl@16011c {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
};
tmuctrl_1: tmuctrl@16011c {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
};
tmuctrl_2: tmuctrl@160120 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160120 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
};
tmuctrl_2: tmuctrl@160120 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160120 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
#include "exynos5440-tmu-sensor-conf.dtsi"
sata@210000 {
compatible = "snps,exynos5440-ahci";
reg = <0x210000 0x10000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SATA>;
clock-names = "sata";
};
ohci@220000 {
compatible = "samsung,exynos5440-ohci";
reg = <0x220000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
ehci@221000 {
compatible = "samsung,exynos5440-ehci";
reg = <0x221000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
pcie_phy0: pcie-phy@270000 {
#phy-cells = <0>;
compatible = "samsung,exynos5440-pcie-phy";
reg = <0x270000 0x1000>, <0x271000 0x40>;
};
pcie_phy1: pcie-phy@272000 {
#phy-cells = <0>;
compatible = "samsung,exynos5440-pcie-phy";
reg = <0x272000 0x1000>, <0x271040 0x40>;
};
pcie_0: pcie@290000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x290000 0x1000>, <0x40000000 0x1000>;
reg-names = "elbi", "config";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
phys = <&pcie_phy0>;
ranges = <0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 53>;
num-lanes = <4>;
status = "disabled";
};
pcie_1: pcie@2a0000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x2a0000 0x1000>, <0x60000000 0x1000>;
reg-names = "elbi", "config";
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
phys = <&pcie_phy1>;
ranges = <0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 56>;
num-lanes = <4>;
status = "disabled";
};
};
thermal-zones {
......@@ -262,86 +352,4 @@ cpu2_thermal: cpu2-thermal {
#include "exynos5440-trip-points.dtsi"
};
};
sata@210000 {
compatible = "snps,exynos5440-ahci";
reg = <0x210000 0x10000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SATA>;
clock-names = "sata";
};
ohci@220000 {
compatible = "samsung,exynos5440-ohci";
reg = <0x220000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
ehci@221000 {
compatible = "samsung,exynos5440-ehci";
reg = <0x221000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
pcie_phy0: pcie-phy@270000 {
#phy-cells = <0>;
compatible = "samsung,exynos5440-pcie-phy";
reg = <0x270000 0x1000>, <0x271000 0x40>;
};
pcie_phy1: pcie-phy@272000 {
#phy-cells = <0>;
compatible = "samsung,exynos5440-pcie-phy";
reg = <0x272000 0x1000>, <0x271040 0x40>;
};
pcie_0: pcie@290000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x290000 0x1000>, <0x40000000 0x1000>;
reg-names = "elbi", "config";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
phys = <&pcie_phy0>;
ranges = <0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 53>;
num-lanes = <4>;
status = "disabled";
};
pcie_1: pcie@2a0000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x2a0000 0x1000>, <0x60000000 0x1000>;
reg-names = "elbi", "config";
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
phys = <&pcie_phy1>;
ranges = <0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 56>;
num-lanes = <4>;
status = "disabled";
};
};
arch/arm/boot/dts/exynos5800-peach-pi.dts
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* Google Peach Pi Rev 10+ board device tree source
*
* Copyright (c) 2014 Google, Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
......
arch/arm/boot/dts/exynos5800.dtsi
View file @ e238310c
// SPDX-License-Identifier: GPL-2.0
/*
* SAMSUNG EXYNOS5800 SoC device tree source
*
......@@ -7,10 +8,6 @@
* SAMSUNG EXYNOS5800 SoC device nodes are listed in this file.
* EXYNOS5800 based board files can include this file and provide
* values for board specfic bindings.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos5420.dtsi"
......
arch/arm/boot/dts/samsung_k3pe0e000b.dtsi deleted 100644 → 0
View file @ bf89bd52
// SPDX-License-Identifier: GPL-2.0
/*
* Timings and Geometry for Samsung K3PE0E000B memory part
*/
/ {
samsung_K3PE0E000B: lpddr2 {
compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
density = <4096>;
io-width = <32>;
tRPab-min-tck = <3>;
tRCD-min-tck = <3>;
tWR-min-tck = <3>;
tRASmin-min-tck = <3>;
tRRD-min-tck = <2>;
tWTR-min-tck = <2>;
tXP-min-tck = <2>;
tRTP-min-tck = <2>;
tCKE-min-tck = <3>;
tCKESR-min-tck = <3>;
tFAW-min-tck = <8>;
timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
compatible = "jedec,lpddr2-timings";
min-freq = <10000000>;
max-freq = <533333333>;
tRPab = <21000>;
tRCD = <18000>;
tWR = <15000>;
tRAS-min = <42000>;
tRRD = <10000>;
tWTR = <7500>;
tXP = <7500>;
tRTP = <7500>;
tCKESR = <15000>;
tDQSCK-max = <5500>;
tFAW = <50000>;
tZQCS = <90000>;
tZQCL = <360000>;
tZQinit = <1000000>;
tRAS-max-ns = <70000>;
tDQSCK-max-derated = <6000>;
};
timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
compatible = "jedec,lpddr2-timings";
min-freq = <10000000>;
max-freq = <266666666>;
tRPab = <21000>;
tRCD = <18000>;
tWR = <15000>;
tRAS-min = <42000>;
tRRD = <10000>;
tWTR = <7500>;
tXP = <7500>;
tRTP = <7500>;
tCKESR = <15000>;
tDQSCK-max = <5500>;
tFAW = <50000>;
tZQCS = <90000>;
tZQCL = <360000>;
tZQinit = <1000000>;
tRAS-max-ns = <70000>;
tDQSCK-max-derated = <6000>;
};
};
};
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