Commit e46a25e0 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Merge kroah.com:/home/greg/linux/BK/bleed-2.6

into kroah.com:/home/greg/linux/BK/pci-2.6
parents cf5bd50c c842b00a
......@@ -282,7 +282,7 @@ static int quirk_pcie_aspm_write(struct pci_bus *bus, unsigned int devfn, int wh
return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
}
struct pci_ops quirk_pcie_aspm_ops = {
static struct pci_ops quirk_pcie_aspm_ops = {
.read = quirk_pcie_aspm_read,
.write = quirk_pcie_aspm_write,
};
......@@ -295,7 +295,7 @@ struct pci_ops quirk_pcie_aspm_ops = {
* the root port in an array for fast indexing. Replace the bus ops
* with the modified one.
*/
void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
{
int cap_base, i;
struct pci_bus *pbus;
......
......@@ -29,6 +29,8 @@ static int acer_tm360_irqrouting;
static struct irq_routing_table *pirq_table;
static int pirq_enable_irq(struct pci_dev *dev);
/*
* Never use: 0, 1, 2 (timer, keyboard, and cascade)
* Avoid using: 13, 14 and 15 (FP error and IDE).
......@@ -1019,7 +1021,7 @@ void pcibios_penalize_isa_irq(int irq)
pirq_penalize_isa_irq(irq);
}
int pirq_enable_irq(struct pci_dev *dev)
static int pirq_enable_irq(struct pci_dev *dev)
{
u8 pin;
extern int interrupt_line_quirk;
......
......@@ -71,6 +71,4 @@ extern unsigned int pcibios_irq_mask;
extern int pcibios_scanned;
extern spinlock_t pci_config_lock;
int pirq_enable_irq(struct pci_dev *dev);
extern int (*pcibios_enable_irq)(struct pci_dev *dev);
......@@ -3942,7 +3942,7 @@ static int bttv_suspend(struct pci_dev *pci_dev, u32 state)
/* save pci state */
pci_save_state(pci_dev);
if (0 != pci_set_power_state(pci_dev, state)) {
if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
pci_disable_device(pci_dev);
btv->state.disabled = 1;
}
......@@ -3961,7 +3961,7 @@ static int bttv_resume(struct pci_dev *pci_dev)
pci_enable_device(pci_dev);
btv->state.disabled = 0;
}
pci_set_power_state(pci_dev, 0);
pci_set_power_state(pci_dev, PCI_D0);
pci_restore_state(pci_dev);
/* restore bt878 state */
......
......@@ -1549,7 +1549,7 @@ vortex_up(struct net_device *dev)
int i;
if (VORTEX_PCI(vp) && vp->enable_wol) {
pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
pci_restore_state(VORTEX_PCI(vp));
}
......@@ -2941,7 +2941,7 @@ static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
/* The kernel core really should have pci_get_power_state() */
if(state != 0)
pci_set_power_state(VORTEX_PCI(vp), 0);
pci_set_power_state(VORTEX_PCI(vp), PCI_D0);
err = vortex_do_ioctl(dev, rq, cmd);
if(state != 0)
pci_set_power_state(VORTEX_PCI(vp), state);
......@@ -3140,7 +3140,7 @@ static void acpi_set_WOL(struct net_device *dev)
/* Change the power state to D3; RxEnable doesn't take effect. */
pci_enable_wake(VORTEX_PCI(vp), 0, 1);
pci_set_power_state(VORTEX_PCI(vp), 3);
pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
}
......@@ -3163,7 +3163,7 @@ static void __devexit vortex_remove_one (struct pci_dev *pdev)
unregister_netdev(dev);
if (VORTEX_PCI(vp) && vp->enable_wol) {
pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
if (vp->pm_state_valid)
pci_restore_state(VORTEX_PCI(vp));
}
......
......@@ -1623,7 +1623,7 @@ static int read_eeprom (void __iomem *ioaddr, int location, int addr_len)
static void cp_set_d3_state (struct cp_private *cp)
{
pci_enable_wake (cp->pdev, 0, 1); /* Enable PME# generation */
pci_set_power_state (cp->pdev, 3);
pci_set_power_state (cp->pdev, PCI_D3hot);
}
static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
......@@ -1813,7 +1813,7 @@ static void cp_remove_one (struct pci_dev *pdev)
BUG();
unregister_netdev(dev);
iounmap(cp->regs);
if (cp->wol_enabled) pci_set_power_state (pdev, 0);
if (cp->wol_enabled) pci_set_power_state (pdev, PCI_D0);
pci_release_regions(pdev);
pci_clear_mwi(pdev);
pci_disable_device(pdev);
......@@ -1863,7 +1863,7 @@ static int cp_resume (struct pci_dev *pdev)
netif_device_attach (dev);
if (cp->pdev && cp->wol_enabled) {
pci_set_power_state (cp->pdev, 0);
pci_set_power_state (cp->pdev, PCI_D0);
pci_restore_state (cp->pdev);
}
......
......@@ -2607,7 +2607,7 @@ static int rtl8139_suspend (struct pci_dev *pdev, u32 state)
spin_unlock_irqrestore (&tp->lock, flags);
pci_set_power_state (pdev, 3);
pci_set_power_state (pdev, PCI_D3hot);
return 0;
}
......@@ -2620,7 +2620,7 @@ static int rtl8139_resume (struct pci_dev *pdev)
pci_restore_state (pdev);
if (!netif_running (dev))
return 0;
pci_set_power_state (pdev, 0);
pci_set_power_state (pdev, PCI_D0);
rtl8139_init_ring (dev);
rtl8139_hw_start (dev);
netif_device_attach (dev);
......
......@@ -1826,17 +1826,17 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, u32 state)
if(lp->options & OPTION_WAKE_PHY_ENABLE)
amd8111e_enable_link_change(lp);
pci_enable_wake(pci_dev, 3, 1);
pci_enable_wake(pci_dev, 4, 1); /* D3 cold */
pci_enable_wake(pci_dev, PCI_D3hot, 1);
pci_enable_wake(pci_dev, PCI_D3cold, 1);
}
else{
pci_enable_wake(pci_dev, 3, 0);
pci_enable_wake(pci_dev, 4, 0); /* 4 == D3 cold */
pci_enable_wake(pci_dev, PCI_D3hot, 0);
pci_enable_wake(pci_dev, PCI_D3cold, 0);
}
pci_save_state(pci_dev);
pci_set_power_state(pci_dev, 3);
pci_set_power_state(pci_dev, PCI_D3hot);
return 0;
}
......@@ -1848,11 +1848,11 @@ static int amd8111e_resume(struct pci_dev *pci_dev)
if (!netif_running(dev))
return 0;
pci_set_power_state(pci_dev, 0);
pci_set_power_state(pci_dev, PCI_D0);
pci_restore_state(pci_dev);
pci_enable_wake(pci_dev, 3, 0);
pci_enable_wake(pci_dev, 4, 0); /* D3 cold */
pci_enable_wake(pci_dev, PCI_D3hot, 0);
pci_enable_wake(pci_dev, PCI_D3cold, 0); /* D3 cold */
netif_device_attach(dev);
......
......@@ -2326,7 +2326,7 @@ static int e100_suspend(struct pci_dev *pdev, u32 state)
pci_save_state(pdev);
pci_enable_wake(pdev, state, nic->flags & (wol_magic | e100_asf(nic)));
pci_disable_device(pdev);
pci_set_power_state(pdev, state);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
return 0;
}
......@@ -2336,7 +2336,7 @@ static int e100_resume(struct pci_dev *pdev)
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
pci_set_power_state(pdev, 0);
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
e100_hw_init(nic);
......
......@@ -1014,7 +1014,7 @@ speedo_open(struct net_device *dev)
if (netif_msg_ifup(sp))
printk(KERN_DEBUG "%s: speedo_open() irq %d.\n", dev->name, dev->irq);
pci_set_power_state(sp->pdev, 0);
pci_set_power_state(sp->pdev, PCI_D0);
/* Set up the Tx queue early.. */
sp->cur_tx = 0;
......@@ -1963,7 +1963,7 @@ speedo_close(struct net_device *dev)
if (netif_msg_ifdown(sp))
printk(KERN_DEBUG "%s: %d multicast blocks dropped.\n", dev->name, i);
pci_set_power_state(sp->pdev, 2);
pci_set_power_state(sp->pdev, PCI_D2);
return 0;
}
......@@ -2088,7 +2088,7 @@ static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
access from the timeout handler.
They are currently serialized only with MDIO access from the
timer routine. 2000/05/09 SAW */
saved_acpi = pci_set_power_state(sp->pdev, 0);
saved_acpi = pci_set_power_state(sp->pdev, PCI_D0);
t = del_timer_sync(&sp->timer);
data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
if (t)
......@@ -2099,7 +2099,7 @@ static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
case SIOCSMIIREG: /* Write MII PHY register. */
if (!capable(CAP_NET_ADMIN))
return -EPERM;
saved_acpi = pci_set_power_state(sp->pdev, 0);
saved_acpi = pci_set_power_state(sp->pdev, PCI_D0);
t = del_timer_sync(&sp->timer);
mdio_write(dev, data->phy_id, data->reg_num, data->val_in);
if (t)
......
......@@ -1921,7 +1921,7 @@ static int netdrv_suspend (struct pci_dev *pdev, u32 state)
spin_unlock_irqrestore (&tp->lock, flags);
pci_save_state (pdev);
pci_set_power_state (pdev, 3);
pci_set_power_state (pdev, PCI_D3hot);
return 0;
}
......@@ -1934,7 +1934,7 @@ static int netdrv_resume (struct pci_dev *pdev)
if (!netif_running(dev))
return 0;
pci_set_power_state (pdev, 0);
pci_set_power_state (pdev, PCI_D0);
pci_restore_state (pdev);
netif_device_attach (dev);
netdrv_hw_start (dev);
......
......@@ -2238,7 +2238,7 @@ static int sis900_suspend(struct pci_dev *pci_dev, u32 state)
/* Stop the chip's Tx and Rx Status Machine */
outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
pci_set_power_state(pci_dev, 3);
pci_set_power_state(pci_dev, PCI_D3hot);
pci_save_state(pci_dev);
return 0;
......@@ -2253,7 +2253,7 @@ static int sis900_resume(struct pci_dev *pci_dev)
if(!netif_running(net_dev))
return 0;
pci_restore_state(pci_dev);
pci_set_power_state(pci_dev, 0);
pci_set_power_state(pci_dev, PCI_D0);
sis900_init_rxfilter(net_dev);
......
......@@ -2159,7 +2159,7 @@ static void __devexit starfire_remove_one (struct pci_dev *pdev)
/* XXX: add wakeup code -- requires firmware for MagicPacket */
pci_set_power_state(pdev, 3); /* go to sleep in D3 mode */
pci_set_power_state(pdev, PCI_D3hot); /* go to sleep in D3 mode */
pci_disable_device(pdev);
iounmap((char *)dev->base_addr);
......
......@@ -1890,7 +1890,7 @@ typhoon_sleep(struct typhoon *tp, int state, u16 events)
pci_enable_wake(tp->pdev, state, 1);
pci_disable_device(pdev);
return pci_set_power_state(pdev, state);
return pci_set_power_state(pdev, pci_choose_state(pdev, state));
}
static int
......@@ -1899,7 +1899,7 @@ typhoon_wakeup(struct typhoon *tp, int wait_type)
struct pci_dev *pdev = tp->pdev;
void __iomem *ioaddr = tp->ioaddr;
pci_set_power_state(pdev, 0);
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
/* Post 2.x.x versions of the Sleep Image require a reset before
......@@ -2553,7 +2553,7 @@ typhoon_remove_one(struct pci_dev *pdev)
struct typhoon *tp = netdev_priv(dev);
unregister_netdev(dev);
pci_set_power_state(pdev, 0);
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
typhoon_reset(tp->ioaddr, NoWait);
iounmap(tp->ioaddr);
......
......@@ -1974,7 +1974,7 @@ static int rhine_resume(struct pci_dev *pdev)
if (request_irq(dev->irq, rhine_interrupt, SA_SHIRQ, dev->name, dev))
printk(KERN_ERR "via-rhine %s: request_irq failed\n", dev->name);
ret = pci_set_power_state(pdev, 0);
ret = pci_set_power_state(pdev, PCI_D0);
if (debug > 1)
printk(KERN_INFO "%s: Entering power state D0 %s (%d).\n",
dev->name, ret ? "failed" : "succeeded", ret);
......
......@@ -804,7 +804,7 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi
/* and leave the chip powered down */
pci_set_power_state(pdev, 3);
pci_set_power_state(pdev, PCI_D3hot);
#ifdef CONFIG_PM
{
unsigned long flags;
......@@ -1742,7 +1742,7 @@ static int velocity_open(struct net_device *dev)
goto err_free_rd_ring;
/* Ensure chip is running */
pci_set_power_state(vptr->pdev, 0);
pci_set_power_state(vptr->pdev, PCI_D0);
velocity_init_registers(vptr, VELOCITY_INIT_COLD);
......@@ -1750,7 +1750,7 @@ static int velocity_open(struct net_device *dev)
dev->name, dev);
if (ret < 0) {
/* Power down the chip */
pci_set_power_state(vptr->pdev, 3);
pci_set_power_state(vptr->pdev, PCI_D3hot);
goto err_free_td_ring;
}
......@@ -1868,7 +1868,7 @@ static int velocity_close(struct net_device *dev)
free_irq(dev->irq, dev);
/* Power down the chip */
pci_set_power_state(vptr->pdev, 3);
pci_set_power_state(vptr->pdev, PCI_D3hot);
/* Free the resources */
velocity_free_td_ring(vptr);
......@@ -2194,8 +2194,8 @@ static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
/* If we are asked for information and the device is power
saving then we need to bring the device back up to talk to it */
if(!netif_running(dev))
pci_set_power_state(vptr->pdev, 0);
if (!netif_running(dev))
pci_set_power_state(vptr->pdev, PCI_D0);
switch (cmd) {
case SIOCGMIIPHY: /* Get address of MII PHY in use. */
......@@ -2207,8 +2207,8 @@ static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
default:
ret = -EOPNOTSUPP;
}
if(!netif_running(dev))
pci_set_power_state(vptr->pdev, 3);
if (!netif_running(dev))
pci_set_power_state(vptr->pdev, PCI_D3hot);
return ret;
......@@ -2818,8 +2818,8 @@ static void enable_flow_control_ability(struct velocity_info *vptr)
static int velocity_ethtool_up(struct net_device *dev)
{
struct velocity_info *vptr = dev->priv;
if(!netif_running(dev))
pci_set_power_state(vptr->pdev, 0);
if (!netif_running(dev))
pci_set_power_state(vptr->pdev, PCI_D0);
return 0;
}
......@@ -2834,8 +2834,8 @@ static int velocity_ethtool_up(struct net_device *dev)
static void velocity_ethtool_down(struct net_device *dev)
{
struct velocity_info *vptr = dev->priv;
if(!netif_running(dev))
pci_set_power_state(vptr->pdev, 3);
if (!netif_running(dev))
pci_set_power_state(vptr->pdev, PCI_D3hot);
}
static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
......@@ -3229,15 +3229,15 @@ static int velocity_suspend(struct pci_dev *pdev, u32 state)
velocity_shutdown(vptr);
velocity_set_wol(vptr);
pci_enable_wake(pdev, 3, 1);
pci_set_power_state(pdev, 3);
pci_set_power_state(pdev, PCI_D3hot);
} else {
velocity_save_context(vptr, &vptr->context);
velocity_shutdown(vptr);
pci_disable_device(pdev);
pci_set_power_state(pdev, state);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
}
#else
pci_set_power_state(pdev, state);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
#endif
spin_unlock_irqrestore(&vptr->lock, flags);
return 0;
......@@ -3252,7 +3252,7 @@ static int velocity_resume(struct pci_dev *pdev)
if(!netif_running(vptr->dev))
return 0;
pci_set_power_state(pdev, 0);
pci_set_power_state(pdev, PCI_D0);
pci_enable_wake(pdev, 0, 0);
pci_restore_state(pdev);
......
......@@ -32,7 +32,7 @@
#include "pci_hotplug.h"
#include "cpci_hotplug.h"
#if !defined(CONFIG_HOTPLUG_CPCI_MODULE)
#if !defined(MODULE)
#define MY_NAME "cpci_hotplug"
#else
#define MY_NAME THIS_MODULE->name
......
......@@ -45,7 +45,7 @@
#define DRIVER_AUTHOR "Scott Murray <scottm@somanetworks.com>"
#define DRIVER_DESC "Generic port I/O CompactPCI Hot Plug Driver"
#if !defined(CONFIG_HOTPLUG_CPCI_GENERIC_MODULE)
#if !defined(MODULE)
#define MY_NAME "cpcihp_generic"
#else
#define MY_NAME THIS_MODULE->name
......
......@@ -151,18 +151,29 @@ static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 o
*/
int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
{
int rc;
u16 temp_word;
struct pci_dev fakedev;
struct pci_bus fakebus;
int rc = 0;
if (cpqhp_legacy_mode) {
fakedev.devfn = dev_num << 3;
fakedev.bus = &fakebus;
fakebus.number = bus_num;
struct pci_dev *fakedev;
struct pci_bus *fakebus;
u16 temp_word;
fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
if (!fakedev || !fakebus) {
kfree(fakedev);
kfree(fakebus);
return -ENOMEM;
}
fakedev->devfn = dev_num << 3;
fakedev->bus = fakebus;
fakebus->number = bus_num;
dbg("%s: dev %d, bus %d, pin %d, num %d\n",
__FUNCTION__, dev_num, bus_num, int_pin, irq_num);
rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
rc = pcibios_set_irq_routing(fakedev, int_pin - 0x0a, irq_num);
kfree(fakedev);
kfree(fakebus);
dbg("%s: rc %d\n", __FUNCTION__, rc);
if (!rc)
return !rc;
......@@ -176,9 +187,10 @@ int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
// This should only be for x86 as it sets the Edge Level Control Register
outb((u8) (temp_word & 0xFF), 0x4d0);
outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
rc = 0;
}
return 0;
return rc;
}
......
......@@ -40,7 +40,7 @@
#include "pci_hotplug.h"
#include "../pci.h"
#if !defined(CONFIG_HOTPLUG_PCI_FAKE_MODULE)
#if !defined(MODULE)
#define MY_NAME "fakephp"
#else
#define MY_NAME THIS_MODULE->name
......
......@@ -34,7 +34,7 @@
extern int ibmphp_debug;
#if !defined(CONFIG_HOTPLUG_PCI_IBM_MODULE)
#if !defined(MODULE)
#define MY_NAME "ibmphpd"
#else
#define MY_NAME THIS_MODULE->name
......
This diff is collapsed.
......@@ -36,7 +36,7 @@
#include <asm/io.h>
#include "pci_hotplug.h"
#if !defined(CONFIG_HOTPLUG_PCI_SHPC_MODULE)
#if !defined(MODULE)
#define MY_NAME "shpchp"
#else
#define MY_NAME THIS_MODULE->name
......
......@@ -229,7 +229,7 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
/**
* pci_set_power_state - Set the power state of a PCI device
* @dev: PCI device to be suspended
* @state: Power state we're entering
* @state: PCI power state (D0, D1, D2, D3hot, D3cold) we're entering
*
* Transition a device to a new power state, using the Power Management
* Capabilities in the device's config space.
......@@ -242,19 +242,20 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
*/
int
pci_set_power_state(struct pci_dev *dev, int state)
pci_set_power_state(struct pci_dev *dev, pci_power_t state)
{
int pm;
u16 pmcsr;
u16 pmcsr, pmc;
/* bound the state we're entering */
if (state > 3) state = 3;
if (state > PCI_D3hot)
state = PCI_D3hot;
/* Validate current state:
* Can enter D0 from any state, but if we can only go deeper
* to sleep if we're already in a low power state
*/
if (state > 0 && dev->current_state > state)
if (state != PCI_D0 && dev->current_state > state)
return -EINVAL;
else if (dev->current_state == state)
return 0; /* we're already there */
......@@ -263,21 +264,30 @@ pci_set_power_state(struct pci_dev *dev, int state)
pm = pci_find_capability(dev, PCI_CAP_ID_PM);
/* abort if the device doesn't support PM capabilities */
if (!pm) return -EIO;
if (!pm)
return -EIO;
/* check if this device supports the desired state */
if (state == 1 || state == 2) {
u16 pmc;
pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc);
if (state == 1 && !(pmc & PCI_PM_CAP_D1)) return -EIO;
else if (state == 2 && !(pmc & PCI_PM_CAP_D2)) return -EIO;
if ((pmc & PCI_PM_CAP_VER_MASK) != 2) {
printk(KERN_WARNING
"PCI: %s has unsupported PM cap regs version (%u)\n",
dev->slot_name, pmc & PCI_PM_CAP_VER_MASK);
return -EIO;
}
/* check if this device supports the desired state */
if (state == PCI_D1 || state == PCI_D2) {
if (state == PCI_D1 && !(pmc & PCI_PM_CAP_D1))
return -EIO;
else if (state == PCI_D2 && !(pmc & PCI_PM_CAP_D2))
return -EIO;
}
/* If we're in D3, force entire word to 0.
* This doesn't affect PME_Status, disables PME_En, and
* sets PowerState to 0.
*/
if (dev->current_state >= 3)
if (dev->current_state >= PCI_D3hot)
pmcsr = 0;
else {
pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
......@@ -290,15 +300,40 @@ pci_set_power_state(struct pci_dev *dev, int state)
/* Mandatory power management transition delays */
/* see PCI PM 1.1 5.6.1 table 18 */
if(state == 3 || dev->current_state == 3)
if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
msleep(10);
else if(state == 2 || dev->current_state == 2)
else if (state == PCI_D2 || dev->current_state == PCI_D2)
udelay(200);
dev->current_state = state;
return 0;
}
/**
* pci_choose_state - Choose the power state of a PCI device
* @dev: PCI device to be suspended
* @state: target sleep state for the whole system
*
* Returns PCI power state suitable for given device and given system
* message.
*/
pci_power_t pci_choose_state(struct pci_dev *dev, u32 state)
{
if (!pci_find_capability(dev, PCI_CAP_ID_PM))
return PCI_D0;
switch (state) {
case 0: return PCI_D0;
case 2: return PCI_D2;
case 3: return PCI_D3hot;
default: BUG();
}
return PCI_D0;
}
EXPORT_SYMBOL(pci_choose_state);
/**
* pci_save_state - save the PCI configuration space of a device before suspending
* @dev: - PCI device that we're dealing with
......@@ -348,7 +383,7 @@ pci_enable_device_bars(struct pci_dev *dev, int bars)
{
int err;
pci_set_power_state(dev, 0);
pci_set_power_state(dev, PCI_D0);
if ((err = pcibios_enable_device(dev, bars)) < 0)
return err;
return 0;
......@@ -422,7 +457,7 @@ pci_disable_device(struct pci_dev *dev)
* 0 if operation is successful.
*
*/
int pci_enable_wake(struct pci_dev *dev, u32 state, int enable)
int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable)
{
int pm;
u16 value;
......
......@@ -2,6 +2,7 @@
* probe.c - PCI detection and setup code
*/
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
......@@ -336,6 +337,22 @@ struct pci_bus * __devinit pci_add_new_bus(struct pci_bus *parent, struct pci_de
return child;
}
static void pci_enable_crs(struct pci_dev *dev)
{
u16 cap, rpctl;
int rpcap = pci_find_capability(dev, PCI_CAP_ID_EXP);
if (!rpcap)
return;
pci_read_config_word(dev, rpcap + PCI_CAP_FLAGS, &cap);
if (((cap & PCI_EXP_FLAGS_TYPE) >> 4) != PCI_EXP_TYPE_ROOT_PORT)
return;
pci_read_config_word(dev, rpcap + PCI_EXP_RTCTL, &rpctl);
rpctl |= PCI_EXP_RTCTL_CRSSVE;
pci_write_config_word(dev, rpcap + PCI_EXP_RTCTL, rpctl);
}
unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus);
/*
......@@ -366,6 +383,8 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max
pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
pci_enable_crs(dev);
if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {
unsigned int cmax, busnr;
/*
......@@ -375,6 +394,17 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max
if (pass)
return max;
busnr = (buses >> 8) & 0xFF;
/*
* If we already got to this bus through a different bridge,
* ignore it. This can happen with the i450NX chipset.
*/
if (pci_find_bus(pci_domain_nr(bus), busnr)) {
printk(KERN_INFO "PCI: Bus %04x:%02x already known\n",
pci_domain_nr(bus), busnr);
return max;
}
child = pci_alloc_child_bus(bus, dev, busnr);
if (!child)
return max;
......@@ -490,6 +520,7 @@ static int pci_setup_device(struct pci_dev * dev)
/* Early fixups, before probing the BARs */
pci_fixup_device(pci_fixup_early, dev);
class = dev->class >> 8;
switch (dev->hdr_type) { /* header type */
case PCI_HEADER_TYPE_NORMAL: /* standard header */
......@@ -602,9 +633,7 @@ pci_scan_device(struct pci_bus *bus, int devfn)
struct pci_dev *dev;
u32 l;
u8 hdr_type;
if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
return NULL;
int delay = 1;
if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
return NULL;
......@@ -614,6 +643,25 @@ pci_scan_device(struct pci_bus *bus, int devfn)
l == 0x0000ffff || l == 0xffff0000)
return NULL;
/* Configuration request Retry Status */
while (l == 0xffff0001) {
msleep(delay);
delay *= 2;
if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
return NULL;
/* Card hasn't responded in 60 seconds? Must be stuck. */
if (delay > 60 * 1000) {
printk(KERN_WARNING "Device %04x:%02x:%02x.%d not "
"responding\n", pci_domain_nr(bus),
bus->number, PCI_SLOT(devfn),
PCI_FUNC(devfn));
return NULL;
}
}
if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
return NULL;
dev = kmalloc(sizeof(struct pci_dev), GFP_KERNEL);
if (!dev)
return NULL;
......@@ -785,7 +833,7 @@ struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent, int bus,
if (pci_find_bus(pci_domain_nr(b), bus)) {
/* If we already got to this bus through a different bridge, ignore it */
DBG("PCI: Bus %02x already known\n", bus);
DBG("PCI: Bus %04:%02x already known\n", pci_domain_nr(b), bus);
goto err_out;
}
list_add_tail(&b->node, &pci_root_buses);
......
......@@ -1237,6 +1237,8 @@ static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_f
}
}
extern struct pci_fixup __start_pci_fixups_early[];
extern struct pci_fixup __end_pci_fixups_early[];
extern struct pci_fixup __start_pci_fixups_header[];
extern struct pci_fixup __end_pci_fixups_header[];
extern struct pci_fixup __start_pci_fixups_final[];
......@@ -1250,6 +1252,11 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
struct pci_fixup *start, *end;
switch(pass) {
case pci_fixup_early:
start = __start_pci_fixups_early;
end = __end_pci_fixups_early;
break;
case pci_fixup_header:
start = __start_pci_fixups_header;
end = __end_pci_fixups_header;
......
......@@ -57,8 +57,13 @@ pbus_assign_resources_sorted(struct pci_bus *bus)
list_for_each_entry(dev, &bus->devices, bus_list) {
u16 class = dev->class >> 8;
if (class == PCI_CLASS_DISPLAY_VGA
|| class == PCI_CLASS_NOT_DEFINED_VGA)
/* Don't touch classless devices and host bridges. */
if (class == PCI_CLASS_NOT_DEFINED ||
class == PCI_CLASS_BRIDGE_HOST)
continue;
if (class == PCI_CLASS_DISPLAY_VGA ||
class == PCI_CLASS_NOT_DEFINED_VGA)
bus->bridge_ctl |= PCI_BRIDGE_CTL_VGA;
pdev_sort_resources(dev, &head);
......
......@@ -53,7 +53,8 @@ pdev_fixup_irq(struct pci_dev *dev,
irq = 0;
dev->irq = irq;
DBGC((KERN_ERR "PCI fixup irq: (%s) got %d\n", dev->dev.name, dev->irq));
DBGC((KERN_ERR "PCI fixup irq: (%s) got %d\n",
dev->dev.kobj.name, dev->irq));
/* Always tell the device, so the driver knows what is
the real IRQ to use; the device does not use it. */
......
......@@ -364,6 +364,20 @@
#define PCI_EXP_DEVSTA_URD 0x08 /* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
#define PCI_EXP_LNKCTL 16 /* Link Control */
#define PCI_EXP_LNKSTA 18 /* Link Status */
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
#define PCI_EXP_SLTCTL 24 /* Slot Control */
#define PCI_EXP_SLTSTA 26 /* Slot Status */
#define PCI_EXP_RTCTL 28 /* Root Control */
#define PCI_EXP_RTCTL_SECEE 0x01 /* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE 0x02 /* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE 0x04 /* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE 0x08 /* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
#define PCI_EXP_RTCAP 30 /* Root Capabilities */
#define PCI_EXP_RTSTA 32 /* Root Status */
/* Extended Capabilities (PCI-X 2.0 and Express) */
#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
......@@ -480,6 +494,14 @@ enum pci_mmap_state {
#define DEVICE_COUNT_COMPATIBLE 4
#define DEVICE_COUNT_RESOURCE 12
typedef int __bitwise pci_power_t;
#define PCI_D0 ((pci_power_t __force) 0)
#define PCI_D1 ((pci_power_t __force) 1)
#define PCI_D2 ((pci_power_t __force) 2)
#define PCI_D3hot ((pci_power_t __force) 3)
#define PCI_D3cold ((pci_power_t __force) 4)
/*
* The pci_dev structure is used to describe PCI devices.
*/
......@@ -508,7 +530,7 @@ struct pci_dev {
this if your device has broken DMA
or supports 64-bit transfers. */
u32 current_state; /* Current operating state. In ACPI-speak,
pci_power_t current_state; /* Current operating state. In ACPI-speak,
this is D0-D3, D0 being fully functional,
and D3 being off. */
......@@ -797,8 +819,9 @@ void pci_remove_rom(struct pci_dev *pdev);
/* Power management related routines */
int pci_save_state(struct pci_dev *dev);
int pci_restore_state(struct pci_dev *dev);
int pci_set_power_state(struct pci_dev *dev, int state);
int pci_enable_wake(struct pci_dev *dev, u32 state, int enable);
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
pci_power_t pci_choose_state(struct pci_dev *dev, u32 state);
int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
void pci_bus_assign_resources(struct pci_bus *bus);
......@@ -925,8 +948,9 @@ static inline const struct pci_device_id *pci_match_device(const struct pci_devi
/* Power management related routines */
static inline int pci_save_state(struct pci_dev *dev) { return 0; }
static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
static inline int pci_set_power_state(struct pci_dev *dev, int state) { return 0; }
static inline int pci_enable_wake(struct pci_dev *dev, u32 state, int enable) { return 0; }
static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
static inline pci_power_t pci_choose_state(struct pci_dev *dev, u32 state) { return PCI_D0; }
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
#define isa_bridge ((struct pci_dev *)NULL)
......
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