Commit e55dbfb1 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://gkernel.bkbits.net/misc-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents bad53498 7ac1bc3e
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
David S. Miller David S. Miller
This document is intended to serve as a guide to Linux port This document is intended to serve as a guide to Linux port
maintainers on how to implement atomic counter and bitops interfaces maintainers on how to implement atomic counter, bitops, and spinlock
properly. interfaces properly.
The atomic_t type should be defined as a signed integer. The atomic_t type should be defined as a signed integer.
Also, it should be made opaque such that any kind of cast to a normal Also, it should be made opaque such that any kind of cast to a normal
...@@ -242,6 +242,19 @@ happen. Specifically, in the above case the atomic_dec_and_test() ...@@ -242,6 +242,19 @@ happen. Specifically, in the above case the atomic_dec_and_test()
counter decrement would not become globally visible until the counter decrement would not become globally visible until the
obj->active update does. obj->active update does.
As a historical note, 32-bit Sparc used to only allow usage of
24-bits of it's atomic_t type. This was because it used 8 bits
as a spinlock for SMP safety. Sparc32 lacked a "compare and swap"
type instruction. However, 32-bit Sparc has since been moved over
to a "hash table of spinlocks" scheme, that allows the full 32-bit
counter to be realized. Essentially, an array of spinlocks are
indexed into based upon the address of the atomic_t being operated
on, and that lock protects the atomic operation. Parisc uses the
same scheme.
Another note is that the atomic_t operations returning values are
extremely slow on an old 386.
We will now cover the atomic bitmask operations. You will find that We will now cover the atomic bitmask operations. You will find that
their SMP and memory barrier semantics are similar in shape and scope their SMP and memory barrier semantics are similar in shape and scope
to the atomic_t ops above. to the atomic_t ops above.
...@@ -345,3 +358,99 @@ except that two underscores are prefixed to the interface name. ...@@ -345,3 +358,99 @@ except that two underscores are prefixed to the interface name.
These non-atomic variants also do not require any special memory These non-atomic variants also do not require any special memory
barrier semantics. barrier semantics.
The routines xchg() and cmpxchg() need the same exact memory barriers
as the atomic and bit operations returning values.
Spinlocks and rwlocks have memory barrier expectations as well.
The rule to follow is simple:
1) When acquiring a lock, the implementation must make it globally
visible before any subsequent memory operation.
2) When releasing a lock, the implementation must make it such that
all previous memory operations are globally visible before the
lock release.
Which finally brings us to _atomic_dec_and_lock(). There is an
architecture-neutral version implemented in lib/dec_and_lock.c,
but most platforms will wish to optimize this in assembler.
int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock);
Atomically decrement the given counter, and if will drop to zero
atomically acquire the given spinlock and perform the decrement
of the counter to zero. If it does not drop to zero, do nothing
with the spinlock.
It is actually pretty simple to get the memory barrier correct.
Simply satisfy the spinlock grab requirements, which is make
sure the spinlock operation is globally visible before any
subsequent memory operation.
We can demonstrate this operation more clearly if we define
an abstract atomic operation:
long cas(long *mem, long old, long new);
"cas" stands for "compare and swap". It atomically:
1) Compares "old" with the value currently at "mem".
2) If they are equal, "new" is written to "mem".
3) Regardless, the current value at "mem" is returned.
As an example usage, here is what an atomic counter update
might look like:
void example_atomic_inc(long *counter)
{
long old, new, ret;
while (1) {
old = *counter;
new = old + 1;
ret = cas(counter, old, new);
if (ret == old)
break;
}
}
Let's use cas() in order to build a pseudo-C atomic_dec_and_lock():
int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
{
long old, new, ret;
int went_to_zero;
went_to_zero = 0;
while (1) {
old = atomic_read(atomic);
new = old - 1;
if (new == 0) {
went_to_zero = 1;
spin_lock(lock);
}
ret = cas(atomic, old, new);
if (ret == old)
break;
if (went_to_zero) {
spin_unlock(lock);
went_to_zero = 0;
}
}
return went_to_zero;
}
Now, as far as memory barriers go, as long as spin_lock()
strictly orders all subsequent memory operations (including
the cas()) with respect to itself, things will be fine.
Said another way, _atomic_dec_and_lock() must guarentee that
a counter dropping to zero is never made visible before the
spinlock being acquired.
Note that this also means that for the case where the counter
is not dropping to zero, there are no memory ordering
requirements.
...@@ -93,12 +93,12 @@ static u32 rcon_tab[RC_LENGTH]; ...@@ -93,12 +93,12 @@ static u32 rcon_tab[RC_LENGTH];
u32 ft_tab[4][256]; u32 ft_tab[4][256];
u32 fl_tab[4][256]; u32 fl_tab[4][256];
u32 ls_tab[4][256]; static u32 ls_tab[4][256];
u32 im_tab[4][256]; static u32 im_tab[4][256];
u32 il_tab[4][256]; u32 il_tab[4][256];
u32 it_tab[4][256]; u32 it_tab[4][256];
void gen_tabs(void) static void gen_tabs(void)
{ {
u32 i, w; u32 i, w;
u8 pow[512], log[256]; u8 pow[512], log[256];
......
...@@ -172,6 +172,7 @@ void _do_read_unlock (rwlock_t *rw, char *str) ...@@ -172,6 +172,7 @@ void _do_read_unlock (rwlock_t *rw, char *str)
runlock_again: runlock_again:
/* Spin trying to decrement the counter using casx. */ /* Spin trying to decrement the counter using casx. */
__asm__ __volatile__( __asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
" ldx [%0], %%g5\n" " ldx [%0], %%g5\n"
" sub %%g5, 1, %%g7\n" " sub %%g5, 1, %%g7\n"
" casx [%0], %%g5, %%g7\n" " casx [%0], %%g5, %%g7\n"
...@@ -290,6 +291,7 @@ void _do_write_unlock(rwlock_t *rw) ...@@ -290,6 +291,7 @@ void _do_write_unlock(rwlock_t *rw)
current->thread.smp_lock_count--; current->thread.smp_lock_count--;
wlock_again: wlock_again:
__asm__ __volatile__( __asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
" mov 1, %%g3\n" " mov 1, %%g3\n"
" sllx %%g3, 63, %%g3\n" " sllx %%g3, 63, %%g3\n"
" ldx [%0], %%g5\n" " ldx [%0], %%g5\n"
......
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
#include <linux/uio.h> #include <linux/uio.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/wait.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -1089,13 +1090,11 @@ static inline void rx_bus_master_complete_handler (hrz_dev * dev) { ...@@ -1089,13 +1090,11 @@ static inline void rx_bus_master_complete_handler (hrz_dev * dev) {
/********** (queue to) become the next TX thread **********/ /********** (queue to) become the next TX thread **********/
static inline int tx_hold (hrz_dev * dev) { static inline int tx_hold (hrz_dev * dev) {
while (test_and_set_bit (tx_busy, &dev->flags)) {
PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags); PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags);
interruptible_sleep_on (&dev->tx_queue); wait_event_interruptible(dev->tx_queue, (!test_and_set_bit(tx_busy, &dev->flags)));
PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags); PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags);
if (signal_pending (current)) if (signal_pending (current))
return -1; return -1;
}
PRINTD (DBG_TX, "set tx_busy for dev %p", dev); PRINTD (DBG_TX, "set tx_busy for dev %p", dev);
return 0; return 0;
} }
......
...@@ -53,6 +53,7 @@ ...@@ -53,6 +53,7 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/uio.h> #include <linux/uio.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/wait.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/atomic.h> #include <asm/atomic.h>
...@@ -2587,13 +2588,13 @@ static int __init ia_start(struct atm_dev *dev) ...@@ -2587,13 +2588,13 @@ static int __init ia_start(struct atm_dev *dev)
static void ia_close(struct atm_vcc *vcc) static void ia_close(struct atm_vcc *vcc)
{ {
DEFINE_WAIT(wait);
u16 *vc_table; u16 *vc_table;
IADEV *iadev; IADEV *iadev;
struct ia_vcc *ia_vcc; struct ia_vcc *ia_vcc;
struct sk_buff *skb = NULL; struct sk_buff *skb = NULL;
struct sk_buff_head tmp_tx_backlog, tmp_vcc_backlog; struct sk_buff_head tmp_tx_backlog, tmp_vcc_backlog;
unsigned long closetime, flags; unsigned long closetime, flags;
int ctimeout;
iadev = INPH_IA_DEV(vcc->dev); iadev = INPH_IA_DEV(vcc->dev);
ia_vcc = INPH_IA_VCC(vcc); ia_vcc = INPH_IA_VCC(vcc);
...@@ -2606,7 +2607,9 @@ static void ia_close(struct atm_vcc *vcc) ...@@ -2606,7 +2607,9 @@ static void ia_close(struct atm_vcc *vcc)
skb_queue_head_init (&tmp_vcc_backlog); skb_queue_head_init (&tmp_vcc_backlog);
if (vcc->qos.txtp.traffic_class != ATM_NONE) { if (vcc->qos.txtp.traffic_class != ATM_NONE) {
iadev->close_pending++; iadev->close_pending++;
sleep_on_timeout(&iadev->timeout_wait, 50); prepare_to_wait(&iadev->timeout_wait, &wait, TASK_UNINTERRUPTIBLE);
schedule_timeout(50);
finish_wait(&iadev->timeout_wait, &wait);
spin_lock_irqsave(&iadev->tx_lock, flags); spin_lock_irqsave(&iadev->tx_lock, flags);
while((skb = skb_dequeue(&iadev->tx_backlog))) { while((skb = skb_dequeue(&iadev->tx_backlog))) {
if (ATM_SKB(skb)->vcc == vcc){ if (ATM_SKB(skb)->vcc == vcc){
...@@ -2619,17 +2622,12 @@ static void ia_close(struct atm_vcc *vcc) ...@@ -2619,17 +2622,12 @@ static void ia_close(struct atm_vcc *vcc)
while((skb = skb_dequeue(&tmp_tx_backlog))) while((skb = skb_dequeue(&tmp_tx_backlog)))
skb_queue_tail(&iadev->tx_backlog, skb); skb_queue_tail(&iadev->tx_backlog, skb);
IF_EVENT(printk("IA TX Done decs_cnt = %d\n", ia_vcc->vc_desc_cnt);) IF_EVENT(printk("IA TX Done decs_cnt = %d\n", ia_vcc->vc_desc_cnt);)
closetime = jiffies; closetime = 300000 / ia_vcc->pcr;
ctimeout = 300000 / ia_vcc->pcr; if (closetime == 0)
if (ctimeout == 0) closetime = 1;
ctimeout = 1;
while (ia_vcc->vc_desc_cnt > 0){
if ((jiffies - closetime) >= ctimeout)
break;
spin_unlock_irqrestore(&iadev->tx_lock, flags); spin_unlock_irqrestore(&iadev->tx_lock, flags);
sleep_on(&iadev->close_wait); wait_event_timeout(iadev->close_wait, (ia_vcc->vc_desc_cnt <= 0), closetime);
spin_lock_irqsave(&iadev->tx_lock, flags); spin_lock_irqsave(&iadev->tx_lock, flags);
}
iadev->close_pending--; iadev->close_pending--;
iadev->testTable[vcc->vci]->lastTime = 0; iadev->testTable[vcc->vci]->lastTime = 0;
iadev->testTable[vcc->vci]->fract = 0; iadev->testTable[vcc->vci]->fract = 0;
......
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#include <linux/atm_zatm.h> #include <linux/atm_zatm.h>
#include <linux/capability.h> #include <linux/capability.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/wait.h>
#include <asm/byteorder.h> #include <asm/byteorder.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/string.h> #include <asm/string.h>
...@@ -867,31 +868,21 @@ static void close_tx(struct atm_vcc *vcc) ...@@ -867,31 +868,21 @@ static void close_tx(struct atm_vcc *vcc)
struct zatm_vcc *zatm_vcc; struct zatm_vcc *zatm_vcc;
unsigned long flags; unsigned long flags;
int chan; int chan;
struct sk_buff *skb;
int once = 1;
zatm_vcc = ZATM_VCC(vcc); zatm_vcc = ZATM_VCC(vcc);
zatm_dev = ZATM_DEV(vcc->dev); zatm_dev = ZATM_DEV(vcc->dev);
chan = zatm_vcc->tx_chan; chan = zatm_vcc->tx_chan;
if (!chan) return; if (!chan) return;
DPRINTK("close_tx\n"); DPRINTK("close_tx\n");
while (skb_peek(&zatm_vcc->backlog)) { if (skb_peek(&zatm_vcc->backlog)) {
if (once) { printk("waiting for backlog to drain ...\n");
printk("waiting for backlog to drain ...\n"); event_dump();
event_dump(); wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
once = 0; }
} if (skb_peek(&zatm_vcc->tx_queue)) {
sleep_on(&zatm_vcc->tx_wait); printk("waiting for TX queue to drain ...\n");
} event_dump();
once = 1; wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
while ((skb = skb_peek(&zatm_vcc->tx_queue))) {
if (once) {
printk("waiting for TX queue to drain ... %p\n",skb);
event_dump();
once = 0;
}
DPRINTK("waiting for TX queue to drain ... %p\n",skb);
sleep_on(&zatm_vcc->tx_wait);
} }
spin_lock_irqsave(&zatm_dev->lock, flags); spin_lock_irqsave(&zatm_dev->lock, flags);
#if 0 #if 0
......
...@@ -75,6 +75,17 @@ config BT_HCIBCM203X ...@@ -75,6 +75,17 @@ config BT_HCIBCM203X
Say Y here to compile support for HCI BCM203x devices into the Say Y here to compile support for HCI BCM203x devices into the
kernel or say M to compile it as module (bcm203x). kernel or say M to compile it as module (bcm203x).
config BT_HCIBPA10X
tristate "HCI BPA10x USB driver"
depends on USB
help
Bluetooth HCI BPA10x USB driver.
This driver provides support for the Digianswer BPA 100/105 Bluetooth
sniffer devices.
Say Y here to compile support for HCI BPA10x devices into the
kernel or say M to compile it as module (bpa10x).
config BT_HCIBFUSB config BT_HCIBFUSB
tristate "HCI BlueFRITZ! USB driver" tristate "HCI BlueFRITZ! USB driver"
depends on USB depends on USB
......
...@@ -6,6 +6,7 @@ obj-$(CONFIG_BT_HCIUSB) += hci_usb.o ...@@ -6,6 +6,7 @@ obj-$(CONFIG_BT_HCIUSB) += hci_usb.o
obj-$(CONFIG_BT_HCIVHCI) += hci_vhci.o obj-$(CONFIG_BT_HCIVHCI) += hci_vhci.o
obj-$(CONFIG_BT_HCIUART) += hci_uart.o obj-$(CONFIG_BT_HCIUART) += hci_uart.o
obj-$(CONFIG_BT_HCIBCM203X) += bcm203x.o obj-$(CONFIG_BT_HCIBCM203X) += bcm203x.o
obj-$(CONFIG_BT_HCIBPA10X) += bpa10x.o
obj-$(CONFIG_BT_HCIBFUSB) += bfusb.o obj-$(CONFIG_BT_HCIBFUSB) += bfusb.o
obj-$(CONFIG_BT_HCIDTL1) += dtl1_cs.o obj-$(CONFIG_BT_HCIDTL1) += dtl1_cs.o
obj-$(CONFIG_BT_HCIBT3C) += bt3c_cs.o obj-$(CONFIG_BT_HCIBT3C) += bt3c_cs.o
......
This diff is collapsed.
...@@ -73,7 +73,7 @@ static int reset = 0; ...@@ -73,7 +73,7 @@ static int reset = 0;
static int isoc = 2; static int isoc = 2;
#endif #endif
#define VERSION "2.7" #define VERSION "2.8"
static struct usb_driver hci_usb_driver; static struct usb_driver hci_usb_driver;
...@@ -104,11 +104,11 @@ static struct usb_device_id blacklist_ids[] = { ...@@ -104,11 +104,11 @@ static struct usb_device_id blacklist_ids[] = {
{ USB_DEVICE(0x0a5c, 0x2033), .driver_info = HCI_IGNORE }, { USB_DEVICE(0x0a5c, 0x2033), .driver_info = HCI_IGNORE },
/* Broadcom BCM2035 */ /* Broadcom BCM2035 */
{ USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_RESET | HCI_BROKEN_ISOC },
{ USB_DEVICE(0x0a5c, 0x200a), .driver_info = HCI_RESET | HCI_BROKEN_ISOC }, { USB_DEVICE(0x0a5c, 0x200a), .driver_info = HCI_RESET | HCI_BROKEN_ISOC },
{ USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_BCM92035 },
/* Microsoft Wireless Transceiver for Bluetooth 2.0 */ /* Microsoft Wireless Transceiver for Bluetooth 2.0 */
{ USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_RESET | HCI_BROKEN_ISOC }, { USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_BCM92035 },
/* ISSC Bluetooth Adapter v3.1 */ /* ISSC Bluetooth Adapter v3.1 */
{ USB_DEVICE(0x1131, 0x1001), .driver_info = HCI_RESET }, { USB_DEVICE(0x1131, 0x1001), .driver_info = HCI_RESET },
...@@ -977,6 +977,17 @@ static int hci_usb_probe(struct usb_interface *intf, const struct usb_device_id ...@@ -977,6 +977,17 @@ static int hci_usb_probe(struct usb_interface *intf, const struct usb_device_id
set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks); set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
} }
if (id->driver_info & HCI_BCM92035) {
unsigned char cmd[] = { 0x3b, 0xfc, 0x01, 0x00 };
struct sk_buff *skb;
skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
if (skb) {
memcpy(skb_put(skb, sizeof(cmd)), cmd, sizeof(cmd));
skb_queue_tail(&hdev->driver_init, skb);
}
}
if (hci_register_dev(hdev) < 0) { if (hci_register_dev(hdev) < 0) {
BT_ERR("Can't register HCI device"); BT_ERR("Can't register HCI device");
hci_free_dev(hdev); hci_free_dev(hdev);
......
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#define HCI_DIGIANSWER 0x04 #define HCI_DIGIANSWER 0x04
#define HCI_SNIFFER 0x08 #define HCI_SNIFFER 0x08
#define HCI_BROKEN_ISOC 0x10 #define HCI_BROKEN_ISOC 0x10
#define HCI_BCM92035 0x20
#define HCI_MAX_IFACE_NUM 3 #define HCI_MAX_IFACE_NUM 3
......
...@@ -171,12 +171,13 @@ static void inline __read_unlock(rwlock_t *lock) ...@@ -171,12 +171,13 @@ static void inline __read_unlock(rwlock_t *lock)
unsigned long tmp1, tmp2; unsigned long tmp1, tmp2;
__asm__ __volatile__( __asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
"1: lduw [%2], %0\n" "1: lduw [%2], %0\n"
" sub %0, 1, %1\n" " sub %0, 1, %1\n"
" cas [%2], %0, %1\n" " cas [%2], %0, %1\n"
" cmp %0, %1\n" " cmp %0, %1\n"
" bne,pn %%xcc, 1b\n" " bne,pn %%xcc, 1b\n"
" membar #StoreLoad | #StoreStore" " nop"
: "=&r" (tmp1), "=&r" (tmp2) : "=&r" (tmp1), "=&r" (tmp2)
: "r" (lock) : "r" (lock)
: "memory"); : "memory");
......
...@@ -229,6 +229,7 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ ...@@ -229,6 +229,7 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
static __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) static __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
{ {
__asm__ __volatile__( __asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
" mov %0, %%g5\n" " mov %0, %%g5\n"
"1: lduw [%2], %%g7\n" "1: lduw [%2], %%g7\n"
" cas [%2], %%g7, %0\n" " cas [%2], %%g7, %0\n"
...@@ -245,6 +246,7 @@ static __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned in ...@@ -245,6 +246,7 @@ static __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned in
static __inline__ unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) static __inline__ unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
{ {
__asm__ __volatile__( __asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
" mov %0, %%g5\n" " mov %0, %%g5\n"
"1: ldx [%2], %%g7\n" "1: ldx [%2], %%g7\n"
" casx [%2], %%g7, %0\n" " casx [%2], %%g7, %0\n"
...@@ -289,7 +291,8 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret ...@@ -289,7 +291,8 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret
static __inline__ unsigned long static __inline__ unsigned long
__cmpxchg_u32(volatile int *m, int old, int new) __cmpxchg_u32(volatile int *m, int old, int new)
{ {
__asm__ __volatile__("cas [%2], %3, %0\n\t" __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
"cas [%2], %3, %0\n\t"
"membar #StoreLoad | #StoreStore" "membar #StoreLoad | #StoreStore"
: "=&r" (new) : "=&r" (new)
: "0" (new), "r" (m), "r" (old) : "0" (new), "r" (m), "r" (old)
...@@ -301,7 +304,8 @@ __cmpxchg_u32(volatile int *m, int old, int new) ...@@ -301,7 +304,8 @@ __cmpxchg_u32(volatile int *m, int old, int new)
static __inline__ unsigned long static __inline__ unsigned long
__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
{ {
__asm__ __volatile__("casx [%2], %3, %0\n\t" __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
"casx [%2], %3, %0\n\t"
"membar #StoreLoad | #StoreStore" "membar #StoreLoad | #StoreStore"
: "=&r" (new) : "=&r" (new)
: "0" (new), "r" (m), "r" (old) : "0" (new), "r" (m), "r" (old)
......
...@@ -41,6 +41,7 @@ struct ip_ct_tcp ...@@ -41,6 +41,7 @@ struct ip_ct_tcp
u_int8_t retrans; /* Number of retransmitted packets */ u_int8_t retrans; /* Number of retransmitted packets */
u_int8_t last_index; /* Index of the last packet */ u_int8_t last_index; /* Index of the last packet */
u_int32_t last_seq; /* Last sequence number seen in dir */ u_int32_t last_seq; /* Last sequence number seen in dir */
u_int32_t last_ack; /* Last sequence number seen in opposite dir */
u_int32_t last_end; /* Last seq + len */ u_int32_t last_end; /* Last seq + len */
}; };
......
...@@ -64,10 +64,10 @@ struct ip_conntrack_tuple ...@@ -64,10 +64,10 @@ struct ip_conntrack_tuple
} u; } u;
/* The protocol. */ /* The protocol. */
u8 protonum; u_int8_t protonum;
/* The direction (for tuplehash) */ /* The direction (for tuplehash) */
u8 dir; u_int8_t dir;
} dst; } dst;
}; };
......
...@@ -133,10 +133,9 @@ int netlink_sendskb(struct sock *sk, struct sk_buff *skb, int protocol); ...@@ -133,10 +133,9 @@ int netlink_sendskb(struct sock *sk, struct sk_buff *skb, int protocol);
/* /*
* skb should fit one page. This choice is good for headerless malloc. * skb should fit one page. This choice is good for headerless malloc.
*
* FIXME: What is the best size for SLAB???? --ANK
*/ */
#define NLMSG_GOODSIZE (PAGE_SIZE - ((sizeof(struct sk_buff)+0xF)&~0xF)) #define NLMSG_GOODORDER 0
#define NLMSG_GOODSIZE (SKB_MAX_ORDER(0, NLMSG_GOODORDER))
struct netlink_callback struct netlink_callback
......
...@@ -119,6 +119,8 @@ struct hci_dev { ...@@ -119,6 +119,8 @@ struct hci_dev {
struct hci_dev_stats stat; struct hci_dev_stats stat;
struct sk_buff_head driver_init;
void *driver_data; void *driver_data;
void *core_data; void *core_data;
......
...@@ -183,10 +183,22 @@ static void hci_reset_req(struct hci_dev *hdev, unsigned long opt) ...@@ -183,10 +183,22 @@ static void hci_reset_req(struct hci_dev *hdev, unsigned long opt)
static void hci_init_req(struct hci_dev *hdev, unsigned long opt) static void hci_init_req(struct hci_dev *hdev, unsigned long opt)
{ {
struct sk_buff *skb;
__u16 param; __u16 param;
BT_DBG("%s %ld", hdev->name, opt); BT_DBG("%s %ld", hdev->name, opt);
/* Driver initialization */
/* Special commands */
while ((skb = skb_dequeue(&hdev->driver_init))) {
skb->pkt_type = HCI_COMMAND_PKT;
skb->dev = (void *) hdev;
skb_queue_tail(&hdev->cmd_q, skb);
hci_sched_cmd(hdev);
}
skb_queue_purge(&hdev->driver_init);
/* Mandatory initialization */ /* Mandatory initialization */
/* Reset */ /* Reset */
...@@ -792,6 +804,8 @@ struct hci_dev *hci_alloc_dev(void) ...@@ -792,6 +804,8 @@ struct hci_dev *hci_alloc_dev(void)
memset(hdev, 0, sizeof(struct hci_dev)); memset(hdev, 0, sizeof(struct hci_dev));
skb_queue_head_init(&hdev->driver_init);
return hdev; return hdev;
} }
EXPORT_SYMBOL(hci_alloc_dev); EXPORT_SYMBOL(hci_alloc_dev);
...@@ -799,6 +813,8 @@ EXPORT_SYMBOL(hci_alloc_dev); ...@@ -799,6 +813,8 @@ EXPORT_SYMBOL(hci_alloc_dev);
/* Free HCI device */ /* Free HCI device */
void hci_free_dev(struct hci_dev *hdev) void hci_free_dev(struct hci_dev *hdev)
{ {
skb_queue_purge(&hdev->driver_init);
/* will free via class release */ /* will free via class release */
class_device_put(&hdev->class_dev); class_device_put(&hdev->class_dev);
} }
......
...@@ -1232,7 +1232,7 @@ u32 __init root_nfs_parse_addr(char *name) ...@@ -1232,7 +1232,7 @@ u32 __init root_nfs_parse_addr(char *name)
if (*cp == ':') if (*cp == ':')
*cp++ = '\0'; *cp++ = '\0';
addr = in_aton(name); addr = in_aton(name);
strcpy(name, cp); memmove(name, cp, strlen(cp) + 1);
} else } else
addr = INADDR_NONE; addr = INADDR_NONE;
......
...@@ -373,9 +373,8 @@ static int help(struct sk_buff **pskb, ...@@ -373,9 +373,8 @@ static int help(struct sk_buff **pskb,
goto out_update_nl; goto out_update_nl;
} }
DEBUGP("conntrack_ftp: match `%.*s' (%u bytes at %u)\n", DEBUGP("conntrack_ftp: match `%s' (%u bytes at %u)\n",
(int)matchlen, data + matchoff, fb_ptr + matchoff, matchlen, ntohl(th->seq) + matchoff);
matchlen, ntohl(th->seq) + matchoff);
/* Allocate expectation which will be inserted */ /* Allocate expectation which will be inserted */
exp = ip_conntrack_expect_alloc(); exp = ip_conntrack_expect_alloc();
......
...@@ -665,11 +665,13 @@ static int tcp_in_window(struct ip_ct_tcp *state, ...@@ -665,11 +665,13 @@ static int tcp_in_window(struct ip_ct_tcp *state,
if (*index == TCP_ACK_SET) { if (*index == TCP_ACK_SET) {
if (state->last_dir == dir if (state->last_dir == dir
&& state->last_seq == seq && state->last_seq == seq
&& state->last_ack == ack
&& state->last_end == end) && state->last_end == end)
state->retrans++; state->retrans++;
else { else {
state->last_dir = dir; state->last_dir = dir;
state->last_seq = seq; state->last_seq = seq;
state->last_ack = ack;
state->last_end = end; state->last_end = end;
state->retrans = 0; state->retrans = 0;
} }
......
...@@ -543,6 +543,7 @@ int __init ip_nat_init(void) ...@@ -543,6 +543,7 @@ int __init ip_nat_init(void)
static int clean_nat(struct ip_conntrack *i, void *data) static int clean_nat(struct ip_conntrack *i, void *data)
{ {
memset(&i->nat, 0, sizeof(i->nat)); memset(&i->nat, 0, sizeof(i->nat));
i->status &= ~(IPS_NAT_MASK | IPS_NAT_DONE_MASK | IPS_SEQ_ADJUST);
return 0; return 0;
} }
......
...@@ -570,7 +570,7 @@ static void *dl_seq_start(struct seq_file *s, loff_t *pos) ...@@ -570,7 +570,7 @@ static void *dl_seq_start(struct seq_file *s, loff_t *pos)
if (*pos >= htable->cfg.size) if (*pos >= htable->cfg.size)
return NULL; return NULL;
bucket = kmalloc(sizeof(unsigned int), GFP_KERNEL); bucket = kmalloc(sizeof(unsigned int), GFP_ATOMIC);
if (!bucket) if (!bucket)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
......
...@@ -180,10 +180,10 @@ ip6ip6_tnl_link(struct ip6_tnl *t) ...@@ -180,10 +180,10 @@ ip6ip6_tnl_link(struct ip6_tnl *t)
{ {
struct ip6_tnl **tp = ip6ip6_bucket(&t->parms); struct ip6_tnl **tp = ip6ip6_bucket(&t->parms);
write_lock_bh(&ip6ip6_lock);
t->next = *tp; t->next = *tp;
write_unlock_bh(&ip6ip6_lock); write_lock_bh(&ip6ip6_lock);
*tp = t; *tp = t;
write_unlock_bh(&ip6ip6_lock);
} }
/** /**
......
...@@ -207,6 +207,11 @@ tcf_ipt(struct sk_buff **pskb, struct tc_action *a) ...@@ -207,6 +207,11 @@ tcf_ipt(struct sk_buff **pskb, struct tc_action *a)
struct tcf_ipt *p = PRIV(a, ipt); struct tcf_ipt *p = PRIV(a, ipt);
struct sk_buff *skb = *pskb; struct sk_buff *skb = *pskb;
if (skb_cloned(skb)) {
if (pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
return TC_ACT_UNSPEC;
}
spin_lock(&p->lock); spin_lock(&p->lock);
p->tm.lastuse = jiffies; p->tm.lastuse = jiffies;
......
...@@ -177,6 +177,7 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch) ...@@ -177,6 +177,7 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch)
if (q->loss && q->loss >= get_crandom(&q->loss_cor)) { if (q->loss && q->loss >= get_crandom(&q->loss_cor)) {
pr_debug("netem_enqueue: random loss\n"); pr_debug("netem_enqueue: random loss\n");
sch->qstats.drops++; sch->qstats.drops++;
kfree_skb(skb);
return 0; /* lie about loss so TCP doesn't know */ return 0; /* lie about loss so TCP doesn't know */
} }
......
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