Commit e7e965fa authored by David Mosberger-Tang's avatar David Mosberger-Tang Committed by Tony Luck

[IA64] use srlz.d instead of srlz.i in ia64_leave_kernel()

This patch switches the srlz.i in ia64_leave_kernel() to srlz.d.  As
per architecture manual, the former is needed only to ensure that the
clearing of PSR.IC is seen by the VHPT for subsequent instruction
fetches.  However, since the remainder of the code (up to and
including the RFI instruction) is mapped by a pinned TLB entry, there
is no chance of an iTLB miss and we don't care whether or not the VHPT
sees PSR.IC cleared.  Since srlz.d is substantially cheaper than
srlz.i, this should shave off a few cycles off the interrupt path
(unverified though; I'm not setup to measure this at the moment).
Signed-off-by: default avatarDavid Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent fbf7192b
...@@ -880,7 +880,7 @@ GLOBAL_ENTRY(ia64_leave_kernel) ...@@ -880,7 +880,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
ldf.fill f7=[r2],PT(F11)-PT(F7) ldf.fill f7=[r2],PT(F11)-PT(F7)
ldf.fill f8=[r3],32 ldf.fill f8=[r3],32
;; ;;
srlz.i // ensure interruption collection is off srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
mov ar.ccv=r15 mov ar.ccv=r15
;; ;;
ldf.fill f11=[r2] ldf.fill f11=[r2]
......
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