Commit e8e51d29 authored by Ajay Kumar Gupta's avatar Ajay Kumar Gupta Committed by Tony Lindgren

omap3evm: ehci: Update EHCI support on OMAP3EVM (Rev >= E)

Added runtime programming for the differences in EHCI interface between
OMAP3EVM revisions (Rev >= E) and (Rev < E).

Changes:
	- EHCI PHY reset GPIO pin is 21 on Rev >= E while Rev < E
	  uses GPIO pin 135.
	- Rev >= E uses EHCI Vbus enable GPIO22 line.
	- Rev >= E uses GPIO61 to select EHCI port either on main board or
	  on Mistral Daughter Card (MDC). OMAP3EVM Rev < E doesn't have
	  EHCI port on main board.
	- Currently GPIO61 it programmed to enable EHCI port on main
	  board only.
Signed-off-by: default avatarAjay Kumar Gupta <ajay.gupta@ti.com>
parent db408023
...@@ -676,13 +676,19 @@ CONFIG_INPUT_EVDEV=y ...@@ -676,13 +676,19 @@ CONFIG_INPUT_EVDEV=y
# Input Device Drivers # Input Device Drivers
# #
CONFIG_INPUT_KEYBOARD=y CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_GPIO is not set # CONFIG_KEYBOARD_SUNKBD is not set
CONFIG_KEYBOARD_TWL4030=y
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TABLET is not set
......
...@@ -43,6 +43,8 @@ ...@@ -43,6 +43,8 @@
#include "mmc-twl4030.h" #include "mmc-twl4030.h"
#define OMAP3_EVM_TS_GPIO 175 #define OMAP3_EVM_TS_GPIO 175
#define OMAP3_EVM_EHCI_VBUS 22
#define OMAP3_EVM_EHCI_SELECT 61
#define OMAP3EVM_ETHR_START 0x2c000000 #define OMAP3EVM_ETHR_START 0x2c000000
#define OMAP3EVM_ETHR_SIZE 1024 #define OMAP3EVM_ETHR_SIZE 1024
...@@ -347,8 +349,9 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { ...@@ -347,8 +349,9 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.phy_reset = true, .phy_reset = true,
/* PHY reset GPIO will be runtime programmed based on EVM version */
.reset_gpio_port[0] = -EINVAL, .reset_gpio_port[0] = -EINVAL,
.reset_gpio_port[1] = 135, .reset_gpio_port[1] = -EINVAL,
.reset_gpio_port[2] = -EINVAL .reset_gpio_port[2] = -EINVAL
}; };
...@@ -368,9 +371,29 @@ static void __init omap3_evm_init(void) ...@@ -368,9 +371,29 @@ static void __init omap3_evm_init(void)
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
usb_nop_xceiv_register(); usb_nop_xceiv_register();
#endif #endif
usb_musb_init(); if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
/* Setup EHCI phy reset padconfig */ /* enable EHCI VBUS using GPIO22 */
omap_cfg_reg(AF9_34XX_GPIO22);
gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS");
gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0);
gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1);
/* Select EHCI port on main board */
omap_cfg_reg(U3_34XX_GPIO61);
gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port");
gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0);
gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0);
/* setup EHCI phy reset config */
omap_cfg_reg(AH14_34XX_GPIO21);
ehci_pdata.reset_gpio_port[1] = 21;
} else {
/* setup EHCI phy reset on MDC */
omap_cfg_reg(AF4_34XX_GPIO135_OUT); omap_cfg_reg(AF4_34XX_GPIO135_OUT);
ehci_pdata.reset_gpio_port[1] = 135;
}
usb_musb_init();
usb_ehci_init(&ehci_pdata); usb_ehci_init(&ehci_pdata);
ads7846_dev_init(); ads7846_dev_init();
} }
......
...@@ -559,6 +559,13 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, ...@@ -559,6 +559,13 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0, MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP | OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
OMAP34XX_MUX_MODE0) OMAP34XX_MUX_MODE0)
/* EHCI GPIO's on OMAP3EVM (Rev >= E) */
MUX_CFG_34XX("AH14_34XX_GPIO21", 0x5ea,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
MUX_CFG_34XX("AF9_34XX_GPIO22", 0x5ec,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
MUX_CFG_34XX("U3_34XX_GPIO61", 0x0c8,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
}; };
#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
......
...@@ -849,6 +849,11 @@ enum omap34xx_index { ...@@ -849,6 +849,11 @@ enum omap34xx_index {
/* SYS_NIRQ T2 INT1 */ /* SYS_NIRQ T2 INT1 */
AF26_34XX_SYS_NIRQ, AF26_34XX_SYS_NIRQ,
/* EHCI GPIO's for OMAP3EVM (Rev >= E) */
AH14_34XX_GPIO21,
AF9_34XX_GPIO22,
U3_34XX_GPIO61,
}; };
struct omap_mux_cfg { struct omap_mux_cfg {
......
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