Commit ec08d596 authored by Maxime Ripard's avatar Maxime Ripard

drm/sun4i: Create minimal multipliers and dividers

The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/92ff5881c8f8674056d34458b2f264cd48d4e136.1513854122.git-series.maxime.ripard@free-electrons.com
parent edea372b
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
struct sun4i_dclk { struct sun4i_dclk {
struct clk_hw hw; struct clk_hw hw;
struct regmap *regmap; struct regmap *regmap;
struct sun4i_tcon *tcon;
}; };
static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw) static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw)
...@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw, ...@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw,
static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate, static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate) unsigned long *parent_rate)
{ {
struct sun4i_dclk *dclk = hw_to_dclk(hw);
struct sun4i_tcon *tcon = dclk->tcon;
unsigned long best_parent = 0; unsigned long best_parent = 0;
u8 best_div = 1; u8 best_div = 1;
int i; int i;
for (i = 6; i <= 127; i++) { for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) {
unsigned long ideal = rate * i; unsigned long ideal = rate * i;
unsigned long rounded; unsigned long rounded;
...@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon) ...@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon)
dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL); dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL);
if (!dclk) if (!dclk)
return -ENOMEM; return -ENOMEM;
dclk->tcon = tcon;
init.name = clk_name; init.name = clk_name;
init.ops = &sun4i_dclk_ops; init.ops = &sun4i_dclk_ops;
......
...@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, ...@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
u8 clk_delay; u8 clk_delay;
u32 val = 0; u32 val = 0;
tcon->dclk_min_div = 6;
tcon->dclk_max_div = 127;
sun4i_tcon0_mode_set_common(tcon, mode); sun4i_tcon0_mode_set_common(tcon, mode);
/* Adjust clock delay */ /* Adjust clock delay */
......
...@@ -169,6 +169,8 @@ struct sun4i_tcon { ...@@ -169,6 +169,8 @@ struct sun4i_tcon {
/* Pixel clock */ /* Pixel clock */
struct clk *dclk; struct clk *dclk;
u8 dclk_max_div;
u8 dclk_min_div;
/* Reset control */ /* Reset control */
struct reset_control *lcd_rst; struct reset_control *lcd_rst;
......
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