Commit ed258d80 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] mips: sgiwd93 2.6 fixes and crapectomy

From: Ralf Baechle <ralf@linux-mips.org>

Get to work under 2.6 sorting out the giant mess this has been.  Further
cleanups would require a full crapectomy of wd33c93.c itself ...
parent 41984bac
/* /*
* sgiwd93.c: SGI WD93 scsi driver. * This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
* *
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* 1999 Andrew R. Baker (andrewb@uab.edu) * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
* - Support for 2nd SCSI controller on Indigo2 * Copyright (C) 2001 Florian Lohoff (flo@rfc822.org)
* 2001 Florian Lohoff (flo@rfc822.org) * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
* - Delete HPC scatter gather (Read corruption on
* multiple disks)
* - Cleanup wback cache handling
* *
* (In all truth, Jed Schimmel wrote all this code.) * (In all truth, Jed Schimmel wrote all this code.)
*
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/blkdev.h> #include <linux/blkdev.h>
#include <linux/version.h> #include <linux/version.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/sgialib.h> #include <asm/sgialib.h>
#include <asm/sgi/sgi.h> #include <asm/sgi/sgi.h>
#include <asm/sgi/sgimc.h> #include <asm/sgi/mc.h>
#include <asm/sgi/sgihpc.h> #include <asm/sgi/hpc3.h>
#include <asm/sgi/sgint23.h> #include <asm/sgi/ip22.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -37,95 +37,130 @@ ...@@ -37,95 +37,130 @@
#include <linux/stat.h> #include <linux/stat.h>
#if 0
#define DPRINTK(args...) printk(args)
#else
#define DPRINTK(args...)
#endif
#define HDATA(ptr) ((struct ip22_hostdata *)((ptr)->hostdata))
struct ip22_hostdata {
struct WD33C93_hostdata wh;
struct hpc_data {
dma_addr_t dma;
void * cpu;
} hd;
};
struct hpc_chunk { struct hpc_chunk {
struct hpc_dma_desc desc; struct hpc_dma_desc desc;
u32 _padding; /* align to quadword boundary */ u32 _padding; /* align to quadword boundary */
}; };
struct Scsi_Host *sgiwd93_host = NULL; struct Scsi_Host *sgiwd93_host;
struct Scsi_Host *sgiwd93_host1 = NULL; struct Scsi_Host *sgiwd93_host1;
/* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */ /* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */
static inline void write_wd33c93_count(const wd33c93_regs regs,
unsigned long value)
{
*regs.SASR = WD_TRANSFER_COUNT_MSB;
mb();
*regs.SCMD = ((value >> 16) & 0xff);
*regs.SCMD = ((value >> 8) & 0xff);
*regs.SCMD = ((value >> 0) & 0xff);
mb();
}
/* XXX woof! */ static inline unsigned long read_wd33c93_count(const wd33c93_regs regs)
static void sgiwd93_intr(int irq, void *dev_id, struct pt_regs *regs)
{ {
unsigned long value;
*regs.SASR = WD_TRANSFER_COUNT_MSB;
mb();
value = ((*regs.SCMD & 0xff) << 16);
value |= ((*regs.SCMD & 0xff) << 8);
value |= ((*regs.SCMD & 0xff) << 0);
mb();
return value;
}
static irqreturn_t sgiwd93_intr(int irq, void *dev_id, struct pt_regs *regs)
{
struct Scsi_Host * host = (struct Scsi_Host *) dev_id;
unsigned long flags; unsigned long flags;
struct Scsi_Host *dev = dev_id;
spin_lock_irqsave(dev->host_lock, flags); spin_lock_irqsave(host->host_lock, flags);
wd33c93_intr((struct Scsi_Host *) dev_id); wd33c93_intr(host);
spin_unlock_irqrestore(dev->host_lock, flags); spin_unlock_irqrestore(host->host_lock, flags);
}
#undef DEBUG_DMA return IRQ_HANDLED;
}
static inline static inline
void fill_hpc_entries (struct hpc_chunk **hcp, char *addr, unsigned long len) void fill_hpc_entries(struct hpc_chunk *hcp, Scsi_Cmnd *cmd, int datainp)
{ {
unsigned long physaddr; unsigned long len = cmd->SCp.this_residual;
void *addr = cmd->SCp.ptr;
dma_addr_t physaddr;
unsigned long count; unsigned long count;
physaddr = PHYSADDR(addr); physaddr = dma_map_single(NULL, addr, len, cmd->sc_data_direction);
cmd->SCp.dma_handle = physaddr;
while (len) { while (len) {
/* /*
* even cntinfo could be up to 16383, without * even cntinfo could be up to 16383, without
* magic only 8192 works correctly * magic only 8192 works correctly
*/ */
count = len > 8192 ? 8192 : len; count = len > 8192 ? 8192 : len;
(*hcp)->desc.pbuf = physaddr; hcp->desc.pbuf = physaddr;
(*hcp)->desc.cntinfo = count; hcp->desc.cntinfo = count;
(*hcp)++; hcp++;
len -= count; len -= count;
physaddr += count; physaddr += count;
} }
/*
* To make sure, if we trip an HPC bug, that we transfer every single
* byte, we tag on an extra zero length dma descriptor at the end of
* the chain.
*/
hcp->desc.pbuf = 0;
hcp->desc.cntinfo = HPCDMA_EOX;
} }
static int dma_setup(Scsi_Cmnd *cmd, int datainp) static int dma_setup(Scsi_Cmnd *cmd, int datainp)
{ {
struct WD33C93_hostdata *hdata = (struct WD33C93_hostdata *)cmd->host->hostdata; struct ip22_hostdata *hdata = HDATA(cmd->device->host);
struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) cmd->host->base; struct hpc3_scsiregs *hregs =
struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->dma_bounce_buffer; (struct hpc3_scsiregs *) cmd->device->host->base;
struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->hd.cpu;
#ifdef DEBUG_DMA DPRINTK("dma_setup: datainp<%d> hcp<%p> ", datainp, hcp);
printk("dma_setup: datainp<%d> hcp<%p> ",
datainp, hcp);
#endif
hdata->dma_dir = datainp; hdata->wh.dma_dir = datainp;
/* /*
* wd33c93 shouldn't pass us bogus dma_setups, but * wd33c93 shouldn't pass us bogus dma_setups, but it does:-( The
* it does:-( The other wd33c93 drivers deal with * other wd33c93 drivers deal with it the same way (which isn't that
* it the same way (which isn't that obvious). * obvious). IMHO a better fix would be, not to do these dma setups
* IMHO a better fix would be, not to do these * in the first place.
* dma setups in the first place
*/ */
if (cmd->SCp.ptr == NULL) if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0)
return 1; return 1;
fill_hpc_entries (&hcp, cmd->SCp.ptr,cmd->SCp.this_residual); fill_hpc_entries(hcp, cmd, datainp);
/* To make sure, if we trip an HPC bug, that we transfer DPRINTK(" HPCGO\n");
* every single byte, we tag on an extra zero length dma
* descriptor at the end of the chain.
*/
hcp->desc.pbuf = 0;
hcp->desc.cntinfo = (HPCDMA_EOX);
#ifdef DEBUG_DMA
printk(" HPCGO\n");
#endif
/* Start up the HPC. */ /* Start up the HPC. */
hregs->ndptr = PHYSADDR(hdata->dma_bounce_buffer); hregs->ndptr = hdata->hd.dma;
if(datainp) { if (datainp)
dma_cache_inv((unsigned long) cmd->SCp.ptr, cmd->SCp.this_residual); hregs->ctrl = HPC3_SCTRL_ACTIVE;
hregs->ctrl = (HPC3_SCTRL_ACTIVE); else
} else { hregs->ctrl = HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR;
dma_cache_wback_inv((unsigned long) cmd->SCp.ptr, cmd->SCp.this_residual);
hregs->ctrl = (HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR);
}
return 0; return 0;
} }
...@@ -133,29 +168,27 @@ static int dma_setup(Scsi_Cmnd *cmd, int datainp) ...@@ -133,29 +168,27 @@ static int dma_setup(Scsi_Cmnd *cmd, int datainp)
static void dma_stop(struct Scsi_Host *instance, Scsi_Cmnd *SCpnt, static void dma_stop(struct Scsi_Host *instance, Scsi_Cmnd *SCpnt,
int status) int status)
{ {
struct WD33C93_hostdata *hdata = (struct WD33C93_hostdata *)instance->hostdata; struct ip22_hostdata *hdata = HDATA(instance);
struct hpc3_scsiregs *hregs; struct hpc3_scsiregs *hregs;
if (!SCpnt) if (!SCpnt)
return; return;
hregs = (struct hpc3_scsiregs *) SCpnt->host->base; hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base;
#ifdef DEBUG_DMA DPRINTK("dma_stop: status<%d> ", status);
printk("dma_stop: status<%d> ", status);
#endif
/* First stop the HPC and flush it's FIFO. */ /* First stop the HPC and flush it's FIFO. */
if(hdata->dma_dir) { if (hdata->wh.dma_dir) {
hregs->ctrl |= HPC3_SCTRL_FLUSH; hregs->ctrl |= HPC3_SCTRL_FLUSH;
while(hregs->ctrl & HPC3_SCTRL_ACTIVE) while (hregs->ctrl & HPC3_SCTRL_ACTIVE)
barrier(); barrier();
} }
hregs->ctrl = 0; hregs->ctrl = 0;
dma_unmap_single(NULL, SCpnt->SCp.dma_handle, SCpnt->SCp.this_residual,
SCpnt->sc_data_direction);
#ifdef DEBUG_DMA DPRINTK("\n");
printk("\n");
#endif
} }
void sgiwd93_reset(unsigned long base) void sgiwd93_reset(unsigned long base)
...@@ -163,138 +196,138 @@ void sgiwd93_reset(unsigned long base) ...@@ -163,138 +196,138 @@ void sgiwd93_reset(unsigned long base)
struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base; struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
hregs->ctrl = HPC3_SCTRL_CRESET; hregs->ctrl = HPC3_SCTRL_CRESET;
udelay (50); udelay(50);
hregs->ctrl = 0; hregs->ctrl = 0;
} }
static inline void init_hpc_chain(uchar *buf) static inline void init_hpc_chain(struct hpc_data *hd)
{ {
struct hpc_chunk *hcp = (struct hpc_chunk *) buf; struct hpc_chunk *hcp = (struct hpc_chunk *) hd->cpu;
struct hpc_chunk *dma = (struct hpc_chunk *) hd->dma;
unsigned long start, end; unsigned long start, end;
start = (unsigned long) buf; start = (unsigned long) hcp;
end = start + PAGE_SIZE; end = start + PAGE_SIZE;
while(start < end) { while (start < end) {
hcp->desc.pnext = PHYSADDR((hcp + 1)); hcp->desc.pnext = (u32) (dma + 1);
hcp->desc.cntinfo = HPCDMA_EOX; hcp->desc.cntinfo = HPCDMA_EOX;
hcp++; hcp++; dma++;
start += sizeof(struct hpc_chunk); start += sizeof(struct hpc_chunk);
}; };
hcp--; hcp--;
hcp->desc.pnext = PHYSADDR(buf); hcp->desc.pnext = hd->dma;
/* Force flush to memory */
dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
} }
int __init sgiwd93_detect(Scsi_Host_Template *SGIblows) static struct Scsi_Host * __init sgiwd93_setup_scsi(
Scsi_Host_Template *SGIblows, int unit, int irq,
struct hpc3_scsiregs *hregs, unsigned char *wdregs)
{ {
static unsigned char called = 0; struct ip22_hostdata *hdata;
struct hpc3_scsiregs *hregs = &hpc3c0->scsi_chan0; struct Scsi_Host *host;
struct hpc3_scsiregs *hregs1 = &hpc3c0->scsi_chan1;
struct WD33C93_hostdata *hdata;
struct WD33C93_hostdata *hdata1;
wd33c93_regs regs; wd33c93_regs regs;
uchar *buf;
if(called)
return 0; /* Should bitch on the console about this... */
SGIblows->proc_name = "SGIWD93"; host = scsi_register(SGIblows, sizeof(struct ip22_hostdata));
if (!host)
return NULL;
sgiwd93_host = scsi_register(SGIblows, sizeof(struct WD33C93_hostdata)); host->base = (unsigned long) hregs;
if(sgiwd93_host == NULL) host->irq = irq;
return 0;
sgiwd93_host->base = (unsigned long) hregs;
sgiwd93_host->irq = SGI_WD93_0_IRQ;
buf = (uchar *) get_zeroed_page(GFP_KERNEL); hdata = HDATA(host);
if (!buf) { hdata->hd.cpu = dma_alloc_coherent(NULL, PAGE_SIZE, &hdata->hd.dma,
printk(KERN_WARNING "sgiwd93: Could not allocate memory for host0 buffer.\n"); GFP_KERNEL);
scsi_unregister(sgiwd93_host); if (!hdata->hd.cpu) {
return 0; printk(KERN_WARNING "sgiwd93: Could not allocate memory for "
"host %d buffer.\n", unit);
goto out_unregister;
} }
init_hpc_chain(buf); init_hpc_chain(&hdata->hd);
/* HPC_SCSI_REG0 | 0x03 | KSEG1 */ regs.SASR = wdregs + 3;
regs.SASR = (unsigned char*) KSEG1ADDR (0x1fbc0003); regs.SCMD = wdregs + 7;
regs.SCMD = (unsigned char*) KSEG1ADDR (0x1fbc0007);
wd33c93_init(sgiwd93_host, regs, dma_setup, dma_stop, WD33C93_FS_16_20);
hdata = (struct WD33C93_hostdata *)sgiwd93_host->hostdata; wd33c93_init(host, regs, dma_setup, dma_stop, WD33C93_FS_16_20);
hdata->no_sync = 0;
hdata->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
if (request_irq(SGI_WD93_0_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host)) { hdata->wh.no_sync = 0;
printk(KERN_WARNING "sgiwd93: Could not register IRQ %d (for host 0).\n", SGI_WD93_0_IRQ);
wd33c93_release(); if (request_irq(irq, sgiwd93_intr, 0, "SGI WD93", (void *) host)) {
free_page((unsigned long)buf); printk(KERN_WARNING "sgiwd93: Could not register irq %d "
scsi_unregister(sgiwd93_host); "for host %d.\n", irq, unit);
return 0; goto out_free;
}
/* set up second controller on the Indigo2 */
if(!sgi_guiness) {
sgiwd93_host1 = scsi_register(SGIblows, sizeof(struct WD33C93_hostdata));
if(sgiwd93_host1 != NULL)
{
sgiwd93_host1->base = (unsigned long) hregs1;
sgiwd93_host1->irq = SGI_WD93_1_IRQ;
buf = (uchar *) get_zeroed_page(GFP_KERNEL);
if (!buf) {
printk(KERN_WARNING "sgiwd93: Could not allocate memory for host1 buffer.\n");
scsi_unregister(sgiwd93_host1);
called = 1;
return 1; /* We registered host0 so return success*/
} }
init_hpc_chain(buf); return host;
/* HPC_SCSI_REG1 | 0x03 | KSEG1 */ out_free:
regs.SASR = (unsigned char*) KSEG1ADDR(0x1fbc8003); dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
regs.SCMD = (unsigned char*) KSEG1ADDR(0x1fbc8007); wd33c93_release();
wd33c93_init(sgiwd93_host1, regs, dma_setup, dma_stop,
WD33C93_FS_16_20);
hdata1 = (struct WD33C93_hostdata *)sgiwd93_host1->hostdata; out_unregister:
hdata1->no_sync = 0; scsi_unregister(host);
hdata1->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
if (request_irq(SGI_WD93_1_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1)) { return NULL;
printk(KERN_WARNING "sgiwd93: Could not allocate irq %d (for host1).\n", SGI_WD93_1_IRQ); }
wd33c93_release();
free_page((unsigned long)buf);
scsi_unregister(sgiwd93_host1);
/* Fall through since host0 registered OK */
}
}
}
called = 1; int __init sgiwd93_detect(Scsi_Host_Template *SGIblows)
{
int found = 0;
SGIblows->proc_name = "SGIWD93";
sgiwd93_host = sgiwd93_setup_scsi(SGIblows, 0, SGI_WD93_0_IRQ,
&hpc3c0->scsi_chan0,
(unsigned char *)hpc3c0->scsi0_ext);
if (sgiwd93_host)
found++;
/* Set up second controller on the Indigo2 */
if (ip22_is_fullhouse()) {
sgiwd93_host1 = sgiwd93_setup_scsi(SGIblows, 1, SGI_WD93_1_IRQ,
&hpc3c0->scsi_chan1,
(unsigned char *)hpc3c0->scsi1_ext);
if (sgiwd93_host1)
found++;
}
return 1; /* Found one. */ return found;
} }
int sgiwd93_release(struct Scsi_Host *instance) int sgiwd93_release(struct Scsi_Host *instance)
{ {
free_irq(SGI_WD93_0_IRQ, sgiwd93_intr); struct ip22_hostdata *hdata = HDATA(instance);
free_page(KSEG0ADDR(hdata->dma_bounce_buffer)); int irq = 0;
wd33c93_release();
if(!sgi_guiness) { if (sgiwd93_host && sgiwd93_host == instance)
free_irq(SGI_WD93_1_IRQ, sgiwd93_intr); irq = SGI_WD93_0_IRQ;
free_page(KSEG0ADDR(hdata1->dma_bounce_buffer)); else if (sgiwd93_host1 && sgiwd93_host1 == instance)
irq = SGI_WD93_1_IRQ;
free_irq(irq, sgiwd93_intr);
dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
wd33c93_release(); wd33c93_release();
}
return 1; return 1;
} }
static int sgiwd93_bus_reset(Scsi_Cmnd *cmd)
{
/* FIXME perform bus-specific reset */
wd33c93_host_reset(cmd);
return SUCCESS;
}
/*
* Kludge alert - the SCSI code calls the abort and reset method with int
* arguments not with pointers. So this is going to blow up beautyfully
* on 64-bit systems with memory outside the compat address spaces.
*/
static Scsi_Host_Template driver_template = { static Scsi_Host_Template driver_template = {
.proc_name = "SGIWD93", .proc_name = "SGIWD93",
.name = "SGI WD93", .name = "SGI WD93",
.detect = sgiwd93_detect, .detect = sgiwd93_detect,
.release = sgiwd93_release, .release = sgiwd93_release,
.queuecommand = wd33c93_queuecommand, .queuecommand = wd33c93_queuecommand,
.abort = wd33c93_abort, .eh_abort_handler = wd33c93_abort,
.reset = wd33c93_reset, .eh_bus_reset_handler = sgiwd93_bus_reset,
.eh_host_reset_handler = wd33c93_host_reset,
.can_queue = CAN_QUEUE, .can_queue = CAN_QUEUE,
.this_id = 7, .this_id = 7,
.sg_tablesize = SG_ALL, .sg_tablesize = SG_ALL,
......
...@@ -19,6 +19,6 @@ int sgiwd93_release(struct Scsi_Host *instance); ...@@ -19,6 +19,6 @@ int sgiwd93_release(struct Scsi_Host *instance);
const char *wd33c93_info(void); const char *wd33c93_info(void);
int wd33c93_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); int wd33c93_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
int wd33c93_abort(Scsi_Cmnd *); int wd33c93_abort(Scsi_Cmnd *);
int wd33c93_reset(Scsi_Cmnd *, unsigned int); int wd33c93_host_reset(Scsi_Cmnd * SCpnt);
#endif /* !(_SGIWD93_H) */ #endif /* !(_SGIWD93_H) */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment