Commit ed6e5eb5 authored by Peter Chen's avatar Peter Chen

usb: chipidea: usbmisc_imx: add non-burst setting for imx6

With this setting and AHBBRST at SBUSCFG as "Incremental burst of
unspecified length", each non-burst size can be taken as single
transfer. It is benefit for non-burst size transfer.
Signed-off-by: default avatarPeter Chen <peter.chen@freescale.com>
parent 65668718
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
#define MX53_USB_PLL_DIV_24_MHZ 0x01 #define MX53_USB_PLL_DIV_24_MHZ 0x01
#define MX6_BM_NON_BURST_SETTING BIT(1)
#define MX6_BM_OVER_CUR_DIS BIT(7) #define MX6_BM_OVER_CUR_DIS BIT(7)
#define MX6_BM_WAKEUP_ENABLE BIT(10) #define MX6_BM_WAKEUP_ENABLE BIT(10)
#define MX6_BM_ID_WAKEUP BIT(16) #define MX6_BM_ID_WAKEUP BIT(16)
...@@ -255,14 +256,21 @@ static int usbmisc_imx6q_init(struct imx_usbmisc_data *data) ...@@ -255,14 +256,21 @@ static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
if (data->index > 3) if (data->index > 3)
return -EINVAL; return -EINVAL;
if (data->disable_oc) {
spin_lock_irqsave(&usbmisc->lock, flags); spin_lock_irqsave(&usbmisc->lock, flags);
if (data->disable_oc) {
reg = readl(usbmisc->base + data->index * 4); reg = readl(usbmisc->base + data->index * 4);
writel(reg | MX6_BM_OVER_CUR_DIS, writel(reg | MX6_BM_OVER_CUR_DIS,
usbmisc->base + data->index * 4); usbmisc->base + data->index * 4);
spin_unlock_irqrestore(&usbmisc->lock, flags);
} }
/* SoC non-burst setting */
reg = readl(usbmisc->base + data->index * 4);
writel(reg | MX6_BM_NON_BURST_SETTING,
usbmisc->base + data->index * 4);
spin_unlock_irqrestore(&usbmisc->lock, flags);
usbmisc_imx6q_set_wakeup(data, false); usbmisc_imx6q_set_wakeup(data, false);
return 0; return 0;
......
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