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Commit edb3acf2 authored by Jes Sorensen's avatar Jes Sorensen Committed by Linus Torvalds
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[PATCH] qla1280.c update 

Included is the latest version of the code. Indenting it properly
actually reduced the size of the files by another 10K or so.
parent 3a917e20
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drivers/scsi/ql12160_fw.h
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drivers/scsi/ql1280_fw.h
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drivers/scsi/qla1280.c
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drivers/scsi/qla1280.h
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/*************************************************************************
* QLOGIC LINUX SOFTWARE
*
* QLogic ISP1x80/1x160 device driver for Linux 2.3.x (redhat 6.x).
*
* COPYRIGHT (C) 1996-2000 QLOGIC CORPORATION
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the Qlogic's Linux Software License.
*
* This program is WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistribution's or source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*****************************************************************************/
/*************************************************************************************
QLOGIC CORPORATION SOFTWARE
"GNU" GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION
AND MODIFICATION
This GNU General Public License ("License") applies solely to QLogic Linux
Software ("Software") and may be distributed under the terms of this License.
1. You may copy and distribute verbatim copies of the Software's source code as
you receive it, in any medium, provided that you conspicuously and appropriately
publish on each copy an appropriate copyright notice and disclaimer of warranty;
keep intact all the notices that refer to this License and to the absence of any
warranty; and give any other recipients of the Software a copy of this License along
with the Software.
You may charge a fee for the physical act of transferring a copy, and you may at your
option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Software or any portion of it, thus forming
a work based on the Software, and copy and distribute such modifications or work under
the terms of Section 1 above, provided that you also meet all of these conditions:
* a) You must cause the modified files to carry prominent notices stating that you
changed the files and the date of any change.
* b) You must cause any work that you distribute or publish that in whole or in part
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* c) If the modified Software normally reads commands interactively when run, you
must cause it, when started running for such interactive use in the most ordinary way,
to print or display an announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide a warranty) and that
users may redistribute the Software under these conditions, and telling the user how to
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not normally print such an announcement, your work based on the Software is not required
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These requirements apply to the modified work as a whole. If identifiable sections of
that work are not derived from the Software, and can be reasonably considered independent
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4. You may not copy, modify, sublicense, or distribute the Software except as expressly
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distribute the Software is void, and will automatically terminate your rights under this
License. However, parties who have received copies, or rights, from you under this License
will not have their licenses terminated so long as such parties remain in full compliance.
5. This license grants you world wide, royalty free non-exclusive rights to modify or
distribute the Software or its derivative works. These actions are prohibited by law
if you do not accept this License. Therefore, by modifying or distributing the Software
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NO WARRANTY
11. THE SOFTWARE IS PROVIDED WITHOUT A WARRANTY OF ANY KIND. THERE IS NO
WARRANTY FOR THE SOFTWARE, TO THE EXTENT PERMITTED BY APPLICABLE LAW.
EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR
OTHER PARTIES PROVIDE THE SOFTWARE "AS IS" WITHOUT WARRANTY OF ANY KIND,
EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE SOFTWARE IS WITH YOU.
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NECESSARY SERVICING, REPAIR OR CORRECTION.
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WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE SOFTWARE AS PERMITTED ABOVE, BE LIABLE TO YOU FOR
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LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE SOFTWARE TO
OPERATE WITH ANY OTHER SOFTWARES), EVEN IF SUCH HOLDER OR OTHER PARTY HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
*************************************************************************************/
/******************************************************************************
* QLOGIC LINUX SOFTWARE
*
* QLogic ISP1280 (Ultra2) /12160 (Ultra3) SCSI driver
* Copyright (C) 2000 Qlogic Corporation
* (www.qlogic.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2, or (at your option) any
* later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
******************************************************************************/
#ifndef _IO_HBA_QLA1280_H /* wrapper symbol for kernel use */
#define _IO_HBA_QLA1280_H /* subject to change without notice */
#if defined(__cplusplus)
extern "C" {
#endif
#include <linux/version.h>
#ifndef HOSTS_C /* included in hosts.c */
/*
* Enable define statement to ignore Data Underrun Errors,
* remove define statement to enable detection.
*/
/* #define DATA_UNDERRUN_ERROR_DISABLE */
/*
* Driver debug definitions.
*/
/* #define QL_DEBUG_LEVEL_1 */ /* Output register accesses to COM2. */
/* #define QL_DEBUG_LEVEL_2 */ /* Output error msgs to COM2. */
/* #define QL_DEBUG_LEVEL_3 */ /* Output function trace msgs to COM2. */
/* #define QL_DEBUG_LEVEL_4 */ /* Output NVRAM trace msgs to COM2. */
/* #define QL_DEBUG_LEVEL_5 */ /* Output ring trace msgs to COM2. */
/* #define QL_DEBUG_LEVEL_6 */ /* Output WATCHDOG timer trace to COM2. */
/* #define QL_DEBUG_LEVEL_7 */ /* Output RISC load trace msgs to COM2. */
#define QL_DEBUG_CONSOLE /* Output to console instead of COM2. */
#ifndef TRUE
# define TRUE 1
#define TRUE 1
#endif
#ifndef FALSE
# define FALSE 0
#endif
#ifndef KERNEL_VERSION
# define KERNEL_VERSION(x,y,z) (((x)<<16)+((y)<<8)+(z))
#endif
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,1,92)
# if defined(__sparc_v9__) || defined(__powerpc__)
# error "PPC and Sparc platforms are only support under 2.1.92 and above"
# endif
#endif
/*
* Locking
*/
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,0)
# include <linux/spinlock.h>
# include <linux/smp.h>
# define cpuid smp_processor_id()
# if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
# define DRIVER_LOCK_INIT \
spin_lock_init(&ha->spin_lock);
# define DRIVER_LOCK \
if(!ha->cpu_lock_count[cpuid]) { \
spin_lock_irqsave(&ha->spin_lock, cpu_flags); \
ha->cpu_lock_count[cpuid]++; \
} else { \
ha->cpu_lock_count[cpuid]++; \
}
# define DRIVER_UNLOCK \
if(--ha->cpu_lock_count[cpuid] == 0) \
spin_unlock_irqrestore(&ha->spin_lock, cpu_flags);
# else
# define DRIVER_LOCK_INIT
# define DRIVER_LOCK
# define DRIVER_UNLOCK
# endif
#else
# define cpuid 0
# define DRIVER_LOCK_INIT
# define DRIVER_LOCK \
save_flags(cpu_flags); \
cli();
# define DRIVER_UNLOCK \
restore_flags(cpu_flags);
# define le32_to_cpu(x) (x)
# define cpu_to_le32(x) (x)
#define FALSE 0
#endif
/*
......@@ -275,18 +70,6 @@ extern "C" {
#define BIT_30 0x40000000
#define BIT_31 0x80000000
/*
* Common size type definitions
*/
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,0)
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned long uint32_t;
typedef char int8_t;
typedef short int16_t;
typedef long int32_t;
#endif
/*
* Local Macro Definitions.
*/
......@@ -294,46 +77,39 @@ typedef long int32_t;
defined(QL_DEBUG_LEVEL_3) || defined(QL_DEBUG_LEVEL_4) || \
defined(QL_DEBUG_LEVEL_5) || defined(QL_DEBUG_LEVEL_6) || \
defined(QL_DEBUG_LEVEL_7)
#define QL_DEBUG_ROUTINES
#define QL_DEBUG_ROUTINES
#endif
/*
* I/O port macros
*/
#define LINUX_IOPORTS /* Linux in/out routines are define*/
/* differently from other OSs */
/* #define MEMORY_MAPPED_IO */ /* Enable memory mapped I/O */
/* #define MEMORY_MAPPED_IO *//* Enable memory mapped I/O */
#undef MEMORY_MAPPED_IO /* Disable memory mapped I/O */
#ifdef QL_DEBUG_LEVEL_1
#define RD_REG_BYTE(addr) qla1280_getbyte((uint8_t *)addr)
#define RD_REG_WORD(addr) qla1280_getword((uint16_t *)addr)
#define RD_REG_DWORD(addr) qla1280_getdword((uint32_t *)addr)
#define WRT_REG_BYTE(addr, data) qla1280_putbyte((uint8_t *)addr, data)
#define WRT_REG_WORD(addr, data) qla1280_putword((uint16_t *)addr, data)
#define WRT_REG_DWORD(addr, data) qla1280_putdword((uint32_t *)addr, data)
#define RD_REG_BYTE(addr) qla1280_getbyte((u8 *)addr)
#define RD_REG_WORD(addr) qla1280_getword((u16 *)addr)
#define RD_REG_DWORD(addr) qla1280_getdword((u32 *)addr)
#define WRT_REG_BYTE(addr, data) qla1280_putbyte((u8 *)addr, data)
#define WRT_REG_WORD(addr, data) qla1280_putword((u16 *)addr, data)
#define WRT_REG_DWORD(addr, data) qla1280_putdword((u32 *)addr, data)
#else /* QL_DEBUG_LEVEL_1 */
#ifdef MEMORY_MAPPED_IO
#define RD_REG_BYTE(addr) readb((unsigned long) (addr)
#define RD_REG_WORD(addr) readw((unsigned long) (addr)
#define RD_REG_DWORD(addr) readl((unsigned long) (addr)
#define WRT_REG_BYTE(addr, data) writeb((data), (unsigned long) (addr))
#define WRT_REG_WORD(addr, data) writew((data), (unsigned long) (addr))
#define WRT_REG_DWORD(addr, data) writel((data), (unsigned long) (addr))
#define RD_REG_BYTE(addr) readb(addr)
#define RD_REG_WORD(addr) readw(addr)
#define RD_REG_DWORD(addr) readl(addr)
#define WRT_REG_BYTE(addr, data) writeb(data, addr)
#define WRT_REG_WORD(addr, data) writew(data, addr)
#define WRT_REG_DWORD(addr, data) writel(data, addr)
#else /* MEMORY_MAPPED_IO */
#define RD_REG_BYTE(addr) (inb((unsigned long)addr))
#define RD_REG_WORD(addr) (inw((unsigned long)addr))
#define RD_REG_DWORD(addr) (inl((unsigned long)addr))
#ifdef LINUX_IOPORTS
#define RD_REG_BYTE(addr) inb((unsigned long)addr)
#define RD_REG_WORD(addr) inw((unsigned long)addr)
#define RD_REG_DWORD(addr) inl((unsigned long)addr)
/* Parameters are reversed in Linux */
#define WRT_REG_BYTE(addr, data) (outb(data,(unsigned long)addr))
#define WRT_REG_WORD(addr, data) (outw(data,(unsigned long)addr))
#define WRT_REG_DWORD(addr, data) (outl(data,(unsigned long)addr))
#else
#define WRT_REG_BYTE(addr, data) (outb((unsigned long)addr, data))
#define WRT_REG_WORD(addr, data) (outw((unsigned long)addr, data))
#define WRT_REG_DWORD(addr, data) (outl((unsigned long)addr, data))
#endif
#define WRT_REG_BYTE(addr, data) outb(data, (unsigned long)addr)
#define WRT_REG_WORD(addr, data) outw(data, (unsigned long)addr)
#define WRT_REG_DWORD(addr, data) outl(data, (unsigned long)addr)
#endif /* MEMORY_MAPPED_IO */
#endif /* QL_DEBUG_LEVEL_1 */
......@@ -370,21 +146,21 @@ typedef long int32_t;
/* Number of segments 1 - 65535 */
#define SG_SEGMENTS 32 /* Cmd entry + 6 continuations */
/*
* SCSI Request Block structure
* SCSI Request Block structure (sp) that is placed
* on cmd->SCp location of every I/O
*/
typedef struct srb
{
Scsi_Cmnd *cmd; /* (4) SCSI command block */
struct srb *s_next; /* (4) Next block on LU queue */
struct srb *s_prev; /* (4) Previous block on LU queue */
typedef struct srb {
Scsi_Cmnd *cmd; /* (4/8) SCSI command block */
struct srb *s_next; /* (4/8) Next block on LU queue */
struct srb *s_prev; /* (4/8) Previous block on LU queue */
uint8_t flags; /* (1) Status flags. */
uint8_t dir; /* direction of transfer */
uint8_t unused[2];
u_long r_start; /* jiffies at start of request */
u_long u_start; /* jiffies when sent to F/W */
}srb_t;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18)
dma_addr_t saved_dma_handle; /* for unmap of single transfers */
#endif
} srb_t;
/*
* SRB flag definitions
......@@ -394,28 +170,26 @@ typedef struct srb
#define SRB_ABORT_PENDING BIT_2 /* Command abort sent to device */
#define SRB_ABORTED BIT_3 /* Command aborted command already */
/*
* Logical Unit Queue structure
*/
typedef struct scsi_lu
{
typedef struct scsi_lu {
srb_t *q_first; /* First block on LU queue */
srb_t *q_last; /* Last block on LU queue */
uint8_t q_flag; /* LU queue state flags */
uint8_t q_sense[16]; /* sense data */
u_long io_cnt; /* total xfer count */
u_long resp_time; /* total response time (start - finish) */
u_long act_time; /* total actived time (minus queuing time) */
u_long w_cnt; /* total writes */
u_long r_cnt; /* total reads */
unsigned long io_cnt; /* total xfer count */
unsigned long resp_time;/* total response time (start - finish) */
unsigned long act_time; /* total actived time (minus queuing time) */
unsigned long w_cnt; /* total writes */
unsigned long r_cnt; /* total reads */
uint16_t q_outcnt; /* Pending jobs for this LU */
#if QL1280_TARGET_MODE_SUPPORT
void (*q_func)(); /* Target driver event handler */
int32_t q_param; /* Target driver event param */
uint8_t q_lock; /* Device Queue Lock */
#endif
}scsi_lu_t;
} scsi_lu_t;
/*
* Logical Unit flags
......@@ -429,59 +203,31 @@ typedef struct scsi_lu
#define QLA1280_BSUSP BIT_6 /* controller is suspended */
#define QLA1280_BREM BIT_7 /* controller is removed */
/*
* ISP PCI Configuration Register Set
*/
typedef volatile struct
{
uint16_t vendor_id; /* 0x0 */
uint16_t device_id; /* 0x2 */
uint16_t command; /* 0x4 */
uint16_t status; /* 0x6 */
uint8_t revision_id; /* 0x8 */
uint8_t programming_interface; /* 0x9 */
uint8_t sub_class; /* 0xa */
uint8_t base_class; /* 0xb */
uint8_t cache_line; /* 0xc */
uint8_t latency_timer; /* 0xd */
uint8_t header_type; /* 0xe */
uint8_t bist; /* 0xf */
uint32_t base_port; /* 0x10 */
uint32_t mem_base_addr; /* 0x14 */
uint32_t base_addr[4]; /* 0x18-0x24 */
uint32_t reserved_1[2]; /* 0x28-0x2c */
uint16_t expansion_rom; /* 0x30 */
uint32_t reserved_2[2]; /* 0x34-0x38 */
uint8_t interrupt_line; /* 0x3c */
uint8_t interrupt_pin; /* 0x3d */
uint8_t min_grant; /* 0x3e */
uint8_t max_latency; /* 0x3f */
}config_reg_t;
/*
* ISP I/O Register Set structure definitions.
*/
typedef volatile struct
{
struct device_reg {
uint16_t id_l; /* ID low */
uint16_t id_h; /* ID high */
uint16_t cfg_0; /* Configuration 0 */
uint16_t cfg_1; /* Configuration 1 */
uint16_t ictrl; /* Interface control */
#define ISP_RESET BIT_0 /* ISP soft reset */
#define ISP_EN_INT BIT_1 /* ISP enable interrupts. */
#define ISP_EN_RISC BIT_2 /* ISP enable RISC interrupts. */
#define ISP_RESET BIT_0 /* ISP soft reset */
#define ISP_EN_INT BIT_1 /* ISP enable interrupts. */
#define ISP_EN_RISC BIT_2 /* ISP enable RISC interrupts. */
#define ISP_FLASH_ENABLE BIT_8 /* Flash BIOS Read/Write enable */
#define ISP_FLASH_UPPER BIT_9 /* Flash upper bank select */
uint16_t istatus; /* Interface status */
#define PCI_64BIT_SLOT BIT_14 /* PCI 64-bit slot indicator. */
#define RISC_INT BIT_2 /* RISC interrupt */
#define PCI_INT BIT_1 /* PCI interrupt */
#define PCI_64BIT_SLOT BIT_14 /* PCI 64-bit slot indicator. */
#define RISC_INT BIT_2 /* RISC interrupt */
#define PCI_INT BIT_1 /* PCI interrupt */
uint16_t semaphore; /* Semaphore */
uint16_t nvram; /* NVRAM register. */
#define NV_DESELECT 0
#define NV_CLOCK BIT_0
#define NV_SELECT BIT_1
#define NV_DATA_OUT BIT_2
#define NV_DATA_IN BIT_3
#define NV_DESELECT 0
#define NV_CLOCK BIT_0
#define NV_SELECT BIT_1
#define NV_DATA_OUT BIT_2
#define NV_DATA_IN BIT_3
uint16_t flash_data; /* Flash BIOS data */
uint16_t flash_address; /* Flash BIOS address */
......@@ -496,11 +242,11 @@ typedef volatile struct
uint16_t mailbox6; /* Mailbox 6 */
uint16_t mailbox7; /* Mailbox 7 */
uint16_t unused_2[0x20]; /* 0x80-0xbf Gap */
uint16_t unused_2[0x20];/* 0x80-0xbf Gap */
uint16_t host_cmd; /* Host command and control */
#define HOST_INT BIT_7 /* host interrupt bit */
#define BIOS_ENABLE BIT_0
#define HOST_INT BIT_7 /* host interrupt bit */
#define BIOS_ENABLE BIT_0
uint16_t unused_6[0x5]; /* 0xc2-0xcb Gap */
......@@ -509,8 +255,7 @@ typedef volatile struct
uint16_t unused_7[0x11]; /* d0-f0 */
uint16_t scsiControlPins; /* f2 */
}device_reg_t;
};
#define MAILBOX_REGISTER_COUNT 8
......@@ -618,129 +363,117 @@ typedef volatile struct
* NVRAM Command values.
*/
#define NV_START_BIT BIT_2
#define NV_WRITE_OP (BIT_26+BIT_24)
#define NV_READ_OP (BIT_26+BIT_25)
#define NV_ERASE_OP (BIT_26+BIT_25+BIT_24)
#define NV_MASK_OP (BIT_26+BIT_25+BIT_24)
#define NV_WRITE_OP (BIT_26 | BIT_24)
#define NV_READ_OP (BIT_26 | BIT_25)
#define NV_ERASE_OP (BIT_26 | BIT_25 | BIT_24)
#define NV_MASK_OP (BIT_26 | BIT_25 | BIT_24)
#define NV_DELAY_COUNT 10
/*
* QLogic ISP1280 NVRAM structure definition.
*/
typedef struct
{
typedef struct {
uint8_t id[4]; /* 0, 1, 2, 3 */
uint8_t version; /* 4 */
struct
{
uint8_t bios_configuration_mode :2;
uint8_t bios_disable :1;
uint8_t selectable_scsi_boot_enable :1;
uint8_t cd_rom_boot_enable :1;
uint8_t disable_loading_risc_code :1;
uint8_t enable_64bit_addressing :1;
uint8_t unused_7 :1;
}cntr_flags_1; /* 5 */
struct
{
uint8_t boot_lun_number :5;
uint8_t scsi_bus_number :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
uint8_t boot_target_number :4;
uint8_t unused_12 :1;
uint8_t unused_13 :1;
uint8_t unused_14 :1;
uint8_t unused_15 :1;
}cntr_flags_2; /* 6, 7 */
struct {
uint8_t bios_configuration_mode:2;
uint8_t bios_disable:1;
uint8_t selectable_scsi_boot_enable:1;
uint8_t cd_rom_boot_enable:1;
uint8_t disable_loading_risc_code:1;
uint8_t enable_64bit_addressing:1;
uint8_t unused_7:1;
} cntr_flags_1; /* 5 */
struct {
uint8_t boot_lun_number:5;
uint8_t scsi_bus_number:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
uint8_t boot_target_number:4;
uint8_t unused_12:1;
uint8_t unused_13:1;
uint8_t unused_14:1;
uint8_t unused_15:1;
} cntr_flags_2; /* 6, 7 */
uint16_t unused_8; /* 8, 9 */
uint16_t unused_10; /* 10, 11 */
uint16_t unused_12; /* 12, 13 */
uint16_t unused_14; /* 14, 15 */
union
{
union {
uint8_t c;
struct
{
uint8_t reserved :2;
uint8_t burst_enable :1;
uint8_t reserved_1 :1;
uint8_t fifo_threshold :4;
}f;
}isp_config; /* 16 */
struct {
uint8_t reserved:2;
uint8_t burst_enable:1;
uint8_t reserved_1:1;
uint8_t fifo_threshold:4;
} f;
} isp_config; /* 16 */
/* Termination
* 0 = Disable, 1 = high only, 3 = Auto term
*/
union
{
union {
uint8_t c;
struct
{
uint8_t scsi_bus_1_control :2;
uint8_t scsi_bus_0_control :2;
uint8_t unused_0 :1;
uint8_t unused_1 :1;
uint8_t unused_2 :1;
uint8_t auto_term_support :1;
}f;
}termination; /* 17 */
struct {
uint8_t scsi_bus_1_control:2;
uint8_t scsi_bus_0_control:2;
uint8_t unused_0:1;
uint8_t unused_1:1;
uint8_t unused_2:1;
uint8_t auto_term_support:1;
} f;
} termination; /* 17 */
uint16_t isp_parameter; /* 18, 19 */
union
{
union {
uint16_t w;
struct
{
uint8_t enable_fast_posting :1;
uint8_t report_lvd_bus_transition :1;
uint8_t unused_2 :1;
uint8_t unused_3 :1;
uint8_t unused_4 :1;
uint8_t unused_5 :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
uint8_t unused_8 :1;
uint8_t unused_9 :1;
uint8_t unused_10 :1;
uint8_t unused_11 :1;
uint8_t unused_12 :1;
uint8_t unused_13 :1;
uint8_t unused_14 :1;
uint8_t unused_15 :1;
}f;
}firmware_feature; /* 20, 21 */
struct {
uint8_t enable_fast_posting:1;
uint8_t report_lvd_bus_transition:1;
uint8_t unused_2:1;
uint8_t unused_3:1;
uint8_t unused_4:1;
uint8_t unused_5:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
uint8_t unused_8:1;
uint8_t unused_9:1;
uint8_t unused_10:1;
uint8_t unused_11:1;
uint8_t unused_12:1;
uint8_t unused_13:1;
uint8_t unused_14:1;
uint8_t unused_15:1;
} f;
} firmware_feature; /* 20, 21 */
uint16_t unused_22; /* 22, 23 */
struct
{
struct
{
uint8_t initiator_id :4;
uint8_t scsi_reset_disable :1;
uint8_t scsi_bus_size :1;
uint8_t scsi_bus_type :1;
uint8_t unused_7 :1;
}config_1; /* 24 */
struct {
struct {
uint8_t initiator_id:4;
uint8_t scsi_reset_disable:1;
uint8_t scsi_bus_size:1;
uint8_t scsi_bus_type:1;
uint8_t unused_7:1;
} config_1; /* 24 */
uint8_t bus_reset_delay; /* 25 */
uint8_t retry_count; /* 26 */
uint8_t retry_delay; /* 27 */
struct
{
uint8_t async_data_setup_time :4;
uint8_t req_ack_active_negation :1;
uint8_t data_line_active_negation :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
}config_2; /* 28 */
struct {
uint8_t async_data_setup_time:4;
uint8_t req_ack_active_negation:1;
uint8_t data_line_active_negation:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
} config_2; /* 28 */
uint8_t unused_29; /* 29 */
......@@ -751,39 +484,35 @@ typedef struct
uint16_t unused_36; /* 36, 37 */
uint16_t unused_38; /* 38, 39 */
struct
{
union
{
struct {
union {
uint8_t c;
struct
{
uint8_t renegotiate_on_error :1;
uint8_t stop_queue_on_check :1;
uint8_t auto_request_sense :1;
uint8_t tag_queuing :1;
uint8_t sync_data_transfers :1;
uint8_t wide_data_transfers :1;
uint8_t parity_checking :1;
uint8_t disconnect_allowed :1;
}f;
}parameter; /* 40 */
struct {
uint8_t renegotiate_on_error:1;
uint8_t stop_queue_on_check:1;
uint8_t auto_request_sense:1;
uint8_t tag_queuing:1;
uint8_t sync_data_transfers:1;
uint8_t wide_data_transfers:1;
uint8_t parity_checking:1;
uint8_t disconnect_allowed:1;
} f;
} parameter; /* 40 */
uint8_t execution_throttle; /* 41 */
uint8_t sync_period; /* 42 */
struct
{
uint8_t sync_offset :4;
uint8_t device_enable :1;
uint8_t lun_disable :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
}flags; /* 43 */
struct {
uint8_t sync_offset:4;
uint8_t device_enable:1;
uint8_t lun_disable:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
} flags; /* 43 */
uint16_t unused_44; /* 44, 45 */
}target[MAX_TARGETS];
}bus[MAX_BUSES];
} target[MAX_TARGETS];
} bus[MAX_BUSES];
uint16_t unused_248; /* 248, 249 */
......@@ -792,39 +521,36 @@ typedef struct
uint8_t unused_254; /* 254 */
uint8_t chksum; /* 255 */
}nvram_t;
} nvram_t;
/*
* QLogic ISP12160 NVRAM structure definition.
*/
typedef struct
{
typedef struct {
uint8_t id[4]; /* 0, 1, 2, 3 */
uint8_t version; /* 4 */
/* Host/Bios Flags */
struct
{
uint8_t bios_configuration_mode :2;
uint8_t bios_disable :1;
uint8_t selectable_scsi_boot_enable :1;
uint8_t cd_rom_boot_enable :1;
uint8_t disable_loading_risc_code :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
}cntr_flags_1; /* 5 */
struct {
uint8_t bios_configuration_mode:2;
uint8_t bios_disable:1;
uint8_t selectable_scsi_boot_enable:1;
uint8_t cd_rom_boot_enable:1;
uint8_t disable_loading_risc_code:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
} cntr_flags_1; /* 5 */
/* Selectable Boot Support */
struct
{
uint8_t boot_lun_number :5;
uint8_t scsi_bus_number :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
uint8_t boot_target_number :4;
uint8_t unused_12 :1;
uint8_t unused_13 :1;
uint8_t unused_14 :1;
uint8_t unused_15 :1;
}cntr_flags_2; /* 6, 7 */
struct {
uint8_t boot_lun_number:5;
uint8_t scsi_bus_number:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
uint8_t boot_target_number:4;
uint8_t unused_12:1;
uint8_t unused_13:1;
uint8_t unused_14:1;
uint8_t unused_15:1;
} cntr_flags_2; /* 6, 7 */
uint16_t unused_8; /* 8, 9 */
uint16_t unused_10; /* 10, 11 */
......@@ -832,89 +558,80 @@ typedef struct
uint16_t unused_14; /* 14, 15 */
/* ISP Config Parameters */
union
{
union {
uint8_t c;
struct
{
uint8_t reserved :2;
uint8_t burst_enable :1;
uint8_t reserved_1 :1;
uint8_t fifo_threshold :4;
}f;
}isp_config; /* 16 */
struct {
uint8_t reserved:2;
uint8_t burst_enable:1;
uint8_t reserved_1:1;
uint8_t fifo_threshold:4;
} f;
} isp_config; /* 16 */
/* Termination
* 0 = Disable, 1 = high only, 3 = Auto term
*/
union
{
union {
uint8_t c;
struct
{
uint8_t scsi_bus_1_control :2;
uint8_t scsi_bus_0_control :2;
uint8_t unused_0 :1;
uint8_t unused_1 :1;
uint8_t unused_2 :1;
uint8_t auto_term_support :1;
}f;
}termination; /* 17 */
struct {
uint8_t scsi_bus_1_control:2;
uint8_t scsi_bus_0_control:2;
uint8_t unused_0:1;
uint8_t unused_1:1;
uint8_t unused_2:1;
uint8_t auto_term_support:1;
} f;
} termination; /* 17 */
/* Auto Term - 3 */
/* High Only - 1 (GPIO2 = 1 & GPIO3 = 0) */
/* Disable - 0 (GPIO2 = 0 & GPIO3 = X) */
uint16_t isp_parameter; /* 18, 19 */
union
{
union {
uint16_t w;
struct
{
uint8_t enable_fast_posting :1;
uint8_t report_lvd_bus_transition :1;
uint8_t unused_2 :1;
uint8_t unused_3 :1;
uint8_t unused_4 :1;
uint8_t unused_5 :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
uint8_t unused_8 :1;
uint8_t unused_9 :1;
uint8_t unused_10 :1;
uint8_t unused_11 :1;
uint8_t unused_12 :1;
uint8_t unused_13 :1;
uint8_t unused_14 :1;
uint8_t unused_15 :1;
}f;
}firmware_feature; /* 20, 21 */
struct {
uint8_t enable_fast_posting:1;
uint8_t report_lvd_bus_transition:1;
uint8_t unused_2:1;
uint8_t unused_3:1;
uint8_t unused_4:1;
uint8_t unused_5:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
uint8_t unused_8:1;
uint8_t unused_9:1;
uint8_t unused_10:1;
uint8_t unused_11:1;
uint8_t unused_12:1;
uint8_t unused_13:1;
uint8_t unused_14:1;
uint8_t unused_15:1;
} f;
} firmware_feature; /* 20, 21 */
uint16_t unused_22; /* 22, 23 */
struct
{
struct
{
uint8_t initiator_id :4;
uint8_t scsi_reset_disable :1;
uint8_t scsi_bus_size :1;
uint8_t scsi_bus_type :1;
uint8_t unused_7 :1;
}config_1; /* 24 */
struct {
struct {
uint8_t initiator_id:4;
uint8_t scsi_reset_disable:1;
uint8_t scsi_bus_size:1;
uint8_t scsi_bus_type:1;
uint8_t unused_7:1;
} config_1; /* 24 */
uint8_t bus_reset_delay; /* 25 */
uint8_t retry_count; /* 26 */
uint8_t retry_delay; /* 27 */
/* Adapter Capabilities bits */
struct
{
uint8_t async_data_setup_time :4;
uint8_t req_ack_active_negation :1;
uint8_t data_line_active_negation :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
}config_2; /* 28 */
struct {
uint8_t async_data_setup_time:4;
uint8_t req_ack_active_negation:1;
uint8_t data_line_active_negation:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
} config_2; /* 28 */
uint8_t unused_29; /* 29 */
......@@ -925,42 +642,38 @@ typedef struct
uint16_t unused_36; /* 36, 37 */
uint16_t unused_38; /* 38, 39 */
struct
{
union
{
struct {
union {
uint8_t c;
struct
{
uint8_t renegotiate_on_error :1;
uint8_t stop_queue_on_check :1;
uint8_t auto_request_sense :1;
uint8_t tag_queuing :1;
uint8_t sync_data_transfers :1;
uint8_t wide_data_transfers :1;
uint8_t parity_checking :1;
uint8_t disconnect_allowed :1;
}f;
}parameter; /* 40 */
struct {
uint8_t renegotiate_on_error:1;
uint8_t stop_queue_on_check:1;
uint8_t auto_request_sense:1;
uint8_t tag_queuing:1;
uint8_t sync_data_transfers:1;
uint8_t wide_data_transfers:1;
uint8_t parity_checking:1;
uint8_t disconnect_allowed:1;
} f;
} parameter; /* 40 */
uint8_t execution_throttle; /* 41 */
uint8_t sync_period; /* 42 */
struct
{
uint8_t sync_offset :5;
uint8_t device_enable :1;
uint8_t unused_6 :1;
uint8_t unused_7 :1;
uint8_t ppr_options :4;
uint8_t ppr_bus_width :2;
uint8_t unused_8 :1;
uint8_t enable_ppr :1;
}flags; /* 43, 44 */
struct {
uint8_t sync_offset:5;
uint8_t device_enable:1;
uint8_t unused_6:1;
uint8_t unused_7:1;
uint8_t ppr_options:4;
uint8_t ppr_bus_width:2;
uint8_t unused_8:1;
uint8_t enable_ppr:1;
} flags; /* 43, 44 */
uint8_t unused_45; /* 45 */
}target[MAX_TARGETS];
}bus[MAX_BUSES];
} target[MAX_TARGETS];
} bus[MAX_BUSES];
uint16_t unused_248; /* 248, 249 */
......@@ -969,16 +682,15 @@ typedef struct
uint8_t System_Id_Pointer; /* 254 */
uint8_t chksum; /* 255 */
}nvram160_t;
} nvram160_t;
/*
* ISP queue - command entry structure definition.
*/
#define MAX_CMDSZ 12 /* SCSI maximum CDB size. */
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define COMMAND_TYPE 1 /* Command entry */
#define COMMAND_TYPE 1 /* Command entry */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -999,15 +711,14 @@ typedef struct
uint32_t dseg_2_length; /* Data segment 2 length. */
uint32_t dseg_3_address; /* Data segment 3 address. */
uint32_t dseg_3_length; /* Data segment 3 length. */
}cmd_entry_t;
} cmd_entry_t;
/*
* ISP queue - continuation entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CONTINUE_TYPE 2 /* Continuation entry. */
#define CONTINUE_TYPE 2 /* Continuation entry. */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -1026,48 +737,46 @@ typedef struct
uint32_t dseg_5_length; /* Data segment 5 length. */
uint32_t dseg_6_address; /* Data segment 6 address. */
uint32_t dseg_6_length; /* Data segment 6 length. */
}cont_entry_t;
} cont_entry_t;
/*
* ISP queue - status entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define STATUS_TYPE 3 /* Status entry. */
#define STATUS_TYPE 3 /* Status entry. */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
#define RF_CONT BIT_0 /* Continuation. */
#define RF_FULL BIT_1 /* Full */
#define RF_BAD_HEADER BIT_2 /* Bad header. */
#define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */
#define RF_CONT BIT_0 /* Continuation. */
#define RF_FULL BIT_1 /* Full */
#define RF_BAD_HEADER BIT_2 /* Bad header. */
#define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */
uint32_t handle; /* System handle. */
uint16_t scsi_status; /* SCSI status. */
uint16_t comp_status; /* Completion status. */
uint16_t state_flags; /* State flags. */
#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */
#define SF_GOT_SENSE BIT_13 /* Got Sense */
#define SF_GOT_STATUS BIT_12 /* Got Status */
#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */
#define SF_SENT_CDB BIT_10 /* Send CDB */
#define SF_GOT_TARGET BIT_9 /* */
#define SF_GOT_BUS BIT_8 /* */
#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */
#define SF_GOT_SENSE BIT_13 /* Got Sense */
#define SF_GOT_STATUS BIT_12 /* Got Status */
#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */
#define SF_SENT_CDB BIT_10 /* Send CDB */
#define SF_GOT_TARGET BIT_9 /* */
#define SF_GOT_BUS BIT_8 /* */
uint16_t status_flags; /* Status flags. */
uint16_t time; /* Time. */
uint16_t req_sense_length; /* Request sense data length. */
uint32_t residual_length; /* Residual transfer length. */
uint16_t reserved[4];
uint8_t req_sense_data[32]; /* Request sense data. */
}sts_entry_t, response_t;
} sts_entry_t, response_t;
/*
* ISP queue - marker entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define MARKER_TYPE 4 /* Marker entry. */
#define MARKER_TYPE 4 /* Marker entry. */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -1075,19 +784,18 @@ typedef struct
uint8_t lun; /* SCSI LUN */
uint8_t target; /* SCSI ID */
uint8_t modifier; /* Modifier (7-0). */
#define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */
#define MK_SYNC_ID 1 /* Synchronize ID */
#define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */
#define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */
#define MK_SYNC_ID 1 /* Synchronize ID */
#define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */
uint8_t reserved_1[53];
}mrk_entry_t;
} mrk_entry_t;
/*
* ISP queue - extended command entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define EXTENDED_CMD_TYPE 5 /* Extended command entry. */
#define EXTENDED_CMD_TYPE 5 /* Extended command entry. */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -1100,15 +808,14 @@ typedef struct
uint16_t timeout; /* Command timeout. */
uint16_t dseg_count; /* Data segment count. */
uint8_t scsi_cdb[88]; /* SCSI command words. */
}ecmd_entry_t;
} ecmd_entry_t;
/*
* ISP queue - 64-Bit addressing, command entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define COMMAND_A64_TYPE 9 /* Command A64 entry */
#define COMMAND_A64_TYPE 9 /* Command A64 entry */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -1126,15 +833,14 @@ typedef struct
uint32_t dseg_0_length; /* Data segment 0 length. */
uint32_t dseg_1_address[2]; /* Data segment 1 address. */
uint32_t dseg_1_length; /* Data segment 1 length. */
}cmd_a64_entry_t, request_t;
} cmd_a64_entry_t, request_t;
/*
* ISP queue - 64-Bit addressing, continuation entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CONTINUE_A64_TYPE 0xA /* Continuation A64 entry. */
#define CONTINUE_A64_TYPE 0xA /* Continuation A64 entry. */
uint8_t entry_count; /* Entry count. */
uint8_t sys_define; /* System defined. */
uint8_t entry_status; /* Entry Status. */
......@@ -1148,15 +854,14 @@ typedef struct
uint32_t dseg_3_length; /* Data segment 3 length. */
uint32_t dseg_4_address[2]; /* Data segment 4 address. */
uint32_t dseg_4_length; /* Data segment 4 length. */
}cont_a64_entry_t;
} cont_a64_entry_t;
/*
* ISP queue - enable LUN entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define ENABLE_LUN_TYPE 0xB /* Enable LUN entry. */
#define ENABLE_LUN_TYPE 0xB /* Enable LUN entry. */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status not used. */
......@@ -1175,15 +880,14 @@ typedef struct
/* commands (2-26). */
uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
uint16_t reserved_6[20];
}elun_entry_t;
} elun_entry_t;
/*
* ISP queue - modify LUN entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define MODIFY_LUN_TYPE 0xC /* Modify LUN entry. */
#define MODIFY_LUN_TYPE 0xC /* Modify LUN entry. */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1201,15 +905,14 @@ typedef struct
uint16_t reserved_6;
uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
uint16_t reserved_7[20];
}modify_lun_entry_t;
} modify_lun_entry_t;
/*
* ISP queue - immediate notify entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define IMMED_NOTIFY_TYPE 0xD /* Immediate notify entry. */
#define IMMED_NOTIFY_TYPE 0xD /* Immediate notify entry. */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1228,15 +931,14 @@ typedef struct
uint8_t scsi_msg[8]; /* SCSI message not handled by ISP */
uint16_t reserved_5[8];
uint8_t sense_data[18];
}notify_entry_t;
} notify_entry_t;
/*
* ISP queue - notify acknowledge entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define NOTIFY_ACK_TYPE 0xE /* Notify acknowledge entry. */
#define NOTIFY_ACK_TYPE 0xE /* Notify acknowledge entry. */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1250,15 +952,14 @@ typedef struct
uint8_t event;
uint16_t seq_id;
uint16_t reserved_4[22];
}nack_entry_t;
} nack_entry_t;
/*
* ISP queue - Accept Target I/O (ATIO) entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define ACCEPT_TGT_IO_TYPE 6 /* Accept target I/O entry. */
#define ACCEPT_TGT_IO_TYPE 6 /* Accept target I/O entry. */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1274,15 +975,14 @@ typedef struct
uint8_t tag_type; /* Received queue tag message type */
uint8_t cdb[26];
uint8_t sense_data[18];
}atio_entry_t;
} atio_entry_t;
/*
* ISP queue - Continue Target I/O (CTIO) entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CONTINUE_TGT_IO_TYPE 7 /* CTIO entry */
#define CONTINUE_TGT_IO_TYPE 7 /* CTIO entry */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1308,15 +1008,14 @@ typedef struct
uint32_t dseg_2_length; /* Data segment 2 length. */
uint32_t dseg_3_address; /* Data segment 3 address. */
uint32_t dseg_3_length; /* Data segment 3 length. */
}ctio_entry_t;
} ctio_entry_t;
/*
* ISP queue - CTIO returned entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CTIO_RET_TYPE 7 /* CTIO return entry */
#define CTIO_RET_TYPE 7 /* CTIO return entry */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1339,15 +1038,14 @@ typedef struct
uint32_t dseg_1_address; /* Data segment 1 address. */
uint16_t dseg_1_length; /* Data segment 1 length. */
uint8_t sense_data[18];
}ctio_ret_entry_t;
} ctio_ret_entry_t;
/*
* ISP queue - CTIO A64 entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CTIO_A64_TYPE 0xF /* CTIO A64 entry */
#define CTIO_A64_TYPE 0xF /* CTIO A64 entry */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1370,15 +1068,14 @@ typedef struct
uint32_t dseg_0_length; /* Data segment 0 length. */
uint32_t dseg_1_address[2]; /* Data segment 1 address. */
uint32_t dseg_1_length; /* Data segment 1 length. */
}ctio_a64_entry_t;
} ctio_a64_entry_t;
/*
* ISP queue - CTIO returned entry structure definition.
*/
typedef struct
{
typedef struct {
uint8_t entry_type; /* Entry type. */
#define CTIO_A64_RET_TYPE 0xF /* CTIO A64 returned entry */
#define CTIO_A64_RET_TYPE 0xF /* CTIO A64 returned entry */
uint8_t entry_count; /* Entry count. */
uint8_t reserved_1;
uint8_t entry_status; /* Entry Status. */
......@@ -1398,7 +1095,7 @@ typedef struct
uint16_t dseg_count; /* Data segment count. */
uint16_t reserved_4[7];
uint8_t sense_data[18];
}ctio_a64_ret_entry_t;
} ctio_a64_ret_entry_t;
/*
* ISP request and response queue entry sizes
......@@ -1476,19 +1173,17 @@ typedef struct
#define TARGET_SENSE_SIZE 18
#define TARGET_BUF_SIZE 36
typedef struct
{
typedef struct {
uint8_t hdr[4];
uint8_t data[TARGET_DATA_SIZE];
struct ident inq;
}tgt_t;
} tgt_t;
#endif
/*
* BUS parameters/settings structure
*/
typedef struct
{
typedef struct {
uint8_t id; /* Host adapter SCSI id */
uint8_t bus_reset_delay; /* SCSI bus reset delay. */
uint8_t failed_reset_count; /* number of time reset failed */
......@@ -1497,36 +1192,31 @@ typedef struct
uint16_t lun_disables; /* LUN disable bits. */
uint16_t qtag_enables; /* Tag queue enables. */
uint16_t hiwat; /* High water mark per device. */
uint8_t reset_marker :1;
uint8_t disable_scsi_reset :1;
uint8_t scsi_bus_dead :1; /* SCSI Bus is Dead, when 5 back to back resets failed */
uint8_t reset_marker:1;
uint8_t disable_scsi_reset:1;
uint8_t scsi_bus_dead:1; /* SCSI Bus is Dead, when 5 back to back resets failed */
}bus_param_t;
} bus_param_t;
/*
* Linux Host Adapter structure
*/
typedef struct scsi_qla_host
{
struct scsi_qla_host {
/* Linux adapter configuration data */
struct Scsi_Host *host; /* pointer to host data */
struct scsi_qla_host *next;
device_reg_t *iobase; /* Base Memory-mapped I/O address */
struct device_reg *iobase; /* Base Memory-mapped I/O address */
uint8_t pci_bus;
uint8_t pci_device_fn;
uint8_t devnum;
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95)
struct pci_dev *pdev;
#endif
volatile unsigned char *mmpbase; /* memory mapped address */
unsigned long host_no;
unsigned long instance;
uint8_t revision;
uint8_t ports;
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,0)
spinlock_t spin_lock;
#endif
volatile unsigned char cpu_lock_count[NR_CPUS];
unsigned long actthreads;
unsigned long qthreads;
unsigned long isr_count; /* Interrupt count */
......@@ -1541,12 +1231,7 @@ typedef struct scsi_qla_host
bus_param_t bus_settings[MAX_BUSES];
/* Device LUN queues. */
scsi_lu_t *dev[MAX_EQ]; /* Logical unit queues */
#ifdef UNUSED
/* Interrupt lock, and data */
uint8_t intr_lock; /* Lock for interrupt locking */
#endif
struct scsi_lu *dev[MAX_EQ]; /* Logical unit queues */
/* bottom half run queue */
struct tq_struct run_qla_bh;
......@@ -1555,29 +1240,25 @@ typedef struct scsi_qla_host
volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
#ifdef UNUSED
/* ISP ring lock, rings, and indexes */
uint8_t ring_lock; /* ISP ring lock */
struct timer_list dev_timer[MAX_TARGETS];
#endif
request_t req[REQUEST_ENTRY_CNT+1];
response_t res[RESPONSE_ENTRY_CNT+1];
unsigned long request_dma; /* Physical address. */
dma_addr_t request_dma; /* Physical Address */
request_t *request_ring; /* Base virtual address */
request_t *request_ring_ptr; /* Current address. */
uint16_t req_ring_index; /* Current index. */
uint16_t req_q_cnt; /* Number of available entries. */
unsigned long response_dma; /* Physical address. */
dma_addr_t response_dma; /* Physical address. */
response_t *response_ring; /* Base virtual address */
response_t *response_ring_ptr; /* Current address. */
uint16_t rsp_ring_index; /* Current index. */
#if QL1280_TARGET_MODE_SUPPORT
/* Target buffer and sense data. */
uint32_t tbuf_dma; /* Physical address. */
dma_addr_t tbuf_dma; /* Physical address. */
dma_addr_t tsense_dma; /* Physical address. */
tgt_t *tbuf;
uint32_t tsense_dma; /* Physical address. */
uint8_t *tsense;
#endif
......@@ -1593,117 +1274,60 @@ typedef struct scsi_qla_host
srb_t *done_q_first; /* First job on done queue */
srb_t *done_q_last; /* Last job on done queue */
volatile struct
{
uint32_t watchdog_enabled :1; /* 0 */
uint32_t mbox_int :1; /* 1 */
uint32_t mbox_busy :1; /* 2 */
uint32_t online :1; /* 3 */
uint32_t reset_marker :1; /* 4 */
uint32_t isp_abort_needed :1; /* 5 */
uint32_t pci_64bit_slot :1; /* 6 */
uint32_t disable_host_adapter :1; /* 7 */
uint32_t reset_active :1; /* 8 */
uint32_t abort_isp_active :1; /* 9 */
uint32_t disable_risc_code_load :1; /* 10 */
uint32_t enable_64bit_addressing :1; /* 11 */
#define QLA1280_IN_ISR_BIT 12
uint32_t in_isr :1; /* 12 */
uint32_t in_abort :1; /* 13 */
uint32_t in_reset :1; /* 14 */
uint32_t dpc :1; /* 15 */
uint32_t dpc_sched :1; /* 16 */
uint32_t interrupts_on :1; /* 17 */
}flags;
}scsi_qla_host_t;
volatile struct {
uint32_t mbox_int:1; /* 0 */
uint32_t mbox_busy:1; /* 1 */
uint32_t online:1; /* 2 */
uint32_t reset_marker:1; /* 3 */
uint32_t isp_abort_needed:1; /* 4 */
uint32_t disable_host_adapter:1; /* 5 */
uint32_t reset_active:1; /* 6 */
uint32_t abort_isp_active:1; /* 7 */
uint32_t disable_risc_code_load:1; /* 8 */
uint32_t enable_64bit_addressing:1; /* 9 */
uint32_t in_reset:1; /* 10 */
uint32_t ints_enabled:1;
} flags;
/* needed holders for PCI ordered list of hosts */
unsigned long io_port;
uint32_t irq;
};
/*
* Macros to help code, maintain, etc.
*/
#define SUBDEV(b, t, l) ( (b << (MAX_T_BITS + MAX_L_BITS)) | (t << MAX_L_BITS) | l)
#define SUBDEV(b, t, l) ((b << (MAX_T_BITS + MAX_L_BITS)) | (t << MAX_L_BITS) | l)
#define LU_Q(ha, b, t, l) (ha->dev[SUBDEV(b, t, l)])
/*
* Locking Macro Definitions
*
* LOCK/UNLOCK definitions are lock/unlock primitives for multi-processor
* or spl/splx for uniprocessor.
*/
#define QLA1280_HIER HBA_HIER_BASE /* Locking hierarchy base for hba */
#define QLA1280_WATCHDOG_Q_LOCK(ha, p)
#define QLA1280_WATCHDOG_Q_UNLOCK(ha, p)
#define QLA1280_SCSILU_LOCK(q)
#define QLA1280_SCSILU_UNLOCK(q)
#endif /* HOSTS_C */
#define QLA1280_INTR_LOCK(ha)
#define QLA1280_INTR_UNLOCK(ha)
#define QLA1280_RING_LOCK(ha)
#define QLA1280_RING_UNLOCK(ha)
#if defined(__cplusplus)
}
#endif
/*
* Linux - SCSI Driver Interface Function Prototypes.
*/
int qla1280_proc_info ( char *, char **, off_t, int, int, int);
const char * qla1280_info(struct Scsi_Host *host);
int qla1280_proc_info(char *, char **, off_t, int, int, int);
const char *qla1280_info(struct Scsi_Host *host);
int qla1280_detect(Scsi_Host_Template *);
int qla1280_release(struct Scsi_Host *);
const char * qla1280_info(struct Scsi_Host *);
int qla1280_queuecommand(Scsi_Cmnd *, void (* done)(Scsi_Cmnd *));
int qla1280_queuecommand(Scsi_Cmnd *, void (*done) (Scsi_Cmnd *));
int qla1280_abort(Scsi_Cmnd *);
int qla1280_reset(Scsi_Cmnd *, unsigned int);
int qla1280_biosparam(Disk *, kdev_t, int[]);
void qla1280_intr_handler(int, void *, struct pt_regs *);
void qla1280_setup(char *s, int *dummy);
#if defined(__386__)
# define QLA1280_BIOSPARAM qla1280_biosparam
#else
# define QLA1280_BIOSPARAM NULL
#endif
/*
* Scsi_Host_template (see hosts.h)
* Device driver Interfaces to mid-level SCSI driver.
*/
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
/* This interface is now obsolete !!! */
#define QLA1280_LINUX_TEMPLATE { \
next: NULL, \
usage_count: NULL, \
proc_dir: NULL, \
proc_info: NULL, \
name: "Qlogic ISP 1280", \
detect: qla1280_detect, \
release: qla1280_release, \
info: qla1280_info, \
command: NULL, \
queuecommand: qla1280_queuecommand, \
abort: qla1280_abort, \
reset: qla1280_reset, \
slave_attach: NULL, \
bios_param: QLA1280_BIOSPARAM, \
can_queue: 255, /* MAX_OUTSTANDING_COMMANDS */ \
this_id: -1, /* scsi id of host adapter */ \
sg_tablesize: SG_ALL, \
cmd_per_lun: 3, /* max commands per lun */ \
present: 0, /* number of 1280s present */ \
unchecked_isa_dma: 0, /* no memeory DMA restrictions */ \
use_clustering: ENABLE_CLUSTERING \
}
#else
#define QLA1280_LINUX_TEMPLATE { \
next: NULL, \
module: NULL, \
proc_dir: NULL, \
proc_info: qla1280_proc_info, \
name: "Qlogic ISP 1280\1080", \
name: "Qlogic ISP 1280/12160", \
detect: qla1280_detect, \
release: qla1280_release, \
info: qla1280_info, \
......@@ -1715,20 +1339,19 @@ void qla1280_setup(char *s, int *dummy);
eh_device_reset_handler: NULL, \
eh_bus_reset_handler: NULL, \
eh_host_reset_handler: NULL, \
/* use_new_eh_code: 0, */ \
abort: qla1280_abort, \
reset: qla1280_reset, \
slave_attach: NULL, \
bios_param: QLA1280_BIOSPARAM, \
bios_param: qla1280_biosparam, \
can_queue: 255, /* max simultaneous cmds */\
this_id: -1, /* scsi id of host adapter */\
sg_tablesize: SG_ALL, /* max scatter-gather cmds */\
cmd_per_lun: 3, /* cmds per lun (linked cmds) */\
present: 0, /* number of 7xxx's present */\
present: 0, /* number of 1280's present */\
unchecked_isa_dma: 0, /* no memory DMA restrictions */\
use_clustering: ENABLE_CLUSTERING, \
emulated: 0 \
}
#endif
#endif /* _IO_HBA_QLA1280_H */
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